Fujitsu CS81 User Manual

CS81 Series Standard Cell  
0.18µm CMOS Technology  
CS81 I/O Interface Capabilities  
Features  
• 0.13µm effective channel length  
PLL  
High-Speed  
Interface  
1.8V CMOS  
1.8V Device  
1.8V  
T-LVTTL  
P-CML  
LVDS  
SSTL  
HSTL  
Clock Input  
• 3 to 5 layers of metal interconnects  
CMOS  
High-Speed  
Devices  
• Very high density: 110K raw gates/mm2  
2.5V CMOS  
2.5V  
CMOS  
• Up to 28 million gates  
• Core power supply voltage: 1.8V to 1.1V  
• 5 nW/gate/MHz power dissipation at 1.1V  
• 11 ps gate delay at 1.8V and 1 fan-out  
• Junction temperature range: –40 to +125°C  
• I/Os: 3.3V, 2.5V, 1.8V, 5V tolerant  
• High-density diffused RAMs and ROMs  
• High-speed mixed-signal macros  
• Analog PLLs  
2.5V Device  
CS81  
Analog  
Interface  
(1.8V)  
3.3V TTL  
3.3V Device  
3.3V  
CMOS  
PCI  
ADC/DAC  
USB  
AGP  
AGP  
PCI Bus  
USB Devices  
• Wide selection of advanced packaging options  
• Proven design methodology and tool support  
Two cell libraries: high-performance and  
high-density  
Description  
In addition to the traditional QFP packages, the CS81  
family is available in TAB, EBGA, FBGA, and Flip-  
chip BGA packages.  
Fujitsus CS81, a 0.18µm (0.13µm L ) standard-cell  
eff  
product, is based on Fujitsus state-of-the-art CMOS  
process technology, a deep sub-micron process designed  
for todays high-density and low-power SOC products.  
The cell library, which is optimized for synthesis-based  
designs, has accurate timing and power-characterized  
data, cell areas, and statistical wire-load models. The  
CS81 standard-cell library contains both high-perfor-  
mance and high-density cells, giving designers the  
option of combining both types of standard cell blocks  
on the same chip. The CS81 library supports popular  
third-party tools and data-exchange file standards.  
CS81 offers a rich set of ADCs and DACs, PLLs, high-  
speed RAMs and ROMs, as well as a variety of other  
embedded functions. The following blocks will be avail-  
able in the near future:  
• Special high-speed I/Os:  
T-LVTTL, P-CML, LVDS, SSTL, and HSTL  
• Special-purpose Interfaces:  
PCI, AGP, and USB  
The CS81 chip cores can operate at 1.8V to 1.1V. The  
I/Os, operating at 1.8V, 2.5V, 3.3V, or 5V tolerance, can  
conveniently interface with various types of devices.  
Interface options include low-swing, high-speed I/Os  
and high-speed bus interface I/Os.  
Design Methodology  
Fujitsus design methodology ensures first-time silicon suc-  
cess by integrating proprietary point tools with popular,  
sign-off-quality, industry-standard CAD tools such as:  
• Logic design rule checker  
• Delay calculator  
• Quasi 3-D parasitic extraction tool  
Both inline and staggered I/O pad configurations are  
available. Inline pads are available in both 70µm and  
44µm pad pitch. The 70µm pads are wire bonded,  
whereas the 44µm pads are used with TAB. The 66µm  
wire-bond stagger pads can be used for optimizing the  
die area of pad-limited designs.  
Fujitsus clock-driven design methodology is devised for low  
power and low skew. The methodology identifies the best-  
suited clock distribution strategy for a given design and  
0.18µm CMOS Technology  
PACKAGE AVAILABILITY  
No. of Pins/Balls  
Pin/Ball Pitch  
Dimensions  
TAB-BGA (Cavity-down)  
304  
352  
480  
560  
660  
720  
0.8 mm  
0.8 mm  
1.0 mm  
1.0 mm  
1.0 mm  
1.0 mm  
21 mm  
23 mm  
31 mm  
35 mm  
40 mm  
40 mm  
EBGA (Cavity-down)  
576  
672  
1.27 mm  
1.27 mm  
40 mm  
45 mm  
HQFP (Cavity-up)  
208  
240  
256  
304  
0.50 mm  
0.50 mm  
0.40 mm  
0.50 mm  
28 mm  
32 mm  
28 mm  
40 mm  
TQFP (Cavity-up)  
100  
120  
0.50 mm  
0.50 mm  
14 mm  
20 mm  
LQFP (Cavity-up)  
144  
176  
208  
0.50 mm  
0.50 mm  
0.50 mm  
20 mm  
24 mm  
28 mm  
FBGA (Cavity-up)  
112  
144  
168  
176  
192  
224  
240  
272  
288  
304  
320  
368  
0.80 mm  
0.80 mm  
0.80 mm  
0.80 mm  
0.80 mm  
0.80 mm  
0.50 mm  
0.80 mm  
0.75 mm  
0.50 mm  
0.80 mm  
0.50 mm  
10 mm  
12 mm  
12 mm  
12 mm  
14 mm  
16 mm  
10 mm  
18 mm  
18 mm  
12 mm  
18 mm  
14 mm  
FC-BGA (Cavity-down)  
1,089  
1,225  
1,369  
1,681  
1,849  
2,116  
1.27 mm  
1.27 mm  
1.27 mm  
1.00 mm  
1.00 mm  
1.00 mm  
42.4 mm  
45.0 mm  
47.5 mm  
42.5 mm  
45.0 mm  
47.5 mm  
Fujitsu Microelectronics, Inc.  
FUJITSU MICROELECTRONICS AMERICA, INC.  
Corporate Headquarters  
© 1999 Fujitsu Microelectronics, Inc.  
1250 East Arques Avenue, Sunnyvale, California 94088-3470  
Tel: (800) 866-8608 Fax: (408) 737-5999  
E-mail: inquiry@fma.fujitsu.com Internet: http://www.fma.fujitsu.com  
All company and product names are trademarks or  
registered trademarks of their respective owners.  
Printed in the U.S.A. ASIC-FS-20820-10/99  

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