IBM Personal Computer PC 300GL User Manual

IBM  
Technical Information Manual  
PC 300GL Types 6563, 6564, 6574  
PC 300PL Type 6565  
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Note:  
Before using this information and the product it supports, be sure to read the general infromation  
under “Appendix E. Notices and Trademarks,” on page 57.  
Technical Information Manual IBM PC 300GL Types 6563, 6564, 6574 and PC300PL Type 6565  
Second Edition (March 2000)  
© COPYRIGHT INTERNATIONAL BUSINESS MACHINES CORPORATION, 2000. All rights reserved.  
Note to U.S. Government Users — Documentation related to restricted rights — Use, duplication or disclosure is subject  
to restrictions set forth in GSA ADP Schedule Contract with IBM Corp.  
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Contents  
Plug and Play . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29  
POST . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29  
Configuration/ Setup Utility program . . . . . . . . . . . . . . 30  
Advanced Power Management (APM) . . . . . . . . . . . . . 30  
Advanced Configuration and Power Interface (ACPI) 30  
Flash update utility program . . . . . . . . . . . . . . . . . . . . . . 30  
Diagnostic program . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30  
Preface . . . . . . . . . . . . . . . . . . . . . . . . . . . vii  
Related publications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . vii  
Terminology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . viii  
Chapter 1.System Overview . . . . . . . . . . . . 1  
Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
CD-RW . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2  
DVD-ROM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2  
ADSL modems. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
Wake on LAN. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
Wake on Ring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
Chapter 6.System compatibility . . . . . . . . 31  
Hardware compatibility . . . . . . . . . . . . . . . . . . . . . . . . . . 31  
Hardware interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . 31  
Software compatibility . . . . . . . . . . . . . . . . . . . . . . . . . . . 32  
Software interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . 32  
Machine-sensitive programs. . . . . . . . . . . . . . . . . . . . 32  
Chapter 2.System board features . . . . . . . 5  
Intel Pentium III microprocessor with MMX technology 5  
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5  
L2 Cache . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5  
Chip set control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5  
System memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5  
PCI Bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7  
IDE bus master interface. . . . . . . . . . . . . . . . . . . . . . . . 7  
USB interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7  
Video Subsystem . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8  
Audio Subsystem . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10  
Integrated peripheral controller . . . . . . . . . . . . . . . . . . . 11  
Diskette Drive Interface . . . . . . . . . . . . . . . . . . . . . . . 11  
Serial ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
Parallel port. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12  
Keyboard and mouse ports . . . . . . . . . . . . . . . . . . . . 12  
Network connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13  
Real-time clock and CMOS . . . . . . . . . . . . . . . . . . . . . . . 13  
Flash EEPROM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13  
Expansion adapters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13  
Physical layout. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14  
Rocker switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15  
Cable connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17  
Connector panel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17  
Appendix A. Connector pin assignments 33  
SVGA monitor connector . . . . . . . . . . . . . . . . . . . . . . . . . 33  
DVI-I monitor connector . . . . . . . . . . . . . . . . . . . . . . . . . 34  
System memory connector . . . . . . . . . . . . . . . . . . . . . . . . 34  
PCI connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40  
IDE connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42  
Diskette drive connector. . . . . . . . . . . . . . . . . . . . . . . . . . 43  
Power supply connector . . . . . . . . . . . . . . . . . . . . . . . . . . 44  
Wake on LAN connectors. . . . . . . . . . . . . . . . . . . . . . . . . 44  
USB port connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44  
Mouse and keyboard port connectors . . . . . . . . . . . . . . 45  
Serial port connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45  
Parallel port connector . . . . . . . . . . . . . . . . . . . . . . . . . . . 46  
Appendix B. System address maps. . . . . 47  
System memory map . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47  
Input/ output address map . . . . . . . . . . . . . . . . . . . . . . . 48  
DMA I/ O address map. . . . . . . . . . . . . . . . . . . . . . . . . . . 50  
PCI configuration space map . . . . . . . . . . . . . . . . . . . . . . 51  
Appendix C. IRQ and DMA channel  
assignments. . . . . . . . . . . . . . . . . . . . . . . 53  
Chapter 3.Physical specifications . . . . . . 21  
PC 300 GL and PL desktop . . . . . . . . . . . . . . . . . . . . . . . 21  
PC300 PL and GL tower . . . . . . . . . . . . . . . . . . . . . . . . . . 22  
Appendix D. Error codes . . . . . . . . . . . . . 55  
POST error codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55  
Beep codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55  
Chapter 4.Power supply . . . . . . . . . . . . . . 25  
Power input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25  
Power output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25  
Component outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26  
Output protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27  
Connector description . . . . . . . . . . . . . . . . . . . . . . . . . . . 27  
Appendix E. Notices and Trademarks . . . 57  
Bibliography. . . . . . . . . . . . . . . . . . . . . . . . 59  
Index . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61  
Chapter 5.System software. . . . . . . . . . . . 29  
BIOS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29  
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Preface  
This Technical Information Manual provides information for the IBM PC 300GL  
personal computer types 6563, 6564, 6574 and PC 300PL personal computer type 6565.  
The Manual is intended for developers who want to provide hardware and software  
products to operate with these IBM computers and provides an in-depth view of how  
these IBM computers work. Users of this publication should have an understanding  
of computer architecture and programming concepts.  
Related publications  
In addition to this Manual, the following IBM publications provide information  
related to the operation of the IBM PC 300GL and PC 300PL personal computer.  
Several publications mentioned in this book are available from the IBM Web site. In  
some cases, you will have to follow further instructions on the Web site to find the  
document for your particular computer and model. To order printed publications in  
the U.S. and Puerto Rico, call 1-800-879-2755. In other countries, contact an IBM  
reseller or an IBM marketing representative.  
PC 300GL and PC 300PL User Guide  
This publication contains information about configuring, operating, and  
maintaining the PC 300GL and the PC 300PL personal computer, as well as  
installing new options in the PC 300GL and PC 300PL personal computer. Also  
included are warranty information, instructions for diagnosing and solving  
problems, and information on how to obtain help and service.  
Understanding Your Personal Computer  
This online document includes general information about using computers and  
detailed information about the features of the PC 300GL and the PC 300PL  
personal computer. This publication is available on the World Wide Web at  
http:/ / www.ibm.com/ pc/ support.  
About Your Software  
This publication (provided only with computers that have IBM-preinstalled  
software) contains information about the preinstalled software package.  
Hardware Maintenance Manual  
This publication contains information for trained service technicians. It is  
can also be ordered from IBM. To purchase a copy, see the "Getting Help,  
Service, and Information" section in the PC 300GL and PC 300PL User Guide.  
Compatibility Report  
This publication contains information about compatible hardware and software  
for the PC 300GL and PC 300PL personal computer. It is available at  
http:/ / www.ibm.com/ pc/ us/ cdt on the World Wide Web.  
Network Administrators Guide  
This publication contains information for network administrators who configure  
and service local area networks (LANs). Look for this publication at  
http:/ / www.ibm.com/ pc/ us/ cdt on the World Wide Web.  
© Copyright IBM Corp. 2000  
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Terminology  
Attention: The term reserved describes certain signals, bits, and registers that should  
not be changed. Use of reserved areas can cause compatibility problems, loss of data,  
or permanent damage to the hardware. If you change the contents of a register,  
preserve the state of the reserved bits. When possible, read the register first and  
change only the bits that must be changed.  
In this manual, some signals are represented in an all-capital-letter format  
(-ACK). A minus sign in front of the signal indicates that the signal is active low. No  
sign in front of the signal indicates that the signal is active high.  
The term hex indicates a hexidecimal number.  
When numerical modifiers such as K, M, and G are used, they typically indicate  
powers of 2, not powers of 10. For example, 1 KB equals 1 024 bytes (210), 1 MB equals  
1 048 576 bytes (220), and 1 GB, equals 1 073 741 824 bytes (230).  
When expressing storage capacity, MB equals 1 000 KB (1 024 000). The value is  
determned by counting the number of sectors and assuming thatevery two sectors  
equals 1 KB.  
Note: Depending on the operating system and other requirements, the storage  
capacity available to you might vary.  
viii PC 300 GL and 300 PL  
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Chapter 1. System Overview  
IBM® PC 300® GL personal computer types 6563, 6564, and 6574 and PC 300PL  
personal computer type 6565 are computer systems that provide state-of-the-art  
computer power with room for future growth.  
Features  
Your computer has:  
An Intel® Pentium® III microprocessor with MMXtechnology, streaming  
single instruction multiple date (SMID) extensions, and 512 KB L2 cache  
Your computer may have all, or some, of the following major features:  
Room for up to 1 GB of system memory total  
Integrated IDE bus master controller, Ultra DMA-66 capable  
EIDE hard disk drive  
System management  
— Remote Program Load (RPL) and Dynamic Host Configuration Protocol  
(DHCP)  
— Wake on LAN® support  
— Desktop Management Interface (DMI) BIOS and DMI software  
— Integrated network protocols  
— Enablement for Remote Administration  
— Ability to update POST and BIOS over the network  
— Wake on Ring support  
— Automatic power-on startup  
— System Management (SM) BIOS and software  
— Ability to store POST hardware test results  
— Selectable startup sequence  
— Selectable Automatic Power ON Startup Sequence  
— CMOS Save/ Restore utility program  
— CMOS setup over LAN  
IDE CD-ROM1 drive, standard on some models  
CD-RW (Rewritable) drive, standard on some models  
DVD-ROM drive, standard on some models  
Asynchronous Digital Subscriber Line (ADSL) modem, standard on some  
models  
Asset security  
— Security settings provided by the Configuration/ Setup Utility program:  
Power-on and administrator password protection  
Startup sequence control  
Hard disk drive and diskette drive access control  
I/ O port control  
— Cover lock loop (PC 300GL models only)  
— Cover key lock (PC 300PL models only)  
— U-bolt and security cabling (optional)  
1. Variable read rate. Actual playback speed will vary and is often less than the maximum possible.  
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— Diskette write-protection™  
— Alert on LAN  
Accelerated graphics port (AGP) video adapter with up to 16 MB of  
Synchronous Graphics Random Access Memory (SGRAM)  
Integrated 16-bit audio controller and built-in high-quality speaker (supports  
SoundBlaster, Adlib, and Microsoft® Windows® Sound System applications)  
Networking  
— IBM 10/ 100 megabits-per-second (Mbps) PCI Ethernet adapter with Wake  
on LAN in some models  
— IBM PCI token-ring adapter with Wake on LAN support (optional)  
Expansion: four drive bays, three PCI expansion slots  
PCI I/ O bus compatibility  
EnergyStar compliance (some models only)  
3.5-inch, 1.44 MB diskette drive  
Input/ Output features  
— One 25-pin, ECP/ EPP parallel port  
Two 9-pin, 16550 universal asynchronous receiver/ transmitter (UART)  
serial ports  
Two 4-pin, Universal Serial Bus (USB) ports  
— One 6-pin, keyboard port  
— One 6-pin, mouse port  
— One 15-pin, DDC2B-compliant monitor port or  
— One 24-pin, DVI-I port on the AGP adapter (on some models)  
— Three 3.5-mm audio jacks (in/ headphone out, line in, microphone)  
CD-RW  
CD-Rewritable (CD-RW) drives, standard on some models, enable the recording and  
reuse of CD recordable media. The laser used in CD-RW has variable temperatures to  
provide the three functions of CD-RW drives: playing CDs or CD-RWs, erasing  
CD-RWs, and recording CD-RWs.  
CD-RW drives can read traditional CDs, but many older CD players cannot read  
CD-RWs. Their light reflective properties are about one-third that of traditional CDs.  
CD-RW drives cannot read DVDs.  
To learn more about CD-RW drives, see the Understanding Your Personal Computer  
publication for your personal computer model and type number. This publication is  
DVD-ROM  
DVD-ROM drives, standard on some models, differ from CD-ROM and CD-RW  
drives as the result of refinements in laser technology.  
The recording tracks on DVD media are not as deep and are more condensed than on  
CDs or CD-RWs, therefore DVDs provide more storage space. DVD media also use  
both sides of the disk, as opposed to just one side for CDs and CD-RWs.  
DVD-ROM drives read traditional CDs, CD-RWs, and DVDs.  
To learn more about DVD-ROM drives, see the Understanding Your Personal Computer  
publication for your personal computer model and type number. This publication is  
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PC 300 GL and 300 PL  
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ADSL modems  
ADSL modems, available on some models, enable simultaneous internet connectivity  
and telephone service. Contact your local telephone service provider and ask if your  
premises need any additional telephony equipment, such as a splitter or a filter. Also  
contact your Internet service provider (ISP) to determine if they provide service to  
customers with ADSL.  
ADSL modems work by using separately the individual four or six wires in the  
standard RJ-11 telephone jack. The inner wires, or pairs of wires if there are six, carry  
voice transmissions. The outer wires on either side carry data between your  
computer and the Internet. One channel is data download; the other is data upload.  
To learn more about ADSL modems, see the Understanding Your Personal Computer  
publication for your personal computer model and type number. This publication is  
Wake on LAN  
The power supply of the computer supports the Wake on LAN feature. With the  
Wake on LAN feature, the computer can be turned on when a specific LAN frame is  
passed to the computer over the LAN.  
To use the Wake on LAN feature, your computer must be equipped with a network  
adapter that supports Wake on LAN.  
To find out if the Wake on LAN feature is set, refer to the menu item for Wake on LAN  
in the Configuration/ Setup Utility program. See the PC 300GL and PC 300PL User  
Guide for help with using the Configuration/ Setup Utility program.  
Wake on Ring  
All models can be configured to turn on the computer after a ring is detected from an  
external or internal modem. Use the menu for setting the Wake on Ring feature in the  
Configuration/ Setup Utility Program. Two options control this feature:  
Serial Ring Detect: Use this option if the computer has an external modem  
connected to the serial port.  
Modem Ring Detect: Use this option if the computer has an internal modem.  
Chapter 1. System Overview  
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PC 300 GL and 300 PL  
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Chapter 2. System board features  
This section includes information about system board features. For an illustration of  
the system board, see “Physical layout” on page 14.  
Intel Pentium III microprocessor with MMX technology  
PC 300 GL personal computer types 6563, 6564, and 6574 and PC 300 PL personal  
computer type 6565 come with an Intel Pentium III microprocessor. The  
microprocessor has an attached heat sink which plugs directly into a connector on the  
system board.  
World Wide Web.  
Features  
The features of the Pentium III microprocessor are as follows:  
Optimization for 32-bit software  
Operation at a low voltage level  
Intel microprocessor serial number  
64-bit microprocessor data bus  
100-133 MHz front-side bus (FSB)  
Math coprocessor  
Internet Streaming SIMD extensions  
MMX technology, which boosts the processing of graphic, video, and audio data  
L2 Cache  
The Pentium III microprocessor provides up to 512 KB L2 cache. The L2 cache error  
corrected code (ECC) function is automatically enabled if ECC memory is installed. If  
nonparity memory is installed, the L2 cache is non-ECC.  
Chip set control  
The chip set design is the interface between the microprocessor and the  
following:  
Memory subsystem  
PCI bus  
IDE bus master connection  
High performance, PCI-to-ISA bridge  
USB ports  
SMBus  
Enhanced DMA controller  
Real-time clock (RTC)  
System memory  
The maximum amount of system memory the computer can physically accommodate  
is 1 GB total. The amount of system memory factory-preinstalled varies by model.  
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For memory expansion, the system board provides two dual inline memory module  
(DIMM) connectors and supports 133 MHz DIMMs in sizes of 64 MB, 125 MB, and 512  
MB. 100 MHz DIMMs may be used in systems with a 100 MHz FSB.  
The following information applies to system memory:  
Synchronous dynamic random access memory (SDRAM) is standard.  
The maximum height of memory modules is 6.35 cm (2.5 in.).  
Only PC 100 and PC 133 industry-standard, gold-lead DIMMs are supported.  
DIMM connectors do not support RAMBUS Inline Memory Modules (RIMMs).  
The PC 300GL supports error-corrected code (ECC). A mix of nonparity types  
configures as nonparity.  
BIOS sepcific auto-configure, auto-detect maximum system memory.  
For information on the pin assignments for the memory modules connectors, see  
“System memory connector” on page 34.  
The following table shows some possible configurations for the supported DIMMs.  
Table. 1. Memory Configuration (MB)  
Total Memory  
Mem O  
64  
Mem 1  
0
64  
96  
64  
32  
128  
128  
160  
192  
256  
384  
512  
512  
578  
640  
1024  
64  
64  
128  
128  
128  
128  
256  
256  
512  
512  
512  
512  
0
32  
64  
128  
128  
256  
0
64  
128  
512  
6
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PCI Bus  
The PCI bus originates in the chip set. Features of the PCI bus are:  
Integrated arbiter with multitransaction PCI arbitration acceleration hooks  
Zero-wait-state, microprocessor-to-PCI write interface for high-performance  
graphics  
Built-in PCI bus arbiter  
Microprocessor-to-PCI memory write posting  
Conversion of back-to-back, sequential, microprocessor-to-PCI memory write to  
PCI burst write  
Delayed transaction  
PCI parity checking and generation support  
IDE bus master interface  
The system board incorporates a PCI-to-IDE interface that complies with the AT  
Attachment Interface with Extensions.  
The bus master for the IDE interface is integrated into the I/ O hub of the  
chip set. The chip set is PCI 2.2 compliant. It connects directly to the PCI bus and is  
designed to allow concurrent operations on the PCI bus and IDE bus. The chip set is  
capable of supporting PIO mode 0–4 devices and IDE DMA mode 0–3 devices. Ultra  
DMA 66 transfers up to 66 Mbps using an ATA 66 cable.  
The IDE devices receive their power through a four-position power cable containing  
+5 V dc, +12 V dc, and ground voltage. As devices are added to the IDE interface,  
designate one device as the master, or primary, device and another as the slave, or  
subordinate, device. These designations are determined by switches or jumpers on  
each device. There are two IDE ports, one designated Primary and the other  
Secondary, allowing for up to four devices to be attached. The total number of  
physical IDE devices is determined by available space on the system board.  
For the IDE interface, no resource assignments are given in the system memory or the  
direct memory access (DMA) channels. For information on the resource assignments,  
see “Input/ output address map” on page 48 and “Appendix C. IRQ and DMA  
channel assignments,” on page 53.  
For information on the connector pin assignments, see “IDE connectors” on page 42.  
USB interface  
Universal Serial Bus (USB) technology is a standard feature of your personal  
computer. The system board provides the USB interface with two connectors  
integrated into the chip set. A USB-enabled device can attach to a connector and, if  
that device is a hub, multiple peripheral devices can attach to the hub and be used by  
the system. The USB connectors use Plug and Play technology for installed devices.  
The speed of the USB is up to 12 MBps with a maximum of 127 peripheral devices.  
The USB is compliant with Universal Host Controller Interface Guide 1.0.  
Features of USB technology include:  
Plug and Play devices  
Concurrent operation of multiple devices  
Suitability for different device bandwidths  
Chapter 2. System board features  
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Support for up to five-meter cable length from host to hub or hub to hub  
Guaranteed bandwidth and low latencies appropriate for specific devices  
Wide range of packet sizes  
Limited power to hubs  
For information on the connector pin assignment for the USB interface, see “USB port  
connectors” on page 44.  
Video Subsystem  
The PC 300GL personal computer types 6563, 6564, and 6574 ad PC 300PL personal  
computer type 6565 come with one of the following graphic solutions:  
1. S3 Savage4 Accelerated Graphics Port (AGP) 4X adapter with 8 MB 125 MHz  
SDRAM and a 15-pin VGA connector  
2. S3 Savage4 Extreme AGP4X adapter with 16 MB 166 MHz SGRAM, a  
DVI-connector, and a 15-pin VGA converter.  
The Savage4 graphics accelerator supports the following features:  
128-bit 2D graphics engine  
High-performance 2D/ 3D video accelerator  
3D rendering  
Motion video architecture  
High-speed memory bus  
Flat-panel monitor support  
ACPI and PCI power management  
PCI 2.2 bus support, including bus mastering  
300 MHz RAMDAC with gamma correction  
Serial bus and flash ROM support  
Hardware and BIOS support for VESA timing and DDC monitor  
communications  
2.5 V core with 3.3V/ 5V tolerant I/ O  
3. S3 Diamond AGP 4X adapter with 32 MB 143 MHz SDRAM with a DVI-I  
connector and, on some models, TV outlet on a daughter card.  
The S3 Diamond graphics accelerator supports the following features:  
128-bit 3D graphics engine  
Two texture-mapped, lit pixels-per-clock cycle  
Single-pass multi-texturing  
32-bit Z/ stencil buffer  
Anti-aliasing: full scene, order independent  
Up to 2048 x 1536 resolution  
30 frames per second (fps) full screen DVD playback  
National Television Systems Committee (NTSC) digital output (optional)  
Phase Alternate Line (PAL) digital output (optional)  
DVI-I interface  
Bidirectional Media Port and CCIR-656 video capture port (optional)  
8
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The integrated video subsystem supports all video graphics array (VGA) modes and  
is compliant with super video graphics array (SVGA) modes and Video Electronics  
Standards Association (VESA) 1.2. Some enhanced features include:  
Integrated video subsystem on chip, including 2D, 3D, and video port  
66 MHz AGP system bus interface with 2X and 4X  
Sideband signaling (some models only)  
Command list bus mastering support for fast 2D and 3D performance  
64-bit, 125 MHz SDRAM or 166 MHz SGRAM interface  
Plug and Play support  
4 MB dynamic display cache memory  
Advanced Power Management (APM) support  
Color space conversion  
Hardware scaling  
The integrated graphics memory controller subsystem complys with the VESA  
Display Data Channel (DDC) 1.1 standard and uses DDC1 and DDC2B to determine  
optimal values during automatic minor detection.  
The video subsystem has the following resource assignments.  
Table 2. Video subsystem resources  
Resource Assignment  
ROM  
RAM  
I/ O  
Hex C0000-C7FFF (32KB)  
Hex A0000-BFFFF (standard VGA frame buffer)  
VGA, sequencer, CRT controller, graphics controller, attribute, RAMDAC,  
extended sequencer, extended CRTC registers  
IRQ  
PCI interrupt 1 (enabled by default in the Configuration/ Setup Utility  
program. Normally assigned to IRQ 0B when nothing else is installed in  
the system. 3D systems use this interrupt.)  
DMA  
None, N/ A for AGP bus  
For further information on resource assignments, see “Appendix B. System address  
maps,” on page 47 and “Appendix C. IRQ and DMA channel assignments,” on page  
53.  
Chapter 2. System board features  
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The PC 300GL personal computer types 6563, 6564, and 6574 and the PC 300PL type  
6565 support the following video subsystem modes.  
Table 3. Supported VGA video modes  
Dot  
clock  
(MHz) (kHz)  
Sweep Refresh  
Mode Display  
Screen resolution  
Buffer  
start (hex)  
Colors  
rate  
rate  
(Hex)  
mode  
(Hz)  
00  
01  
02  
03  
04  
05  
06  
07  
0D  
0E  
0F  
10  
11  
12  
13  
Text  
40 x 25 characters  
40 x 25 characters  
80 x 25 characters  
80 x 25 characters  
2
B8000  
B8000  
28.322  
28.322  
28.322  
28.322  
25.175  
25.175  
25.175  
28.322  
25.175  
25.175  
25.175  
25.175  
25.175  
25.175  
25.175  
31.5  
31.5  
31.5  
31.5  
31.5  
31.5  
31.5  
31.5  
31.5  
31.5  
31.5  
31.5  
31.5  
31.5  
31.5  
70  
Text  
Text  
Text  
16  
70  
70  
70  
70  
70  
70  
70  
70  
70  
70  
70  
60  
60  
70  
Black/ white B8000  
16  
B8000  
B8000  
B8000  
B8000  
B8000  
A0000  
A0000  
A0000  
A0000  
A0000  
A0000  
A0000  
Graphics 320 x 200 pixels  
Graphics 320 x 200 pixels  
4
4
Text  
Text  
640 x 200 pixels  
2
80 x 25 characters  
Mono  
16  
Graphics 320 x 200 pixels  
Graphics 640 x 200 pixels  
Graphics 640 x 350 pixels  
Graphics 640 x 350 pixels  
Graphics 640 x 480 pixels  
Graphics 640 x 480 pixels  
Graphics 320 x 200 pixels  
16  
Mono  
16  
2
16  
256  
The video subsystem provides a 15-pin monitor connector on the system board. On  
some models, an optional 24-pin DVI-I monitor connector is provided on the AGP  
board. For information on monitor connector pin assignments see “Appendix A.  
Connector pin assignments,” on page 33 for SVGA and DVI.  
Audio Subsystem  
PC 300GL and PC 300PL personal computers come with an integrated audio  
controller. These models, which are capable of playing and recording sounds, support  
SoundBlaster, Adlib, and Microsoft Windows Sound System applications.  
The device drivers for the preinstalled audio adapter are on the hard disk. The device  
drivers are also available on the Device Drivers and Diagnostics CD provided with  
models that come with preinstalled software.  
If you connect an optional device to the audio adapter, follow the instructions  
provided by the manufacturer.  
Note: Additional device drivers might be required. If necessary, contact the  
manufacturer for information on these device drivers.  
The following connectors are available on the audio adapter or integrated audio  
controller:  
Line Out port for connecting powered speakers or headphones. You must  
connect a set of speakers to the Line Out port to hear audio from the adapter.  
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These speakers must be powered with a built in amplifier. In general, any  
powered speakers designed for use with personal computers can be used with  
the audio adapter. These speakers are available with a wide range of features  
and power outputs.  
Line In port for connecting musical devices, such as a portable CD-ROM player  
or stereo.  
Microphone for connecting a microphone.  
Integrated peripheral controller  
Control of the integrated input/ output (I/ O) and diskette drive controllers is  
provided by a single module, the integrated peripheral controller (SMC FDC 87B813).  
This module, which supports Plug and Play technology, controls the following  
features:  
Diskette drive interface  
Serial port  
Parallel port  
Keyboard and mouse ports  
Diskette Drive Interface  
PC 300GL and PC 300PL personal computers have four drive bays for installing  
internal devices. The following is a list of devices that the diskette drive subsystem  
supports:  
1.44 MB, 3.5 inch diskette drive  
1.44 MB, 3.5 inch, 3-mode drive for Japan (no BIOS support for 3-mode drive)  
1.2 MB, 5.25 inch diskette  
1 Mbps, 500 Kbps, or 250 Kbps internal tape drive  
One connector is provided on the system board for diskette drive support. For  
information on the connector pin assignments, see “Diskette drive connector” on page  
43.  
Serial ports  
Two universal asynchronous receiver/ transmitter (UART) serial ports are integrated  
into the system board. The two serial ports include 16-byte data, first-in first-out  
(FIFO) buffers and have programmable baud rate generators. The serial ports are  
NS16450 and PC16550A compatible.  
For information on the connector pin assignments, see “Serial port connector” on  
page 45.  
Note: Current loop interface is not supported.  
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The following figure shows the serial port assignments in the configuration.  
Table 4. Serial port assignments  
Port assignment  
Serial 1  
Address range (hex)  
03F8–03FF  
IRQ level  
IRQ4  
Serial 2  
02F8–02FF  
IRQ3  
Serial 3  
03E8–03FF  
IRQ4  
Serial 4  
O2E8–027F  
IRQ13  
The default setting for the serial port is COM1.  
Parallel port  
Integrated in the system board is support for extended capabilities port (ECP),  
enhanced parallel port (EPP), and standard parallel port (SPP) modes. The modes of  
operation are selected through the Configuration/ Setup Utility program with the  
default mode set to SPP.  
The following figure shows the parallel port assignments used in the configuration.  
Table 5. Parallel port assignments  
Port assignment  
Parallel 1  
Address range (hex)  
03BC–03BE  
IRQ level  
IRQ7  
Parallel 2  
0378–037F  
IRQ5  
Parallel 3  
0278–03FF  
IRQ5  
The default setting for the parallel port is Parallel 1.  
The system board has one connector for the parallel port. For information on the  
connector pin assignments, see “Parallel port connector” on page 46.  
Keyboard and mouse ports  
A general purpose 8-bit microcontroller, 8042AH compatible, controls the mouse and  
keyboard subsystem. The controller consists of 256 bytes of data memory and 2 KB of  
read-only memory (ROM).  
The controller has two logical devices: one controls the keyboard and the other  
controls the mouse. The keyboard has two fixed I/ O addresses, a fixed IRQ line, and  
can operate without the mouse. The mouse cannot operate without the keyboard  
because, although it has a fixed IRQ line, the mouse relies on the addresses of the  
keyboard for operation. For the keyboard and mouse interfaces, no resource  
assignments are given in the system memory addresses or DMA channels. For  
information on the resource assignments, see “Input/ output address map” on page  
48 and “Appendix C. IRQ and DMA channel assignments,” on page 53.  
The system board has one connector for the keyboard port and one connector for the  
mouse port. For information on the connector pin assignments, see “Mouse and  
keyboard port connectors” on page 45.  
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Network connection  
Some PC 300 GL and PC 300 PL models are equipped with an Ethernet or token-ring  
adapter that supports the Wake on LAN feature.  
Features of the optional Wake on LAN Ethernet adapter are:  
Operates in shared 10BASE-T or 100BASE-TX environment  
Transmits and receives data at 10 Mbps or 100 Mbps  
Has an RJ-45 connector for LAN attachment  
Operates on symmetrical multiprocessing (SMP) environments  
Supports Wake on LAN  
Supports Remote Program Load (RPL) and Dynamic Host Configuration  
Protocol (DHCP)  
Features of the optional token-ring adapter are:  
Transmits and receives data at 4 Mbps or 16 Mbps  
Has RJ-45 and D-shell connectors for LAN attachment  
Supports Wake on LAN  
Supports Remote Program Load (RPL) and Dynamic Host Configuration  
Protocol (DHCP)  
The PC 300GL personal computer has a 3-pin header on the system board that  
provides the AUX5 (auxiliary 5 volts) and wake-up signal connections.  
Real-time clock and CMOS  
The real-time clock is low-power and provides a time-of-day clock and a calendar. An  
external battery source of 3 V dc maintains the settings.  
The system uses 242 bytes of complementary metal-oxide semiconductor (CMOS)  
memory to store data. To erase or reset CMOS memory to the default, use the small  
rocker switch on the system board.  
Note: Refer to the instructions in the PC 300PL and PC 300GL User Guide before  
attempting to reset CMOS.  
To locate the battery and the rocker switches, see “Physical layout” on page 14.  
Flash EEPROM  
The system board uses two megabits (Mb) of flash electrically erasable  
programmable, read-only memory (EEPROM) to store the basic input/ output system  
(BIOS), IBM logo, Configuration/ Setup Utility, and Plug and Play data.  
If necessary, you can update the EEPROM by downloading a stand-alone utility  
program available from the IBM Web site: http:/ / www.ibm.com/ pc.  
Expansion adapters  
Each PCI-expansion connector is a 32-bit slot. PCI-expansion connectors support the  
32-bit, 5 V dc, local-bus signalling environment defined in PCI Local Bus Specification  
2.2.  
PC 300GL personal computer types 6563, 6564, and 6574 and PC 300PL personal  
computer type 6565 personal computers have three PCI slots to support the addition  
of adapters. For information on installing adapters, see the PC 300GL and PC 300PL  
User Guide.  
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For information on the connector pin assignments, see “PCI connectors” on page 40.  
Note: PC 300GL computers do not support ISA expansion adapters or the IBM  
PCMCIA adapter for PCI.  
Physical layout  
The system board might look slightly different from the one shown.  
Note: A diagram of the system board, including switch and jumper settings, is  
attached to the underside of the computer cover.  
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Þ1ÝMicroprocessor  
Þ2ÝDIMM 0  
Þ13ÝSmall rocker switch  
Þ14ÝBattery  
Þ3ÝDIMM 1  
Þ4ÝFan connector  
Þ5ÝPower connector  
Þ6ÝSwitch/ LED connector  
Þ7ÝRFID connector (some models)  
Þ8ÝPrimary EIDE connector  
Þ9ÝSecondary EIDE connector  
Þ10ÝDiskette drive connector  
Þ11ÝFan connector  
Þ15ÝChassis intrusion detection connector  
Þ16ÝWake on LAN connector  
Þ17ÝAlert on LAN connector  
Þ18ÝCD-ROM, CD-RW, or DVD drive connector  
Þ19ÝPCI adapter slot 1  
Þ20ÝPCI adapter slot 2  
Þ21ÝPCI adapter slot 3 (for Alert on LAN adapter)  
Þ22ÝChassis speaker connector  
Þ23ÝAGP adapter slot  
Þ12ÝLarge rocker switch (some models)  
Rocker switches  
The two rocker switches on the system board are used for custom configuration. For  
the location of the small and large rocker switches, see items 12 and 13 above.  
The large rocker switch has eight switches for setting microprocessor speeds for  
compatibility with the system board. The following table shows the rocker switch  
settings for compatibility with the corresponding microprocessor speeds.  
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Table 6. Large rocker switch settings  
Microprocessor  
1
2
3
4
5
6
7
8
speed  
100  
150  
200  
Off  
Off  
On  
Off  
Off  
Off  
Off  
Off  
133  
200  
266  
On  
Off  
On  
On  
On  
On  
On  
On  
On  
Off  
Off  
On  
Off  
On  
On  
On  
Off  
Off  
Off  
Off  
On  
On  
On  
Off  
On  
Off  
Off  
On  
On  
Off  
Off  
On  
On  
On  
Off  
Off  
On  
Off  
On  
Off  
On  
Off  
On  
Off  
Off  
Off  
Off  
Off  
Off  
Off  
Off  
Off  
Off  
Off  
Off  
Off  
Off  
Off  
Off  
Off  
Off  
Off  
Off  
Off  
Off  
Off  
Off  
Off  
Off  
Off  
Off  
Off  
Off  
Off  
Off  
Off  
Off  
Off  
Off  
Off  
Off  
Off  
Off  
Off  
Off  
Off  
Off  
Off  
133  
200  
266  
166  
250  
333  
200  
300  
400  
233  
350  
466  
266  
400  
533  
300  
450  
600  
333  
500  
666  
366  
500  
733  
400  
600  
800  
433  
650  
866  
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Table 6. Large rocker switch settings  
Microprocessor  
1
2
3
4
5
6
7
8
speed  
466  
700  
933  
Off  
On  
Off  
On  
Off  
Off  
Off  
Off  
500  
Off  
Off  
Off  
On  
Off  
Off  
Off  
On  
Off  
Off  
On  
On  
Off  
Off  
Off  
Off  
Off  
Off  
Off  
Off  
Off  
Off  
Off  
Off  
750  
1000  
533  
800  
1066  
Reserved  
The small rocker switch has three functions. By moving switch 1 to the On position,  
you activate the diskette write-protect feature. By moving switch 2 to the On position,  
you clear the CMOS. This rocker switch is also used for flash recovery. See the PC  
300GL and PC 300PL User Guide for instruction.  
Table 7. Small rocker switch settings  
Function  
On  
Diskette write-protect  
Clear CMOS  
Switch 1  
Switch 2  
Cable connectors  
Connections for attaching devices are provided on the back of the computer. Each  
connection has a corresponding device symbol. The connectors are:  
USB (2)  
Mouse  
Keyboard  
Serial (2)  
Parallel  
Monitor  
Ethernet adapter with RJ-45 connector (some models only)  
Integrated audio controller with line in, line out, and microphone connectors  
Connector panel  
On the following connector panel illustrations, note the device connection symbols. A  
connector provided by an adapter might not have an identifying symbol.  
For pin-out details on connectors, see “Appendix A. Connector pin assignments,” on  
page 33.  
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The following illustration shows the connector panel for the desktop model.  
2
1
2
1
DVI Monitor  
Serial 2  
Mouse  
SVGA Monitor  
Parallel  
USB 1  
Serial 1  
Keyboard  
Headphone/  
Line Out  
Microphone  
USB 2  
Line In  
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The following illustration shows the connector panel for the tower model.  
Serial 2  
Serial 1  
Mouse  
Keyboard  
USB 2  
USB 1  
Line In  
Headphone/  
Line Out  
Microphone  
Parallel  
SVGA Monitor  
DVI Monitor  
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Chapter 3. Physical specifications  
This chapter lists the physical specifications for the PC 300GL personal computer  
types 6563, 6564, and 6574 and PC 300 PL personal computer type 6565. The PC  
300GL ad PC300PL have four expansion slots and four drive bays.  
Note: The PC 300GL and PC 300PL computers comply with FCC Class B  
specifications.  
PC 300 GL and PL desktop  
Dimensions  
Height: 138 mm (5.4 in.)  
Width: 400 mm (15.75 in.)  
Depth: 429 mm (16.9 in.)  
Weight  
Minimum configuration as shipped: 9.53 kg (21 lb)  
Maximum configuration: 10.4 kg (23 lb)  
Environment  
Air temperature:  
— System on: 10° to 35° C (50° to 95° F)  
— System off: 10° to 43° C (50° to 110° F)  
Humidity  
— System on: 8% to 80%  
— System off: 8% to 80%  
Maximum altitude: 2134 m (7000 ft), the maximum altitude at which the  
specified air temperatures apply. At higher altitudes, the maximum air  
temperatures are lower than those specified.  
Electrical input  
Input voltage:  
— Low range:  
Minimum: 90 V ac  
Maximum: 137 V ac  
Input frequency range: 57 – 63 Hz  
Voltage switch setting: 115 V ac  
High Range:  
Minimum: 180 V ac  
Maximum: 265 V ac  
Input frequency range: 47 – 53 Hz  
Voltage switch setting: 230 V ac  
— Input kilovolt-amperes (kVA) (approximately):  
Minimum configuration as shipped: 0.08 kVA  
Maximum configuration: 0.51 kVA  
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Note: Power consumption and heat output vary depending on the number and  
type of optional features installed and the power-management optional  
features in use.  
Heat output  
Approximate heat output in British thermal units (Btu) per hour:  
— Minimum configuration: 256 Btu/ hr (75 watts)  
— Maximum configuration: 706 Btu/ hr (207 watts)  
Airflow  
Approximately 0.5 cubic meter per minute (18 cubic feet per minute)  
Acoustical noise-emission values  
Average sound-pressure levels:  
— At operator position:  
Idle: 33 dBA  
Operating: 39 dBA  
— At bystander position-1 meter (3.3 ft):  
Idle: 4.4 bels  
Operating: 4.9 bels  
Note: These levels were measures in controlled acoustical environments according  
to procedures specified by the American National Standards Institute (ANSI)  
S12.10 and ISO 7779, and are reported in accordance with ISO 9296. Actual  
sound-pressure levels in your location might exceed the average values stated  
because of room reflections and other nearby noise sources. The declared  
sound power levels indicate an upper limit, below which a large number of  
computers will operate.  
PC300 PL and GL tower  
Dimensions  
Height: 378 mm (14.9 in.)  
Width: 192 mm (7.6 in.)  
Depth: 383 mm (15.1 in.)  
Weight  
Minimum configuration as shipped: 8.3 kg (18.3 lb)  
Maximum configuration: 10.2 kg (22.5 lb)  
Environment  
Air temperature:  
— System on: 10° to 35°C (50° to 95° F)  
— System off: 10° to 43°C (50° to 110° F)  
Humidity  
— System on: 8% to 80%  
— System off: 8% to 80%  
Maximum altitude: 2134 m (7000 ft), the maximum altitude at which the  
specified air temperatures apply. At higher altitudes, the maximum air  
temperatures are lower than those specified.  
Electrical input  
Input voltage:  
— Low range:  
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Minimum: 90 V ac  
Maximum: 137 V ac  
Input frequency range: 57 – 63 Hz  
Voltage switch setting: 115 V ac  
High Range:  
Minimum: 180 V ac  
Maximum: 265 V ac  
Input frequency range: 47 – 53 Hz  
Voltage switch setting: 230 V ac  
— Input kilovolt-amperes (kVA) (approximately):  
Minimum configuration as shipped: 0.08 kVA  
Maximum configuration: 0.51 kVA  
Note: Power consumption and heat output vary depending on the number and  
type of optional features installed and the power-management optional  
features in use.  
Heat output  
Approximate heat output in British thermal units (Btu) per hour:  
— Minimum configuration: 256 Btu/ hr (75 watts)  
— Maximum configuration: 706 Btu/ hr (207 watts)  
Airflow  
Approximately 0.5 cubic meter per minute (18 cubic feet per minute)  
Acoustical noise-emission values  
Average sound-pressure levels:  
— At operator position:  
Idle: 33 dBA  
Operating: 40 dBA  
— At bystander position-1 meter (3.3 ft):  
Idle: 4.4 bels  
Operating: 4.9 bels  
Note: These levels were measures in controlled acoustical environments according  
to procedures specified by the American National Standards Institute (ANSI)  
S12.10 and ISO 7779, and are reported in accordance with ISO 9296. Actual  
sound-pressure levels in your location might exceed the average values stated  
because of room reflections and other nearby noise sources. The declared  
sound power levels indicate an upper limit, below which a large number of  
computers will operate.  
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Chapter 4. Power supply  
A 145-watt power supply drives your computer. The power supply provides 3.3-volt  
power for the Pentium III microprocessor, core chip set, and 5-volt power for PCI  
adapters. Also included is an auxiliary 5-volt (AUX 5) power supply to provide  
power to power-management circuitry and a Wake on LAN adapter. The power  
supply converts the ac input voltage into four dc output voltages and provides power  
for the following:  
System board  
Adapters  
Internal drives  
Keyboard and auxiliary devices  
USB devices  
A logic signal on the power connector controls the power supply; the front panel  
switch is not directly connected to the power supply.  
The power supply connects to the system board with a 2 x 10 pin connector.  
Power input  
The following table shows the power input specifications. The power supply has a  
manual switch to select the correct input voltage.  
Table 8. Power input requirements  
Specification  
Measurements  
Input voltage, low range  
Input voltage, high range  
Input frequency  
100 (min) to 127 (max) V ac  
200 (min) to 240 (max) V ac  
50 Hz ± 3 Hz or 60 Hz ± 3 Hz  
Power output  
The following figures show the power supply output of all the connectors, including  
the system board, DASD, PCI, and auxiliary outputs.  
Table 9. Power output (145 watts)  
Output voltage  
+5 V dc  
Tolerance  
Minimum current Maximum current  
+5% to -5%  
+5% to -5%  
+10% to -10%  
+5% to -5%  
+5% to -5%  
1.5 A  
0.02 A  
0.0 A  
0.0 A  
0.0 A  
18.0 A  
4.2 A  
+12 V dc  
-12 V dc  
0.4 A  
+3.3 V dc  
10.0 A  
0.720 A  
+5 V ac (auxiliary)  
The total combined 3.3 V and 5 V power must not exceed 100 watts.  
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Component outputs  
The power supply provides separate voltage sources for the system board and  
internal storage devices. The following figures show the approximate power that is  
provided for specific system components. Many components draw less current than  
the maximum shown.  
Table 10. System board  
Supply voltage  
+3.3 V dc  
Maximum current  
5000 mA  
Tolerance  
+5.0% to -5.0%  
+5.0 to -4.0%  
+5.0% to -5.0%  
+10.0% to -9.0%  
+5.0 V dc  
6000 mA  
+12.0 V dc  
-12.0 V dc  
25.0 mA  
25.0 mA  
Table 11. Keyboard port  
Supply voltage  
+5.0 V dc  
Maximum current  
Tolerance  
275 mA  
+5.0% to -4.0%  
Table 12. Auxiliary device port  
Supply voltage  
Maximum current  
300 mA  
Tolerance  
+5.0 V dc  
+5.0% to -4.0%  
Table 13. PCI-bus adapters (per slot)  
Supply voltage  
+5.0 V dc  
Maximum current  
Tolerance  
1000 mA  
1500 mA  
+5.0% to -4.0%  
+5.0% to -4.0%  
+3.3 V dc  
Note: For each PCI connector, the maximum power consumption is rated at 5 watts  
for +5 V dc and +3.3 V dc combined. If maximum power is used, the overall  
system configuration will be limited in performance.  
Table 14. USB port  
Supply voltage  
Maximum current  
Tolerance  
+5.0 V dc  
500 mA  
+5.0%to -4.0%  
Table 15. Internal DASD  
Supply voltage  
+5.0 V dc  
Maximum current  
Tolerance  
1400 mA  
+5.0% to -5.0%  
26 PC 300 GL and 300 PL  
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Table 15. Internal DASD  
Supply voltage  
Maximum current  
Tolerance  
+12.0 V dc  
1500 mA at startup, 400 mA +5.0% to -5.0%  
when active  
Table 16. Video port pin 9  
Supply voltage  
Maximum current  
Tolerance  
+5.0 V dc  
1100 mA  
+5.0% to -5.0%  
Note: Some adapters and hard disk drives draw more current than the rated  
maximums. These adapters and drives can be installed in the system;  
however, the power supply will shut down if the total power used exceeds  
the maximum power that is available.  
Output protection  
The power supply protects against output overcurrent, overvoltage, and short  
circuits. See the power supply specifications on the previous pages for details.  
A short circuit that is placed on any dc output (between outputs or between an output  
and a dc return) latches all dc outputs into a shutdown state, with no damage to the  
power supply. If this shutdown state occurs, the power supply returns to normal  
operation only after the fault has been removed and the power switch has been  
turned off for at least one second.  
If an overvoltage fault occurs (in the power supply), the power supply latches all dc  
outputs into a shutdown state before any output exceeds 130% of the power supply  
value.  
Connector description  
The power supply for PC 300GL and PC 300PL personal computers has four, 4-pin  
connectors for internal devices. The total power used by the connectors must not  
exceed the amount shown in “Component outputs” on page 26. For connector pin  
assignments, see “Appendix A. Connector pin assignments,” on page 33.  
Chapter 4. Power supply 27  
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28 PC 300 GL and 300 PL  
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Chapter 5. System software  
This section briefly describes some of the system software included with your  
computer.  
BIOS  
Your personal computer uses the IBM basic input/ output system (BIOS), which is  
stored in flash electrically erasable programmable read-only memory (EEPROM).  
Some features of the BIOS are:  
PCI support according to PCI BIOS Specification 2.2  
Microsoft PCI IRQ Routing Table  
Plug and Play support according to Plug and Play BIOS Specification 1.1a  
Advanced Power Management (APM) support according to APM BIOS Interface  
Specification 1.2  
Wake on LAN support  
Wake on Ring support  
Remote Initial Program Load (RIPL) and Dynamic Host Configuration Protocol  
(DHCP)  
Flash-over-LAN support  
Alternate startup sequence  
IBM Look and Feel - such as screen arrangements and user interface  
ACPI (Advanced Configuration and Power Interface)  
IDE Logical Block Addressing (LBA)  
LSA 2.0 support  
Digital optical disk support  
LS-120 disk drive support  
DM BIOS 2.1 (DMI 2.0 compliant)  
PC99 compliance  
Plug and Play  
Support for Plug and Play conforms to the following:  
Plug and Play BIOS Specification 1.1a and 1.0  
Plug and Play BIOS Extension Design Guide  
Plug and PLay BIOS Specification, Errata, and Clarifications 1.0  
Guide to Integrating the Plug and Play BIOS Extensions with system BIOS 1.2  
Plug and Play Kit for DOS and Windows  
POST  
IBM power-on self-test (POST) code is used. Also, initialization code is included for  
the on-board system devices and controllers.  
POST error codes include text messages for determining the cause of an error. For  
more information, see “Appendix D. Error codes,” on page 55 and your PC 300GL and  
PC 300PL User Guide.  
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Configuration/Setup Utility program  
The Configuration/ Setup Utility program provides menu choices for devices, I/ O  
ports, date and time, system security, start options, advanced setup, and power  
management.  
More detailed information on using the Configuration/ Setup Utility program is in the  
PC 300GL and PC 300PL User Guide.  
Advanced Power Management (APM)  
The PC 300GL computers have built-in energy-saving capabilities. Advanced Power  
Management (APM) is a feature that reduces the power consumption of components  
when they are not in use. When enabled, APM initiates reduced-power modes for the  
monitor, microprocessor, and hard disk drive after a specified period of inactivity.  
The BIOS supports APM 1.2. This enables the system to enter a power-management  
state, reducing the power drawn from the AC electrical outlet. Advanced Power  
Management is enabled through the Configuration/ Setup Utility program and is  
controlled by the individual operating system.  
For more information on APM, see the PC 300GL and PC 300PL User Guide and  
Understanding Your Personal Computer.  
Advanced Configuration and Power Interface (ACPI)  
Advanced Configuration and Power Interface (ACPI) BIOS mode enables the  
operating system to control the power-management features of your computer. Not  
all operating systems support ACPI BIOS mode. Refer to your operating-system  
documentation to determine if ACPI is supported.  
Flash update utility program  
The flash update utility program is a stand-alone program to support flash updates.  
This utility program updates the BIOS code and the machine readable information  
(MRI) to different languages.  
The latest version of the flash update utility program is available on the IBM Web site  
at http:/ / www.ibm.com/ pc/ support and can be copied to a 3.5-inch diskette.  
Diagnostic program  
The diagnostic program that comes with PC 300PL and the PC 300GL personal  
computers is provided as a startable IBM Enhanced Diagnostic diskette image on the  
IBM Product Recovery CD or the Device Driver and IBM Enhanced Diagnostic CD. It runs  
independently of the operating system. The user interface is WaterGate Software PC-  
Doctor. The diagnostic program can also be downloaded from the following World  
Wide Web page: http:/ / www.ibm.com/ pc/ support/ . For more information on the  
diagnostic program, see the PC 300GL and PC 300PL User Guide.  
30 PC 300 GL and 300 PL  
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Chapter 6. System compatibility  
This chapter discusses some of the hardware, software, and BIOS compatibility issues  
for the computer. See the Compatibility Report under, “Related publications” on page  
vii for a list of compatible hardware and software options.  
Hardware compatibility  
This section discusses hardware, software, and BIOS compatibility that must be  
considered when designing application programs.  
The functional interfaces are compatible with the following interfaces:  
Intel 8259 interrupt controllers (edge-triggered mode)  
National Semiconductor NS16450 and NS126550A serial communications  
controllers  
Motorola MC146818 Time of Day Clock command and status (CMOS  
reorganized)  
Intel 8254 timer, driven from a 1.193 MHz clock (channels 0, 1, and 2)  
Intel 8237 DMA controller, except for the Command and Request registers and  
the Rotate and Mask functions; the Mode register is partially supported  
Intel 8272 or 82077 diskette drive controllers  
Intel 8042 keyboard controller at address hex 0060 and hex 0064  
All video standards using VGA, EGA, CGA, MDA, and Hercules modes  
Parallel printer ports (Parallel 1, Parallel 2, and Parallel 3) in compatibility mode  
Use this information to develop application programs. Whenever possible, use the  
BIOS as an interface to hardware to provide maximum compatibility and portability  
of applications among systems.  
Hardware interrupts  
Hardware interrupts are level-sensitive for PCI interrupts. The interrupt controller  
clears its in-service register bit when the interrupt routine sends and End-of-Interrupt  
(EOI) command to the controller. The EOI command is sent regardless of whether the  
incoming interrupt request to the controller is active or inactive.  
The interrupt-in-progress latch is readable at an I/ O-address bit position. This latch is  
read during the interrupt service routine and might be reset by the read operation or it  
might require an explicit reset.  
Note: For performance and latency considerations, designers might want to limit  
the number of devices sharing an interrupt level.  
With level-sensitive interrupts, the interrupt controller requires that the interrupt  
request be inactive at the time the EOI command is sent; otherwise, a new interrupt  
request will be detected. To avoid this, a level-sensitive interrupt handler must clear  
the interrupt condition (usually by a read or write operation to an I/ O port on the  
device causing the interrupt). After processing the interrupt, the interrupt handler:  
1. Clears the interrupt  
2. Waits one I/ O delay  
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3. Sends the EOI  
4. Waits one I/ O delay  
5. Enables the interrupt through the Set Interrupt Enable Flag command  
Hardware interrupt IRQ9 is defined as the replacement interrupt level for the cascade  
level IRQ2. Program interrupt sharing is implemented on IRQ2, interrupt hex 0A.  
The following processing occurs to maintain compatibility with the IRQ2 used by IBM  
Personal Computer products:  
1. A device drives the interrupt request active on IRQ2 of the channel.  
2. This interrupt request is mapped in hardware to IRQ9 input on the second  
interrupt controller.  
3. When the interrupt occurs, the system microprocessor passes control to the IRQ9  
(interrupt hex 71) interrupt handler.  
4. This interrupt handler performs an EOI command to the second interrupt  
controller and passes control to the IRQ2 (interrupt hex 0A) interrupt handler.  
5. This IRQ2 interrupt handler, when handling the interrupt, causes the device to  
reset the interrupt request before performing an EOI command to the master  
interrupt controller that finishes servicing the IRQ2 request.  
Software compatibility  
To maintain software compatibility, the interrupt polling mechanism that is used by  
IBM Personal Computer products is retained. Software that interfaces with the reset  
port for the IBM Personal Computer positive-edge interrupt sharing (hex address  
02Fx or 06Fx, where x is the interrupt level) does not create interference.  
Software interrupts  
With the advent of software interrupt sharing, software interrupt routines must daisy  
chain interrupts. Each routine must check the function value, and if the function  
value is not in the range of function calls, that routine must transfer control to the next  
routine in the chain. Because software interrupts are initially pointed to address 0:0  
before daisy chaining, check for this case. If the next routine is pointed to address 0:0  
and the function call is out of range, the appropriate action is to set the carry flag and  
initiate a RET 2 to indicate an error condition.  
Machine-sensitive programs  
Programs can select machine-specific features, but they must first identify the  
machine and model type. IBM has defined methods for uniquely determining the  
specific machine type. The machine model byte can be found through interrupt 15H,  
Return System Configuration Parameters function (AH)=(C0H).  
32 PC 300 GL and 300 PL  
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Appendix A. Connector pin assignments  
The following figures show the pin assignments for various system board connectors.  
SVGA monitor connector  
5
1
10  
6
15  
11  
Table 17. SVGA monitor port connector pin assignments  
Pin  
Signal  
I/O  
Pin  
Signal  
I/O  
1
Red  
O
9
+5 V, used by  
DDC2B  
NA  
2
3
Green  
Blue  
O
O
10  
11  
Ground  
NA  
I
Monitor ID 0 -  
Not used  
4
5
Monitor ID 2 -  
Not used  
I
12  
13  
DDC2B serial I/ O  
data  
Ground  
NA  
NA  
Horizontal  
sync  
O
6
7
8
Red ground  
14  
15  
Vertical sync  
DDC2B clock  
O
Green ground NA  
Blue ground NA  
I/ O  
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DVI-I monitor connector  
C1  
C3  
C2  
C4  
1
C5  
Table 18. DVI-I monitor port connector pin assignments - main pin field  
Pin  
1
Signal  
Pin  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
Signal  
TMDS data 2+  
TMDS data 2-  
TMDS data 2/ 4 return  
TMDS data 4-  
TMDS data 4+  
DDC clock  
TMDS data 3+  
+5V power  
2
3
Ground  
4
Hot plug detect  
TMDS data 0-  
TMDS data 0+  
TMDS data 0-  
TMDS data 0/ 5 shield  
TMDS data 5+  
TMDS clock shield  
TMDS clock+  
TMDS clock-  
5
6
7
DDC data  
8
Analog vertical sync  
TMDS data 1-  
TMDS data 1+  
TMDS 1/ 3 shield  
TMDS data 3+  
9
10  
11  
12  
Table 19. DVI connector pin assignments - micro cross section  
Pin  
C1  
C2  
C3  
C4  
C5  
Signal  
Red video out  
Green video out  
Analog blue  
Analog horizontal sync  
Video/ pixel clock return  
System memory connector  
168  
84  
85  
1
34 PC 300 GL and 300 PL  
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Table 20. System memory connector pin assignments  
Pin  
1
x64 nonparity x72 ECC  
Pin  
85  
x64 nonparity x72 ECC  
VSS  
VSS  
VSS  
VSS  
2
DQ0  
DQ1  
DQ2  
DQ3  
VCC  
DQ4  
DQ5  
DQ6  
DQ7  
DQ8  
VSS  
DQ0  
DQ1  
DQ2  
DQ3  
VCC  
DQ4  
DQ5  
DQ6  
DQ7  
DQ8  
VSS  
86  
DQ32  
DQ33  
DQ34  
DQ35  
VCC  
DQ36  
DQ37  
DQ38  
DQ39  
DQ40  
VSS  
DQ32  
DQ33  
DQ34  
DQ35  
VCC  
DQ36  
DQ37  
DQ38  
DQ39  
DQ40  
VSS  
3
87  
4
88  
5
89  
6
90  
7
91  
8
92  
9
93  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
29  
30  
31  
32  
33  
34  
35  
94  
95  
96  
DQ9  
DQ10  
DQ11  
DQ12  
DQ13  
VCC  
DQ14  
DQ15  
NC  
DQ  
97  
DQ41  
DQ42  
DQ43  
DQ44  
DQ45  
VCC  
DQ46  
DQ47  
NC  
DQ41  
DQ42  
DQ43  
DQ44  
DQ45  
VCC  
DQ46  
DQ47  
CB4  
DQ10  
DQ11  
DQ12  
DQ13  
VCC  
DQ14  
DQ15  
CB0  
98  
99  
100  
101  
102  
103  
104  
105  
106  
107  
108  
109  
110  
111  
112  
113  
114  
115  
116  
117  
118  
119  
NC  
CB1  
NC  
CB5  
VSS  
VSS  
VSS  
VSS  
NC  
NC  
NC  
NC  
NC  
NC  
NC  
NC  
VCC  
/ WE  
DQMB0  
DQMB1  
/ S0  
VCC  
/ WE0  
DQMB0  
DQMB1  
/ S0  
VCC  
/ CAS  
DQMB4  
DQMB5  
NC  
VCC  
/ CAS  
DQMB4  
DQMB5  
/ S1  
DU  
NC  
/ RAS  
VSS  
/ RAS  
VSS  
VSS  
VSS  
A0  
A0  
A1  
A1  
A2  
A2  
A3  
A3  
A4  
A4  
A5  
A5  
Appendix A. Connector pin assignments 35  
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Table 20. System memory connector pin assignments  
x64 nonparity x72 ECC  
Pin  
36  
37  
38  
39  
40  
41  
42  
43  
44  
45  
46  
47  
48  
49  
50  
51  
52  
53  
54  
55  
56  
57  
58  
59  
60  
61  
62  
63  
64  
65  
66  
67  
68  
69  
70  
Pin  
120  
121  
122  
123  
124  
125  
126  
127  
128  
129  
130  
131  
132  
133  
134  
135  
136  
137  
138  
139  
140  
141  
142  
143  
144  
145  
146  
147  
148  
149  
150  
151  
152  
153  
154  
x64 nonparity x72 ECC  
A6  
A6  
A7  
A7  
A8  
A8  
A9  
A9  
A10/ AP  
NC  
A10/ AP  
BA1  
BA0  
NC  
BA0  
A11  
VCC  
VCC  
CK0  
VSS  
VCC  
VCC  
CK0  
VCC  
CK1  
A12  
VCC  
CK1  
A12  
VSS  
VSS  
VSS  
DU  
NC  
CKE0  
NC  
CKE0  
/ S3  
/ S2  
/ S2  
DQMB2  
DQMB3  
DU  
DQMB2  
DQMB3  
NC  
DQMB6  
DQMB7  
A13  
DQMB6  
DQMB7  
A13  
VCC  
NC  
VCC  
NC  
VCC  
NC  
VCC  
NC  
NC  
NC  
NC  
NC  
NC  
CB2  
NC  
CB6  
NC  
CB3  
NC  
CB7  
VSS  
VSS  
VSS  
VSS  
DQ16  
DQ17  
DQ18  
DQ19  
VCC  
DQ20  
NC  
DQ16  
DQ17  
DQ18  
DQ19  
VCC  
DQ20  
NC  
DQ48  
DQ49  
DQ50  
DQ51  
VCC  
DQ52  
NC  
DQ48  
DQ49  
DQ50  
DQ51  
VCC  
DQ52  
NC  
NC  
NC  
NC  
NC  
NC  
CKE1  
VSS  
NC  
NC  
VSS  
VSS  
VSS  
DQ21  
DQ22  
DQ23  
VSS  
DQ21  
DQ22  
DQ23  
VSS  
DQ53  
DQ54  
DQ55  
VSS  
DQ53  
DQ54  
DQ55  
VSS  
DQ24  
DQ25  
DQ24  
DQ25  
DQ56  
DQ57  
DQ56  
DQ57  
36 PC 300 GL and 300 PL  
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Table 20. System memory connector pin assignments  
x64 nonparity x72 ECC  
Pin  
71  
72  
73  
74  
75  
76  
77  
78  
79  
80  
81  
82  
83  
84  
Pin  
155  
156  
157  
158  
159  
160  
161  
162  
163  
164  
165  
166  
167  
168  
x64 nonparity x72 ECC  
DQ26  
DQ27  
VCC  
DQ28  
DQ29  
DQ30  
DQ31  
VSS  
DQ26  
DQ27  
VCC  
DQ28  
DQ29  
DQ30  
DQ31  
VSS  
DQ58  
DQ59  
VCC  
DQ60  
DQ61  
DQ62  
DQ63  
VSS  
DQ58  
DQ59  
VCC  
DQ60  
DQ61  
DQ62  
DQ63  
VSS  
CK2  
CK2  
CK3  
CK3  
NC  
NC  
NC  
NC  
NC  
NC  
SA0  
SA0  
SKA  
SCL  
SDA  
SCL  
SA1  
SA1  
SA2  
SA2  
VCC  
VCC  
VCC  
VCC  
Table 21. System memory connector pin input/output  
Pin  
1
Signal name  
GND  
I/O  
Pin  
85  
Signal name  
GND  
I/O  
N/ A  
I/ O  
I/ O  
I/ O  
I/ O  
I/ O  
I/ O  
I/ O  
I/ O  
I/ O  
I/ O  
N/ A  
I/ O  
I/ O  
I/ O  
I/ O  
I/ O  
N/ A  
N/ A  
I/ O  
I/ O  
I/ O  
I/ O  
N/ A  
N/ A  
I/ O  
I/ O  
I/ O  
I/ O  
N/ A  
I/ O  
I/ O  
I/ O  
I/ O  
I/ O  
N/ A  
2
MD0  
86  
MD32  
MD33  
MD34  
MD35  
VDD  
3
MD1  
87  
4
MD2  
88  
5
MD3  
89  
6
VDD  
90  
7
MD4  
91  
MD36  
MD37  
MD38  
MD39  
MD40  
GND  
8
MD5  
92  
9
MD6  
93  
10  
11  
12  
13  
14  
15  
16  
17  
18  
MD7  
94  
MD8 (PAR0)  
GND  
95  
96  
97  
MD9  
MD41  
MD42  
MD43  
MD44  
MD45  
VDD  
MD10  
MD11  
MD12  
MD13  
VDD  
98  
99  
100  
101  
102  
Appendix A. Connector pin assignments 37  
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Table 21. System memory connector pin input/output  
Pin  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
29  
30  
31  
32  
33  
34  
35  
36  
37  
38  
39  
40  
41  
42  
43  
44  
45  
46  
47  
48  
49  
50  
51  
52  
53  
Signal name  
MD14  
MD15  
NC  
I/O  
Pin  
103  
104  
105  
106  
107  
108  
109  
110  
111  
112  
113  
114  
115  
116  
117  
118  
119  
120  
121  
122  
123  
124  
125  
126  
127  
128  
129  
130  
131  
132  
133  
134  
135  
136  
137  
Signal name  
MD46  
MD47  
NC  
I/O  
I/ O  
I/ O  
I/ O  
I/ O  
I/ O  
I/ O  
NC  
I/ O  
NC  
I/ O  
GND  
NC  
I/ O  
GND  
NC  
N/ A  
N/ A  
N/ A  
NC  
N/ A  
NC  
N/ A  
VDD  
WE#  
DQMB0#  
DQMB1#  
S0#  
N/ A  
VDD  
CAS#  
DQMB4#  
DQMB4#  
S1#  
N/ A  
I
N/ A  
I
I
I
I
I
I
OE0#  
GND  
A0  
I
RAS#  
GND  
A1  
N/ A  
N/ A  
N/ A  
I
I
I
I
I
I
I
I
I
I
I
I
A2  
A3  
A4  
A5  
A6  
A7  
A8  
A9  
A10/ AP  
NC  
A11  
NC  
VDD  
NC  
N/ A  
N/ A  
N/ A  
N/ A  
I
VDD  
CK1  
N/ A  
N/ A  
O
CK0  
A14  
GND  
OE2#  
S2#  
GND  
CKE0  
S3#  
N/ A  
N/ A  
I
I
DQMB2#  
DQMB3#  
WE2#  
VDD  
NC  
I
DQMB6#  
DQMB7#  
A15  
I
I
I
I
I
N/ A  
N/ A  
N/ A  
I/ O  
I/ O  
VDD  
NC  
N/ A  
N/ A  
N/ A  
I/ O  
I/ O  
NC  
NC  
NC  
NC  
NC  
NC  
38 PC 300 GL and 300 PL  
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Table 21. System memory connector pin input/output  
Pin  
54  
55  
56  
57  
58  
59  
60  
61  
62  
63  
64  
65  
66  
67  
68  
69  
70  
71  
72  
73  
74  
75  
76  
77  
78  
79  
80  
81  
82  
83  
84  
Signal name  
GND  
I/O  
Pin  
138  
139  
140  
141  
142  
143  
144  
145  
146  
147  
148  
149  
150  
151  
152  
153  
154  
155  
156  
157  
158  
159  
160  
161  
162  
163  
164  
165  
166  
167  
168  
Signal name  
GND  
MD48  
MD49  
MD50  
MD51  
VDD  
I/O  
N/ A  
I/ O  
I/ O  
I/ O  
I/ O  
N/ A  
I/ O  
N/ A  
N/ A  
N/ A  
N/ A  
I/ O  
I/ O  
I/ O  
N/ A  
I/ O  
I/ O  
I/ O  
I/ O  
N/ A  
I/ O  
I/ O  
I/ O  
I/ O  
N/ A  
O
N/ A  
I/ O  
I/ O  
I/ O  
I/ O  
N/ A  
I/ O  
N/ A  
N/ A  
N/ A  
N/ A  
I/ O  
I/ O  
I/ O  
N/ A  
I/ O  
I/ O  
I/ O  
I/ O  
N/ A  
I/ O  
I/ O  
I/ O  
I/ O  
N/ A  
O
MD16  
MD17  
MD18  
MD19  
VDD  
MD20  
CKE1  
VREF  
(CKE1)*  
GND  
MD52  
NC  
VREF  
NC  
GND  
MD53  
MD54  
MD55  
GND  
MD56  
MD57  
MD58  
MD59  
VDD  
MD21  
MD22  
MD23  
GND  
MD24  
MD25  
MD26  
MD27  
VDD  
MD28  
MD29  
MD30  
MD31  
GND  
MD60  
MD61  
MD62  
MD63  
GND  
CK3  
CK2  
NC  
N/ A  
O
NC  
N/ A  
O
NC  
SA0  
SDA  
O
SA1  
O
SCL  
O
SA0  
O
VDD  
N/ A  
VDD  
N/ A  
Appendix A. Connector pin assignments 39  
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PCI connectors  
A1  
B2  
A62  
B62  
A2  
B1  
Table 22. PCI connector pin assignments  
Pin  
Signal  
I/O  
Pin  
B1  
Signal  
-12 V dc  
TCK  
I/O  
N/ A  
O
A1  
TRST#  
O
A2  
+12 V dc  
+12 V dc  
TDI  
N/ A  
O
B2  
A3  
B3  
Ground  
TDO  
N/ A  
I
A4  
O
B4  
A5  
+5 V dc  
N/ A  
I
B5  
+5 V dc  
+5 V dc  
INTB#  
INTD#  
PRSNT1#  
Reserved  
PRNST2  
Ground  
Ground  
Reserved  
Ground  
O
N/ A  
N/ A  
I
A6  
INTA#  
B6  
A7  
INTC#  
I
B7  
A8  
+5 V dc  
N/ A  
N/ A  
N/ A  
N/ A  
N/ A  
N/ A  
N/ A  
O
B8  
I
A9  
Reserved  
+5 V dc (I/ O)  
Reserved  
Ground  
B9  
I
A10  
A11  
A12  
A13  
A14  
A15  
A16  
A17  
A18  
A19  
A20  
A21  
A22  
A23  
A24  
A25  
A26  
A27  
B10  
B11  
B12  
B13  
B14  
B15  
B16  
B17  
B18  
B19  
B20  
B21  
B22  
B23  
B24  
B25  
B26  
B27  
N/ A  
I
N/ A  
N/ A  
N/ A  
N/ A  
O
Ground  
Reserved  
RST#  
+5 V dc (I/ O)  
GNT#  
N/ A  
O
Ground  
REQ#  
N/ A  
I
Ground  
N/ A  
N/ A  
I/ O  
N/ A  
I/ O  
I/ O  
I/ O  
I/ O  
O
PCIPME  
Address/ data 30  
+3.3 V dc  
Address/ data 28  
Address/ data 26  
Ground  
+5 V dc (I/ O)  
N/ A  
Address/ data 31 I/ O  
Address/ data 29 I/ O  
Ground  
N/ A  
Address/ data 27 I/ O  
Address/ data 25 N/ A  
Address/ data 24  
IDSEL  
+3.3 V dc  
C/ BE 3#  
N/ A  
I/ O  
+3.3 V dc  
N/ A  
Address/ data 23 I/ O  
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Table 22. PCI connector pin assignments  
Pin  
Signal  
I/O  
Pin  
Signal  
I/O  
A28  
A29  
A30  
A31  
A32  
A33  
A34  
A35  
A36  
A37  
A38  
A39  
A40  
A41  
A42  
A43  
A44  
A45  
A46  
A47  
A48  
A49  
A50  
A51  
A52  
A53  
A54  
A55  
A56  
A57  
A58  
A59  
A60  
A61  
A62  
Address/ data 22  
Address/ data 20  
Ground  
I/ O  
B28  
B29  
B30  
B31  
B32  
B33  
B34  
B35  
B36  
B37  
B38  
B39  
B40  
B41  
B42  
B43  
B44  
B45  
B46  
B47  
B48  
B49  
B50  
B51  
B52  
B53  
B54  
B55  
B56  
B57  
B58  
B59  
B60  
B61  
A62  
Ground  
N/ A  
I/ O  
Address/ data 21 I/ O  
Address/ data 19 N/ A  
I/ O  
Address/ data 18  
Address/ data 16  
+3.3 V dc  
I/ O  
+3.3 V dc  
N/ A  
I/ O  
Address/ data 17 I/ O  
N/ A  
I/ O  
C/ BE2#  
Ground  
IRDY#  
I/ O  
FRAME#  
N/ A  
I/ O  
Ground  
N/ A  
I/ O  
TRDY#  
+3.3 V dc  
DEVSEL#  
Ground  
LOCK#  
PERR#  
N/ A  
I/ O  
Ground  
N/ A  
I/ O  
STOP#  
N/ A  
I/ O  
+3.3 V dc  
N/ A  
I/ O  
SDONE  
I/ O  
SBO#  
I/ O  
+3.3 V dc  
SERR#  
N/ A  
I/ O  
Ground  
N/ A  
N/ A  
I/ O  
+3.3 V dc  
+3.3 V dc  
C/ BE 1#  
N/ A  
I/ O  
C/ BE(1)#  
Address/ data 14  
Ground  
I/ O  
Address/ data 14 I/ O  
Ground N/ A  
N/ A  
I/ O  
Address/ data 12  
Address/ data 10  
Ground  
Address/ data 12 I/ O  
Address/ data 10 I/ O  
I/ O  
N/ A  
N/ A  
N/ A  
I/ O  
Ground  
N/ A  
N/ A  
N/ A  
I/ O  
Key  
Key  
Key  
Key  
Address/ data 8  
Address/ data 7  
+3.3 V dc  
Address/ data 8  
Address/ data 7  
+3.3 V dc  
I/ O  
I/ O  
N/ A  
I/ O  
N/ A  
I/ O  
Address/ data 5  
Address/ data 3  
Ground  
Address/ data 5  
Address/ data 3  
Ground  
I/ O  
I/ O  
N/ A  
I/ O  
N/ A  
I/ O  
Address/ data 1  
+5 V dc (I/ O)  
ACK64#  
Address/ data 1  
+5 V dc (I/ O)  
ACK64#  
N/ A  
I/ O  
N/ A  
I/ O  
+5 V dc  
N/ A  
N/ A  
+5 V dc  
N/ A  
N/ A  
+5 V dc  
+5 V dc  
Appendix A. Connector pin assignments 41  
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IDE connectors  
2
1
40  
39  
Table 23. IDE connector pin assignments  
Pin  
1
Signal  
I/O  
Pin  
21  
22  
23  
24  
25  
26  
27  
28  
29  
30  
31  
32  
33  
34  
35  
36  
37  
38  
39  
40  
Signal  
NC  
I/O  
RESET  
O
N/ A  
2
Ground  
N/ A  
I/ O  
I/ O  
I/ O  
I/ O  
I/ O  
I/ O  
I/ O  
I/ O  
I/ O  
I/ O  
I/ O  
I/ O  
I/ O  
I/ O  
I/ O  
I/ O  
N/ A  
N/ A  
Ground  
I/ O write  
NC  
N/ A  
3
Data bus bit 7  
Data bus bit 8  
Data bus bit 6  
Data bus bit 9  
Data bus bit 5  
Data bus bit 10  
Data bus bit 4  
Data bus bit 11  
Data bus bit 3  
Data bus bit 12  
Data bus bit 2  
Data bus bit 13  
Data bus bit 1  
Data bus bit 14  
Data bus bit 0  
Data bus bit 15  
Ground  
O
4
N/ A  
5
I/ O read  
Ground  
O
6
I
7
I/ O channel ready  
ALE  
I
8
O
9
NC  
N/ A  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
Ground  
IRQ  
N/ A  
I
CS16#  
SA1  
I
O
PDIAG#  
SA0  
I
O
SA2  
O
CS0#  
O
CS1  
O
Active#  
Ground  
I
Key (Reserved)  
N/ A  
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Diskette drive connector  
2
34  
33  
1
Table 24. Diskette drive connector pin assignments  
Pin  
1
Signal  
I/O  
I
Pin  
18  
Signal  
I/O  
O
Drive 2 installed #  
Direction in#  
Ground  
2
High density  
select  
O
19  
N/ A  
3
Not connected  
Not connected  
Ground  
N/ A  
N/ A  
N/ A  
N/ A  
N/ A  
I
20  
21  
22  
23  
24  
25  
26  
27  
28  
29  
30  
31  
32  
33  
34  
Step#  
O
4
Ground  
N/ A  
5
Write data #  
Ground  
O
6
Data rate 0  
Ground  
N/ A  
7
Write enable#  
Ground  
O
8
Index#  
N/ A  
9
Reserved  
N/ A  
O
Track0#  
I
10  
11  
12  
13  
14  
15  
16  
17  
Motor enable 0#  
Ground  
MSEN0  
I
N/ A  
O
Write protect#  
Ground  
I
Drive select 1#  
Ground  
N/ A  
N/ A  
O
Read data#  
Ground  
I
Drive select 0#  
Ground  
N/ A  
O
N/ A  
O
Head 1 select#  
Data rate 1  
Diskette change#  
Motor enable 1#  
MSEN1  
N/ A  
I
I
Appendix A. Connector pin assignments 43  
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Power supply connector  
Table 25. Power supply connector pin assignments  
Pin  
1
Signal  
3.3 V dc  
3.3 V dc  
COM  
Function  
+3.3 V dc  
+3.3 V dc  
Ground  
Pin  
11  
Signal  
3.3 V dc  
-12 V dc  
COM  
Function  
+3.3 V dc  
-12 V dc  
Ground  
2
12  
13  
14  
3
4
5 V dc  
+5 V dc  
PS-ON  
DC Remote  
Enable  
5
COM  
5 V dc  
COM  
POK  
Ground  
15  
16  
17  
18  
19  
20  
COM  
Ground  
Ground  
Ground  
Reserved  
+5 V dc  
+5 V dc  
6
+5 V dc  
COM  
7
Ground  
COM  
8
PWR GOOD  
Standby Voltage  
+12 V dc  
Reserved  
5 V dc  
5 V dc  
9
5 VSB  
12 V dc  
10  
Wake on LAN connectors  
Table 26. J14 Wake on LAN connector pin assignments  
Pin  
1
Description  
+5 V AUX  
Ground  
2
3
Internal Wake on LAN  
USB port connectors  
2
4
1
3
Table 27. USB port connector pin assignments  
Pin  
1
Signal  
VCC  
2
-Data  
3
+Data  
Ground  
4
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Mouse and keyboard port connectors  
6
4
5
3
1
2
Table 28. Mouse port connector pin assignments  
Pin  
1
Signal  
Data  
I/O  
Pin  
4
Signal  
I/O  
I/ O  
I/ O  
N/ A  
+5 V dc  
Clock  
N/ A  
I/ O  
2
Reserved  
Ground  
5
3
6
Reserved  
N/ A  
Table 29. Keyboard port connector pin assignments  
Pin  
1
Signal  
I/O  
Pin  
4
Signal  
I/O  
Keyboard data I/ O  
+5 V dc  
N/ A  
I/ O  
2
Mouse data  
Ground  
I/ O  
5
Keyboard  
Clock  
3
N/ A  
6
Mouse clock  
N/ A  
Serial port connector  
5
1
6
9
Table 30. Serial port connector pin assignments  
Pin  
1
Signal  
I/O  
I
Pin  
5
Signal  
I/O  
Data carrier detect  
Receive data#  
Transmit data#  
Data terminal read  
Ring indicator  
Ground  
N/ A  
2
I
6
Data set ready  
I
3
O
O
7
Request to send  
Clear to send  
O
I
4
8
9
Appendix A. Connector pin assignments 45  
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Parallel port connector  
1
13  
25  
14  
Table 31. Parallel port connector pin assignments  
Pin  
1
Signal  
I/O  
I/ O  
I/ O  
I/ O  
I/ O  
I/ O  
I/ O  
I/ O  
I/ O  
I/ O  
I
Pin  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
Signal  
I/O  
STROBE#  
Data bit 0  
Data bit 1  
Data bit 2  
Data bit 3  
Data bit 4  
Data bit 5  
Data bit 6  
Data bit 7  
ACK#  
AUTO FD XT#  
ERROR#  
INIT#  
O
2
I
3
O
4
SLCT IN#  
Ground  
Ground  
Ground  
Ground  
Ground  
Ground  
Ground  
Ground  
O
5
N/ A  
N/ A  
N/ A  
N/ A  
N/ A  
N/ A  
N/ A  
N/ A  
6
7
8
9
10  
11  
12  
13  
BUSY  
I
PE  
I
SLCT  
I
46 PC 300 GL and 300 PL  
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Appendix B. System address maps  
The following charts represent how the hard disk stores different types of  
information. Address ranges and byte sizes are approximate.  
System memory map  
The first 640 KB of system board RAM is mapped starting at address hex 0000000. A  
256 byte area and a 1 KB area of this RAM are reserved for BIOS data areas. Memory  
can be mapped differently if POST detects an error.  
Table 32. System memory map  
Address range  
(decimal)  
Address range (hex)  
Size  
Description  
0–512 KB  
00000–7FFFF  
80000–9FBFF  
9FC00–9FFFF  
A0000–BFFFF  
512 KB  
127 KB  
1 KB  
Conventional  
512–639 KB  
639–640 KB  
640–767 KB  
Extended conventional  
Extended BIOS data  
128 KB  
Dynamic video memory display  
cache  
768–800 KB  
800–896 KB  
C0000–C7FFFF  
C8000–DFFFF  
32 KB  
96 KB  
Video ROM BIOS (shadowed)  
PCI space, available to adapter  
ROMs  
896 KB–1 MB  
E0000–FFFFF  
128 KB  
System ROM BIOS (main memory  
shadowed)  
1–16 MB  
100000–FFFFFF  
15 MB  
PCI space  
16–4096 MB  
4096–4120 MB  
1000000–FFDFFFF  
FFFE0000–FFFFFFFF  
4080 MB  
128 KB  
PCI space (positive decode)  
System ROM BIOS  
© Copyright IBM Corp. 2000  
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Input/output address map  
The following lists resource assignments for the I/ O address map. Any addresses  
that are not shown are reserved.  
Table 33. I/O address map  
Address (hex)  
0000–000F  
0010–001F  
0020–0021  
0023–003F  
0040–0043  
0044–00FF  
0060  
Size  
Description  
16 bytes  
16 bytes  
2 bytes  
30 bytes  
4 bytes  
28 bytes  
1 byte  
DMA 1  
General I/ O locations - available to PCI bus  
Interrupt controller 1  
General I/ O locations - available to PCI bus  
Counter/ timer 1  
General I/ O locations - available to PCI bus  
Keyboard controller byte - reset IRQ  
System port B  
0061  
1 byte  
0064  
1 byte  
Keyboard controller, CMB/ STAT byte  
Enable NMI  
0070, bit 7  
0070, bits 6:0  
0071  
1 bit  
1 bit  
Real-time clock, address  
Real-time clock, data  
1 byte  
0072–007F  
0080  
14 bytes  
1 byte  
General I/ O locations - available to PCI bus  
POST checkpoint register during POST only  
Refresh page register  
008F  
1 byte  
0080–008F  
0090–0091  
0092  
16 bytes  
15 bytes  
1 byte  
ICH1, DMA page registers  
General I/ O locations - available to PCI bus  
PS/ 2 keyboard controller registers  
General I/ O locations  
0093–009F  
00A0–00A1  
00A2–00BF  
00C0–00DF  
00E0–00EF  
00F0  
15 bytes  
2 bytes  
30 bytes  
31 bytes  
16 bytes  
1 byte  
Interrupt controller 2  
APM control  
DMA 2  
General I/ O locations - available to PCI bus  
Coprocessor error register  
General I/ O locations - available to PCI bus  
Secondary IDE channel  
00F1–016F  
0170–0177  
01F0–01F7  
0200–0207  
0220–0227  
0228–0277  
0278–027F  
127 bytes  
8 bytes  
8 bytes  
8 bytes  
8 bytes  
80 bytes  
8 bytes  
Primary IDE channel  
Available  
Serial port 3 or 4  
General I/ O locations - available to PCI bus  
LPT3  
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Table 33. I/O address map  
Address (hex)  
0280–02E7  
02E8–02EF  
02F8–02FF  
0338–033F  
0340–036F  
0370–0371  
0372–0375  
0376–0377  
0378–037F  
0380–03B3  
03B4–03B7  
03BA  
Size  
Description  
102 bytes  
8 bytes  
8 bytes  
8 bytes  
48 bytes  
2 bytes  
4 bytes  
2 bytes  
8 bytes  
52 bytes  
4 bytes  
1 byte  
Available  
Serial port 3 or 4  
COM2  
Serial port 3 or 4  
Available  
SIO planar Plug and Play index/ data registers  
Available  
IDE channel 1 command  
LPT2  
Available  
Video  
Video  
03BC–03BE  
03C0–03CF  
0334–03D7  
03DA  
16 bytes  
16 bytes  
4 bytes  
1 byte  
LPT1  
Video  
Video  
Video  
03D0–03DF  
03E0–03E7  
03E8–03EF  
03F0–03F5  
03F6  
11 bytes  
8 bytes  
8 bytes  
6 bytes  
1 byte  
Available  
Available  
COM3 or COM4  
Diskette channel 1  
Primary IDE channel command port  
Diskette channel command  
Diskette disk change channel  
Primary IDE channel status port  
COM1  
03F7 (Write)  
03F7, bit 7  
03F7, bits 6:0  
03F8–03FF  
0400–047F  
0480–048F  
0490–0CF7  
0CF8–0CFB  
0CFC–0CFF  
OPTn–400h  
0CF9  
1 byte  
1 bit  
7 bits  
8 bytes  
128 bytes  
16 bytes  
1912 bytes  
4 bytes  
4 bytes  
8 bytes  
1 byte  
Available  
DMA channel high page registers  
Available  
PCI configuration address register  
PCI configuration date register  
ECP port, LPTn base address + hex 400  
Turbo and reset control register  
Available  
0D00–FFFF  
62207 bytes  
Appendix B. System address maps 49  
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DMA I/O address map  
Table 34. DMA I/O address map  
Address (hex)  
0000  
Description  
Bits  
Byte pointer  
Channel 0, Memory Address register  
Channel 0, Transfer Count register  
Channel 1, Memory Address register  
Channel 1, Transfer Count register  
Channel 2, Memory Address register  
Channel 2, Transfer Count register  
Channel 3, Memory Address register  
Channel 3, Transfer Count register  
00–15  
00–15  
00–15  
00–15  
00–15  
00–15  
00–15  
00–15  
00–07  
Yes  
Yes  
Yes  
Yes  
Yes  
Yes  
Yes  
Yes  
0001  
0002  
0003  
0004  
0005  
0006  
0007  
0008  
Channels 0–3, Read Status/ Write Command  
register  
0009  
000A  
000B  
000C  
000D  
000E  
000F  
0081  
0082  
0083  
0087  
0089  
008A  
008B  
008F  
00C0  
00C2  
00C4  
00C6  
00C8  
00CA  
00CC  
Channels 0–3, Write Request register  
Channels 0–3, Write Single Mask register bits  
Channels, 0–3, Mode register (write)  
Channels 0–3, Clear byte pointer (write)  
00–02  
00–02  
00–07  
N/ A  
Channels, 0–3, Master clear (writer)/ temp (read) 00–07  
Channels 0–3, Clear Mask register (write)  
Channels 0–3, Write All Mask register bits  
Channel 2, Page Table Address register  
Channel 3, Page Table Address register  
Channel 1, Page Table Address register  
Channel 0, Page Table Address register  
Channel 6, Page Table Address register  
Channel 7, Page Table Address register  
Channel 5, Page Table Address register  
Channel 4, Page Table Address/ Refresh register  
Channel 4, Memory Address register  
Channel 4, Transfer Count register  
00–03  
00–03  
00–07  
00–07  
00–07  
00–07  
00–07  
00–07  
00–07  
00–07  
00–15  
00–15  
00–15  
00–15  
00–15  
00–15  
00–15  
Yes  
Yes  
Yes  
Yes  
Yes  
Yes  
Yes  
Channel 5, Memory Address register  
Channel 5, Transfer Count register  
Channel 6, Memory Address register  
Channel 6, Transfer Count register  
Channel 7, Memory Address register  
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Table 34. DMA I/O address map  
Address (hex)  
00CE  
Description  
Bits  
Byte pointer  
Channel 7, Transfer Count register  
00–15  
00–07  
Yes  
00D0  
Channels 4–7, Read Status/ Write Command  
register  
00D2  
00D4  
00D6  
00D8  
00DA  
00DC  
00DE  
00DF  
Channels 4–7, Write Request register  
00–02  
00–02  
00–07  
N/ A  
Channels 4–7, Write Single Mask register bit  
Channels 4–7, Mode register (write)  
Channels 4–7, Clear byte pointer (write)  
Channels 4–7, Master clear (write)/ temp (read)  
Channels 4–7, Clear Mask register (write)  
Channels 4–7, Write All Mask register bits  
Channels 507, 8- or 16-bit mode select  
00–07  
00–03  
00–03  
00–07  
PCI configuration space map  
Table 35. PCI configuration space map  
Bus number (hex) Device number (hex) Function number (hex) Description  
00  
00  
00  
00  
00  
00  
00  
01  
00  
00  
00  
00  
00  
VIA VT 82C694X (north bridge)  
VIA VT 82C694X (north bridge)  
VIA VT 82C596B (south bridge)  
VIA VT 82C596B (south bridge)  
VIA VT 82C596B (south bridge)  
Intel 82371AB power management  
ESS 1930 audio controller  
S3Tio3D AGP video  
01  
00  
02  
00  
02  
01  
02  
02  
02  
03  
0 x 12  
00  
00  
00  
0 x 10  
0 x 0F  
0 x 0E  
N/ A  
N/ A  
N/ A  
Slot 1  
Slot 2  
Slot 3  
Appendix B. System address maps 51  
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Appendix C. IRQ and DMA channel assignments  
The following tables list the interrupt request (IRQ) and direct memory access (DMA  
channel assignments.  
Table 36. IRQ channel assignments  
IRQ  
NMI  
SMI  
0
System resource  
Critical system error  
System management interrupt - power management  
Reserved (interval timer)  
Reserved (keyboard)  
Reserved, cascade interrupt from slave PIC  
COM2  
1
2
3
4
COM1  
5
LPT2/ audio (if present)  
Diskette controller  
6
7
LPT1  
8
Real-time clock  
9
ACPI  
10  
11  
12  
13  
14  
15  
Available to user  
Available to user  
Mouse port  
Reserved (math coprocessor)  
Primary IDE (if present)  
Secondary IDE (if present)  
© Copyright IBM Corp. 2000  
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Table 37. DMA channel assignments  
DMA channel  
Data width  
System resource  
0
1
2
3
4
5
6
7
8 bits  
8 bits  
8 bits  
8 bits  
--  
Open  
Open  
Diskette drive  
Parallel port (for ECP or EPP)  
Reserved (cascade channel)  
16 bits  
16 bits  
16 bits  
Open  
Open  
Open  
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Appendix D. Error codes  
Complete lists of POST and beep error codes are provided in the PC300GL and PC  
300PL User Guide and in the Hardware Maintenance Manual.  
POST error codes  
POST error messages appear when, during startup, POST finds problems with the  
hardware or a change in the hardware configuration. POST error messages are 3-, 4-,  
5-, 8-, or 12-character alphanumeric messages.  
Beep codes  
Beep codes are a series of tones in sets of two or three that sound when there are POST  
errors. The beep pattern represents numeric values and provides further information  
about the location of a potential problem.  
The Hardware Maintenance Manual provides a complete list of beep codes.  
© Copyright IBM Corp. 2000  
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Appendix E. Notices and Trademarks  
This publication was developed for products and services offered in the U.S.A.  
IBM may not offer the products, services, or features discussed in this document in  
other countries. Consult your local IBM representative for information on the  
products and services currently available in your area. Any reference to an IBM  
product, program, or service is not intended to state or imply that only that IBM  
product, program, or service may be used. Any functionally equivalent product,  
program, or service that does not infringe any IBM intellectual property right may be  
used instead. However, it is the users responsibility to evaluate and verify the  
operation of any non-IBM product, program, or service.  
IBM may have patents or pending patent applications covering subject matter  
described in this document. The furnishing of this document does not give you any  
license to these patents. You can send license inquiries, in writing, to:  
IBM Director of Licensing  
IBM Corporation  
North Castle Drive  
Armonk, NY 10504-1785  
U.S.A.  
The following paragraph does not apply to the United Kingdom or any country  
where such provisions are inconsistent with local law: INTERNATIONAL  
BUSINESS MACHINES CORPORATION PROVIDES THIS PUBLICATION "AS IS"  
WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESS OR IMPLIED,  
INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF NON-  
INFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR  
PURPOSE. Some states do not allow disclaimer of express or implied warranties in  
certain transactions, therefore, this statement may not apply to you.  
This information could include technical inaccuracies or typographical errors.  
Changes are periodically made to the information herein; these changes will be  
incorporated in new editions of the publication. IBM may make improvements  
and/ or changes in the product(s) and/ or the program(s) described in this publication  
at any time. without notice.  
Any references in this publication to non-IBM Web sites are provided for convenience  
only and do not in any manner serve as an endorsement of those Web sites. The  
materials at those Web sites are not part of the materials for this IBM product, and use  
of those Web sites is at your own risk.  
The following terms are trademarks of the IBM Corporation in the United States or  
other countries or both:  
Alert on LAN  
IBM  
PC300  
Wake on LAN  
Pentium, Intel, and MMX are trademarks of Intel Corporation in the United States,  
other countries, or both.  
Microsoft and Windows are trademarks of Microsoft Corporation in the United States,  
other countries, or both.  
© Copyright IBM Corp. 2000  
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Other company, product, and service names may be trademarks or service marks of  
others.  
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Bibliography  
The following publications were reference materials  
for IBM staff in developing the PC300 PL and 300  
GL. This list of reference materials is provided for  
convenience only. For further information on these  
materials, contact the source corporation.  
PCI BIOS Specification 2.0, Source: PCI Special  
Interest Group  
Plug and Play BIOS Specification 1.1, Source:  
Microsoft Corporation;  
http:/ / www.microsoft.com/ hwdev/  
Plug and Play BIOS Specification for Windows  
2000, Source: Microsoft Corporation  
Advanced Power Management (APM) BIOS  
Interface Specification 1.2, Source: Intel  
Corporation  
Plug and Play BIOS Specification, Errata and  
Clarifications 1.0, Source: Microsoft  
Corporation  
AT Attachment Interface with Extensions,  
Source: American National Standard of  
Accredited Standards Committee  
Universal Serial Bus Specifications, Source:  
http:/ / www.usb.org  
Extended Capabilities Port: Specification Kit,  
Source: Microsoft Corporation  
Video Electronics Standards Association 1.2,  
Intel Microprocessor and Peripheral Component  
Literature, Source: Intel Corporation  
© Copyright IBM Corp. 2000  
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Index  
A
D
K
Accelerated Graphics Port 8  
ACPI 30  
DDC 9  
keyboard port connector 45  
kilobytes viii  
DIMM 6  
address maps  
direct memory access 7  
diskette drive  
connector 43  
interface 11  
DMA I/ O 50  
M
input/ output 48  
PCI configuration 51  
system memory 47  
Adlib 10  
machine model byte 32  
machine-sensitive programs 32  
major features 1  
megabyte viii  
DMA 7  
DMA I/ O address map 50  
dual inline memory module 6  
DVD-ROM 2  
DVI-I  
ADSL modems 3  
Advanced Configuration and Power  
Interface 30  
memory  
connectors 34  
system 5  
Advanced Power Management 30  
AGP 8  
connector 34  
interface 8  
microprocessor 5  
MMX 5  
APM 30  
audio  
mouse 12  
E
connectors 10  
mouse port connector 45  
controller 10  
ECP 12  
device drivers 10  
subsystem 10  
EEPROM 13  
N
network  
end-of-interrupt (EOI) 31  
enhanced parallel port 12  
EOI (end-of-interrupt) 31  
EPP 12  
B
Eathernet 13  
token ring 13  
basic input/ output system 29  
beep error 55  
bibliography 59  
BIOS 29  
error codes  
alphanumeric 55  
beep 55  
O
complete lists 55  
POST 55  
bus  
overview 1  
PCI 7  
universal serial 7  
Ethernet 13  
expansion  
overvoltage 27  
adapters 13  
P
PAL 8  
PCI 13  
C
slots 13  
extended capabilities port 12  
CD-RW(Rewritable) 2  
channel assignments  
DMA 54  
parallel port 12  
parallel port connector 46  
PCI  
F
flash  
IRQ 53  
connectors 40  
interrupts 31  
PCI configuration space map 51  
PCI connector 40  
pin assignments 33  
Plug and Play 29  
port  
chip set 5  
clock 13  
EEPROM 13  
update utility 30  
frames per second 8  
CMOS 13  
compatibility  
hardware 31  
software 32  
G
component current 26  
Configuration/ Setup Utility 30  
connector  
keyboard 12  
mouse 12  
GB viii  
parallel 12  
gigabyte viii  
cables 17  
ports  
diskette drive 43  
DVI-I 34  
serial 11  
POST 29  
H
IDE 42  
errors 55  
keyboard 45  
mouse port 45  
parallel port 46  
PCI 40  
hardware interrupts 31  
hex viii  
Power  
input, output 25  
power  
supply 27  
I
IDE  
power supply 44  
serial port 45  
SVGA 33  
supply connector 44  
Power Supply 25  
power-on self-test 29  
publications, related vii  
connector 42  
input/ output address map 48  
integrated peripheral controller 11  
interrupts  
system memory 34  
USB 44  
Wake on LAN 44  
Connector Panel  
desktop, tower 17  
connector panel  
desktop 18  
R
hardware 31  
PCI 31  
real-time clock 13  
related publications vii  
Remote Program Local 13  
reserved viii  
software 32  
tower 19  
© Copyright IBM Corp. 2000  
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Rocker Switches 15  
S
serial port connector 45  
Serial ports 11  
shutdown 27  
SMID 1  
software  
CDs 30  
compatibility 32  
diagnostic program 30  
system 29  
SoundBlaster 10  
specifications  
desktop 21  
tower 22  
SPP 12  
standard parallel port 12  
SVGA monitor connector 33  
system board 5, 14  
system memory map 47  
T
terminology viii  
token ring 13  
U
UART 11  
Universal Serial Bus 7  
USB  
interface 7  
port connectors 44  
V
VGA 9  
video  
DVI-I 34  
frames per second 8  
graphic solutions 8  
graphics array 9  
modes 10  
SVGA 33  
Video Electronics Standards Associ-  
ation 9  
W
Wake on LAN 3  
Wake on LAN connector 44  
Wake on Ring 3  
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