FUJITSU SEMICONDUCTOR
DATA SHEET
DS04-27233-2E
ASSP For Power Supply Applications
(General Purpose DC/DC Converter)
1-ch DC/DC Converter IC
for low voltage
MB39A105
■ DESCRIPTION
The MB39A105 is 1-channel DC/DC converter IC using pulse width modulation (PWM). This IC is ideal for up
conversion.
The minimum operating voltage is low (1.8 V) , and the MB39A105 is best for built-in power supply such as LCD
monitors. Also the short-circuit protection detection output function prevents input/output short on a chopper type
up-converter.
This product is covered by US Patent Number 6,147,477.
■ FEATURES
• Power supply voltage range : 1.8 V to 6 V
• Reference voltage accuracy : ± 1 %
• High-frequency operation capability : 1 MHz (Max)
• Built-in standby function: 0 µA (Typ)
• Built-in timer-latch short-circuit protection circuit
• Built-in short-circuit protection detection output function
• Built-in soft-start circuit independent of loads
• Built-in totem-pole type output for Nch MOS FET
• Package : TSSOP-8P (Thickness 1.1 mm Max)
■ PACKAGE
8-pin plastic TSSOP
(FPT-8P-M05)
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MB39A105
■ PIN DESCRIPTION
Pin No.
Symbol
−INE
I/O
Descriptions
1
2
3
I
Error amplifiers (Error Amp) inverted input terminal
CSCP
VCC
Timer-latch short-circuit protection capacitor connection terminal
Power supply terminal
Open drain output terminal for short-circuit protection detection
During timer-latch short-circuit protection operation : Output “High-Z”
During normal operation : Output “L”
4
SCPOD
O
O
5
6
7
8
OUT
GND
RT
External Nch FET gate drive terminal
Ground terminal
Triangular wave oscillation frequency setting resistor connection terminal
Error Amplifier (Error Amp) output terminal
FB
O
3
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MB39A105
■ BLOCK DIAGRAM
VCC SCPOD
3
4
1
8
−INE
VREF
Error Amp
PWM
Comp.
−
Drive
+
−
+
+
Nch
5
6
OUT
GND
(0.5 V ± 1%)
FB
IO = 400 mA
at VCC = 3.3 V
VREF
(0.7 V)
(0.3 V)
SCP
Comp.
+
−
(0.9 V)
+
−
2
CSCP
S
R
Q
(1.0 V)
RT Current
Power
VREF ON/OFF
CTL
OSC
bias
UVLO
VREF
(1.27 V)
L : UVLO release
±10%
7
RT
4
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MB39A105
■ ABSOLUTE MAXIMUM RATINGS
Rating
Parameter
Symbol
Condition
VCC terminal
Unit
Max
Min
Power supply voltage
Output current
VCC
IO
7
V
OUT terminal
35
mA
mA
mW
°C
Output peak current
Power dissipation
Storage temperature
IOP
Duty ≤ 5% (t = 1/fOSC×Duty)
Ta ≤ +25 °C
700
490*
+125
PD
TSTG
−55
* : The packages are mounted on the epoxy board (10 cm × 10 cm).
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
■ RECOMMENDED OPERATING CONDITIONS
Value
Parameter
Symbol
Condition
Unit
Min
1.8
0
Typ
Max
6
Power supply voltage
Input voltage
VCC
VINE
VCC terminal
−INE terminal
V
V
VCC − 0.9
6
SCPOD terminal output voltage
SCPOD terminal output current
Output current
VSCPOD SCPOD terminal
0
V
ISCPOT
IO
SCPOD terminal
OUT terminal
0
2
mA
mA
kHz
kΩ
µF
°C
−30
100
3.3
+30
1000
33
Oscillation frequency
fosc
RT
500
7.5
Timing resistor
RT terminal
Short-circuit detection capacitor
Operating ambient temperature
CSCP
Ta
CSCP terminal
0.22
+25
1.0
−30
+85
WARNING: The recommended operating conditions are required in order to ensure the normal operation of the
semiconductor device. All of the device’s electrical characteristics are warranted when the device is
operated within these ranges.
Always use semiconductor devices within their recommended operating condition ranges. Operation
outside these ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented on
the data sheet. Users considering application outside the listed conditions are advised to contact their
FUJITSU representatives beforehand.
5
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MB39A105
■ ELECTRICAL CHARACTERISTICS
(VCC = 3.3 V, Ta = +25 °C)
Value
Unit
Pin
No
Symbol
Parameter
Conditions
Min
Typ
Max
1. Under voltage
lockout
Threshold voltage
protection circuit
VTLH
3
VCC =
1.15 1.35 1.55
V
block [UVLO]
Threshold voltage
VTH
2
2
0.95 1.00 1.05
0.15 0.20 0.25
V
V
Short-circuit detection time
setting difference voltage
∆VCSCP
Input source current
Reset voltage
ICSCP
2
3
CSCP = 0.85 V
VCC =
−1.76 −0.88 −0.44 µA
2. Short-circuit
protection block
[SCP]
VRST
1.1
1.3
1.5
V
SCPOD terminal output
leak current
ILEAK
4
SCPOD = 3.3 V
0
1.0
µA
SCPOD terminal output on
resistor
RON
4
5
5
SCPOD = 1 mA
RT = 7.5 kΩ
50
500
1*
100
Ω
Oscillation frequency
fosc
450
550 kHz
3. Triangular
wave oscillator
block [OSC]
Frequency temperature
variation
∆fOSC/
fOSC
Ta = 0 °C to +85 °C
%
4. Soft-start block
[CS]
Charge current
ICS
2
CSCP = 0 V
−16
−11
−6
µA
Threshold voltage
Input bias current
Voltage gain
VTH
IB
1
1
8
8
8
8
8
8
FB = 0.5 V
−INE = 0 V
DC
0.495 0.5 0.505
−120 −30
70*
V
nA
dB
MHz
V
AV
Frequency band width
BW
VOH
VOL
AV = 0 dB
1.1*
5. Error amplifier
block [Error Amp]
1.17 1.27 1.37
Output voltage
40
200
mV
µA
µA
Output source current
Output sink current
ISOURCE
ISINK
FB = 0.5 V
FB = 0.5 V
−80
300
−50
100
85
6. PWM compar-
ator block
[PWM Comp.]
Maximum duty cycle
Output source current
Dtr
ISOURCE
ISINK
5
5
5
RT = 7.5 kΩ
90
95
%
OUT = 0 V,
Duty ≤ 5%
−400*
400*
mA
mA
(t = 1/fosc×Duty)
OUT = 3.3 V,
Duty ≤ 5%
(t = 1/fosc×Duty)
7.Output block
[Drive]
Output sink current
Output ON resistor
ROH
ROL
ICCS
ICC
5
5
3
3
OUT = −15 mA
OUT = 15 mA
RT = OPEN
4.0*
3.0
0
Ω
Ω
6.0
10
Standby current
µA
mA
8. General block
Power supply current
RT = 7.5 kΩ
1.2
1.8
*: Standard design value.
6
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MB39A105
■ TYPICAL CHARACTERISTICS
Power Supply Current vs. Power Supply Voltage
Power Supply Current vs. RT Terminal Current
5.0
5
Ta = +25 °C
RT = 7.5 kΩ
Ta = +25 °C
VCC = 3.3 V
4.5
4
4.0
3.5
3.0
2.5
3
2
1
0
2.0
ICC
1.5
1.0
0.5
0.0
0
2
4
6
8
10
0
10
20
30
40
50
Power supply voltage VCC (V)
RT terminal current IRT (µA)
Error Amplifier Threshold Voltage vs.
Power Supply Voltage
1.0
Ta = +25 °C
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
VCC = 3.3 V
0
2
4
6
8
10
Power supply voltage VCC (V)
Triangular Wave Oscillation Frequency vs.
Power supply voltage
Error Amplifier Threshold Voltage vs.
Ambient Temperature
0.52
0.51
0.50
0.49
0.48
600
Ta = +25 °C
RT = 7.5 kΩ
VCC = 3.3 V
RT = 7.5 kΩ
550
500
450
400
1
2
3
4
5
6
7
−40 −20
0
20
40
60
80
100
Ambient temperature Ta (°C)
Power supply voltage VCC (V)
(Continued)
7
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MB39A105
Triangular Wave Oscillation Frequency
vs. Ambient Temperature
Triangular Wave Oscillation Frequency
vs. Timing Resistor
600
10000
1000
100
Ta = +25 °C
VCC = 3.3 V
VCC = 3.3 V
RT = 7.5 kΩ
550
500
450
400
10
−40 −20
0
20
40
60
80
100
1
10
100
Timing resistor RT (kΩ)
Ambient temperature Ta (°C)
Max On Duty vs.
Triangular Wave Oscillation Frequency
100
Ta = +25 °C
VCC = 3.3 V
95
90
85
80
75
70
10
100
1000
10000
Triangular wave oscillation frequency fOSC (kHz)
Error Amplifier Gain and Phase
vs. Frequency
Ta = +25 °C
40
30
180
90
VCC = 3.3 V
240 kΩ
AV
ϕ
20
10 kΩ
1 µF
10
+
−
10
11
0
0
2.4 kΩ
IN
9
+
+
−10
−20
−30
−40
10 kΩ
OUT
Error Amp
−90
−180
1.24 V
100
1 k
10 k 100 k
1 M
10 M
Frequency f (Hz)
(Continued)
8
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MB39A105
(Continued)
Power Dissipation vs. Ambient Temperature
600
500
490
400
300
200
100
0
−40 −20
0
20
40
60
80
100
Ambient temperature Ta ( °C)
9
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MB39A105
■ FUNCTIONS
1. DC/DC Converter Functions
(1) Triangular-wave oscillator block (OSC)
The triangular wave oscillator incorporates a timing resistor connected to RT terminal (pin 7) to generate
triangular oscillation waveform amplitude of 0.3 V to 0.7 V.
The triangular waveforms are input to the PWM comparator in the IC.
(2) Error amplifier block (Error Amp1, Error Amp2)
The error amplifier detects the DC/DC converter output voltage and outputs PWM control signals. In addition,
an arbitrary loop gain can be set by connecting a feedback resistor and capacitor from the output terminal to
inverted input terminal of the error amplifier, enabling stable phase compensation to the system.
Also, it is possible to prevent rush current at power supply start-up by connecting a soft-start capacitor with the
CSCP terminal (pin 2) which is the non-inverted input terminal for Error Amp. The use of Error Amp for soft-start
detection makes it possible for a system to operate on a fixed soft-start time that is independent of the output
load on the DC/DC converter.
(3) PWM comparator block (PWM Comp.)
The PWM comparator is a voltage-to-pulse width modulator that controls the output duty depending on the input/
output voltage.
The comparator keeps output transistor on while the error amplifier output voltage and the DTC voltage remain
higher than the triangular wave voltage.
(4) Output block (Drive)
The output block is in the totem pole configuration, capable of driving an external N-channel MOS FET.
10
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MB39A105
2. Power Control Function
A switch in series with a resistor connected with the RT terminal (pin 7) allows you to turn on or turn off the power.
On/off setting conditions of power supply
RT
CTL
L
Power
OFF (standby)
ON (operating)
ON/OFF CTL
(L : OFF, H : ON)
H
3. Protective Functions
(1) Timer-latch short-circuit protection circuit (SCP)
Short-circuit detection comparator detects the error amplifier output voltage level. If the load conditions for the
DC/DC converter are stable, the short-circuit protection comparator is kept in equilibrium condition because the
error amplifier is free from output variation. At this time the CSCP terminal (pin 2) is held at the soft-start end
voltage (about 0.8 V) . If the DC/DC converter output voltage falls and error amplifier output is over 0.9 V, the
timer circuits are actuated to start charging the external capacitor CSCP.
When the capacitor voltage reaches about 1.0 V, the latch is set and the circuit is turned off the external FET
and sets the dead time to 100 %. At this time, latch input is closed and the CSCP terminal is held at the “L” level.
To reset the actuated protection circuit, turn off and on the power supply again and set VCC terminal voltage
(pin 3) to 1.1 V (Min) or less. (See ■SETTING TIME CONSTANT FOR TIMER-LATCH SHORT-CIRCUIT PRO-
TECTION CIRCUIT.)
(2) Under voltage lockout protection circuit (UVLO)
The transient state or a momentary decrease in supply voltage, which occurs when the power supply is turned
on, may cause the IC to malfunction, resulting in breakdown or degradation of the system. To prevent such
malfunctions, undervoltagelockoutprotectioncircuitdetectsadecreaseininternalreferencevoltagewithrespect
to the power supply voltage, turns off the output FET, and sets the dead time to 100% while holding the CSCP
terminal (pin 2) at the “L” level.
The circuit restores the output transistor to normal when the supply voltage reaches the threshold voltage of the
undervoltage lockout protection circuit.
(3) Short-circuit protection detection output function
Connecting the Pch MOS FET to SCPOD terminal (pin 4) turns off the Pch MOS FET when the short-circuit
protection is detected or under voltage lockout protection circuit operate. This allows you to prevent the short-
circuit between the input and output when the short-circuit protection is detected, thus preventing the input
voltage from occurring in the output region in the standby state.
(4) Protection circuit operating function table
This table refers to output condition when protection circuit is operating.
Operating circuit
Short-circuit protection circuit
Under voltage lockout protection circuit
SCPOD
High-Z
High-Z
OUT
L
L
11
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MB39A105
■ SETTING THE OUTPUT VOLTAGE
• Output Voltage Setting Circuit
VO
R1
Error
Amp
1
−
0.5
R2
VO (V) =
(R1 + R2)
+
+
−INE
R2
(0.5 V)
CSCP
2
■ SETTING THE TRIANGULAR OSCILLATION FREQUENCY
The triangular oscillation frequency is determined by the timing resistor (RT) connected to the RT terminal (pin 7) .
Triangular oscillation frequency : fosc
3750
fosc (kHz) =:
RT (kΩ)
12
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MB39A105
■ SETTING THE SOFT-START TIMES
To prevent rush currents when the IC is turned on, you can set a soft-start by connecting soft-start capacitors
(CSCP) to the CSCP terminal (pin 2). When IC starts (VCC ≥ UVLO threshold voltage), the external soft-start
capacitors (CSCP) connected to CSCP terminal are charged at 11 µA. The error amplifier output (FB (pin 8) ) is
determined by comparison between the lower one of the potentials at two non-inverted input terminals (0.5 V
in an internal reference voltage, CSCP terminal voltages) and the inverted input terminal voltage (−INE (pin 1)
voltage).
The FB terminal voltage is decided for the soft-start period by the comparison between 0.5 V in an internal
reference voltage and the voltages of the CSCP terminal. The DC/DC converter output voltage rises in proportion
to the CSCP terminal voltage as the soft-start capacitor connected to the CSCP terminal is charged.
The soft-start time is obtained from the following formula:
Soft-start time: ts (time to output 100%)
ts (s)=: 0.045 × CSCP (µF)
CSCP terminal voltage
=: 0.8 V
Error Amp block −INE voltage
=: 0.5 V
=: 0 V
t
Soft-start time (ts)
• Soft-Start Circuit
VO
VREF
11 µA
R1
R2
−INE
1
L priority
Error Amp
−
+
+
2
CSCP
(0.5 V)
CSCP
8
FB
UVLO
13
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MB39A105
■ SETTINGTIMECONSTANTFORTIMER-LATCHSHORT-CIRCUITPROTECTIONCIRCUIT
The error amplifier’s output level alaways does the comparison operation with the short-circuit protection com-
parator (SCP Comp.) to the reference voltage.
While DC/DC converter load conditions are stable, the short-circuit detection comparator output remains stable,
and the CSCP terminal (pin 2) is held at soft-start end voltage (about 0.8 V) .
If the load condition changes rapidly due to a short-circuit of the load and the DC/DC converter output voltage
drops, the output of the error amplifier usually goes over 0.9 V. In that case, the capacitor CSCP is charged further.
When the capacitor CSCP is charged to about 1.0 V, the latch is set and the external FET is turned off (dead time
is set to 100%). At this time, the latch input is closed and the CSCP terminal (pin 2) is held at “L” level. When
CSCP terminal becomes “L” level, SCPOD terminal Nch MOS FET becomes OFF. SCPOD terminal (pin 4) is
held at “L” level and can be used as a short-circuit operating detection signal during normal operation.
To reset the actuated protection circuit, the power supply turn off and on again to lower the VCC terminal (pin
3) voltage to 1.1 V (Min) or less.
Short-circuit detection time (tCSCP)
tCSCP (s) =: 0.23 × CSCP (µF)
• Timer-latch short-circuit protection circuit
VO
8
1
FB
R1
R2
Error
Amp
−INE
−
−
+
(0.5 V)
VREF
(0.88 µA)(10.1 µA)
SCP
Comp.
−
+
(0.9 V)
to Drive
CSCP
2
−
+
(1.0 V)
VREF
UVLO
S
Latch
R
14
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MB39A105
• Soft-start and short-circuit protection circuit timing chart
FB voltage
1.0 V
CSCP voltage
0.9 V
0.8 V
0.7 V
OSC
amplifier
0.3 V
Output
short
Output short
Soft-start time
tS
Short-circuit detection time
tCSCP
t
15
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MB39A105
■ I/O EQUIVALENT CIRCUIT
〈〈Soft-start block (CS) 〉〉
〈〈Short-circuit protection circuit block (SCP) 〉〉
3
VCC
VCC
ESD
protection
element
+
−
CSCP
GND
SCPOD
4
ESD
protection
element
1.0 V
CSCP
2
ESD
protection
element
6
GND
〈〈Error amplifier block〉〉
〈〈Triangular wave oscillator block (RT) 〉〉
VCC
VCC
(1.27 V)
+
−
0.33 V
CS
1
−INE
0.5 V
RT
7
FB
8
GND
GND
〈〈Output block〉〉
VCC
OUT
5
GND
16
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MB39A105
■ APPLICATION EXAMPLE
17
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MB39A105
■ PARTS LIST
COMPONENT
ITEM
SPECIFICATION
VENDOR
SANYO
SANYO
SANYO
SUMIDA
TDK
PARTS No.
MCH3306
Q1
Pch FET
VDS = 20 V, ID = −2 A (Max)
VDS = 20 V, Qg = 4.5 nC (Typ)
VF = 0.40 V (Max) , at IF = 1 A
Q2, Q3
D1
Nch FET
Diode
MCH3405
SBS004
L1
Inductor
6.8 µH
1.4 A, 144 mΩ
CMD5D13-6R8
C1608JB1H104K
C1, C7, C9 Ceramics Condenser
C2 to C6
C8
0.1 µF
4.7 µF
0.22 µF
50 V
10 V
10 V
NeoCapacitor
Ceramics Condenser
NEC/TOKIN TEPSLA21A475M8R
TDK
C1608JB1A224K
R1
R4
R5
R6
R7
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
7.5 kΩ
51 kΩ
43 kΩ
330 kΩ
22 kΩ
100 kΩ
0.5 %
0.5 %
0.5 %
0.5 %
0.5 %
0.5 %
ssm
ssm
ssm
ssm
ssm
ssm
RR0816P-752-D
RR0816P-513-D
RR0816P-433-D
RR0816P-334-D
RR0816P-223-D
RR0816P-104-D
R8, R11
Note : SANYO : SANYO Electric Co., Ltd.
SUMIDA : SUMIDA Electric Co., Ltd.
TDK : TDK Corporation
NEC/TOKIN : NEC TOKIN Corporation
ssm : SUSUMU Co., Ltd.
18
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MB39A105
■ SELECTION OF COMPONENTS
• Nch MOS FET
The N-ch MOSFET for switching use should be rated for at least 20% more than the maximum output voltage.
To minimize continuity loss, use a FET with low RDS(ON) between the drain and source. For high output voltage
and high frequency operation, on/off-cycle switching loss will be higher so that power dissipation must be
considered. In this application, the SANYO MCH3405 is used. Continuity loss, on/off switching loss, and total
loss are determined by the following formulas. The selection must ensure that peak drain current does not exceed
rated values.
Continuity loss : PC
2
PC = ID × RDS(ON) × Duty
On-cycle switching loss : PS (ON)
VD (Max) × ID × tr × fOSC
PS (ON) =
6
Off-cycle switching loss : PS (OFF)
VD (Max) × ID (Max) × tf × fOSC
PS (OFF) =
6
Total loss : PT
PT = PC + PS (ON) + PS (OFF)
Example: Using the SANYO MCH3405
Input voltage VIN (Max) = 2.4 V, output voltage VO = 9 V, drain current ID = 0.94 A, Oscillation frequency
fOSC = 500 kHz, L = 6.8 µH, drain-source on resistance RDS (ON) =: 160 mΩ, tr = 18 ns, tf = 8 ns.
Drain current (Max) : ID (Max)
VO × IO
VIN(Min)
VIN(Min)
2L
VO − VIN(Min)
ID (Max) =
+
ton
ton =
t
VO
9 × 0.25
2.4× (9−2.4)
1
=
+
×
2.4
2 × 6.8 × 10−6 × 9
500 × 103
=: 1.20 (A)
Drain current (Min) : ID (Min)
VO × IO
VIN(Min)
2L
ID (Min) =
−
−
ton
VIN(Min)
9 × 0.25
2.4× (9−2.4)
1
=
×
2.4
2 × 6.8 × 10−6 × 9
500 × 103
=: 0.68 (A)
19
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MB39A105
2
PC = ID × RDS (ON) × Duty
9−2.4
9
= 0.94 2 × 0.16 ×
=: 0.104 W
VD (Max) × ID × tr × fOSC
PS (ON)
=
=
6
9 × 0.94 × 18 × 10−9 × 500 × 103
6
=: 0.013 W
VD (Max) × ID (Max) × tf × fOSC
PS (OFF)
=
6
9 × 1.20 × 8 × 10−9 × 500 × 103
=
6
=:
0.007 W
PT
= PC + PS (ON) + PS (OFF)
=: 0.104 + 0.013 + 0.007
=: 0.124 W
The above power dissipation figures for the MCH3405 is satisfied with ample margin at 0.8 W.
• Inductors
In selecting inductors, it is of course essential not to apply more current than the rated capacity of the inductor,
but also to note that the lower limit for ripple current is a critical point that if reached will cause discontinuous
operation and a considerable drop in efficiency. This can be prevented by choosing a higher inductance value,
which will enable continuous operation under light loads. Note that if the inductance value is too high, however,
direct current resistance (DCR) is increased and this will also reduce efficiency. The inductance must be set at
the point where efficiency is greatest.
Note also that the DC superimposition characteristics become worse as the load current value approaches the
rated current value of the inductor, so that the inductance value is reduced and ripple current increases, causing
loss of efficiency. The selection of rated current value and inductance value will vary depending on where the
point of peak efficiency lies with respect to load current.
Inductance values are determined by the following formulas.
Inductance value : L
2
VIN
L ≥
ton
2IOVO
20
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MB39A105
Example:
2
VIN (Max)
L ≥
ton
2IOVO
42
9−4
9
1
≥
×
×
2 × 0.25 × 9
500 × 103
≥ 3.95 µH
Inductance values derived from the above formulas are values that provide sufficient margin for continuous
operation at maximum load current, but at which continuous operation is not possible at light loads. It is therefore
necessary to determine the load level at which continuous operation becomes possible. In this application, the
Sumida CMD5D13-6R8 is used. At 6.8 µH, the load current value under continuous operating conditions is
determined by the following formula.
Load current value under continuous operating conditions : IO
2
VIN (Max)
IO
≥
ton
2LVO
42
9−4
9
1
≥
×
×
2 × 6.8 × 10−6 × 9
500 × 103
≥ 145.2 mA
To determine whether the current through the inductor is within rated values, it is necessary to determine the
peak value of the ripple current as well as the peak-to-peak values of the ripple current that affect the output
ripple voltage. The peak value and peak-to-peak value of the ripple current can be determined by the following
formulas.
Peak value : IL
VO × IO
VIN
VIN
2L
VO − VIN
IL
≥
+
ton
ton =
t
VO
Peak-to-peak value : ∆IL
VIN
L
∆IL =
ton
Example: Using the CMD5D13-6R8
6.8 µH (allowable tolerance ±20%) , rated current = 1.4 A
Peak value:
VO × IO
VIN
VIN
2L
VO − VIN
IL
≥
+
ton
ton =
t
VO
9 × 0.25
2.4 × (9 − 2.4)
1
≥
+
×
2.4
2 × 6.8 × 10−6 × 9
500 × 103
≥ 1.20 A
21
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Peak-to-peak value:
VIN (Min)
∆IL =
ton
L
4 × (9 − 4)
1
=
6.8 × 10−6 × 9 × 500 × 103
=: 0.654 A
• Flyback diode
The flyback diode is generally used as a Shottky barrier diode (SBD) when the reverse voltage to the diode is
less than 40V. The SBD has the characteristics of higher speed in terms of faster reverse recovery time, and
lower forward voltage, and is ideal for achieving high efficiency. As long as the DC reverse voltage is sufficiently
higher than the output voltage, the average current flowing through the diode is within the mean output current
level, and peak current is within peak surge current limits, there is no problem. In this application the SANYO
SBS004 is used. The diode mean current and diode peak current can be calculated by the following formulas.
Diode mean current : IDi
VO−VIN(Min)
IDi ≥ IO × (1 −
)
VO
Diode peak current : IDip
VO × IO
VIN (Min)
VIN (Min)
2L
IDip
≥
+
ton
Example: Using the SANYO SBS004
VR (DC reverse voltage) = 15 V, mean output current = 1.0 A, peak surge current = 10 A,
VF (forward voltage) = 0.40 V, IF = 1.0 A
VO−VIN (Min)
IDi ≥ IO × (1 −
)
VO
≥ 0.25 × (1 − 0.733)
≥ 66.8 mA
VO × IO
VIN (Min)
VIN (Min)
2L
IDip
≥
+
ton
≥ 1.20 A
22
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MB39A105
• Smoothing Capacitor
The smoothing capacitor is an indispensable element for reducing ripple voltage in output. In selecting a smooth-
ing capacitor it is essential to consider equivalent series resistance (ESR) and allowable ripple current. Higher
ESR means higher ripple voltage, so that to reduce ripple voltage it is necessary to select a capacitor with low
ESR. However, the use of a capacitor with low ESR can have substantial effects on loop phase characteristics,
and therefore requires attention to system stability. Care should also be taken to use a capacity with sufficient
margin for allowable ripple current. This application uses the TEPSLA21A475M8R (NEC/TOKIN) . The ESR,
capacitance value, and ripple current can be calculated from the following formulas.
Equivalent Series Resistance : ESR
∆VO
∆IL
1
ESR ≤
−
2πfCL
Capacitance value : CL
∆IL
CL
≥
2πf (∆VO − ∆IL × ESR)
Ripple current : ∆ICL
VIN
L
∆ICL
≥
ton
Example: Using the TEPSLA21A475M8R (Three piecies are parallel.)
Rated voltage = 10 V, ESR = 500 mΩ, maximum allowable ripple current = 1 Ap−p
Equivalent series resistance
∆VO
∆IL
1
ESR ≤
−
2πfCL
0.18
0.654
1
≤
−
2π × 500 × 103 × 14.1 × 10−6
≤ 252.7 mΩ
Capacitance value : CL
∆IL
CL
≥
2πf (∆VO − ∆IL × ESR)
0.39
≥
2π × 500 × 103 × (0.18 − 0.654 × 0.167)
≥ 2.94 µF
Ripple current : ∆ICL
VIN
L
∆ICL
≥
ton
4 × (9 − 4)
1
≥
×
6.8 × 10−6 × 9
500 × 103
≥ 0.654 Ap−p
23
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MB39A105
■ REFERENCE DATA
Conversion Efficiency vs. Load current
100
Ta = +25 °C
9 V output
90
80
70
60
50
40
30
Vin = 1.8 V
Vin = 3.3 V
Vin = 6.0 V
1 m
10 m
100 m
1
Load current IL (A)
Switching Wave Form
VG (V)
10
Ta = +25 °C
VIN = 3.3 V
VO = 9 V
5
0
IO = 100 mA
VD (V)
15
10
5
0
0
1
2
3
4
5
6
7
8
9
10
t (µs)
24
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MB39A105
■ USAGE PRECAUTION
• Printed circuit board ground lines should be set up with consideration for common impedance.
• Take appropriate static electricity measures.
• Containers for semiconductor materials should have anti-static protection or be made of conductive material.
• After mounting, printed circuit boards should be stored and shipped in conductive bags or containers.
• Work platforms, tools, and instruments should be properly grounded.
• Working personnel should be grounded with resistance of 250 kΩ to 1 MΩ between body and ground.
• Do not apply negative voltages.
The use of negative voltages below –0.3 V may create parasitic transistors on LSI lines, which can cause
abnormal operation.
■ ORDERING INFORMATION
Part number
Package
Remarks
8-pin plastic TSSOP
(FPT-8P-M05)
MB39A105PFT
25
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MB39A105
■ PACKAGE DIMENSION
8-pin plastic TSSOP
(FPT-8P-M05)
0.127±0.03
3.00±0.10(.118±.004)
(.0050±.001)
8
5
4.40±0.10 6.40±0.20
(.173±.004) (.252±.008)
INDEX
Details of "A" part
1.10(.043)MAX
4
1
"A"
0~8˚
0.65(.026)
0.22±0.10
(.009±.004)
0.54(.021)
0.10±0.10
(.004±.004)
0.10(.004)
1.95(.077)
C
2002 FUJITSU LIMITED F08013Sc-1-1
Dimensions in mm (inches)
26
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MB39A105
FUJITSU LIMITED
All Rights Reserved.
The contents of this document are subject to change without notice.
Customers are advised to consult with FUJITSU sales
representatives before ordering.
The information and circuit diagrams in this document are
presented as examples of semiconductor device applications, and
are not intended to be incorporated in devices for actual use. Also,
FUJITSU is unable to assume responsibility for infringement of
any patent rights or other rights of third parties arising from the use
of this information or circuit diagrams.
The products described in this document are designed, developed
and manufactured as contemplated for general use, including
without limitation, ordinary industrial use, general office use,
personal use, and household use, but are not designed, developed
and manufactured as contemplated (1) for use accompanying fatal
risks or dangers that, unless extremely high safety is secured, could
have a serious effect to the public, and could lead directly to death,
personal injury, severe physical damage or other loss (i.e., nuclear
reaction control in nuclear facility, aircraft flight control, air traffic
control, mass transport control, medical life support system, missile
launch control in weapon system), or (2) for use requiring
extremely high reliability (i.e., submersible repeater and artificial
satellite).
Please note that Fujitsu will not be liable against you and/or any
third party for any claims or damages arising in connection with
above-mentioned uses of the products.
Any semiconductor devices have an inherent chance of failure. You
must protect against injury, damage or loss from such failures by
incorporating safety design measures into your facility and
equipment such as redundancy, fire protection, and prevention of
over-current levels and other abnormal operating conditions.
If any products described in this document represent goods or
technologies subject to certain restrictions on export under the
Foreign Exchange and Foreign Trade Law of Japan, the prior
authorization by Japanese government will be required for export
of those products from Japan.
F0209
FUJITSU LIMITED Printed in Japan
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