MB90890 Series
New Products
2
-
F MC 16LX Family
-
16 bit Microcontroller
-
Mounted with Dual Operation
Flash Memories
MB90890 Series
A new F2MC-16LX CPU-driven microcontroller series is available with 64 K-byte
dual-operation flash memories and a CAN controller integrated in a compact
48-pin package. This is the world first lineup of microcontrollers mounted with
dual-operation flash memories.
Product Description
parts externally installed in the conventional designs, it
substantially reduces cost. It also facilitates the new application
of advanced controls for amenity, safety and communication,
including learning and tracing of maintenance data with the
use of large-density nonvolatile data memories.
The new series provides the world first high-performance
16-bit CPU integrating dual-operation flash memories,
together with a CAN controller, all within a LQFP-48
compact package.
The new series also offers an improved operating margin to
CAN, Controller Area Network, is now the prevailing
global standard for LAN systems installed in automobiles.
The trend began in Europe, the first region in the world to
adopt the CAN controller-mounted microcontrollers, and
now FUJITSU is taking the lead in the industry by offering
diversified lineups of CAN microcontrollers as solutions for
the control of safety and amenity functions in automobiles.
The Company has just succeeded in offering the world first
microcontrollers mounted with flash memories that allow
simultaneous execution of read/write operations. With this
innovation, the flash memories applied conventionally for
readout purposes to change programs can now be used to
store various types of data during power interruptions.
This innovation offers several other advantages, as well. By
eliminating the need for EEPROM and related component
Photo 1 External View
2003 No.1
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MB90890 Series
New Products
●
●
●
●
Delayed interruption generating module
8/10-bit A/D converter: 8 channels
Address match detection function
Input level changeable by software
memories to the CPU.
In conventional microcontrollers mounted with flash
memories, programs have to be downloaded to RAM in
order to initiate rewrites, as these devices disallow rewrite
operations while programs are executed in the flash
,
■■Package: FPT-48P-M26
memories. FUJITSU s new microcontrollers integrated
with dual-operation flash memory allow rewrites by
executing programs on flash memory, thereby eliminating
the need to transfer the programs to RAM. This obviates the
need to make provisions against power failures during
program execution on RAM, and cuts down the program
download time as well.
Features of Dual-Operation
Flash Memory-Integrated
Microcontrollers
Fig. 1 outlines the operation of MB90F897 series
microcontrollers mounted with dual-operation flash
memories. While the upper bank flash memory handles
the execution of programs, the lower bank flash memory
can be applied for write/erase operations (or vice versa).
The new series also offers the following advantages for
system control.
■■Flash memory rewrites performed concurrently with
system control
Fig. 3 illustrates the control sequence for rewriting the
flash memory using interruption.
,
Conventionally, FUJITSU s flash memory-integrated
microcontrollers have not been designed to allow
interruptions while the RAM is executing a program. After
the write/erase commands are issued, the software has to
check the flag to identify whether or not the write/erase
operation is completed. With the dual-operation flash
■■No need to download programs to RAM when flash
memories self-rewrite to the CPU
Fig. 2 shows the operational flow for rewriting from flash
Figure 3 Control of Flash Memory Rewrite Based on Interruption
Enhanced system performance Any other bank can be read out, even while the flash memory is being rewritten
Previous�
processing
Waiting time
Next processing
CPU
RAM
READ�
instruction
READ�
instruction
Existing flash memory
Erase instruction
Erase
Flash Memory
Higher Speed
READ�
instruction
Previous�
processing
Next processing
CPU
READ�
instruction
Erase instruction
Dual-Operation Flash Memory
Upper Bank
Erase
Lower Bank
2003 No.1
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MB90890 Series
New Products
memory-integrated microcontrollers, the interruption can
take place in response to any interruption factor generated
after the write/erase is completed, thus enabling the
processing of other programs after the write/erase command is
issued. Write/erase operations for flash memories are smoothly
and reliably executed while system control is in progress.
Fig. 4 provides the specifications for bank-to-bank
transmission of the interruption vector.
The interruption vector is transmitted to the upper bank
flash memory to rewrite the flash memory in the lower
bank, and vice versa. Thus, interruption-based control is
available for rewriting in either bank.
write/erase) is disabled until any reset factor can be
generated. This ensures that the flash memories are fully
protected against write/erase attempts even in the case of
program runaway.
■■Dual-operation flash memory-integrated microcontroller
substitutes for an external EEPROM
Using the dual-operation flash memory-integrated
microcontroller as a substitution for EEPROM offers the
following benefits.
●
Reduced system board mounting area
The mounting area equivalent to an EEPROM footprint
is reduced.
Available EEPROM-like sector configuration
●
■■The software sector-protect function prevents erroneous
writing/erasing of flash memory
In the new series, settable sector-protect bits are assigned
Eight small-density (4K-byte) sectors are available,
providing an easy-to-handle sector configuration for the
data-rewrite area (Fig. 4).
to protect individual sectors. An 0 setting in the bit sets
“ ”
●
the sector-protect function active, thereby protecting the
target sector against attempts to perform write/erase
operations. Once 0 is set, the 1 setting (to enable the
Faster write speed
The targeted write time is 32μs/byte (typical), markedly
faster than that with EEPROM.
“ ”
“ ”
Figure 4 Specifications for Bank-to-Bank Transmission of Interruption Vector
Available transmission of interruption vector domain
Allowable alternative use for EEPROM
SENbit＝0
Compatible with program updates
SENbit＝1
Interruption vector domain
SA9：4K-byte
SA8：4K-byte
SA9：4K-byte
SA8：4K-byte
SA7：4K-byte
SA6：4K-byte
SA7：4K-byte
SA6：4K-byte
Rewriting�
domain
SA5：16K-byte
Upper Bank
SA5：16K-byte
SA4：16K-byte
SA4：16K-byte
Interruption vector domain
SA3：4K-byte
SA3：4K-byte
SA2：4K-byte
SA1：4K-byte
SA0：4K-byte
Lower Bank
SA2：4K-byte
Rewriting�
SA1：4K-byte
domain
SA0：4K-byte
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FIND Vol.21
No.1 2003
MB90890 Series
New Products
●
Improved data reliability
permits real-time debugging.
Data can be written in the chip without external communication,
Table 2 lists available development tools.
eliminating concerns about data garble due to fluctuations in
communications lines caused by external noise.
Table 1 provides a list of available packages in this series, Typical Applications
Fig. 5 is a block diagram, and Fig. 6 shows pin assignments.
The new series is a lineup of 16-bit commodity-grade
microcontrollers tailor-engineered for applications that
require high-speed real-time processing, data rewriting,
or data storage to nonvolatile memory while executing
programs on flash memories. Each device is incorporated
in a compact 48-pin package suitable for system board
Development Environment
The new series is supported by SOFTUNETM V3, a FUJITSU
integrated software development environment. The
SOFTUNE V3 application software is designed to simplify
programming tasks to meet the diversified needs of
program designers. The hardware is compatible with
MB2140 Series, an emulator for the F2MC Family that
installation within a limited mounting space.
■
NOTES
OFTUNE is a trademark of FUJITSU LIMITED.
S
*
Figure 5 Block Diagram
X0，X1
RSTX
X0A，X1A
CPU�
Clock control circuit
F2MC－16LX core
Clock timer
Time-base timer
16-bit free-running timer
Input capture (4-channel)
RAM
IN0 to IN3
Dual-Operation Flash Memory
PPG0 to PPG3
16-bit PPG timer (2-channel)
Pre-scaler
UART1
TX
RX
CAN
Pre-scaler
UART0
SOT1
SCK1
SIN1
DTP/External interruption
16-bit reload timer (2-channel)
INT4 to INT7
AVCC
AVSS
TIN0，TIN1
TOT0，TOT1
AN0 to AN7
AVR
8/10-bit A/D converter�
(8-channel)
ADTG
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New Products
MB90890 Series
Table 1 Product Lineup
Model
MB90V495G
MB90F897/S
Item
Type
Evaluation
Not installed
6K-byte
Flash memory type
64K-byte
ROM density
RAM density
2K-byte
Number of instructions：351�
Maximum instruction execution time：62.5ns at an operating frequency of 4MHz (4 times the base oscillator frequency)�
Available addressing types：23�
CPU functions
Allowable program patching：2 address pointers�
Maximum storage space：16M-byte
Power-saving (Standby mode)
I/O port
Sleep mode/Clock mode/Time-base timer mode/Stop mode/CPU intermittent mode
General-purpose I/O port (CMOS output)：34 (36＊) Four of them intended for higher-current output ports
8-bit free-running counter�
Interruption interval：1.024ms, 4.096ms, 16.834ms, 131.072ms (at an oscillation clock frequency of 4MHz)
Time-base timer
Watchdog timer
Reset occurring interval：3.58ms, 14.33ms, 57.23ms, 458.75ms (at an oscillation clock frequency of 4MHz)
16-bit free-running timer：1 channel�
Input capture：4 channels
16-bit I/O timer
16-bit reload timer
Clock timer
Number of channels：2�
Count clock interval：0.25μs，0.5μs，2.0μs (Machine clock frequency 16MHz)�
Available external event counting
15-bit free-running counter�
Interruption interval：31.25ms，62.5ms，12ms，250ms，500ms，1.0ms，2.0ms (at 8.192kHz sub clock)
Number of channels：2-channel (Available in the 8-bit×4-channel configuration)�
PPG operation available in both the 8-bit×4-channel and 16-bit×2-channel configurations�
Allowable output of pulse waveform at any desired period and duty factor�
Count clock：62.5ns to 1μs (at a machine clock frequency of 16MHz)
8/16-bit PPG timer
Delayed interruption generating� Interruption generating module for task changing�
module
Used with the real-time OS
Number of channels：4�
Rise edge/Fall edge activated in response to the input of "H" and "L" levels�
Available external interruption or extended intelligent I/O service (EI2OS)
DTP/External interruption
Number of channels：8�
Resolution：Either 10-bit or 8-bit�
Conversion time：6.125μs (at a machine clock frequency of 16MHz, including the sampling time)
10-bit A/D converter
UART（SCI）�
Number of channels：2�
With full duplex double buffers�
Transmission available in either state, synchronous or asynchronous to clock�
Also can be used as serial I/O�
Dedicated baud rate generator incorporated
Process
Package
CMOS
PGA256
LQFP-48
Operating voltage
4.5V to 5.5V
3.5V to 5.5V
＊34 for MB90897：36 for MB90F897
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FIND Vol.21
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MB90890 Series
New Products
Figure 6 Pin Assignments
AVCC
AVR
1
2
36
35
34
33
32
31
30
29
28
27
26
25
P17/PPG3
P16/PPG2
P15/PPG1
P14/PPG0
P13/IN3
P12/IN2
P11/IN1
P10/IN0
X1
P50/AN0
P51/AN1
P52/AN2
P53/AN3
P54/AN4
P55/AN5
P56/AN6
P57/AN7
P37/ADTG
P20/TIN0
3
4
5
6
TOP VIEW
7
8
9
10
11
12
X0
C
VSS
＊MB90F897：X0A，X1A�
MB90F897S：P35，P36
Table 2 Development Tools
Main unit�
MB2141A
Emulation pod�
MB2145-507
Hardware
Probe cable�
MB2132-466
SOFTUNE V3 Workbench
SOFTUNE V3 C Compiler
SOFTUNE V3 Assembler
SOFTUNE V3 C Analyzer
SOFTUNE V3 C Checker
Software
2003 No.1
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