Cypress MoBL CY62148BN User Manual

CY62148BN MoBL®  
4-Mbit (512K x 8) Static RAM  
Functional Description  
Features  
• High Speed  
The CY62148BN is a high-performance CMOS static RAM  
organized as 512K words by 8 bits. Easy memory expansion  
is provided by an active LOW Chip Enable (CE), an active  
LOW Output Enable (OE), and three-state drivers. This device  
has an automatic power-down feature that reduces power  
consumption by more than 99% when deselected.  
— 70 ns  
• 4.5V–5.5V operation  
• Low active power  
— Typical active current: 2.5 mA @ f = 1 MHz  
Writing to the device is accomplished by taking Chip Enable  
(CE) and Write Enable (WE) inputs LOW. Data on the eight I/O  
— Typical active current:12.5 mA @ f = f  
(70 ns)  
max  
Low standby current  
pins (I/O through I/O ) is then written into the location  
0
7
specified on the address pins (A through A ).  
0
18  
• Automatic power-down when deselected  
• TTL-compatible inputs and outputs  
Reading from the device is accomplished by taking Chip  
Enable (CE) and Output Enable (OE) LOW while forcing Write  
Enable (WE) HIGH for read. Under these conditions, the  
contents of the memory location specified by the address pins  
will appear on the I/O pins.  
• Easy memory expansion with CE and OE features  
• CMOS for optimum speed/power  
• Available in standard lead-free and non-lead-free  
32-lead (450-mil) SOIC, 32-lead TSOP II and 32-lead  
Reverse TSOP II packages  
The eight input/output pins (I/O through I/O ) are placed in a  
0
7
high-impedance state when the device is deselected (CE  
HIGH), the outputs are disabled (OE HIGH), or during a write  
operation (CE LOW, and WE LOW).  
Logic Block Diagram  
I/O  
0
INPUT BUFFER  
I/O  
I/O  
1
2
A
0
A
1
A
4
A
5
A
6
I/O  
I/O  
I/O  
3
4
5
512K x 8  
ARRAY  
A
7
A
12  
A
14  
A
16  
A
17  
I/O  
6
7
POWER  
DOWN  
COLUMN  
DECODER  
CE  
I/O  
WE  
OE  
Cypress Semiconductor Corporation  
Document #: 001-06517 Rev. *A  
198 Champion Court  
San Jose, CA 95134-1709  
408-943-2600  
Revised August 2, 2006  
CY62148BN MoBL®  
Current into Outputs (LOW)......................................... 20 mA  
Maximum Ratings  
Static Discharge Voltage...............................................2001V  
(per MIL-STD-883, Method 3015)  
(Above which the useful life may be impaired. For user guide-  
lines, not tested.)  
Latch-Up Current.....................................................>200 mA  
Storage Temperature .................................65°C to +150°C  
Ambient Temperature with  
Power Applied.............................................55°C to +125°C  
Operating Range  
Ambient  
Supply Voltage on V to Relative GND........ –0.5V to +7.0V  
CC  
[3]  
Range  
Commercial  
Industrial  
Temperature  
0°C to +70°C  
–40°C to +85°C  
V
CC  
DC Voltage Applied to Outputs  
4.5V–5.5V  
[2]  
in High Z State .....................................–0.5V to V +0.5V  
CC  
[2]  
DC Input Voltage ..................................–0.5V to V +0.5V  
CC  
Electrical Characteristics Over the Operating Range  
CY62148BN-70  
[1]  
Parameter  
Description  
Output HIGH Voltage  
Output LOW Voltage  
Input HIGH Voltage  
Input LOW Voltage  
Test Conditions  
= Min., I = – 1 mA  
Min.  
Typ.  
Max.  
Unit  
V
V
V
V
I
V
V
2.4  
V
V
OH  
OL  
IH  
CC  
OH  
= Min., I = 2.1 mA  
0.4  
CC  
OL  
2.2  
–0.3  
–1  
V
+0.3  
V
CC  
0.8  
V
IL  
Input Leakage Current  
Output Leakage Current  
GND V V  
CC  
+1  
+1  
20  
µA  
µA  
mA  
mA  
IX  
I
I
I
GND V V , Output Disabled  
–1  
OZ  
I
CC  
RC  
V
Operating  
f = f = 1/t  
MAX  
Com’l/Ind’l  
12.5  
2.5  
CC  
CC  
Supply Current  
I
V
=0 mA  
= Max.,  
OUT  
f = 1 MHz  
Max. V ,CE V  
IH  
IN IH IN IL  
MAX  
CC  
I
I
Automatic CE  
Power-Down Current  
—TTL Inputs  
Com’l/  
V orV V , Ind’l  
1.5  
20  
mA  
SB1  
SB2  
CC  
V
f = f  
Automatic CE  
Power-Down Current  
—CMOS Inputs  
Max. V  
,
Com’l/  
Ind’l  
4
µA  
CC  
CE V – 0.3V,  
CC  
V
V – 0.3V,  
CC  
IN  
or V 0.3V, f =0  
IN  
Capacitance[4]  
Parameter  
Description  
Input Capacitance  
Output Capacitance  
Test Conditions  
Max.  
Unit  
pF  
C
C
T = 25°C, f = 1 MHz,  
6
8
IN  
A
V
= 5.0V  
CC  
pF  
OUT  
AC Test Loads and Waveforms  
R1 1800Ω  
R1 1800Ω  
5V  
ALL INPUT PULSES  
5V  
3.0V  
GND  
OUTPUT  
OUTPUT  
R2  
990Ω  
90%  
10%  
90%  
10%  
R2  
990Ω  
100 pF  
5 pF  
INCLUDING  
JIG AND  
SCOPE  
INCLUDING  
JIG AND  
SCOPE  
3 ns  
3 ns  
(b)  
(a)  
Equivalent to:  
OUTPUT  
THEVENIN EQUIVALENT  
639Ω  
1.77V  
Notes:  
2. V (min.) = –2.0V for pulse durations of less than 20 ns.  
IL  
3. T is the “Instant On” case temperature  
A
4. Tested initially and after any design or process changes that may affect these parameters.  
Document #: 001-06517 Rev. *A  
Page 3 of 10  
CY62148BN MoBL®  
Switching Characteristics[5] Over the Operating Range  
62148BNLL-70  
Parameter  
Description  
Min.  
Max.  
Unit  
READ CYCLE  
t
t
t
t
t
t
t
t
t
t
t
Read Cycle Time  
70  
10  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
RC  
Address to Data Valid  
70  
AA  
Data Hold from Address Change  
CE LOW to Data Valid  
OHA  
ACE  
DOE  
LZOE  
HZOE  
LZCE  
HZCE  
PU  
70  
35  
OE LOW to Data Valid  
[6]  
OE LOW to Low Z  
5
10  
0
[6, 7]  
OE HIGH to High Z  
25  
25  
70  
[6]  
CE LOW to Low Z  
[6, 7]  
CE HIGH to High Z  
CE LOW to Power-Up  
CE HIGH to Power-Down  
PD  
[8]  
WRITE CYCLE  
t
t
t
t
t
t
t
t
t
t
Write Cycle Time  
70  
60  
60  
0
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
WC  
CE LOW to Write End  
SCE  
AW  
Address Set-Up to Write End  
Address Hold from Write End  
Address Set-Up to Write Start  
WE Pulse Width  
HA  
0
SA  
55  
30  
0
PWE  
SD  
Data Set-Up to Write End  
Data Hold from Write End  
HD  
[6]  
WE HIGH to Low Z  
5
LZWE  
HZWE  
[6, 7]  
WE LOW to High Z  
25  
Notes:  
5. Test conditions assume signal transition time of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V, and output loading of the specified  
/I and 100-pF load capacitance.  
I
OL OH  
6. At any given temperature and voltage condition, t  
is less than t  
, t  
is less than t  
, and t  
is less than t  
for any given device.  
HZCE  
LZCE HZOE  
LZOE  
HZWE  
LZWE  
7. t  
, t  
, and t  
are specified with a load capacitance of 5 pF as in part (b) of AC Test Loads. Transition is measured ±500 mV from steady-state voltage.  
HZOE HZCE  
HZWE  
8. The internal write time of the memory is defined by the overlap of CE LOW, and WE LOW. CE and WE must be LOW to initiate a write, and the transition of  
any of these signals can terminate the write. The input data set-up and hold timing should be referenced to the leading edge of the signal that terminates the write.  
Document #: 001-06517 Rev. *A  
Page 4 of 10  
CY62148BN MoBL®  
Data Retention Characteristics (Over the Operating Range)  
[1]  
Parameter  
Description  
for Data Retention  
CC  
Conditions  
Min.  
Typ.  
Max.  
Unit  
V
V
I
V
2.0  
DR  
Data Retention Current  
Com’l LL  
Ind’l LL  
No input may exceed  
20  
20  
µA  
µA  
ns  
CCDR  
V
V
+ 0.3V  
CC  
CC  
= V = 3.0V  
DR  
[4]  
t
t
Chip Deselect to Data Retention Time  
Operation Recovery Time  
CE > V – 0.3V  
0
CDR  
[9]  
R
CC  
V
V
> V – 0.3V or  
IN  
IN  
CC  
t
ns  
RC  
< 0.3V  
Data Retention Waveform  
DATA RETENTION MODE  
> 2V  
3.0V  
3.0V  
V
V
CC  
DR  
t
t
R
CDR  
CE  
Switching Waveforms  
[10, 11]  
Read Cycle No.1  
t
RC  
ADDRESS  
t
AA  
t
OHA  
DATA OUT  
PREVIOUS DATA VALID  
[11, 12]  
DATA VALID  
Read Cycle No. 2 (OE Controlled)  
ADDRESS  
CE  
t
RC  
t
ACE  
OE  
t
HZOE  
t
DOE  
t
HZCE  
t
LZOE  
HIGH  
IMPEDANCE  
HIGH IMPEDANCE  
DATA OUT  
DATA VALID  
t
LZCE  
t
PD  
t
PU  
V
CC  
50%  
50%  
SUPPLY  
ISB  
CURRENT  
Notes:  
9. Full Device operation requires linear V ramp from V to V  
> 100 ms or stable at V > 100 ms.  
cc(min)  
CC  
DR  
CC(min)  
10. Device is continuously selected. OE, CE = V .  
IL  
11. WE is HIGH for read cycle.  
12. Address valid prior to or coincident with CE transition LOW.  
Document #: 001-06517 Rev. *A  
Page 5 of 10  
CY62148BN MoBL®  
Switching Waveforms (continued)  
[13]  
Write Cycle No. 1 (CE Controlled)  
t
WC  
ADDRESS  
CE  
t
SCE  
t
SA  
t
t
HA  
AW  
t
PWE  
WE  
t
t
HD  
SD  
DATA I/O  
DATA VALID  
[13, 14]  
WC  
Write Cycle No. 2 (WE Controlled, OE HIGH During Write)  
t
ADDRESS  
CE  
t
SCE  
t
HZCE  
t
t
HA  
AW  
t
t
PWE  
SA  
WE  
OE  
t
t
SD  
HD  
DATA VALID  
DATA I/O  
IN  
NOTE  
15  
t
HZOE  
Notes:  
13. If CE goes HIGH simultaneously with WE going HIGH, the output remains in a high-impedance state.  
14. Data I/O is high-impedance if OE = V  
.
IH  
15. During this period the I/Os are in the output state and input signals should not be applied.  
Document #: 001-06517 Rev. *A  
Page 6 of 10  
CY62148BN MoBL®  
Switching Waveforms (continued)  
[13, 14]  
Write Cycle No.3 (WE Controlled, OE LOW)  
t
WC  
ADDRESS  
CE  
t
SCE  
t
HZCE  
t
t
HA  
AW  
t
SA  
t
PWE  
WE  
t
t
HD  
SD  
NOTE 15  
DATAI/O  
DATA VALID  
t
t
LZWE  
HZWE  
Truth Table  
CE  
OE  
WE  
I/O –I/O  
Mode  
Power  
0
7
H
X
L
X
H
L
High Z  
Power-Down  
Read  
Standby (I  
)
SB  
L
L
L
Data Out  
Data In  
High Z  
Active (I  
Active (I  
Active (I  
)
)
)
CC  
CC  
CC  
X
H
Write  
H
Selected, Outputs Disabled  
Ordering Information  
Speed  
Package  
Operating  
Range  
(ns)  
Ordering Code  
CY62148BNLL-70SC  
CY62148BNLL-70SXC  
CY62148BNLL-70ZC  
CY62148BNLL-70ZXC  
CY62148BNLL-70ZRC  
CY62148BNLL-70SI  
CY62148BNLL-70SXI  
CY62148BNLL-70ZI  
CY62148BNLL-70ZXI  
CY62148BNLL-70ZRI  
Diagram  
51-85081  
51-85081  
51-85095  
51-85095  
51-85138  
51-85081  
51-85081  
51-85095  
51-85095  
51-85138  
Package Type  
70  
32-lead (450-Mil) Molded SOIC  
Commercial  
32-lead (450-Mil) Molded SOIC (Pb-Free)  
32-lead TSOP II  
32-lead TSOP II (Pb-Free)  
32-lead RTSOP II  
32-lead (450-Mil) Molded SOIC  
32-lead (450-Mil) Molded SOIC (Pb-Free)  
32-lead TSOP II  
Industrial  
32-lead TSOP II (Pb-Free)  
32-lead RTSOP II  
Please contact your local Cypress sales representative for availability of these parts  
Document #: 001-06517 Rev. *A  
Page 7 of 10  
CY62148BN MoBL®  
Package Diagrams  
32 LD (450 Mil) SOIC32-lead (450-Mil) Molded SOIC (51-85081)  
16  
1
0.546[13.868]  
0.566[14.376]  
0.440[11.176]  
0.450[11.430]  
MIN.  
MAX.  
DIMENSIONS IN INCHES[MM]  
PACKAGE WEIGHT 1.42gms  
PART #  
S32.45 STANDARD PKG.  
SZ32.45 LEAD FREE PKG.  
17  
32  
0.793[20.142]  
0.817[20.751]  
0.006[0.152]  
0.012[0.304]  
0.101[2.565]  
0.111[2.819]  
0.118[2.997]  
MAX.  
0.004[0.102]  
0.047[1.193]  
0.063[1.600]  
0.004[0.102]  
0.050[1.270]  
BSC.  
0.023[0.584]  
0.039[0.990]  
MIN.  
0.014[0.355]  
0.020[0.508]  
SEATING PLANE  
51-85081-*B  
32-Lead  
Thin Small Outline Package Type II (51-85095)  
51-85095 **  
Document #: 001-06517 Rev. *A  
Page 8 of 10  
CY62148BN MoBL®  
Package Diagrams (continued)  
32-lead Reverse Thin Small Outline Package Type II (51-85138)  
51-85138-**  
More Battery Life is a trademark, and MoBL is a registered trademark, of Cypress Semiconductor. All products and company  
names mentioned in this document may be the trademarks of their respective holders.  
Document #: 001-06517 Rev. *A  
Page 9 of 10  
© Cypress Semiconductor Corporation, 2006. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use  
of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be  
used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its  
products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress  
products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.  
CY62148BN MoBL®  
Document History Page  
®
Document Title: CY62148BN MoBL 4-Mbit (512K x 8) Static RAM  
Document Number: 001-06517  
Issue  
Date  
Orig. of  
Change  
REV.  
**  
ECN NO.  
426504  
485639  
Description of Change  
See ECN  
See ECN  
NXR  
VKN  
New Data Sheet  
Corrected the typo in the Array size in the Logic Block Diagram  
*A  
Document #: 001-06517 Rev. *A  
Page 10 of 10  

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