User’s Guide
January 2001
Mixed-Signal Products
SLOU101
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Preface
About This Manual
This manual is written to provide information about the evaluation module of
the fully differential amplifier under test. Additionally, this document provides
a good example of PCB design for high speed applications. The user should
keep in mind the following points.
The design of the high-speed amplifier PCB is an elegant and sensitive
process. Therefore, the user must approach the PCB design with care and
awareness. It is recommend that the user initially review the datasheet of the
device under test. It is also helpful to review the schematic and layout of the
THS4130 EVM to determine the design techniques used in the evaluation
board. In addition, it is recommended that the user review the application note
Fully-Differential Amplifiers (literature number SLOA054B) to gain more
insight about differential amplifiers. This application note reviews the
differential amplifiers and presents calculations for various filters.
How to Use This Manual
Chapter 1—Introduction and Description
Chapter 2—Using the THS4130 EVM
Chapter 3—General High-Speed Amplifier Design Considerations
Read This First
iii
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Related Documentation From Texas Instruments
Information About Cautions and Warnings
This book may contain cautions and warnings.
This is an example of a caution statement.
A caution statement describes a situation that could potentially
damage your software or equipment.
This is an example of a warning statement.
A warning statement describes a situation that could potentially
cause harm to you.
The information in a caution or a warning is provided for your protection.
Please read each caution and warning carefully.
Related Documentation From Texas Instruments
THS4130 data sheet (literature number SLOS318)
THS4130 application report (literature number SLOA054A),
Fully-Differential Amplifiers
FCC Warning
This equipment is intended for use in a laboratory test environment only. It
generates, uses, and can radiate radio frequency energy and has not been
tested for compliance with the limits of computing devices pursuant to subpart
J of part 15 of FCC rules, which are designed to provide reasonable protection
against radio frequency interference. Operation of this equipment in other
environments may cause interference with radio communications, in which
case the user at his own expense will be required to take whatever measures
may be required to correct this interference.
Trademarks
PowerPAD is a trademark of Texas Instruments.
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Contents
1
Introduction and Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1
1.1
1.2
1.3
1.4
1.5
1.6
1.7
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2
Evaluation Module Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2
THS4130 EVM Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3
Schematic of the Populated Circuit (Default Configuration) . . . . . . . . . . . . . . . . . . . . . . . 1-3
THS4130 EVM Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4
Additional Sample Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-5
THS4130 EVM Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-7
2
Using the THS4130 EVM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
Required Equipment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2
Power Supply Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2
Input and Output Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3
Testing the EVM Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-4
Power Down Verification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-5
Measuring the Frequency Response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-5
Butterworth Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-6
THS4130 EVM Bill of Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-7
3
General High-Speed Amplifier Design Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1
v
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Figures
1–1
1–2
1–3
1–4
1–5
1–6
1–7
1–8
1–9
Schematic of the Populated Circuit on the EVM (Default Configuration) . . . . . . . . . . . . . . 1-3
Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4
Fully-Differential In/Fully-Differential Out, Without Transformer . . . . . . . . . . . . . . . . . . . . . . 1-5
Fully-Differential In/Fully-Differential Out, Utilizing Transformer . . . . . . . . . . . . . . . . . . . . . . 1-5
VICR Level Shifter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-6
Butterworth Filter With Multiple Feedback . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-6
Top Layer (Silkscreen) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-7
Top (Layer 1) (Signals) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-7
Internal Plane (Layer 2) (Ground Plane) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-8
1–10 Internal Plane (Layer 3) (+ VCC Plane) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-8
1–11 Bottom (Layer 4) (Ground and Signal) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-9
2–1
2–2
2–3
2–4
2–5
Power Supply Connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2
Signal Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3
Driver 1 Output Signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-4
Multiple Feedback Filter Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-6
Gain vs Phase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-7
Tables
2–1
THS4130 EVM Bill of Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-7
vi
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Chapter 1
Introduction and Description
The Texas Instruments THS4130 evaluation module (EVM) helps designers
evaluate the performance of the THS4130 operational amplifier. Also, this
EVM is a good example of high-speed PCB design.
This document details the Texas Instruments THS4130 high-speed
operational amplifier evaluation module (EVM). It includes a list of EVM
features, a brief description of the module illustrated with a series of schematic
diagrams, EVM specifications, details on connecting and using the EVM, and
a discussion of high-speed amplifier design considerations.
This EVM enables the user to implement various circuits to clarify the available
configurations presented by the schematic of the EVM. In addition, the
schematic of the default circuit has been added to depict the components
mounted on the EVM when it is received by the customer. This configuration
correlates to the single input/differential output signal.
Othersamplecircuitsarepresentedtoshowhowtheusercanimplementother
circuit configurations such as differential input/differential output signal,
transformer utilization on the input and output terminals, VICR level shifter,
and Butterworth filter with multiple feedback. The user may be able to create
and implement circuit configurations in addition to those presented in this
document using the THS4130 EVM.
Topic
Page
1.1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2
1.2 Evaluation Module Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2
1.3 THS4130 EVM Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3
1.4 Schematic of the Populated Circuit (Default Configuration) . . . . . . . 1-3
1.5 THS4130 EVM Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4
1.6 Additional Sample Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-5
1.7 THS4130 EVM Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-7
1-1
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Description
1.1 Description
The THS4130 EVM is a good example of PCB design and layout for
high-speed operational amplifier applications. It is a complete circuit for the
high-speed operational amplifier. The EVM is made of the THS4130
high-speed operational amplifier, a number of passive components, and
various features and footprints that enable the user to experiment, test, and
verify various operational amplifier circuit implementations. The board
measures 4.5 inches in length by 2.5 inches in width. Initially, this board is
populated for a single-ended input amplifier (see Figure 1-2 for populated
circuits). The outputs (V
and V ) can be tested differentially or single
O+
O–
ended. Gain is set to one and can be changed by changing the ratios of the
feedback and gain resistors (see the device datasheet for recommended
resistor values). The user may populate various footprints on the evaluation
module board to verify filter designs or perform other experiments. Each input
is terminated with a 50-Ω resistor to provide correct line-impedance matching.
1.2 Evaluation Module Features
THS4130 high-speed operational amplifier EVM features include:
Voltage supply operation range: 5-V to ±15-V operation (see the
device data sheet)
Single and differential input and output capability
Nominal 50-Ω input and output termination resistors. They can be
configured according to the application requirement.
V
direct input control (see schematic and the device data sheet)
OCM
OCM
V
pin can be controlled via transformer center-tap (see
schematic)
Shutdown pin control, JU1 (if applicable to the device, see the device
data sheet)
Input and output transformer footprints for changing single-ended
signals to differential signals
Footprint for high-precision, balanced feedback and gain resistors
(0.01% or better)
Footprints for low-pass filter implementation (see application note
SLOA054A)
Footprints for antialiasing filter implementation (see application note
SLOA054A)
Differential probe terminals on input and output nodes for differential
probe insertion
Various GND and signal test points on the PCB
Circuit schematic printed on the back of the EVM
A good example of high-speed amplifier PCB design and layout
1-2
Introduction and Description
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THS4130 EVM Specifications
1.3 THS4130 EVM Specifications
Supply voltage range, ±V
. . . . 5 V to ±15 V (see the device data sheet)
CC
Supply current, I
. . . . . . . . . . . . . . . . . . . . . . . . (see the device data sheet)
CC
Output drive, I
V
= ±15 . . . . . . . . . . . . . . . . . (see the device data sheet)
O, CC
For complete THS4130 amplifier IC specifications, parameter measurement
information, and additional application information, see the THS4130 data
sheet, TI literature number SLOS318.
1.4 Schematic of the Populated Circuit (Default Configuration)
For verification of jumper locations and other bypass components, see the
complete EVM schematic in Figure 1–2.
Figure 1–1. Schematic of the Populated Circuit on the EVM (Default Configuration)
R6B
402 Ω
RX3
49.9 Ω
C4
CC
V
50 Ω
RX1
R1b
R3b
R4b
Rx4 R10
Source
JU4
+
–
0 Ω
R4a
0 Ω 49.9 Ω
Rx5 Rx6
V
0 Ω
0 Ω 374 Ω
R1a
IN
THS4130
R3a
AC
+
–
JU3
374 Ω
0 Ω
0 Ω
0 Ω 49.9 Ω
V
C1
C6
CC–
Rx0
24.9 Ω
V
OCM
R6a
402 Ω
NOTE: Default populated footprints on the EVM from the input nodes to the output terminals Gain = 1
1-3
Introduction and Description
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THS4130 EVM Schematic
1.5 THS4130 EVM Schematic
Figure 1–2. Schematic
1-4
Introduction and Description
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Additional Sample Schematics
1.6 Additional Sample Schematics
For verification of jumper locations and other bypass components, see the
complete EVM schematic in Figure 1–2.
Figure 1–3. Fully-Differential In/Fully-Differential Out, Without Transformer
R6b
R3B
C4
V
CC
RX1
0 Ω
R1b
50 Ω
0 Ω
R4b Rx4
R10
Rx6
Source
+
V
–
IN
0 Ω 0 Ω
R4a Rx5
R16 Termination
Resistor
THS4130
+
–
AC
RX2
0 Ω
R1a
0 Ω
0 Ω 0 Ω
V
C1
C6
CC–
V
OCM
R6a
R3a
NOTE: Fully-differential in / fully-differential out signal path. See the Texas Instruments February 2001 Analog
Applications Journal for the information on the termination resistors.
Figure 1–4. Fully-Differential In/Fully-Differential Out, Utilizing Transformer
R6b
C4
V
CC
50 Ω
R5
R9
R1B R3b
R1A R3a
R4b R14
R10
Rx6
Source
T1
T2
+
V
–
IN
0 Ω 0 Ω
R4a R15
AC
THS4130
+
–
0 Ω 0 Ω
C1
C6
GND
V
OCM
R6a
NOTE: Utilizing the input and output transformers to create a fully-differential signal input/ differential or single
output and isolate the amplifier from the rest of the front-end and back-end circuits.
1-5
Introduction and Description
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Additional Sample Schematics
Figure 1–5. VICR Level Shifter
R6B
402 Ω
V
CC
RPU1
RX3
C4
49.9 Ω
V
CC
50 Ω
RX1
R1b
R3b
R4b Rx4
R10
Source
+
–
0 Ω 0 Ω
R4a Rx5
49.9 Ω
Rx6
V
0 Ω
0 Ω 374 Ω
Rx0
IN
THS4130
R3a
AC
+
–
374 Ω
24.9 Ω
0 Ω 0 Ω
49.9 Ω
C6
V
CC–
C1
V
OCM
RPU2
R6a
402 Ω
NOTE: Shifting the VICR within the specified range in the data sheet via RPU1 and RPU2 if the VICR is out of the
specified range. See the Application section of the data sheet for the THS4130 for more information.
Figure 1–6. Butterworth Filter With Multiple Feedback.
R2B
C1B
RX3
V
CC
RX1
R1B
R1A
R10
RX7
5 V
R3B
R3A
+
–
1 dBm
AC
C2
THS4130
R7
RX2
+
–
–5 V
V
CC–
C1A
R2A
NOTE: Butterworth filter implemented with multiple feedback architecture
1-6
Introduction and Description
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THS4130 EVM Layout
1.7 THS4130 EVM Layout
Figure 1–7. Top Layer (Silkscreen)
Figure 1–8. Top (Layer 1) (Signals)
1-7
Introduction and Description
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THS4130 EVM Layout
Figure 1–9. Internal Plane (Layer 2) (Ground Plane)
Figure 1–10. Internal Plane (Layer 3) (± V
Plane)
CC
1-8
Introduction and Description
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THS4130 EVM Layout
Figure 1–11. Bottom (Layer 4) (Ground and Signal)
1-9
Introduction and Description
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1-10
Introduction and Description
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Chapter 2
Using the THS4130 EVM
It is recommended that the user perform the following exercises to learn the
usage of the EVM. This practice helps the user learn about the various
terminals on the EVM and their function. In addition, it suggests the
components and equipment needed to operate the EVM.
Topic
Page
2.1 Required Equipment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–2
2.2 Power Supply Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–2
2.3 Input and Output Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–3
2.4 Testing the EVM Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–4
2.5 Power Down Verification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–5
2.6 Measuring the Frequency Response . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–5
2.7 Butterworth Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–6
2.8 THS4130 EVM Bill of Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–7
2-1
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2.1 Required Equipment
One double-output dc power supply (±5 V, 100 mA output minimum)
Two dc current meters with resolution to 1 mA and capable of the
maximum current the dc power supply can supply. If available, set the
current limit on the dc power supply to 100 mA.
Note: Some power supplies incorporate current meters which may be
applicable to this test.
50-Ω source impedance function generator (1 MHz, 10 V sine wave)
PP
Oscilloscope (50-MHz bandwidth minimum, 50-Ω input impedance).
2.2 Power Supply Setup
1) Set the dc power supply to ±5 V.
2) Make sure the dc power supply is turned off before proceeding to the next
step.
3) Connect the positive (+) terminal of the power supply to the positive (+)
terminal of the current meter number 1.
4) Connect the negative (–) terminal of the current meter number 1 to the
V
of the EVM (J7).
CC+
5) Connect the common ground terminal of the power supply to the ground
GND on the EVM (J9).
6) Connect the negative (–) terminal of the power supply to the negative (–)
terminal of the second current meter.
7) Connectthepositive(+)terminalofthecurrentmeternumber2totheV
of the EVM (J8).
CC–
Figure 2–1. Power Supply Connection
CURRENT
METER 2
CURRENT
METER 1
POWER SUPPLY
–5V
GND
+5V
+
–
+
–
J8 V
J7 V
J9 GND
CC–
J6 V
CC+
OCM
EVM
THS4130
Figures are not drawn to scale.
2-2
Using the THS4130 EVM
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