Ordering number : EP58B
Digital TV, Analog TV,
Flat Panel Display, and VCR ICs
'04-2
TOKYO OFFICE
Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
Telephone: 81-(0)3-3837-6339, 6340, 6342, Facsimile: 81-(0)3-3837-6377
SANYO Electric Co.,Ltd. Semiconductor Company Homepage
•
This catalog provides information as of February, 2004. Specifications and information herein are subject to change without notice.
Printed in Japan / February 2004 2k PC Plan
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Dig it a l TV De co d e r
Sys t e m Ch ip Se t
SANYO 480i / 480p down decoder chipsets support both digital satellite
broadccast and ddigitall terressttrial brooadcastt recepttion and
are optimal for compact and popularly-priced TV sets.
New product
Development
Satellite broadcast
antenna
Single-chip AV decoder
P 5
LC74152B
BS
Tuner
Audio
output
MPEG2
Audio decoder
Video scaler
D/A
TS demultiplex
Descrambler
video decoder
Terrestrial broadcast
antenna
Video
output
OSD
controller
Terrestrial
broadcast
signals
Tuner
Encoder
D/A
System-on-chip A/V decoder
P 5
LC74152B
MP@HL stream support (down decoding)
480i/480p video output
Host bus
MPEG2 AAC/BC audio support
Built-in OSD function
NTSC encoder
Uses two external 64 Mbit SDRAMs
Supply voltage: 1.8 V/3.3 V
Package: PGBA352
Digital TV microcontroller
Microcontroller for digital TV
P 6
LC74186E
P 6
LC74186E
R
IBM PowerPC
Includes UART, I2C, Smart Card, SIO,
IBM PowerPC R
and PIO interfaces
Supply voltage: 3.3 V
Peripheral
Package: PQFP208
: The following are trademarks of International Business Machines Corporation in the
Unaited States,or other countries,or both.
✽
IBM,PowerPCR
Extensive Lineup Provides Full System Support
Power supply system peripheral transistors
RF amplifier transistors
Ultrahigh frequency transistors
2SC4869, 2SC5225, 2SC5501,
Muting circuit block
Muting transistor series
High breakdown voltage MOSFET series
Ultralow on-resistance MOSFET series
Ultraminiature lightweight PicoMOSTM series
Ultralow saturation voltage MBIT-II transistor series
Low VF Schottky barrier diode series
PicoTR series
2SC5503, SBFP420M
TV tuner and VCR transistors
PicoGET Series
15GN01M, 55GN01M
SANYO TV . VCR
SANYO TV . VCR
3
4
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Digital TV 32-Bit RISC Microcontroller
Digital TV TS + Audio + Video Decoder IC
with Built-in OSD Function
LC74152B
LC74186E
Overview
Overview
The LC74152B is a digital TV decoder IC that integrates MPEG2 video decoder, AAC audio decoder, transport stream decoder, data
broadcast OSD, video scaler, and NTSC encoder functions on the same chip.
The video decoder down decodes the HDTV stream to 480i/480p. The digital TV backend block can be implemented by combining
this IC with a system controller (CPU).
The LC74186E is 32-bit microcontroller for digital TV that uses the IBM PowerPC R as its CPU core and integrates on a single chip a
wide range of peripheral functions, including UART, I2C bus control, timer, synchronous serial port, parallel port, external SDRAM
control, and external bus control functions.
: The following are trademarks of International Business Machines Corporation in the
Unaited States,or other countries,or both.
✽
IBM,PowerPCR
Functions
Functions
R
[IBM PowerPC (PPC405D4)]
Operation at clock frequencies up to 216 MHz
16 KB instruction cache
SCP (synchronous serial port): 1 channel
UART: 3 channels
[TS Decoder Block]
[OSD Block]
Supports both 480i and 480p display
Supports both the 16 bits per pixel YUV 422 format and the
8 bits per pixel CLUT8 format
Supports two TS channel inputs
I2C bus controller: 1 channel (I2C)
Smart Card interface: 1 channel
General-purpose timer (GPT)
General-purpose parallel port (GPIO)
Interrupt controller (UIC)
8-bit parallel TS inputs
Either internal or external synchronization can be selected
Supports up to 55 indexes. The PID and channel number can
be set for each index.
16 KB data cache
[Scaler Block]
Two scalers are provided, supporting two-screen structures or
video recording output
Supports satellite broadcast multi-view 3-screen display
[External SDRAM Control]
32-bit data bus
Support for two logical banks (two chip select signals)
Support for 4 MB to 256 MB per logical port
[Video Decoder Block]
Down decodes the HD stream to 480i/480p
Supports two-channel HD down decoded playback,
two-channel HD down decoded plus 480p normal playback,
and three-channel 480p normal playback
DMA controller (DMAC)
System clock generator PLL circuit
Supply voltage: 3.3 V
[Encoder Block]
NTSC interlaced encoding
Can generate two video output systems
Package: PQFP208 (0.5 mm lead pitch, 28 mm square)
[External Bus Control]
Up to 8 ROM, EPROM, SRAM, flash, and slave peripheral
I/O banks (8 CS signals)
Support for both burst and non-burst transfer devices
26-bit address bus, 16-bit data bus
[Audio Decoder Block]
MPEG AAC 5.1 channel decoding (with the output mixed
down to two channels)
Supply voltage: 1.8 V (internal), 3.3 V (I/O)
Package: PBGA352 (35 35)
MPEG BC decoding
Block Diagram
Block Diagram
DMA control
ROM/SRAM control
SDRAM control
SDRAM
SDRAM
(32bit 2M)
(32bit 2M)
OPB
27MHz
ROM/SRAM
external
bus controller
DMA
controller
SDRAM
controller
Parallel port
Parallel port
Timer I/O
Arbiter
General-purpose timer
Smart Card interface
Asynchronous serial port
Synchronous serial port
I2C bus controller
Host CPU
CPUIF
TS
Arbiter
16-bit digital video interface
(SD input, main output)
SCALER
PLB
Smart Card control
TSIN1
TSIN2
8-bit digital video interface
(Recording output)
PLB/OPB
bridge
Asynchronous serial port
Data
cache
Instruction
cache
OSD with
ISDB support
TSOUT
16KB
16KB
Synchronous 3-wire
serial port
VIDEO
AUDIO
I2C bus control
Memory management unit
Execution unit
Time
Debugging
interface
JTAG
port
VDAC
VDAC
Three analog video channels
(Main outputs: Y.Pb.Pr/Y.C)
NTSC encoder
Three analog video channels
(Subsidiary output
: Y/C composite video)
Interrupt
controller
Interrupt input
Clock inpu
PPC405core
Clock generator
PLL
DAC I/F
(Main output: video recording output)
DIT(PCM&encoded stream)
SANYO TV . VCR
SANYO TV . VCR
5
6
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Fla t P a n e l Dis p la y Vid e o
Fla t P a n e l Dis p la y Vid e o
Home AV Equipment Related Devices
SANYO has created video signal processing ICs that adopt high image quality scan
converter technology and are optimal for flat panel displays.
Sig n a l-P r o ce s s in g ICs
Sig n a l-P r o ce s s in g ICs
Fla t Pa n e l Disp la y Syst e m Ch ip se t s
Op t im a l fo r Fla t Pa n e l Disp la ys
Conversion of TV signals and
PC video signals to WXGA
resolution using resolution
conversion technology.
Video signal processing IC for
flat panel displays
TV signal
(NTSC or PAL)
FPD video signal-processing IC
New product
Development
P 9
LC74986NWF
P 9
Scaling IP
Resolution
conversion
LC74986NWF
Output
processing
RGB
Picture quality
adjustments
Decoder
Input
processing
LCD panel
(up to WXGA
resolution)
ADC
Support for multiple signal sources
NTSC/PAL and DTV (480i/480p) inputs
Up to XGA progressive scan input
Independent enlargement in the horizontal and
vertical directions. Reduction in the horizontal
direction is also provided.
P 10
LA7605M
Personal computer
video signal
(up to XGA resolution)
Interlaced to progressive scan conversion
Built-in OSD function (On-chip 510-character,
8-color, font RAM 8 characters)
P 10
LA7605M
Data bus
I2C bus interface (The OSD function can also be
controlled from a 3-wire bus)
Package: QIP80E (14 20) plastic package (flat package)
Functions: I2C bus controller, adjustment-free VIF/SIF,
audio bandpass filter and trap, Y, C, and deflection
signal processing, CbCr internal (for DVD),
dynamic contrast support, one crystal oscillator
system (with built-in DDS circuit), external OSD
input, HS, VS, and BGP outputs, RGB analog
output
Supply voltage: Dual-voltage supply - I/O: 3.3 V,
core: 2.5 V
Maximum operating frequency: 85 MHz
Package: SQFP144 (20 20)
Timing control
8-bit flash microcontroller
Applications: PAL/NTSC color TV
Supply voltage: 5 V single-voltage power supply
Power consumption: About 1 W
P 11
LC87F57C8A
Flash ROM: 128 KB
RAM: 3,072 bytes
Minimum bus cycle time: 100 ns (10 MHz)
UART and synchronous serial port
( bus compatible)
12-channel 8-bit A/D converter
PWM: Two variable period 12-bit PWM circuits
Package: QIP64E (14 14), SQFP64 (10 10)
Microcontroller
8-bit flash microcontroller
LC87F57C8A
LC87F5564A
P 11
P 12
P 12
LC87F5564A
Flash ROM: 64 KB
RAM: 1,024 bytes
Minimum bus cycle time: 100 ns (10 MHz)
UART and synchronous serial port
( bus compatible)
12-channel 8-bit A/D converter
PWM: Two variable period 12-bit PWM circuits
Package: QIP48E (14 14), SQFP48 (7 7)
These flash memory products are manufactured and
sold by SANYO Electric Co., Ltd. under license from
Silicon Storage Technologies, Inc. (SST).
LCD TV
PDP TV
Extensive Lineup Provides Full System Support
AC/DC Converter Transistors
High breakdown voltage MOSFET series
2SK2624LS, 2SK2625LS, 2SK2628LS
Backlight Inverter Transistors
DC/DC Converter Transistors
Low saturation voltage transistors
CPH3115, CPH3109
Ultralow on-resistance MOSFETs
FSS140, FS132, FS134, CPH3314, CPH3414
Ultraminiature light weight PicoMOSTM series
2.5V drive: VDSS=30V system, N-channel and P-channel devices
2.5V drive: VDSS=50V system, N-channel and P-channel devices
4.0V drive: VDSS=50V system, N-channel and P-channel devices
Diodes
SBS004, SBS005, SBS006, SBE001, SBE002
Low saturation voltage transistors
2SC5566, 2SC5706, 2SC5707,
CPH3216, CPH3205, CPH3212, CPH3223,
CPH3115, CPH3109, CPH3116, 2SA2039
Dual device single package products (PNP 2)
CPH5503, CPH5504 ,CPH5506, CPH5508
Dual device single package products (PNP + NPN)
CPH5506
MOSFETs
FW332, FW351, FW238, FW256
SANYO TV . VCR
SANYO TV . VCR
7
8
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Scan Converter IC for Flat Panel Displays
Video Signal Processor
LC74986NWF
LA7605M
Overview
Overview
The LA7605M is a flat panel display color TV signal-processing I2C bus controller IC that supports all the broadcast standards used
worldwide.
The LC75986NWF is a video signal processing IC that performs resolution conversion, IP conversion, and image quality corrections
without requiring external memory. It can convert and display a wide variety of video signal formats for display on a flat panel
display. In particular, its image quality correction function adjusts the image quality to be optimal for display on a flat panel.
Its OSD function can display characters with a size optimal for the panel used. A video signal processing system for flat panel
displays can be implemented easily by combining this IC with video converter, A/D converter, and microcontroller ICs and an
LCD panel.
Functions and Features
VIF/SIF bloc
· Adjustment-free VCO, 4-mode audio trap/audio bandpass filter, buzz canceller
· RF AGC/video level
Single crystal color system: PAL and NTSC
Functions
Black stretch, sharpness control with coring on/off control, built-in variable Y system filters (Y-DL and chrominance trap)
Chrominance bandpass filter, demodulation ratio/angle control, support for CbCr input
VS, HS, and BGP outputs, C-sync output, FSC output
Dynamic contrast control
VIF, SIF, video, and sync separator circuits with superlative weak field and nonstandard signal characteristics
Adjustment-free VIF/SIF, audio trap, and audio bandpass filters
Horizontal resonator-less adjustment-free system
NTSC/PAL and DTV (480i/480p) inputs: YCbCr digital 8-bit signal inputs
Up to WXGA progressive scan input: RGB digital 8-bit signal input
Independent enlargement in the horizontal and vertical directions. Reduction in the horizontal direction is also provided.
Interlaced to progressive scan conversion
Image quality adjustment function (sharpness, color, tint, black stretch, brightness, contrast, white balance, black balance)
correction circuit (Look-up table system. Common characteristics for each 8-bit RGB color can be programmed.)
Single RGB 24-bit or 18-bit signal output or dual RGB 48-bit or 36-bit signal output (with built-in bit depth simulation and
conversion functions)
No external frame memory required (Input and output have the same frame period)
Built-in OSD function (On-chip 510-character 8-color, font RAM 8 characters)
I2C bus interface (The OSD function can also be controlled from a 3-wire bus)
Supply voltage: Dual-voltage supply - I/O: 3.3 V, core: 2.5 V
Supply voltage: VCC: 5 V
Package: QIP80E (14 20)
Block Diagram
Maximum operating frequency: 85 MHz
Package: SQFP144 (20 20)
VIDEO
OUT
INT-V IN
(S-C:IN)
EXT-V
IN
SVO
0.47
µF
+
+
+
VCO
V/C
GND
CR_IN
CB_IN
+
Block Diagram
+
0.1µF
+
+
+
0.1µF
1000P
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41
A2C
330
Ω
CLMP
CLMP
PLL
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
40
39
38
37
36
35
34
+
0.47
µF
DOD
VXD
VIDEO
AMP
APC2
VCO
CLAMP
DC ADS
TRAP
EXT AUDIO INT
S CARRIER OUT
+
10
µ
F
VIDEO
SW
APC1
BPF
IH
TINT
600
Ω
VIDEO
DIT
DELAY
+
51 61 71
89 99 107
41 40 39 38 34
Output Timing
0.01µ
F
1k
Ω
PAL
SW
SW
(ON/OFF)
SPLL
V
5V
CC
44 54 64
24
82 92 100
24
+
TRAP
1000P
BPF
BPF
LPF
ALC
GND
DEMO
CLAMP
+
SW
AOC
10P
SYNC
SEP
DELAY
LINE
Y
Cr
Cb
LIM
AMP
DCLKI
XTAL
26
25
OSD
HOR
VCO
PEAKING
CORING
SW
GND
33 (METUL FILM)
Bit depth conversion
processing
REF
4.7kΩ
FM
DET
BLACK
STRETCH
1/256
CD
AUDIO OUTPUT
PM OUT
BGP
32
31
30
29
28
27
26
25
VOL
PHASE
SHIFTER
HOR
C/D
DC
REST
MIX
COLOR
CLAMP
(M)
19 AIC
AIDA
HS
0.01
µF
HOR
OUT
(M)
15000P
AFC1
correction
18
17
IF
AGC
CONTRAST
ERIGHT
RGB
MATRIX
0.022
µF
VIF
AICS*2
1
µF
3.3kΩ
RF
AGC
White balance
Contrast, Black balance
Brightness
RF AGC
VER
SEP
HOR
VCC
0.01
µ
F
OSD
FIX GAIN
ERIGHT
+
OSD
SW
Y
Cr
Cb
30kΩ
SCL
SDA
14
13
AFT
VER
C/D
VER
OUT
R
G
B
VS
1
RGB
Y Cb Cr
IF IN
PSC
FSC OUT
Y Cb Cr
RGB
External
voltage
signals
BUS
DCS
CL AMP
IRIVE/OUT-OFF
C_SYNC
Select
B
+
Input Timing
Select
Black
stretch
8
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
8
8
8
Data
CLKIEN
4
G
Select
8
0.01
µ
F
R
24
24
89 99 107
82 92 100 81
+
8
100
µ
F
+
117 125 135
110 118 128
1k
Ω
140 141 142 143
5
35 17 31
*1, *2: Register selectable
AFT
R IN G IN B IN FB IN
R OUT G OUT B OUT
C_SYNC OUT
SANYO TV . VCR
SANYO TV . VCR
9
10
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8-Bit Flash Microcontroller
8-Bit Flash Microcontroller
LC87F57C8A
LC87F5564A
Overview
Overview
The LC87F5564A is an 8-bit microcontroller built around a CPU block that operates with a minimum bus cycle time of 100 ns and
that integrates 64 KB of flash ROM (that supports onboard programming), 1 KB of RAM, and an extensive set of peripheral functions
on a single chip. multifunction 16-bit timer/counters (that can be used as separate 8-bit counters), four 8-bit timers with prescalers, a
clock time base timer, two synchronous SIO channels that provide an automatic transfer function, one asynchronous/synchronous SIO
channel, two 12-bit PWM circuits, a 12-channel 8-bit A/D converter, a high-speed 8-bit parallel interface, a high-speed clock counter,
a system clock divider function, and an interrupt function that supports 20 interrupts and 10 vector locations.
The LC87F57C8A is an 8-bit microcontroller built around a CPU block that operates with a minimum bus cycle time of 100 ns and
that integrates 128 KB of flash ROM (that supports onboard programming), 4 KB of RAM, and an extensive set of peripheral
functions on a single chip. The peripheral functions include two multifunction 16-bit timer/counters (that can be used as separate
8-bit counters), four 8-bit timers with prescalers, a clock time base timer, two synchronous SIO channels that provide an automatic
transfer function, one asynchronous/synchronous SIO channel, two 12-bit PWM circuits, a 12-channel 8-bit A/D converter, a high-
speed 8-bit parallel interface, a high-speed clock counter, a system clock divider function, and an interrupt function that supports 20
interrupts and 10 vector locations.
Functions
Functions
Timers
Timers
· One 16-bit timer/counter with capture register (can also be used as two 8-bit timers)
· One 16-bit timer/counter with PWM/toggle output function (can also be used as two 8-bit timers)
· Four 8-bit timers with 6-bit prescaler function
· Clock time base timer
· One 16-bit timer/counter with capture register (can also be used as two 8-bit timers)
· One 16-bit timer/counter with PWM/toggle output function (can also be used as two 8-bit timers)
· Four 8-bit timers with 6-bit prescaler function
· Clock time base timer
High-speed clock counter
High-speed clock counter
(Can count a clock signal up to 20 MHz when a 10 MHz main clock frequency is used.)
SIO
(Can count a clock signal up to 20 MHz when a 10 MHz main clock frequency is used.)
SIO
· Two 8-bit SIO channels with automatic transfer function
- Two 8-bit baud rate generators included
· Two 8-bit SIO channels with automatic transfer function
- Two 8-bit baud rate generators included
- Maximum clock: 4/3 tCYC
- Maximum clock: 4/3 tCYC
· One 8-bit asynchronous/synchronous SIO channel
- Asynchronous: 8 to 2048 tCYC, Synchronous: 2 to 512 tCYC
A/D converter: 12-channel 8-bit converter
· One 8-bit asynchronous/synchronous SIO channel
- Asynchronous: 8 to 2048 tCYC, Synchronous: 2 to 512 tCYC
A/D converter: 12-channel 8-bit converter
PWM: two variable-period 12-bit PWM circuits
Parallel interface (switchable polarity, can perform read and write
operations in 1·tCYC)
Remote control receiver (using the P73/INT3/T0IN shared function pin)
Watchdog timer (Uses an external RC circuit)
Interrupts
· 20 interrupt sources with 10 vector locations (Multiple interrupts
supported using three interrupt levels: low level (L), high level (H),
and maximum level (X))
High-speed multiply and divide instructions
· 16 bits 8 bits (Execution time: 5 tCYC)
· 24 bits 16 bits (Execution time: 12 tCYC)
· 16 bits ÷ 8 bits (Execution time: 8 tCYC)
· 24 bits ÷ 16 bits (Execution time: 12 tCYC)
System clock divider function
Standby functions
· Halt mode: instruction execution stopped, peripheral circuit
operation continues
· Hold mode: instruction execution stopped, peripheral circuit
operation stopped
· Crystal hold mode: instruction execution stopped, peripheral
circuit operation stopped except for the clock time base timer
Package: QIP64E (14 14), SQFP64 (10 10)
PWM: two variable-period 12-bit PWM circuits
Remote control receiver (using the P73/INT3/T0IN shared function pin)
Watchdog timer (Uses an external RC circuit)
Interrupts
· 20 interrupt sources with 10 vector locations (Multiple interrupts
supported using three interrupt levels: low level (L), high level (H),
and maximum level (X))
High-speed multiply and divide instructions
· 16 bits 8 bits (Execution time: 5 tCYC)
· 24 bits 16 bits (Execution time: 12 tCYC)
· 16 bits ÷ 8 bits (Execution time: 8 tCYC)
· 24 bits ÷ 16 bits (Execution time: 12 tCYC)
System clock divider function
Standby functions
· Halt mode: instruction execution stopped, peripheral circuit operation
continues
· Hold mode: instruction execution stopped, peripheral circuit operation
stopped
· Crystal hold mode: instruction execution stopped, peripheral circuit
operation stopped except for the clock time base timer
Package: QIP48E (14 14), SQFP48 (7 7)
Block Diagram
Block Diagram
Interrupt control
Interrupt control
IR
IR
PLA
PLA
Flash ROM
Flash ROM
Standby control
Standby control
CF
RC
CF
RC
PC
PC
X'tal
X'tal
Bus
interface
Bus
interface
ACC
ACC
SIO 0
SIO 1
SIO 0
SIO 1
Port 0
Port 0
Register B
Register B
SIO 2
Timer 0
Timer 1
Timer 4
SIO 2
Timer 0
Timer 1
Timer 4
Port 1
Port 3
Port 1
Port 3
Register C
ALU
Register C
ALU
Port 7
Port 7
PSW
RAR
PSW
RAR
Port 8
ADC
Port 8
ADC
Timer 5
PWM0
Timer 5
PWM0
INT0 to INT3
noise rejection
INT0 to INT3
noise rejection
RAM
RAM
Port 2
INT4,5
Port 2
INT4,5
Stack pointer
Stack pointer
PWM1
PWM1
Watchdog
timer
Watchdog
timer
Clock time base
timer
Clock time base
timer
Parallel
interface
Port A
Port B
Port C
Port A
Port B
Port C
Timer 6
Timer 7
Timer 6
Timer 7
This flash memory product is manufactured and sold by SANYO Electric Co., Ltd.
under license from Silicon Storage Technologies, Inc. (SST).
This flash memory product is manufactured and sold by SANYO Electric Co., Ltd.
under license from Silicon Storage Technologies, Inc. (SST).
SANYO TV . VCR
SANYO TV . VCR
11
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Co lo r TV Bu s
SANYO suppports enndd product ddesign annd manufacture approopriate forr all marketts
with a ffull prodduct linne of colloor TV I2C buus contrrol systtem ICs.
Sys t e m Ch ip Se t
I2C Bus Control for TV
P 35~38
Signal-Processing ICs
Fu ll lin e u p o f syst e m ICs t h a t fe a t u re I2C
b u s co n t ro l
TV Control Microcontrollers
LC8632 Series, LC8633 Series
LC8634 Series, LC8635 Series
LC838 Series
New product
Full lineup that responds to
Development
ROM: 12 to 64 KB
RAM: 512 to 640 bytes
market needs
Caption data slicer (LC8632/LC8634 Series)
Simple graphics function OSD
Multi-master I2C bus system
ROM correction function
On-chip flash memory microcontrollers for evaluation
Packages:DIP42S (600mil), QIP48E (14 14) (LC8632/33 Series)
PAL multiformat I2C bus
TM
P 15
(LA76930 Series)
SUSOC ICs
control system ICs
(SANYO Ultimate Super One Chip LSI)
LA76810 Series
Tuner
U/V mixer/OSC.
LA79106V
U/V mixer/OSC.+PLL
LV4512V
P 19
LA76818A
LA76930 (IF+VCD+CPU)
with YcbCr
LA76932 (IF+VCD+CPU)
with YcbCr & E/W
LA76950 (IF+VCD+Micon)
with YcbCr
LA76952 (IF+VCD+Micon)
with YcbCr & E/W
DIP36S (400mil), MFP36SDJ (375mil) (LC8634/35 Series)
DIP42S (600mil), QIP48E (14 14) (LC838 Series)
P 41
(PAL/NTSC,YCbCr)
P 42
P 20
LA76828N
Full Lineup of I2C Bus Vertical
LA76936 (IF+VCD+Micon) LA7695X (IF+VCD+Micon+3line Comb)
(PAL/NTSC,E/W,YCbCr)
with YcbCr SECAM
LA76938 (IF+VCD+Micon)
with YcbCr & E/W
with YcbCr & E/W
CRT
P 29~
Output ICs
P 21
LA76835A
Video
output
(NTSC,E/W support)
LA7840/41/45N/46N/75/76
I2C bus control super single-chip system ICs
LA76810 Series
78040N/040/041/045
LA76835NM
P 22
P 19~
High reliability
Low power consumption
Output
(NTSC,E/W,YCbCr)
Type
Output
current
P 23
j-C
LA76843N
voltage
(max)
Package
No.
V
P
CC
Horizontal
output
(NTSC)
VIF
Video /Chroma
RGB drive
RGB input
24
25
26
27
LA7840
SIP7H
SIP7H
SIP7H
4.0°C/W
4.0°C/W
4.0°C/W
70V
1.8APP
2.2APP
2.2APP
3.0APP
2.2APP
3.0APP
1.8APP
1.8APP
2.2APP
2.2APP
TV control
16 to 33V
16 to 38V
Adjustment-free VIF/SIF
LA7841
70V
microcontrollers
Built-in trap and bandpass filter
Single crystal chrominance system
Built-in horizontal period (1H) delay line
Supply voltage: VCC = 5 V/9 V
Package: DIP54S (600mil)
I2C bus
P 35~38
LA7845N
LA7846N
LA7875N
LA7876N
LA78040N
LA78040
LA78041
LA78045
85V
LC8632 Series
SIF
Hori. /Ver.
SIP10H 3.0°C/W
SIP10HD 4.0°C/W
SIP10H 3.0°C/W
T0220-7H 3.0°C/W
T0220-7H 3.0°C/W
T0220-7H 3.0°C/W
T0220-7H 3.0°C/W
85V
LC8633 Series
LC8634 Series
LC8635 Series
LC8638 Series
LC863A Series
LC863B Series
Vertical output
110V
110V
70V
P 24~34
16 to 33V 32
16 to 33V 29
LA7840 Series
LA78040 Series
LA7847/48 Series
LA7849 Series
I2C Bus interface
Signal-processing ICs with
built-in microcontroller
(CPU + VCD)
70V
28
30
16 to 33V
16 to 33V
70V
16 to 43V 31
92V
Speaker
Audio
output
On-Chip I2C Bus and E/W
Driver Circuits
P 17
Remote control
receiver block
LA76919M
(NTSC)
P 18
LA7847, LA7848, LA7849
For large-screen and flat-screen CRT TVs
Output
LA76922M
(NTSC E/W YCbCr)
Remote control
transmitter
microcontroller
LC587XXX Series
Type
No.
Output
current
: SUSOCTM is a trademark of SANYO Electric Co., Ltd.
✽
Built-in microcontroller TV signal-processing ICs
j-C voltage
Package
V
P
CC
(max)
V
= 5 V or 9 V
These flash memory products are manufactured and
sold by SANYO Electric Co., Ltd. under license from
Silicon Storage Technologies, Inc. (SST).
CC
LA7847
LA7848
LA7849
SIP10HD 4.0°C/W
72V
2.2APP
16 to 34V
16 to 43V
33
33
TV signal-processing functions
SIP10HD 4.0°C/W
92V
92V
2.2APP
2.2APP
TV system control microcontroller
3.0°C/W
SIP10H
16 to 43V 34
Extensive Lineup Provides Full System Support
Remote control transmitter microcontrollers
Power Supply System Transistors
High breakdown voltage MOSFET series
Ultralow on-resistance MOSFET series
Ultraminiature light weight PicoMOSTM series
Ultralow saturation voltage MBIT-II transistor series
Low VF Schottky barrier diode series
PicoTR series
VHF/UHF Tuner Transistors
High-frequency MOSFET series
High-frequency transistor series (fT=1 to 6 GHz)
PicoGET series
Flash microcontrollers
LC58F7416A lineup
4-bit system-on-chip microcontrollers: LC573100 series
Optimal for low-end remote controls that do not require LCD display
ROM capacity: 1K, 2K, or 4K 8 bits
4-bit system-on-chip microcontrollers: LC587XXX series
Built-in LCD display circuit: 92 to 140 segments
ROM capacity: 2K 16 bits to 8K 16 bits
4-bit system-on-chip microcontrollers: LC573400 series
Built-in LCD display circuit: Up to 120 segments
ROM capacity: 4K or 6K 8 bits
Video Transistors
Horizontal deflection output transistor series
Video output transistor series
Ultralow on-resistance MOSFETs
SANYO TV . VCR
SANYO TV . VCR
13
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Built-in CTV Microcontroller
Signal-Processing System ICs
TM
SUSOC LA76930 Series
A newly-developed signal-processing IC, a microcontroller, and even a CCD.
There is no one other than SANYO who has included so much functionality in a single package.
Additionally, series deployment with pin-to-pin compatibility* means that users can handle TV
signal standards in different markets around the world by changing only certain specific
components.
These ICs, which SANYO has named SUSOCTM (SANYO Ultimate Super One Chip), provide
powerful support for design and manufacturing for all markets.
Features
Support for Worldwide Markets with All-in-One ICs
General features
Complete lineup that covers all markets worldwide
Global pin-to-pin series (multiformat, PAL/NTSC, NTSC)
VIF/SIF
Adjustment-free VIF/SIF
No VCO coil required
Built-in audio bandpass filter, four-system audio trap
Digital AFT system
V/C/D (Video/Chrominance/Deflection)
Blue stretching technology that creates high-quality images
DDS technology single crystal VCO system
DVD component signal inputs (YCbCr)
Built-in SECAM demodulator (LA76936, LA76938)
Special architecture and algorithms that create high-quality images
: This allows different models to be used with essentially no changes to the pin layout.
✽
AV input
Switch
SAW filter
TUNER
CPU
Up to 15 colors can be selected
Four colors per character
SUSOCTM
SUSOC ICs (LA76930Series)
LA76930 (IF+VCD+CPU)
with YcbCr
LA76950 (IF+VCD+Micon)
with YcbCr
1 chip
CCD
CPU
+
+
LA76932 (IF+VCD+CPU)
with YcbCr & E/W
LA76952 (IF+VCD+Micon)
with YcbCr & E/W
(IF/V/C/D)
Remocon
RX
LA76936 (IF+VCD+Micon) LA7695X (IF+VCD+Micon+3line Comb)
with YcbCr SECAM
with YcbCr & E/W
Audio power
LA76938 (IF+VCD+Micon)
with YcbCr & E/W
V-out
: SUSOCTM is a trademark of SANYO Electric Co., Ltd.
✽
RGB drive
H out
Pre drive
AC
CRT
Power
supply
1 chip
(IF/V/C/D)
CPU
CCD
SANYO TV . VCR
SANYO TV . VCR
15
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Signal-Processing IC with Integrated
Microcontroller
Signal-Processing IC with Integrated
Microcontroller
LA76919M
LA76922M
Overview
Overview
The LA76919M and LA76922M series are I2C bus controller ICs that support the NTSC format and aim for rationalization of color
TV set design, improved manufacturability, and lower total costs.
The LA76919M and LA76922M series are I2C bus controller ICs that support the NTSC format and aim for rationalization of color
TV set design, improved manufacturability, and lower total costs.
Functions and Features
Functions and Features
Black stretch, sharpness control with coring on/off control, built-in variable Y system filters (Y-DL and chrominance trap)
Chrominance bandpass filter, demodulation angle control
Audio and video switching: three systems
Black stretch, sharpness control with coring on/off control, built-in variable Y system filters (Y-DL and chrominance trap)
Chrominance bandpass filter, demodulation angle control, CbCr input
E/W support
Built-in microcontroller video, chrominance, and deflection signal processing
Adjustment- free horizontal resonator system
Simplified SG
VM output
Audio and video switching: three systems
Built-in microcontroller video, chrominance, and deflection signal processing
Adjustment- free horizontal resonator system
Simplified SG
Supply voltage: V
= 11 V (built-in reference voltage for 5.7 V and 8.5 V regulators)
Package: QIP80E (14 20)
CC
Supply voltage: V
= 11 V (built-in reference voltage for 5.7 V and 8.5 V regulators)
Package: QIP80E (14 20)
CC
Block Diagram
Block Diagram
V
:5V
VCD
V
:5V
VCD
CC
SAO SVO
CC
SVO
IR-IN
IR-IN
X-RAY
IN
X-RAY
EXT V C IN REF
CSYNC
CSYNC
EXT-V EXT-A C IN
P-SW
P-SW
+
+
+
+
+
+
+
+
+
FSC
FSC
+
+
+
11V
11V
X-RAY
X-RAY
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41
P17
P34
P35
P36
P17
P34
P35
P36
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
+
+
REG
SW
REG
SW
V3
A3
V3
CR
CB
CLMP
CLMP
+
+
+
VXO
TINT
APC 1
ACC
FSC
VXO
TINT
APC 1
ACC
FSC
VIDEO
SW
VIDEO
SW
CLMP
CLMP
X-RAY
I/O
PORT 1
I/O
PORT 1
X-RAY
I/O
PORT 3
I/O
PORT 3
P37
P37
HOR
VCO
AUDIO
SW
P10/SDA0
P10/SDA0
HOR
GND
HOR
VCO
HOR
GND
AF
SW
AF/D1
SW
EPF
DEMO
YC SW
X-RAY
FEP
EPF
DEMO
YC SW
X-RAY
FEP
P11/SCK0
P12/SDA1
P13/SCK1
P11/SCK0
P12/SDA1
P13/SCK1
(METUL FILM)
1/256
ADC
ROM
RAM
I IC-BUS
OSD
BUS
BUS
ADC
ROM
RAM
I IC-BUS
OSD
BUS
BUS
1/256
RGB
DL
SHARP
COLOR
CLAMP
V/Y
SW
BS
SG
RGB
DL
COLOR
CLAMP
V/Y
SW
BS
SG
TRAP
TRAP
MATRIX
FEP
MATRIX
SHARP
FEP
HOR
C/D
HOR
C/D
SYNC
SEP
SYNC
SEP
CONTRAST
ERIGHT
CONTRAST
ERIGHT
DC REST
KILLER OUT
LPF
ATT
VM DC REST
BASE
TIMER
CPU
CORE
DATA
SLICER
TIMER
0
LPF
BASE
TIMER
CPU
CORE
DATA
SLICER
TIMER
0
AFC1
AFC1
VER
SEP
AFC2
H OUT
VER
SEP
AFC2
H OUT
+
OSD
CONTROL
OSD
SW
OSD
CONTROL
OSD
SW
PHASE
SHIFTER
PHASE
SHIFTER
+
VER
C/D
HS/VS
VER
C/D
HS/VS
HOR V
CC
HOR V
CC
I/O
PORT 0
I/O
PORT 0
DRIVE/OUT-OFF
DRIVE/OUT-OFF
+
+
HOR
VOC
HOR
OUT
HOR
HOR
OUT
VER
VER
VOC
RAMP
RAMP
CLMP
+
+
CLMP
ABL-ACL
ABL-ACL
VER
D/A
VER
OUT
VER
OUT
REG-SW
REG-SW
VRAMP
+
VRAMP
+
CLOCK
CONTROL
5V/8V-REG
RST
CLOCK
CONTROL
5V/8V-REG
RST
PLL
PLL
E/W
AMP
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
+
+
+
+
+
+
+
+
+
11V
+
11V
+
+
R
G
B
R
G
B
ATT
OUT
VM
OUT
E/W
OUT
OUT OUT OUT
OUT OUT OUT
+
+
+
+
KEY-IN AFT
KEY-IN AFT
ABL
RGB
7.8V
ABL
RGB
7.8V
11V
11V
V
DD
V
DD
SANYO TV . VCR
SANYO TV . VCR
17
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I2 C Bus Control Lineup
LA76810 Series
I2 C Bus Control Lineup
LA76810 Series
LA76818A
LA76828N
Overview
Overview
The LA76810 series are I2C bus controller ICs that support the different TV broadcast formats used worldwide and aim for
rationalization of color TV set design, improved manufacturability, and lower total costs
Single crystal multiformat system that supports the different TV broadcast formats used worldwide
ICs optimal for each individual broadcast standard deployed as a pin-to-pin compatible lineup
· Multiformat system: LA76818A (YCbCr support), LA76828N (YCbCr and E/W support)
· NTSC system: LA76843N/LA76835A (YCbCr and E/W support), LA76835NM (YCbCr and E/W support)
Adjustment-free VIF/SIF, audio trap/audio bandpass filters
The LA76810 series are I2C bus controller ICs that support the different TV broadcast formats used worldwide and aim for
rationalization of color TV set design, improved manufacturability, and lower total costs
Single crystal multiformat system that supports the different TV broadcast formats used worldwide
ICs optimal for each individual broadcast standard deployed as a pin-to-pin compatible lineup
· Multiformat system: LA76818A (YCbCr support), LA76828N (YCbCr and E/W support)
· NTSC system: LA76843N/LA76835A (YCbCr and E/W support), LA76835NM (YCbCr and E/W support)
Adjustment-free VIF/SIF, audio trap/audio bandpass filters
Adjustment- free horizontal resonator system
Adjustment- free horizontal resonator system
Simplified SG
Simplified SG
Supply voltage: V
Package: DIP54S (600mil), QIP80E (14 20) (LA76835NM only)
= 5 V/9 V
Supply voltage: V
Package: DIP54S (600mil), QIP80E (14 20) (LA76835NM only)
= 5 V/9 V
CC
CC
Functions and Features
Functions and Features
VIF/SIF
VIF/SIF
· Adjustment-free VCO, 4-mode audio trap/audio bandpass filter, buzz canceller
· RF AGC/video level
· Adjustment-free VCO, 4-mode audio trap/audio bandpass filter, buzz canceller
· RF AGC/video level
· SIF system automatic discrimination (The LA7973 is used as the automatic discrimination IC.)
Single crystal color system: PAL, NTSC, SECAM (The LA7642N is used as the SECAM decoder.)
Black stretch, sharpness control with coring on/off control, built-in variable Y system filters (Y-DL and chrominance trap)
Chrominance bandpass filter, demodulation ratio and angle control
· SIF system automatic discrimination (The LA7973 is used as the automatic discrimination IC.)
Single crystal color system: PAL, NTSC, SECAM (The LA7642N is used as the SECAM decoder.)
Black stretch, sharpness control with coring on/off control, built-in variable Y system filters (Y-DL and chrominance trap)
Chrominance bandpass filter, demodulation ratio and angle control
E/W support
Block Diagram
Block Diagram
SVO
FBP
IN
SECAM
DECODER
SEOAM-KIL
FBP
FSC/SYNC
OUT
V/C
5V
V/C
5V
SCP
IN
ON
CR
IN
CB
IN
4M
V
CC
S CARRIER OUT
V
EXT
AUDIO
IN
OUT
CC
S CARRIER OUT
EXT
AUDIO
IN
I IN-V IN
[S-C IN]
EXT-V IN
[Y-IN]
VIDEO
OUT
I IN-V IN
[S-C IN]
EXT-V IN
[Y-IN]
VIDEO
OUT
CCD
CC
V
5V
CCD
CC
+
CCD/
HOR
GND
V
5V
+
+
V/C
CCD/
HOR
+
REF
VCO
V/C
GND
GND
REF
+
+
+
+
+
VCO
+
+
+
+
+
+
+
GND
+
+
+
+
+
+
51
+
+
51
54
53
52
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
54
53
52
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
A2C
PLL
OVER
MOD.
FSC/
CLMP
CLMP
A2C
PLL
CLMP
CLMP
CLAMP
FBP
BPF
SYNC SW
1H DELAY
CLAMP
DC ADS.
FBP
BPF
VIDEO
AMP
VXO
DDS
VXO
DDS
APC2
VCO
VIDEO
AMP
1H DELAY
APC2
VCO
SPLL
SPLL
HOR
VCO
HOR
VCO
VIDEO
SW
LPF
ALC
IF
VIDEO
SW
APC1
BPF
TINT
S.TRAP
SW
APC1
EPF
TINT
IDENT
BPF
LPF
ALC
1/256
PAL
SW
BPF
SW
1/256
PAL
SW
DC ADS.
(ON/OFF)
CLAMP
SW
SW
TRAP
(ON/OFF)
CLAMP
TRAP
SW
TRAP
TRAP
LIM
AMP
HOR
C/D
LIM
AMP
HOR
C/D
COLOR
CLAMP
ACC
COLOR
CLAMP
AFT
DEMO
ACC
IFT
DELAY
LINE
DEMO
DELAY
LINE
VIDEO
DET
SYNC
SEP
VIDEO
DET
SYNC
SEP
AFC1
AFC1
FM
DET
FM
DET
PEAKING
CORING
BLACK
STRETOH
DC
RGB
CONTRAST
ERIGHT
VER
SEP
PEAKING
CORING
BLACK
STRETOH
DC
REST
RGB
CONTRAST
ERIGHT
AFC2
REST
MATRIX
VER
SEP
AFC2
MATRIX
IF AGC
IF AGC
OSD
SW
VIF
OSD
VER
C/D
PHASE
SHIFTER
OSD
SW
SW
VIF
VER
C/D
PHASE
SHIFTER
SW
CONTRAST
BRIGHT
OSD
CONTRAST
SW
HOR
OUT
BUS
ABL
13
RF AGC
VER
HOR
VCC
DC
VER
HOR
VCC
HOR
OUT
BUS
ABL
13
EW
22
RF AGC
DRIVE/OUT-OFF
SYNC
22
DC
DRIVE/OUT-OFF
RAMP
VOL
CLAMP
15
RAMP
VOL
CLAMP
15
1
2
3
4
5
6
7
8
9
10
11
12
14
16
17
18
19
20
21
23
24
25
26
27
1
2
3
4
5
6
7
8
9
10
11
12
14
16
17
18
19
20
21
23
24
25
+
26
27
+
+
V
+
CC
+
V
CC
AUDIO OUTPUT
+
AUDIO OUTPUT
+
+
+
SAW
R
G
B
HOR
OUT
E/W
VER
OUT OUT
SAW
R
G
B
HOR
OUT
SYNC VER
OUT OUT
IF
OUT OUT OUT
IF
FILTER
OUT OUT OUT
FILTER
V
5V
CC
V
5V
CC
R
IN
G
IN
B
IN
FB
IN
RGB
9V
ABL
SAO
R
IN
G
IN
B
IN
FB
IN
RGB
ABL
SAO
V
HOR
AFT
CC
RF AGC
V
9V
HOR
AFT
CC
RF AGC
V
9V
CC
V
9V
IF IN
CC
IF IN
SANYO TV . VCR
SANYO TV . VCR
19
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I2 C Bus Control Lineup
LA76810 Series
I2 C Bus Control Lineup
LA76810 Series
LA76835A
LA76835NM
Overview
Overview
The LA76810 series are I2C bus controller ICs that support the different TV broadcast formats used worldwide and aim for
rationalization of color TV set design, improved manufacturability, and lower total costs.
Single crystal multiformat system that supports the different TV broadcast formats used worldwide.
ICs optimal for each individual broadcast standard deployed as a pin-to-pin compatible lineup.
· Multiformat system: LA76918A (YCbCr support), LA76828N (YCbCr and E/W support)
· NTSC system: LA76843N/LA76835A (YCbCr and E/W support), LA76835NM (YCbCr and E/W support)
Adjustment-free VIF/SIF, audio trap/audio bandpass filters
The LA76810 series are I2C bus controller ICs that support the different TV broadcast formats used worldwide and aim for
rationalization of color TV set design, improved manufacturability, and lower total costs.
Single crystal multiformat system that supports the different TV broadcast formats used worldwide.
ICs optimal for each individual broadcast standard deployed as a pin-to-pin compatible lineup.
· Multiformat system: LA76818A (YCbCr support), LA76828N (YCbCr and E/W support)
· NTSC system: LA76843N/LA76835A (YCbCr and E/W support), LA76835NM (YCbCr and E/W support)
Adjustment-free VIF/SIF, audio trap/audio bandpass filters
Adjustment-free horizontal resonator system
Adjustment-free horizontal resonator system
Simplified SG
Simplified SG
Supply voltage: V
Package: DIP54S (600mil), QIP80E (14 20) (LA76835NM only)
= 5 V/9 V
Supply voltage: V
Package: DIP54S (600mil), QIP80E (14 20) (LA76835NM only)
= 5 V/9 V
CC
CC
Functions and Features
Functions and Features
VIF/SIF
VIF/SIF
· Adjustment-free VCO, buzz canceller
· Adjustment-free VCO, buzz canceller
· RF AGC/video level/FM level control
· RF AGC/video level/FM level control
Black stretch, sharpness control with coring on/off control, built-in variable Y system filters (Y-DL and chrominance trap)
Chrominance bandpass filter, demodulation angle control
E/W support
Black stretch, sharpness control with coring on/off control, built-in variable Y system filters (Y-DL and chrominance trap)
Chrominance bandpass filter, demodulation ratio and angle control, blue stretch
E/W support
Block Diagram
Block Diagram
EXT-V
IN
Y-IN
S
EXT
OARRIER AUDIO
OUT IN
VIDEO
OUT
C_ IN
CR
CB
FBP IN
SVO
CWOUTX-RAY
V
V
5V
CC
15
µ
H
1
µ
F
GND
+
0.47
µ
F
39
+
+
+
0.47
+
µ
F
10k
V
+
CC
+
+
1H-DL/
REF
HOR
GND
9V
CC
VCO
+
+
+
+
+
+
+
+
GND
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41
+
+
51
+
50
NC
NC
V/C/D
GND
GND
54
53
52
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
GND
CLMP
CLMP
A2C
PLL
CR
65
66
67
68
69
70
71
72
73
74
75
40
39
38
37
36
35
34
33
32
31
30
+
+
330
0.47
µ
F
CW
KIL
1
µ
F
CLMP
CLMP
A2C
PLL
VCO
TINT
VIDEO
AMP
EXT AUDIO INT
S OARRIER OUT
CB
FBP
BPF
+
+
10
µ
F
1
µ
F
X-RAY
VIDEO
SW
VIDEO
DET
660
APC1
1
µ
F
V
5V
9V
VXO
CW
X-RAY
CC
X-RAY
VIDEO
AMP
+
0.01µF
3k
SPLL
SPLL
GND
5.6k
VM
AMP
HOR
VCO
VM OUT
HOR
VCO
H-OUT
CONTROL
APC1
CLMP
VIDEO
SW
SW
TRAP
SW
EPF
EPF
1000P
HOR
GND
IST AMP
BPF
ACC
KILLER
1/256
RESET
FEP
BPF
1/256
BPF
ACC
KIL
CB.CR
SW
NC
NC
LIM
ANP
DEMO
CLAMP
C SW
V
CC
(BYPASS)
TRAP
(METUL FILM)
SYNC
SEP
SND
TRAP
TRAP
HOR
C/D
2ND AMP
BPF
REF
AFC2
LIM
AMP
GND
HOR
C/D
+
F
CPU
RESET
4.7k
SW
AUTO
FLESH
10
µ
COLOR
TINT
AFT
FEP IN
DELAY
LINE
DELAY
LINE
FM
DET
PHASE
SHIFTER
CLMP
DELAY
10k
SYNC
SEP
AFC1
DEMO
VDD
DC
VIDEO
DET
AUDIO OUTPUT
FM OUT
AFC1
100µF
VOL
+
PEAKING
CORING
HOR
OUT
CB.CR
SW
COLOR
CLAMP
DC
REST
PEAKING
CORING
BLACK
STRETOH
RGB
FM
DET
CONTRAST
BRIGHT
TINT
HOR OUT
VER
SEP
AFC2
MATRIX
(M)
330
0.01µ
F
BLACK
STRETOH
15000P
IF AGC
AUTO
FLESH
COLOR
OSD
SW
0.01
µ
F(M) 76
29 3.3k
150
VIF
OSD
FIX GAIN
ERIGHT
VER
C/D
1
µF
PHASE
SHIFTER
HOR
VCC
VER
SEP
IF AGC
SW
+
0.01
µF
DC
REST
RGB
CONTRAST
BRIGHT
VIF
0.022 F(M)
µ
MATRIX
RF AGC
77
28
27
26
25
RF AGC
0.47µF
VER
C/D
VER
RAMP
0.47µF
HOR
OUT
BUS
11
ABL
13
RF AGC
4
E / W
OUT
VER
RAMP
HOR
VCC
DC
DRIVE/OUT-OFF
30k
1
VER OUT
VOL
78
CLAMP
OSD
FIX GAIN
ERIGHT
OSD
SW
H
CC
V
CC
V
25
AFT
EW OUT
79
E/W
1
2
3
5
6
7
8
9
10
12
14
15
16
17
18
19
20
21
22
23
24
26
27
0.01
µ
F
IF GND
1
VSI ZE 0OMP
80
IF IN
AUDIO OUTPUT
FM OUT
+
+
DRIVE/OUT-OFF
HS/VS
BUS
ABL
OL AMP
+
GND
GND
12K
1
100
µF
RF AGC
+
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
1
µF
SAW
FILTER
+
0.01µF
IF IN
+
+
+
100
µ
F
AFT
IB
IN
R
IN
G
IN
B
IN
FB
IN
R
G
B
EW
VER
H OUT
OUT OUT OUT
OUT OUT
AFT
ABL R IN G IN B IN FB IN HS
VS
R
OUT
G
OUT
B
OUT
SANYO TV . VCR
SANYO TV . VCR
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I2 C Bus Control Lineup
LA76810 Series
Vertical Output IC
LA76843N
LA7840
Overview
Overview
The LA76810 series are I2C bus controller ICs that support the different TV broadcast formats used worldwide and aim for
rationalization of color TV set design, improved manufacturability, and lower total costs
Single crystal multiformat system that supports the different TV broadcast formats used worldwide
ICs optimal for each individual broadcast standard deployed as a pin-to-pin compatible lineup
· Multiformat system: LA76818A (YCbCr support), LA76828N (YCbCr and E/W support)
· NTSC system: LA76843N/LA76835A (YCbCr and E/W support), LA76835NM (YCbCr and E/W support)
Adjustment-free VIF/SIF, audio trap/audio bandpass filters
The LA7840 is a vertical deflection output IC for high-definition TV and CRT displays in systems that use a bus control system
signal-processing IC. This IC can directly drive (including the DC component) the deflection yoke from the sawtooth wave output
from the bus control system signal-processing IC. The color TV vertical deflection system adjustment function can be controlled
from the bus system when this IC is used in conjunction with a SANYO LA768X or LA769XX series TV bus control system signal-
processing IC.
The LA7840 provides a maximum deflection current of 1.8 A p-p, and thus is optimal for small to medium diameter CRTs.
Adjustment-free horizontal resonator system
Simplified SG
Supply voltage: V
Package: DIP54S (600mil), QIP80E (14 20) (LA76835NM only)
= 5 V/9 V
CC
Functions
Low power operation achieved by using integrated charge pump circuit
Vertical output circuit
Thermal protection circuit
Functions and Features
Excellent crossover characteristics
Supports DC coupling
Package: SIP7H
VIF/SIF
· Adjustment-free VCO, buzz canceller
· RF AGC/video level/FM level control
Black stretch, sharpness control with coring on/off control, built-in variable Y system filters (Y-DL and chrominance trap)
Chrominance bandpass filter, demodulation angle control
Block Diagram
SVO
FBP
IN
HS
VS
V/C
5V
V
Block Diagram
CC
S CARRIER OUT
EXT
AUDIO
IN
FSC X-RAY
I IN-V IN
[S-C IN]
EXT-V IN
[Y-IN]
VIDEO
OUT
+
CCD/
HOR
GND
V/C
GND
+
REF
+
+
VCO
+
+
+
+
+
+
51
54
53
52
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
Pump UP
Thermal
Protection
CLMP
CLMP
A2C
PLL
FBP
BPF
X-RAY
VXO
CW
VIDEO
AMP
SPLL
HOR
VCO
RESET
-
VIDEO
SW
FILTER
ADJ
APC1
TINT
AMP
SND
TRAP
BPF
BPF
(BYPASS)
1/256
SW
TRAP
+
LIM
HOR
C/D
AOC
KIL
AMP
COLOR
CLAMP
AFT
DEMO
DELAY
LINE
VIDEO
DET
SYNC
SEP
AFC1
DC
REST
WPL
BLACK
STRETOH
PEAKING
CORING
RGB
MATRIX
FM
DET
CONTRAST
BRIGHT
VER
SEP
AFC2
IF AGC
OSD
SW
VIF
PHASE
SHIFTER
VER
C/D
OSD
FIX GAIN
SW
1
2
3
4
5
6
7
HOR
OUT
BUS
ABL
13
RF AGC
C_SYNC
OUT
VER
HOR
VCC
DC
DRIVE/OUT-OFF
RAMP
VOL
CLAMP
15
1
2
3
4
5
6
7
8
9
10
11
12
14
16
17
18
19
20
21
22
23
24
25
26
27
+
+
V
CC
+
AUDIO OUTPUT
+
SAW
FILTER
R
G
B
SYNC VER
HOR
OUT
IF
OUT OUT OUT OUT OUT
V
5V
CC
R
IN
G
IN
B
IN
FB
IN
RGB
ABL
RF AGC
V
9V
HOR
9V
AFT
CC
IF IN
V
CC
SANYO TV . VCR
SANYO TV . VCR
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Vertical Output IC
Vertical Output IC
LA7841
LA7845N
Overview
Overview
The LA7841 is a vertical deflection output IC for high-definition TV and CRT displays in systems that use a bus control system
signal-processing IC. This IC can directly drive (including the DC component) the deflection yoke from the sawtooth wave output
from the bus control system signal-processing IC. The color TV vertical deflection system adjustment function can be controlled
from the bus system when this IC is used in conjunction with a SANYO LA768X or LA769XX series TV bus control system
signal-processing IC.
The LA7845N is a vertical deflection output IC for high-definition TV and CRT displays in systems that use a bus control system
signal-processing IC. This IC can directly drive (including the DC component) the deflection yoke from the sawtooth wave output
from the bus control system signal-processing IC. The color TV vertical deflection system adjustment function can be controlled
from the bus system when this IC is used in conjunction with a SANYO LA768X or LA769XX series TV bus control system
signal-processing IC.
The LA7841 provides a maximum deflection current of 2.2 A p-p, and thus is optimal for large diameter CRTs.
The LA7845N provides a maximum deflection current of 2.2 A p-p, and thus is optimal for large diameter CRTs, and can drive the
CRTs used in TV sets in the 33 to 37 inch range.
Functions
Functions
Low power operation achieved by using integrated charge pump circuit
Vertical output circuit
Low power operation achieved by using integrated charge pump circuit
Vertical output circuit
Thermal protection circuit
Thermal protection circuit
Excellent crossover characteristics
Supports DC coupling
Excellent crossover characteristics
Supports DC coupling
Package: SIP7H
Package: SIP7H
Block Diagram
Block Diagram
Pump UP
Thermal
Pump UP
Thermal
Protection
Protection
-
-
AMP
+
AMP
+
1
2
3
4
5
6
7
1
2
3
4
5
6
7
SANYO TV . VCR
SANYO TV . VCR
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Vertical Output IC
Vertical Output IC
LA78040
LA7846N
Overview
Overview
The LA78040 is a vertical deflection output IC for high-definition TV and CRT displays in systems that use a bus control system
signal-processing IC. This IC can directly drive (including the DC component) the deflection yoke from the sawtooth wave output
from the bus control system signal-processing IC. The color TV vertical deflection system adjustment function can be controlled
from the bus system when this IC is used in conjunction with a SANYO LA768X or LA769XX series TV bus control system signal-
processing IC.
The LA7846N is a vertical deflection output IC for high-definition TV and CRT displays in systems that use a bus control system
signal-processing IC. This IC can directly drive (including the DC component) the deflection yoke from the sawtooth wave output
from the bus control system signal-processing IC. The color TV vertical deflection system adjustment function can be controlled
from the bus system when this IC is used in conjunction with a Sanyo LA768X or LA769XX series TV bus control system signal-
processing IC.
The LA78040 provides a maximum deflection current of 1.8 A p-p, and thus is optimal for small to medium diameter CRTs.
The LA7846N provides a maximum deflection current of 3.0 A p-p, and thus is optimal for large diameter CRTs, and can drive the
CRTs used in TV sets in the 33 to 37 inch range.
Functions
Functions
Low power operation achieved by using integrated charge pump circuit
Vertical output circuit
Low power operation achieved by using integrated charge pump circuit
Vertical output circuit
Thermal protection circuit
Thermal protection circuit
Excellent crossover characteristics
Supports DC coupling
Excellent crossover characteristics
Supports DC coupling
Package: SIP10H
Package: TO220-7H
Block Diagram
Block Diagram
Pump UP
Thermal
Pump UP
Thermal
Protection
Protection
-
-
AMP
+
AMP
+
1
2
3
4
5
6
7
1
2
3
4
5
6
7
8
9
10
SANYO TV . VCR
SANYO TV . VCR
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Vertical Output IC
Vertical Output IC
LA78041
LA78040N
Overview
Overview
The LA78040N is a vertical deflection output IC for high-definition TV and CRT displays in systems that use a bus control system
signal-processing IC. This IC can directly drive (including the DC component) the deflection yoke from the sawtooth wave output
from the bus control system signal-processing IC. The color TV vertical deflection system adjustment function can be controlled
from the bus system when this IC is used in conjunction with a SANYO LA768X or LA769XX series TV bus control system
signal-processing IC.
The LA78041 is a vertical deflection output IC for high-definition TV and CRT displays in systems that use a bus control system
signal-processing IC. This IC can directly drive (including the DC component) the deflection yoke from the sawtooth wave output
from the bus control system signal-processing IC. The color TV vertical deflection system adjustment function can be controlled
from the bus system when this IC is used in conjunction with a SANYO LA768X or LA769XX series TV bus control system
signal-processing IC.
The LA78040N provides a maximum deflection current of 1.7 A p-p, and thus is optimal for small to medium diameter CRTs.
The LA78041 provides a maximum deflection current of 2.2 A p-p, and thus is optimal for large diameter CRTs.
Functions
Functions
Low power operation achieved by using integrated charge pump circuit
Vertical output circuit
Low power operation achieved by using integrated charge pump circuit
Vertical output circuit
Thermal protection circuit
Thermal protection circuit
Excellent crossover characteristics
Supports DC coupling
Excellent crossover characteristics
Supports DC coupling
Package: TO220-7H
Package: TO220-7H
Block Diagram
Block Diagram
Pump UP
Thermal
Pump UP
Thermal
Protection
Protection
-
-
AMP
AMP
+
+
1
2
3
4
5
6
7
1
2
3
4
5
6
7
SANYO TV . VCR
SANYO TV . VCR
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Vertical Output IC
Vertical Output ICs
LA7875N/76N
LA78045
Overview
Overview
The LA78045 is a vertical deflection output IC for high-definition TV and CRT displays in systems that use a bus control system
signal-processing IC. This IC can directly drive (including the DC component) the deflection yoke from the sawtooth wave output
from the bus control system signal-processing IC. The color TV vertical deflection system adjustment function can be controlled
from the bus system when this IC is used in conjunction with a SANYO LA768X or LA769XX series TV bus control system
signal-processing IC.
The LA7875N and LA7876N were developed for Internet TVs and high-definition TVs that require a narrow vertical retrace period.
In these products, SANYO succeeded in achieving a narrow vertical retrace period by adopting a new 3_ step-up charge pump circuit.
Since this allows the supply voltage to be lowered relative to the earlier 2_ step-up ICs, it achieves significantly lower power in end
product designs.
Furthermore, since this IC can directly drive (including the DC component) the deflection yoke from the sawtooth wave output from
the bus control system signal-processing IC, the shift operation required by wide-screen TV sets can be controlled over the bus control
system.The LA7875N provides a maximum deflection current of 2.2 A p-p, and thus is optimal for medium diameter CRTs, and the
LA7876N provides a maximum deflection current of 3.0 A p-p, and thus is optimal for large diameter CRTs.
The LA78045 provides a maximum deflection current of 2.2 A p-p, and thus is optimal for large diameter CRTs, and can drive the
CRTs used in TV sets in the 33 to 37 inch range.
Functions
Functions
Low power operation achieved by using integrated charge pump circuit
Vertical output circuit
3
voltage step up charge pump circuit
Low power operation
Thermal protection circuit
Excellent crossover characteristics
Supports DC coupling
Operational amplifier type vertical output circuit
Supports DC direct coupling deflection yoke drive
Excellent crossover characteristics
Packages: LA7875N: SIP10HD
LA7876N: SIP10H
Package: TO220-7H
Block Diagram
Block Diagram
Pump UP1
Pump UP
Thermal
Protection
-
-
AMP
+
Pump UP2
AMP
+
1
2
3
4
5
6
7
8
9
10
1
2
3
4
5
6
7
SANYO TV . VCR
SANYO TV . VCR
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Vertical Output ICs
Vertical Output IC
LA7847/48
LA7849
Overview
Overview
The LA7847 and LA7848 are EW drive and vertical deflection output ICs for high-definition TV and CRT displays in systems that
use a bus control system signal-processing IC. These ICs can directly drive (including DC component) the deflection yoke from the
sawtooth wave output from the bus control system signal-processing IC. Similarly, the diode modulator block can be driven from the
parabolic wave output.
The color TV vertical deflection system and EW adjustment functions can be controlled from the bus system when either of these ICs
is used in conjunction with a Sanyo LA768X or LA769XX series TV bus control system signal-processing IC. The LA7847 provides
a maximum output block voltage of 72 V, a maximum deflection current of 2.2 A p-p, and an EW drive current of 0.4 A, and thus is
optimal for large diameter CRTs. The LA7848 provides a maximum output block voltage of 92 V, a maximum deflection current of
2.2 A p-p, and an EW drive current of 0.4 A, and thus is optimal for large diameter CRTs.
The LA7849 is an EW drive and vertical deflection output IC for high-definition TV and CRT displays in systems that use a bus
control system signal-processing IC. This IC can directly drive (including the DC component) the deflection yoke from the sawtooth
wave output from the bus control system signal-processing IC. Similarly, the diode modulator block can be driven from the parabolic
wave output.The color TV vertical deflection system and EW adjustment functions can be controlled from the bus system when this
IC is used in conjunction with a Sanyo LA768X or LA769XX series TV bus control system signal-processing IC.
The LA7849 provides a maximum output block voltage of 92 V, a maximum deflection current of 2.2 A p-p, and an EW drive current
of 0.4 A, is provided in an SIP10H package, and thus is optimal for large diameter CRTs.
Functions
Functions
Built-in charge pump circuit for low power operation
Vertical output circuit
Built-in charge pump circuit for low power operation
Vertical output circuit
Excellent crossover characteristics
Supports DC coupling
Excellent crossover characteristics
Supports DC coupling
EW drive circuit
EW drive circuit
Package: SIP10HD
Package: SIP10H
Block Diagram
Block Diagram
Pump UP
Pump UP
-
-
+
+
AMP
AMP
-
-
+
+
1
2
3
4
5
6
7
8
9
10
1
2
3
4
5
6
7
8
9
10
SANYO TV . VCR
SANYO TV . VCR
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LC863 Series
2
Flash E PROM Microcontroller Series
LC86 Series (TV Microcontrollers) Product Lineup
New product
LC86F3A48A
LC86F3B48A
LC863AXX (NTSC)
36-pin products
Display RAM
: 352 9 bits
Overview
LC863BXX (PAL)
The LC863 Series products are high functionality high-speed 8-bit CMOS single-chip microcontrollers that provide OSD functionality.
Since SANYO provides a full series of flash ROM versions instead of the earlier erasable EPROM and one-time programmable
PROM versions, this series can easily respond to needs for rapid specification changes during mass production ramp up and for
specification changes by target application. In addition to the large-capacity display RAM, the LC863 Series products provide a high-
performance OSD function that features increased CGROM capacity and supports simple graphics functions.
Since the LC8638XX, LC8632XX (DIP42, QFP48), LC863AXX, and LC8634XX (DIP36, SOP36) provide a built-in caption data
slicer circuit, they can implement, in a single chip, end products that provide caption, XDS (Extended Data Service), and Vchip
functions. Although the LC8633XX, LC8635XX, and LC863BXX do not include the built-in caption data slicer circuit, they are
essentially pin and function compatible with the LC8632XX, LC8634XX, and LC863AXX. This allows creation of a unified chassis
for NTSC and PAL format products.
RAM
640 × 8 bits
LC86F3448A
LC86F3548A
LC8634XX (NTSC)
36-pin products
Display RAM
: 176 9 bits
LC8635XX (PAL)
RAM
RAM
512 × 8 bits
640 × 8 bits
LC86F3864A
LC8638XX (NTSC/PAL)
Since these series products are available in not only a DIP package, but in a flat package as well, they can contribute to end product
chassis miniaturization.
468 × 8 bits
LC86F3264A
LC86F3364A
42-pin products
Display RAM
: 352 9 bits
LC8632XX (NTSC)
LC8633XX (PAL)
Functions
ROM: 16 to 64K bytes
(The 36-pin versions have a maximum of 48K bytes.)
CGROM: 16K bytes
RAM: 512 to 768 bytes
Display RAM: 352 9 bits
OSD function
· 36 characters 8 lines (The LC8635XX models only support 4 lines.)
· Number of 16 32 dot characters: 252 characters
(The number of characters can be expanded by using some characters
as divided characters.)
RAM
512 × 8 bits
640 × 8 bits
(The LC8635XX models have 176 9 bits.)
16-bit timer/counter circuit
· Display colors: 16 colors
· Simple graphics function
ROM
16
20
24
28
32
40
48
56
64 KB
PWM generator/16-bit timer circuit
Clock time base timer
Watchdog timer (Uses an external RC circuit)
8-bit synchronous serial interface (in 42-pin versions)
Multi-master I2C bus serial interface
Remote control receiver circuit
Cells consisting of 16 16 dots can be formed from 4 colors.
· Extensive set of control functions that operate on a line basis
1. Vertical and horizontal position
2. Character size: Ten character sizes, including 1.5 in the horizontal
direction, and 0.5 in the horizontal and vertical directions.
3. Character pitch
4. Display start or end line (shutter function)
Data slicer function (LC8632XX, LC8634XX, and LC863AXX)
· Extracts closed caption and XDS data
· NTSC or PAL selectable and line can be specified
· ROM correction function
LC86F3448A TV Flash Microcontroller
Data slicer
(Variable Line)
XDS
RAM: 640 bytes
+
Three 7-bit PWM output circuits
Four-channel 8-bit A/D converter
(The 36-pin versions have a 6-bit converter.)
I/O ports: Up to 29 pins
(Extended Data Service)
Vchip functions
Display RAM: 352 9 bits
High functionality OSD
Characters in font: 252 (maximum)
36 character 8 lines (maximum)
Simple graphics functions
Shutter function
Powerful interrupt function
DIP36S (400mil)
· 16 interrupt sources with 10 vector locations (LC8632XX)
· Multiple interrupts supported using three interrupt levels
Standby function (halt and hold modes)
High-speed operation
Scrolling function
Three 7-bit PWM channels
MFP36SD (375mil)
And other functions
· Minimum cycle time: 0.848 µs (bus cycle: 0.424 µs)
Powerful highly symmetric instruction set shared with the
LC86 Series.
· Number of instructions: 68
64 KB flash memory
Four-channel
48 KB (program area)
16 KB (character font area)
6-bit A/D
converter
Multi-master support
I2C bus
serial interface
ROM correction
function
Onboard
programming
16-bit timer/counter
These flash memory products are manufactured and sold by SANYO Electric Co., Ltd. under license from
Silicon Storage Technologies, Inc. (SST).
SANYO TV . VCR
SANYO TV . VCR
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TV Control Microcontrollers
TV Control Microcontrollers
LC8632/34/38/3A Series (NTSC)
LC8633/35/3BXX Series (PAL)
Overview
Overview
The LC8632/LC8634/LC8638/LC863A Series are closed caption TV control 8-bit microcontrollers that integrate an extensive set of
peripheral functions around a CPU core that operates with a minimum cycle time of 0.424 µs. The peripheral functions include 16 to
64 KB of program ROM, 16 KB of CGROM, 384 to 640 bytes of RAM, 352 9 bits of CRT display RAM, as well as 16-bit timer/
counter, PWM, A/D converter, I2C bus compatible serial interface, closed caption data slicer, and closed caption OSD circuits.
These microcontrollers can implement TV control and closed caption display in a single chip.
The LC8633/LC8635/LC863BXX Series are TV control 8-bit microcontrollers that integrate an extensive set of peripheral functions
around a CPU core that operates with a minimum cycle time of 0.424 µs. The peripheral functions include 16 to 64 KB of program
ROM, 16 KB of CGROM, 384 or 512 bytes of RAM, 176 or 352 9 bits of CRT display RAM, and two 16-bit timer/counter circuits,
as well as PWM, A/D converter, I2C bus compatible serial interface, and OSD circuits.
These microcontrollers can implement TV control in a single chip.
Functions
Functions
OSD function
OSD function
· Screen display: 36 characters 16 lines (supported in software)
· Screen display: 36 characters 8 lines (supported in software)
· Number of characters: 252 characters in a 16 32 dot font (Of these, 4 characters including one test character are fixed.)
· Simple graphics function (A font in which a single character is 16 16 dots and can be painted with 4 colors)
I2C bus multi-master serial interface: One built-in circuit with two sets of pins
Flash memory versions are available for each series and allow onboard programming
· Number of characters: 252 characters in a 16 32 dot font (Of these, 4 characters including one test character are fixed.)
· Simple graphics function (A font in which a single character is 16 16 dots and can be painted with 4 colors)
I2C bus multi-master serial interface: One built-in circuit with two sets of pins
Flash memory versions are available for each series and allow onboard programming
Block Diagram
Block Diagram
Interrupt control
Interrupt control
Standby control
IR
IR
PLA
PLA
ROM
ROM
Standby control
X'tal
RC
X'tal
RC
VCO
VCO
PLL
PC
PLL
PC
I2C
ROM correction
ROM correction
I2C
ACC
ACC
control
control
Register B
Register C
Register B
Register C
XRAM
XRAM
SIO 0
Timer 0
Timer 1
SIO 0
Bus
interface
Bus
interface
Timer 0
Port 1
Port 1
Timer 1
ALU
ALU
Clock time
base timer
Clock time
base timer
Port 6
Port 7
Port 8
Port 6
Port 7
Port 8
PSW
RAR
PSW
RAR
ADC
ADC
INT0 to INT3
noise rejection filters
INT0 to INT3
noise rejection filters
RAM
RAM
PWM
PWM
Stack pointer
Stack pointer
Data slicer
CGROM
CGROM
OSD
control
circuit
control
OSD
control
circuit
control
Port 0
Port 0
VRAM
VRAM
Watchdog timer
Watchdog timer
LC8632 Series
LC8633 Series
SANYO TV . VCR
SANYO TV . VCR
37
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VHS Fo r m a t VCR
VHS Fo r m a t VCR
At the samme time as pproviding high quality and hhigh reliabbilitty withh adjustment--free ICs,
SANYO is striving for even further reductions in mounting area by incorporating even
more peripheral components in the IC itself and by increasing integration densities.
Sys t e m Ch ip Se t
Sys t e m Ch ip Se t
Hig h q u a lit y a n d h ig h re lia b ilit y a ssu re d b y a d ju st m e n t -fre e t e ch n o lo g y
New product
Partially adjustment-free,
high functionality
Development
Low-Power Design
High fidelity signal
processing with built-in
canal switch.
P 47
LA7567BM/BVA
Tuner
Mixer+OSC.
P 48
LA75676VA
P 41
LA79106V
P 49
LA75665NM/NV
Mixer+OSC.+PLL
P 42
LV4512V
P 50
LA72648M
Fully adjustment-free
operation achieved
VIF/SIF
Built-in high-fidelity head amplifier
Number of peripheral components reduced
Input capacitors eliminated
Built-in canal switch
Audio output
P 43
LA75503V
High fidelity
signal processing
LA72648M(PAL)
LA72670M(US)
LA72680M(JPN)
P 43
P 44
LA75503V
LA75505M
LA75520VA
LA75525VA
LA7567BM/BVA
LA75676VA
P 44
LA75505M
LA75520VA
LA75525VA
Cylinder
motor
Capstan
motor
P 50
P 52
P 45
P 46
P 45
P 46
High fidelity signal
processing with built-in SIF
and audio demultiplexer
External
audio
P 51
P 47
P 49
input
PAL multiformat: LA75503V, LA75520VA
NTSC: LA75505M, LA75525VA
P 48
LA75665NM/NV
Audio
LA72670M(US)
LA72680M(JPN)
P 51
P 52
Built-in sync separator and
EDS circuits
Video and audio
signal processing
LA71206M/7M
LA71750EM
LA71730EM
Built-in high-fidelity head amplifier
Audio demultiplexer
External
video input
P 53
Built-in sync separator circuit
OSD function with EDS function
3in1 IC
P 54
P 55
P 63
P 63
LB11885 (High voltage)
LB11884 (Low voltage)
P 57
LC74785/M
PWM capstan
+
Built-in EDS
On-screen
display
LC74785/M
LC74789/M/JM
LC74776/M
sensorless drum
+
loading motor drive
Built-in sync separator
circuit OSD
SECAM color
signal processing
P 57
P 58
P 58
P 56
P 59
LA70100M
LC74789/M/JM
P 60
LC74793/JM
Support for the NTSC, PAL, PAL-N, PAL-M,
NTSC 4.43, and PAL60 formats
Sync separator circuit
Built-in CCD delay line and Head Amplifier
RF modulator
LA7161NM/NV
System-on-chip H.A, YCA, Canal switch
+ CCD AV signal-processing IC
Video output
P 61
RF output
12 18 dot font
P 62
LA77000V
P 53
LA71206M/7M(NTSC)
Built-in sync separator
circuit OSD function with
VPS/PDC functions
P 54
LA71750EM(PAL)
P 55
LA71730EM(Multi)
SECAM color signal
processing
P 59
LC74776/M
Built-in CCD delay line
All filters built in
VHF band RF modulator
Record and playback head amplifiers
Fully adjustment free
PAL/SECAM discrimination circuit
: LA71750EM/71730EM
Canal switch
Built-in VPS and PDC
P 61
LA7161NM/NV
P 56
LA70100M
VPS/PDC IC
P 62
LA77000V
Built-in bell filters
: LA71750EM/71730EM
LC74793/JM
P 60
Number of peripheral components reduced
PLL control
I2C bus support
Extensive Lineup Provides Full System Support
VCR Microcontrollers: LC870200 Series
Power Supply Systems
Power Supply System Peripreral Transistors
VHF/UHF Tuner Transistors
Low saturation voltage power supplies: L88MSOOT series
On/off function
Multifunction power supplies: LA56XX series
Satellite broadcast tuner power supplies: LA5606N/LA5607N
Software and servo functions
Built-in control amplifier
VPS, PDC, and XDS data slicer
OSD
High breakdown voltage MOSFET series
Ultralow on-resistance MOSFET series
Ultraminiature light weight PicoMOSTM series
Ultralow saturation voltage MBIT-II transistor series
Low VF Schottky barrier diode series
PicoTR series
High-frequency MOSFET series
High-frequency transistor series (fT = 1 to 6 GHz)
PicoGET series
15GNO1M, 55GNO1M
Flash version: LC87F02C8A
SANYO TV . VCR
SANYO TV . VCR
39
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Tuner IC
Tuner IC
LA79106V
LV4512V
Overview
Overview
The LV4512V integrates local oscillator circuits for the VHF and UHF bands, mixers, an IF amplifier, and a PLL circuit for tuning
on a single chip. It is controlled using an I2C bus.
The LA79106V is a voltage synthesized tuner IC that integrates mixers for three bands (VHF (low), VHF (high), and UHF) and an
oscillator circuit on a single chip.
Functions
Functions
Double balanced mixer (base input): VHF (low)
Double balanced mixers (emitter input): VHF (high) and UHF
Lo output pin
PLL circuit for tuning
I2C bus control
Frequency steps (31.25, 50, and 62.5 kHz when a reference frequency of 4 MHz is used)
Four on-chip Banol switches
Can be controlled at any one of four I2C bus addresses
Built-in mixer and oscillator regulator
Supply voltage: V
= 5 V
Package: SSOP24 (275 mil)
CC
Supply voltage: V
= 5 V
Package: SSOP30 (275mil)
CC
Block Diagram
Block Diagram
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
24
23
22
21
20
19
18
17
16
15
14
13
VHFL
UHF
VHFH
REG
9
1
2
3
4
5
6
7
8
10
11
12
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
SANYO TV . VCR
SANYO TV . VCR
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VIF/SIF Signal-Processing Circuit
VIF/SIF Signal-Processing Circuit
LA75503V
LA75505M
Overview
Overview
The LA75505M is a completely adjustment-free NTSC VIF/SIF signal-processing IC for TV sets and VCRs.
It supports IF frequencies of 45.75 and 58.75 MHz.
It integrates both audio carrier trap and audio carrier bandpass filters on chip and thus is optimal for compact light weight tuners.
A reference frequency of 4 MHz is used for the adjustment-free circuits, and the VCO, AFT, and audio filters are controlled either by
a crystal oscillator circuit or an external clock input.
The LA75503V is a completely adjustment-free PAL VIF/SIF signal-processing IC for TV sets and VCRs.
It supports IF frequencies of 38, 38.9, and 39.5 MHz. It also provides on-chip audio carrier trap, and audio carrier bandpass filters to
support PAL multisystem audio (M/N, B/G, I, and D/K). A reference frequency of 4 MHz is used for the adjustment-free circuits,
and the VCO, AFT, and audio filters are controlled either by a crystal oscillator circuit or an external clock input.
Functions and Features
Functions and Features
The built-in VCO has been made adjustment free so that VCO coil adjustment
is not required.
The integration on the same chip of the audio bandpass filter and trap make
implementation of end products that support PAL multisystem audio easy
and low cost.
The built-in VCO has been made adjustment free so that VCO coil adjustment
VIF amplifier
VIF amplifier
VCO adjustment-free PLL detection circuit
Digital AFT circuit
RF AGC
is not required.
VCO adjustment-free PLL detection circuit
The integration on the same chip of the audio bandpass filter and trap
Digital AFT circuit
significantly reduces the number of required peripheral components for lower
RF AGC
Buzz canceller
total costs.
Buzz canceller
Achieves a significant reduction in the number of required peripheral
components
Obviates the problem of AFT tolerances by adopting a digital AFT system
Package: SSOP30 (275 mil)
Obviates the problem of AFT tolerances by adopting a digital AFT system
Equalizer amplifier
Package: MFP24S (300mil)
Audio carrier bandpass filter
Audio carrier trap
PLL FM detector
Equalizer amplifier
Audio carrier bandpass filter
Audio carrier trap
PLL FM detector
Reference signal generator
Reference signal generator
Block Diagram
Block Diagram
IF INPUT
0.01µF
OPEN : PAL
GND : NT
2.2k
Ω
V
V
(5V)
(9V)
CC
IF INPUT
SAW(S)
10kΩ
IF INPUT
30kΩ
0.01µF
6.8kΩ
2SC3134
CC
0.01µF
V
V
(5V)
(9V)
CC
2.2k
Ω
100k
Ω
0.01
µ
F
0.01
µF
RF AGC OUT
SAW(S)
30k
Ω
CC
0.01
µF
AUDIO OUT
7.5k
+
100
µ
F
0.1µ
F
Ω
1µF
3kΩ
0.01µF
47kΩ
47kΩ
RF AGC OUT
+
0.022
µF
SAW(P)
0.01µ
F
10K-B
+
1000pF
0.1µF
100µF
AFT OUT
1
µ
F
3kΩ
1µF
0.022µF
24
23
22
21
20
19
18
17
16
15
14
13
47kΩ
47kΩ
+
+
0.01µF
SAW(P)0.01
µF
10K-B
1000pF
AUDIO OUT
AFT OUT
FM
DET
30
29
28
27
26
NE
25
24
23
22
21
20
19
NE
18
17
16
S
PLL
DEEMPHA
FM
FM
DET
VIF
AMP
1 st
AMP
DET
AFT
AMP
IF
AGC
AGC
VIF
AMP
1 st
AMP
FM
DET
S
PLL
FIL
CONT
IF
AGC
AGC
AFT
AMP
VIDEO
DET
APC
DET
1 stSIF
DET
LIM
AMP
FIL
CONT
VIDEO
DET
APC
DET
1 stSIF
DET
LIM
AMP
BPF
AMP
SW
BPF
AMP
SW
TRAP
EQ
AMP
LPF
VCO
FLL
LPF
EQ
AMP
TRAP
VCO
FLL
BPF
PAL SW
BPF
V
: 39.5MHz
CC
NE
NC
OPEN : 38.9MHz
GND : 38.0MHz
1
2
3
4
5
6
+
7
8
9
10
11
12
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
IF SW
OPEN : 45.75MHz
GND : 58.75MHz
+
+
220kΩ
3kΩ
1
µ
F
1µF
2kΩ
+
+
220k
Ω
1µF
1µF
2kΩ
1
µ
F
300kΩ
0.01µF
0.01µF
A
B
SW
3k
Ω
VCO COIL
+
SYSTEM
0.01µF
330kΩ
4MHz X tal
1
µ
F
VCO COIL
300k
Ω
4MHz X tal
39pF
39pF
VIDEO OUT
VIDEO OUT
39pF
10µH
CARRIER OUT
SANYO TV . VCR
SANYO TV . VCR
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VIF/SIF Signal-Processing Circuit
VIF/SIF Signal-Processing Circuit
LA75520VA
LA75525VA
Overview
Overview
The LA75525VA is a completely adjustment-free NTSC VIF/SIF IC for TV sets and VCRs. It supports IF frequencies of 45.75 and
58.75 MHz. It integrates an automatic adjustment circuit for the VCO, an AFT circuit, and an audio carrier trap circuit on the same
chip and requires the input of either a 4 MHz or 3.58 MHz reference signal.
The LA75520VA is a completely adjustment-free PAL VIF/SIF IC for TV sets and VCRs. It supports IF frequencies of 38, 38.9,
and 39.5 MHz. It integrates an automatic adjustment circuit for the VCO, an AFT circuit, and an audio carrier trap circuit on the
same chip and requires the input of either a 4 MHz or 4.43 MHz reference signal.
Functions
Functions
Automatic adjustment VCO (no external VCO coil is required)
Built-in audio carrier trap supports the B/G, I, D/K, and M/N audio systems
Digital AFT adopted
Automatic adjustment VCO (no external VCO coil is required)
Built-in audio carrier trap; an external circuit may be used if desired
Digital AFT adopted
Package: SSOP24 (275mil)
FM radio receiver function
Package: SSOP24 (225mil)
Block Diagram
Block Diagram
VIF/SIF
INPUT
SOUND CARRIER
OUTPUT
RF AGC
OUTPUT
VIF/SIF
INPUT
SOUND CARRIER
OUTPUT
RF AGC
OUTPUT
*(Number)for VQFN
*(Number)for VQFN
V4
V3
V2
V1
SW15
AUDIO
OUTPUT
SAWF(P)
SAWF
(S)
SAWF(P)
AUDIO
OUTPUT
SAWF
(S)
SW15
1µF
1µF
0.022µF
0.01µF
0.022µF
SW13
SW13
1µF
24
23
22
21
20
19
18
17
16
15
14
13
24
23
22
21
20
19
18
17
16
15
14
13
(24)
(23)
(22)
(21)
(20)
(19,18)
(17)
(16)
(15)
(14)
(13)
(12)
(24)
(23)
(22)
(21)
(20)
(19,18)
(27)
(16)
(15)
(14)
(13)
(12)
RF
RF
AGC
VIF
AMP
AGC
VIF
AMP
1 stSIF
AMP
DE-
1 stSIF
AMP
TRAP
EMP
AMP
IF
AGC
IF
AGC
AGC
AGC
VIDEO
DET
SPLI
INT
VIDEO
DET
SPLI
INT
AMP
AMP
VCO
FM
DET
VCO
FM
DET
AFT
TRAP
EXT
AFT
LIM
AMP
TRAP
SW
APC
TV
SW
TV
INT
APC
SIF
AMP
LIM
MODE
CTRL
FM
MODE
CTRL
AMP
APC
EQ
FM
(6)
EQ
AMP
AMP
AGC
(25)
(26)
(27)
(1,2)
(3)
(4)
(5)
(6)
(8)
(9)
(10)
(11)
(25)
(26)
(27)
(1,2)
(3)
(4)
(5)
(8)
(9)
(10)
(11)
1
2
3
4
5
6
7
8
9
10
11
12
AFT OUTPUT
1
2
3
4
5
6
7
8
9
10
11
12
AFT OUTPUT
0.47µF
1µF
150kΩ
1000P
V
SW10
CC
1000P
V
330P
SW10
V3
V2
V1
1000P
SW11
270k
CC
V4
V3
V2
SW11
270k
4.5M
BPF
15µ
F
Ω
330kΩ
Ω
330
Ω
V1
VIDEO
OUTPUT
SYSTEM SW
A
SYSTEM SW
B
4.43/4MHz
VIDEO
OUTPUT
3.58/4MHz
TV/FM
VIF FREQ
SANYO TV . VCR
SANYO TV . VCR
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VIF/SIF Signal-Processing Circuit
VIF/SIF Signal-Processing Circuit
LA7567BM/BVA
LA75676V/676VA
Overview
Overview
The LA7576V and LA7576VA are NTSC intercarrier VIF/SIF ICs that adopt a partially adjustment-free circuit structure.
The LA7567VA is provided in a SSOP24 (225 mil, 0.5 mm lead pitch) package that is optimal for miniature 2-in-1 tuners.
The VIF block adopts a technique that makes AFT adjustment unnecessary by adjusting the VCO, thus simplifying the adjustment
process. PLL detection is adopted for FM detection.
The supply voltage is the same 5 V used in multimedia systems. In addition, an on-chip buzz canceller suppresses Nyquist buzz for
superb audio quality.
The LA7567MB and LA7567BVA are PAL/NTSC multi-system VIF/SIF ICs that adopt a partially adjustment-free circuit structure.
The LA7567BMV is provided in an SSOP24 (225 mil, 0.5 mm lead pitch) package that is optimal for miniature 2-in-1 tuners.
The VIF block adopts a technique that makes AFT adjustment unnecessary by adjusting the VCO, thus simplifying the adjustment
process. PLL detection is adopted for FM detection to handle audio multipath detection. These ICs include a on-chip SIF converter,
making design of multi-system products easier. The supply voltage is the same 5 V used in multimedia systems. In addition, an
on-chip buzz canceller suppresses Nyquist buzz for superb audio quality.
These products provide improved video and audio signal-to-noise ratios and improved video signal amplitude as compared to the
LA7567N/NM.
Functions and Features
Functions and Features
VIF amplifier
PLL detector
BNC
AGC
Multi SFI converter
Limiter amplifier
PLL FM detector
Limiter amplifier
PLL FM detector
The AFT and SIF require no coils and are adjustment free
Built-in buzz canceller for excellent audio characteristics
VIF amplifier
PLL detector
BNC
RF AGC
RF AGC
Equalizer amplifier
AFT
IF AGC
The AFT and SIF require no coils and are adjustment free
PAL/NTSC multiformat audio systems can be implemented easily
Built-in buzz canceller for excellent audio characteristics
V
= 5 V, low-power operation
Equalizer amplifier
AFT
IF AGC
CC
Packages: LA7576VA: SSOP24 (225mil)
LA7576V: SSOP24 (275mil)
Buzz canceller
First SIF
First SIF detector
V
= 5 V, low-power operation
Buzz canceller
CC
Packages: LA7567BM: MFP24S (300mil)
LA7567BVA: SSOP24 (225mil)
Block Diagram
Block Diagram
RF AGC
OUT
IN PUT
4.5MHz
OUT
IN PUT
TSF5220
9V
120k
SAW
(S)
RF AGC
OUT
30k
1000pF
0.01
Ω
0.01µF
5.6kΩ
7.5kΩ
SAW(P)
SAW(P)
+
F
+
100k
Ω
Ω
AFT OUT
AF OUT
AF OUT
GND
1µ
F
1
µ
µ
F
AFT
OUT
(M)
0.015
0.01
(M)
µ
F
GND
1kΩ
(M)
0.022
10kΩ
-B
µF
0.01µF
100k
µF
24
23
22
21
20
19
18
17
16
15
14
13
24
23
22
21
20
19
18
17
16
15
14 VCC 13
LIF
AMP
1st
AMP
RF
AGC
IF
AGC
AGC
FM
DET
FM
DET
VIF
AMP
RF
AGC
IF
AGC
VIDEO
DET
1st
DET
AFT
AFT
VIDEO
DET
120k
LIM
AMP
HPF
6 bB
LIM
AMP
HPF
HPF
MIX
HPF
VCO
VCO
EQ
AMP
EQ
AMP
1
2
3
4
5
6
7
8
9
10
11
12
1
2
3
4
5
6
7
8
9
10
11
12
+
+
+
+
µF
+
µF
1
µ
F
1
µ
F
10kΩ
150
Ω
0.47µ
F
0.47µ
F
100
0.01µ
F
1
0.01µ
F
330
Ω
330
Ω
BPF
560Ω
BPF
4.5 MHz
15
µ
H
15
µ
H
330Ω
330Ω
V
V
CC
CC
GND
GND
2.2kΩ
2.2kΩ
VIDEO
OUT
VIDEO OUT
SANYO TV . VCR
SANYO TV . VCR
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VIF/SIF Signal-Processing Circuit
PAL Hi-Fi Audio Signal Record
and Playback Processing
LA75665NM/NV
LA72648M
Overview
Overview
The LA75665NM and LA75665NV are PAL/NTSC multi-system VIF/SIF ICs that adopt a partially adjustment-free circuit structure.
The VIF block adopts a technique that makes AFT adjustment unnecessary by adjusting the VCO, thus simplifying the adjustment
process.
The LA72648M is a PAL format system IC that adds a CANAL switch to the Hi-Fi audio signal-processing functions of earlier
devices and aims at even lower power operation in power saving modes.
PLL detection is adopted in the SIF block to handle audio multipath detection. The SIF input block provides four input systems and
an internal input selection switch. This makes it easier to design products that handle multi-sound systems. Furthermore, this switch
can also be used for video system sound trap switching. In addition, an on-chip buzz canceller suppresses Nyquist buzz for superb
audio quality.
Functions and Features
Functions
The AFT and SIF require no coils and are adjustment free
PAL/NTSC multiformat audio systems can be implemented easily
Built-in buzz canceller for excellent audio characteristics
Package: LA75665NM: MFP24S (300mil)
High fidelity audio signal record and playback processing
Head amplifier for Hi-Fi Audio signal
CANAL switch
Package: QFP80 (14 14)
LA75665NV: SSOP24 (275mil)
[VIF Block]
VIF amplifier
PLL detector
BNC
[First SIF Block]
First SIF amplifier
First SIF detector
AGC
[SIF Block]
Multi-input selector switch
Limiter amplifier
PLL FM detector
AFT
IF AGC
Buzz canceller
Block Diagram
RF AGC
Equalizer amplifier
FM audio for PAL
TUNER IN (R) /
EXT1 IN (R) /SCART1
+
EXT2 IN (R) /FRONT
Block Diagram
EXT3 IN (R) /SCART2
EXT4 IN (R) /AUX
MONITOR IN (R)
+
+
+
N.C.
60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41
8.2µH
Logic-GND
0.1
µ
F
330
Ω
330
Ω
330
Ω
330Ω
V
(5V)
GND-R
V
-R
CC
CC
150Ω
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
5.5MHz 6.0MHz 6.5MHz
0.1
µF
6.5MHz 6.0MHz 5.5MHz 4.5MHz
R-CH
PNR
AF SW
CLOCK
DATA
ALC
7dB
10
µ
F
+
2.2k
2.2k
2.2k
Ω
Ω
Ω
15
µ
H
330
Ω
C
B
A
2.2k
Ω
R-CH
IN SEL
VIDEO
OUT
LIM
13dB
A GND
13dB
4.5MHz
4.7
µF
+
+
V
Logic
CC
LOGIC
LIM
DEC OUT (R)
DEC OUT (L)
SW
ALC
ALC
SW
NOISE
HOLD
PULSE
0.01
µF
0.01
µ
F
0.01µF
47
µ
F
+
1.0k
4.7
1.0k
Ω
DEV
150
Ω
NOISE
DET
30pF
V
L 5V (P.ON 5V)
3kΩ
CC
1µ
F
µF
R-CH
BPF
0.47
µ
F
SW
COMP
VCO
LPF
+
MONITOR
Ω
24
23
22
21
20
19
18
17
16
15
14
13
DO DET
L-CH
BPF
10
µ
F 0.01
µ
F 100
µF
Simulcast
Normal
V
HA
7dB
CC
V
L 5V
V
(9V)
CC
V
H 9V (P.ON 9V)
CC
CC
+
(P.SAVE 5V)
0.1
µF
MIX
LPF
VCO
DEV
LIM
EQ
AMP
(Setoff in power save modes)
INPUT SW
ENV
DET
7dB
N.C.
4.7
µF
+
+
+
TO RF MOD
LINE OUT (R)
LINE OUT (L)
Normal OUT
Normal IN
MUTE
ALC
COMP
2.7kΩ
+
V / I
10kΩ
REC-H
13dB
A GND
13dB
4.7
µF
PB AMP
LIM
AMP
RF
IF
VIDEO
1ST SIF
DET
AGC
AGC
DET
SW
NOISE
1.0k
4.7
1.0k
Ω
0.01
µ
F
OUT
SEL
470
Ω
+
µF
F
REC-AMP
Normal
Simulcast
PRE GND
Ω
1ST
AMP
FM
DET
VIF
PB AMP
REC-H
VCO
22µ
F
AFT
+
L-CH
IN SEL
10µ
F
L-CH
PNR
+
7dB
ALC
4700P
HiFi "High"
Normal "LOW"
VREF
V
-L
1
2
+
3
4
5
6
7
8
9
10
11
12
CC
GND-L
0.1µ
F
1
2
3
4
5
6
7
N.C.
8
9
10 11 12 13 14 15 16 17 18 19 20
1.5k
Ω
0.01
µF
1
µF
AUDIO
OUT
0.022
µ
F
N.C.
N.C.
N.C.
+
+
+
100k
Ω
Ω
10µF
+
MONITOR IN (L)
0.01µ
F
AFT
OUT
0.1
µ
F
0.1µF
22µF
10µ
F
4.7µF
0.01
µF
TUNER IN (L) /
SAW(S)
SAW(P)
30kΩ
RFAGC
OUT
EXT1 IN (L) /SCART1
EXT2 IN (L) /FRONT
EXT3 IN (L) /SCART2
EXT4 IN (L) /AUX
100k
0.01µF
V
CC
+
0.01
µF
100
µ
F
0.01
µ
F
REC MUTE
SANYO TV . VCR
SANYO TV . VCR
49
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Hi-Fi Signal Processing
HiFi Processing with Built-in Audio Multiplex
Decoder for Japanese Market Products
Hi-Fi Signal Processing
HiFi Processing with Built-in Audio Multiplex
Decoder for US Market Products
LA72680M
LA72670M
Overview
Overview
The LA72670M is a system IC that adds SIF and US standard multi channel television sound(MTS)signal decoding functions to the
Hi-Hi audio signal-processing functions of earlier devices. All adjustments have been implemented in the IC chip by either automatic
adjustment, trimming, or some other technique, making this device is fully adjustment free.
The LA72680M is a system IC that adds SIF and Japanese standard multi channel television sound(MTS)signal decoding functions
to the Hi-Fi audio signal-processing functions of earlier devices. All adjustments have been implemented in the IC chip by either
automatic adjustment, trimming, or some other technique, making this device is fully adjustment free.
Functions
Functions
Hi-Fi audio signal record and playback processing
Head amplifier for Hi-Fi Audio signal
SIF demodulation
Hi-Fi audio signal record and playback processing
Head amplifier for Hi-Fi Audio signal
SIF demodulation
US standards compliant audio multiplex decoder
Package: QFP80 (14 14)
Japanese standards compliant audio multiplex decoder
Package: QFP80 (14 14)
Block Diagram
Block Diagram
fsc IN
fsc IN
3.58MHz
3.58MHz
4.5MHz BPF
4.5MHz BPF
SIF DET IN
SIF IN
MTS V (9V)
CC
MUTE
MUTE
MTS V
CC
(9V)
4.7µF
2.2µF
1µF
4.7µF
4.7µF
2.2µF
10µF
4.7µF
0.01µF
4700P
22µF
1µF
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
NC
60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41
60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41
1
µ
F
1
µ
F
+
MTS
MTS
A GND
PIPPLE
FILTER
+
PIPPLE
FIITFR
A GND
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
MODE OUT
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
FIITFR
Adj.
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
LIM
AIC
MODE OUT
IIM
AMP
VRFF
AMP
SIF
DEMOD
AF SW
CLOCK
DATA
NC
R-CH
PNR
R-CH
PNR
1
µ
F
AF SW
CLOCK
DATA
+
STEREO
FILTER
CUE
BPF
AM
DEMOD
PILOT
DET
SIF
PLL
DEMOD
NC
0.1
µF
+
+
+
+
+
0.1µ
F
4.5fH
TRAP
STERO
PII
COMP
4.7
µF
PILOT
CANCEL
SAP
FILTER
HOLD
PULSE
HOLD
PULSE
FIITER
Adj.
0.1µ
F
SUB
BPF
LOGIC
LIM
LOGIC
LIM
15kHz
LPF
L-R
DEMOD
22
4.7
22
µ
F
15kHz
IPF
SUB
D GND
D GND
JUST IN
CLOCK OUT
JUST
CLK
DEMOD
µF
SUB
DET
dbx
DEC
LIM
SW
NOISE
SW
NOISE
ST/SAP
SW
CONTROL
SAP
DEMOD
LIM
MAIN
DEEM
MONITOR
SAP
DET
µ
F
SUB
DEEM
MONITOR
0.1
µ
F
DFV
MATRIX
NC
CONT
DEV
10
µ
F
0.01
µ
F
10
µ
F
Ø
R-CH
BPF
R-CH
BPF
EXT1 IN (R)
EXT2 IN (R)
EXT3 IN (R)
V
(L) 5V
EXT1 IN (R)
COMP
CC
V
(L) 5V
+
CC
COMP
OUT
SW
VCO
LPF
MIX
+
100
µ
F
VCO
LPF
MIX
MTS GND
MTS GND
D.C
0.01
µ
F
MATRIX
DO DET
DO DET
L-CH
BPF
L-CH
BPF
NOISF
DET
NOISE
DET
EXT2 IN (R)
39k
Ω
39k
Ω
0.01µF
+
10µ
F
+
4.7
µF
+
+
4.7
µ
F
4.7µ
F
ALC DET
R-CH
IN SEL
R-CH
IN SEL
EXT3 IN (R)
REC-H
REC-H
2.7kΩ
1
4.7
1
µ
F
2.7kΩ
1µ
F
PR AMP
PB AMP
+
+
+
+
0.01
µ
F
470
0.01
µ
F
470
µF
REC AMP
REC AMP
Ω
Ω
MONITOR IN (R)
µ
F
COMP
COMP
0.01 F NC
µ
OUT
SEL
OUT
SEL
MUTE
ALC
+
MUTE
ALC
+
PRE GND
ENV
DET
ENV
DET
PRE GND
HiFi "Tracking D
(NORMAL:Low)
PB AMP
PB AMP
4.7
µ
F
4.7
µ
F
+
+
REC-T
REC-H
HiFi Tracking DC
(NORMAL:Low)
+
+
LINE OUT (R)
LINE OUT (R)
4700P
4700P
1.0kΩ
1.0k
Ω
A GND
A GND
L-CH
L-CH
0.01
µF
VREF
4.7
µ
F
10kΩ
VREF
4.7
µ
F
+
+
LINE OUT (L)
TO RF MOD
LINE OUT (L)
TO RF MOD
A GND
10 11 12 13 14 15 16 17 18 19 20
A GND
10kΩ
1.0kΩ
1.0kΩ
22
µF
22µF
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17 18 19 20
REC MUTE
+
+
+
+
V
(H) 9V
V
(H) 9V
+
REC MUTE
+
+
+
+
+
CC
Normal IN
4.7
µF
CC
+
+
Normal IN
4.7
µF
+
F
+
1µ
F
0.1
µ
F
1µ
F
22µF
10
µ
F
4.7µ
F 0.01
µF
10µF
22µF
10µ
F
4.7
µF
0.01
µ
F
1µ
F
10
µ
F
1µ
ALWAYS +B
Normal OUT
EXT1 IN (L)
ALWAYS 5V
Normal OUT
EXT1 IN (L)
EXT2 IN (L)
Monitor
IN(L)
EXT2 IN (L)
EXT3 IN (L)
EXT3 IN (L)
MONI TOR (L)
SANYO TV . VCR
SANYO TV . VCR
51
52
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Video and Audio Signal-Processing IC
Video and Audio Signal-Processing IC
LA71750EM
LA71206M/7M
Overview
Overview
The LA71206M and LA71207M are video and audio signal processing (Y/C/A) system ICs for NTSC VHS VCRs.
Chip internal trimming is used to make these ICs fully adjustment free.
These ICs significantly reduce the number of peripheral components required, thus providing substantial cost savings in the signal-
processing board.
The LA71750EM is a video signal-processing system IC that supports the PAL (G, B and I) 4.43 NTSC, MESECAM, and NAP
(G, B, and I) formats for VHS VCRs. Chip internal trimming is used to make this IC fully adjustment free.
This IC significantly reduces the number of peripheral components required, thus providing substantial cost savings in the signal-
processing board.
Additionally, this IC also supports the NAP standard (NTSC to PAL conversion) that is now common in Europe and China.
Functions
Functions
PAL VHS VCR video signal record and playback processing
VHS VCR audio signal record and playback processing
I2C bus serial control
NTSC VHS VCR video signal record and playback processing
VHS VCR audio signal record and playback processing
I2C bus serial control
Package: QIP100EJ (14 20)
Package: QFP80 (14 14)
Block Diagram
Block Diagram
OSD
CANAL DECODER
HA SW
AUDIO-MUTE
C-ROT
RF SW
CCD
PB C OUT
REC C MONI
VPS OUT
(1Vpp)
ALWAYS
5V
V
COMP
OUT
ENV
DET
1.8kΩ
1µF
1µF
CC
REC-MUTE
CONTROL
for H.A.
C-V
680kΩ
S.C. IN DATA IN CLOCK IN
3.58M
NTSC
CC
REC/PB
Y-FM
SUB
TITLE
DECODER
+
+
0.01µF
1.2k
Ω
+
1µF
0.01µF
4Fsc
IN STANDBY MODE
SW1 FIXED ON IN1
SW2 FIXED ON IN3
SW3 FIXED ON IN2
DRV
65
DRV
63
DRV
61
+
4.7k
Ω
+
60
AGC
TC2
+
57
+
53
GND
60
59
58
57
56
55
54
53
52
CC
51
50
49
48
47
46
R
45
44
43
42
41
4F sc
CLOCK
VSS
COMP
OUT
ENV
DET
AUDIO C-ROT C-GND
MUTE RF-SW
ALWAYS
5V
VDD
80
PHASE
COMPEN
Q-CTL
79
78
77
76
75
74
73
72
71
70
69
68
67
66
64
62
59
58
56
55
54
52
51
FRAME
C-V
V
CC
320FH
VCO
FM
FBC1 Y-V
FBC3
Y-GND
ALWAYS
AGC
KILL
SLD
PHASE
COMPEN
fo-CTL
CC
PLL
SERIAL
DECODER
HA SW
IN
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
40
39
38
2.2k
Ω
AGC
DET
DETAIL
ENH
DET
VXO1
5V
TC1
SERIAL
DET
VIDEO
AGC
CLP4
REC
CLP5
R
P
Video IN 2
SCART1(TV)
0.047
µ
F
FBC1
6DB
DECODER
SYNC
SEP
81
50
49
48
47
46
45
CAR
BAL
W/D
NL
FM-EQ
AMP
HA
R
P
TIMMING
DRIVER
CCD
OUT
CLIP EMPHA
HA-GND
GND
4
+
+
+
VCA
DET
AGC BYPASS
FBC3
P
R
3
2
1
OUT
P
82 HA GND
83
PB_FM
EQ.
FM
CLP3
CLP2
CLP1
P
R
P
R
SW1
Mute
REC
APC
PB
REC
AFC
CHROMA
DET
AGC
AUTO-BIAS
CLAMP
CCD
LA89964
VSS
V
APC
CC
60B
5
4
Y-DELAY
Video IN 1
TUNER
0.047µ
F
100k
Ω
COMP OUT
AMP
SW2
3
Mute
AGC NORMAL
ACC
DET
REC
FM
PHASE
R
P
MAIN
5
2
IN 37
36
60B
Chara
FM-EQ
MOD COMPEN
DOUBLE
WHEN SQPB,
BEFORE
Y/C PB_C
MIX
DE-EM
SW3
1
ENV
84
REG
4V
AMP
ENV DET
INS.
0.047µ
F
100k
Ω
BGA
BGA
DET
REC
R
+
P
2.2k
Ω
PB_Y
P
P
REC CURRENT IS DECIDED
BY THIS RESISTOR VALUE,
AND A TOLERANCE OF THE
RESISTOR VALUE WHICH
FM
SUB
LPF
C
Y
1
+
µ
F
85
EP (Hch)
VCA
PIC
FM AGC2
DEM
LIM
1/2
AFTER
CNC
EQ BYPASS
F-TEST
CTL
REF
R
VCA
35
34
33
32
31
30
29
28
BGA
+
R
FBC2
DET
P
REC
R
P
1
+
µ
F
F
86
EP (Lch)
H
I
FM AGC2
Y
VCA
3.58M
BPF2
PB
AMP
P
R
P
FILT
87
NC1/2
CLAMP
Y-DELAY
WE RECOMMEND IS
±
1%
PB H OUT 44
43
Y_DELAY
PB H OUT
1
µ
P
Main
CONV
B-DP
AMP
+
EP (Hch)
Y-LPF
C-LPF
HA V
CC
HA V
CC
NL
VCP
B.D.
REC:ON
R
DeEM
R
R
88
89
90
FBC2
1
µ
F
Y.N.R
+
DELAYED
+
Use of commonness is possible
EP (Lch)
Sub
TOLERANCE
1
Video IN1
Video IN2
Video IN3
SIGNAL
CCD
V
ACC
AMP
3.58M
RPF1
CONV
LESS THAN 1%
for REC CURRENT
adjustment
42
2
3
1.5k
Ω
10
µ
F
75
Ω
Ω
Ω
R
BPF2
ACC
P
CC
4.21M
BPF
H
L
P
R
NT/NT
REG
4V
PB-C
VIDEO
AGC
ACC
DET
P
FRAME 41
+
GND
0.1
+
µ
F
BPF3
C
LC89984/85
P
R
HA
YNR/COMB
R
Sub
CONV
C-MAIN
INV
BPF1
R
P
P
CCD
GND
1/2
KIL
PRF GND
H.A.
91
H.A V
CC
R
40
R
D.L
EQ
DFTAIL
FNH
1H/2H
D.L
10
+
µ
F
75
75
V
P
CLAMP
CC
Main
B-UP
AMP
Y
C
BAL
TC1
FBC
H
I
C-LPF
REC
P
CONV
HA
92
N.L.
DFFM
P
P
+
RD 39
FM AGC2
PR-C
ACC
DET
1
+
µ
F
SP (Hch)
SP (Lch)
PRE GND
NL
FMPHA
MAIN
FMPHA
Fsc
R
R
Y-LPF
CLK
IN
R
H
L
REC
BGA
PB
BGA-A
PB
BGA-B
R
CCD
93
94
95
96
97
98
99
100
M/M
38
37
36
35
34
33
32
31
P
R
VCO
D.L
EQ
COMB
AMP
Y/C
MIX
C-DELAY
R
R
P
HA
P
V
NC1
10
+
µ
F
CC
51
SP (Hch)
+B(5V)
FM
AGC 27
TC2
REC:ON
SYNC SLICE PED.SIDE
3.9k
Ω
LPF
MOD
R
R
R/PA
+
P
PB
2FSC-OUT
Ω
R-EQ
TEST
+B=5V
P
22
µ
F
+
Use of commonness is
possible
NORMAL
75
Ω
SYNC
A-GND
A-GND
26
25
24
QV-QH
6DB
470
µ
F
P/S AFC
FILT
DOUBLE
LIM
FM
DEM
SUB
LPF
DET
100
Ω
VIDEO OUT
SP (Lch)
Audio IN1
SYNC
SEP
PB REC/EE
ALC
1
C.SYNC OUT
22k
Ω
P
8200P
0.1
µ
F
KIL
47k
Ω
2
3
ALC
0.1µF
R
REC
FM-EQ
B.D.
SECAM DET
PAL M DET
MA IN
DF-FM
KIL
DET
REC
AFC
ATT
LINE
AMP
V SYNC OUT(REC)
QV/QH INS(PB)
560Ω
LPF
3.9k
Ω
V.SYNC
SEP
A-V
CC
A.GND
LP/EP
P
R/P-EQ
SEPARATE
(REC)
100
µF
A-V
CC
Vref
ALC
DET
NAP
REC
Audio IN2
INVERTER
BIAS OSC
R
P
R
P
VREF
FM
PB
FM-EQ
Y-V
Y-V
CC
23
22
21
P
S-EQ
AE
FE
R/P-EQ
PB
R
CC
AGC
P
P
R
R
47k
3.9k
Ω
R/P-EQ
SEPARATE
APC
REC
APC
REC
AMP
0.1
µ
F
1k
Ω
COMMON
47Ω
NAP
BPF
REC
AMP
PB/EE
ALC
PB/EE
VHS
SQPB
LINE
560Ω
+
MUTE
1
2
3
100
Ω
Ω
PB.EE
DET
AMP
FB.EE
1
µ
F
+
SP
EQ
AMP
SP/LP
22µF
REC:LP.EP
PB :EP
Audio IN3
EQ
REC:LP/EP
PB:EP
1k
Ω
47
Ω
AUTO
BIAS
AE
FE
4.7kΩ
AMP
CNC
25
AUTO
BIAS
B
SLD
23
VCO
22
PHASE PHASE
EQ EQ
fo-ADJ Q-ADJ
Vref
VXO2 VXO1
FRAME
FM
AGC
FIL
MAIN
EMPHA
FIL
AUDIO
LPF
MUTE
CHROMA
CC
47k
3.9k
Ω
Vret
2.3V
+
S
DET
2.3V
ACC
DET
0.1µF
HD-SW
Y-GND
16
A-V
DET C-GND
C-V
SP.LP
CC
24
CTL
Ω
0.01µF
+
1
2
3
1200P
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
26
27
28
29
30
GND
1
2
3
4
5
6
7
8
9
10
+
11
12
13
14
15
+
17
18
µP
19
µF
20
0.033
µF
8.2k
Ω
Ω
47
µF
+
0.1
390
+
F
2200
µ
P
+
+
+
1.5k
Ω
10k
Ω
33µ
2SC3331
2k
0.1
µ
F
12k
+
330k
Ω
200µP
4.7µ
F
1µ
F
1.2k
Ω
27k
1200P
Ω
12k
0.01
Ω
5.6kΩ
2SC3331
2.2k
10
µF
PAL-GBI
PAL-MN
+
10k
Ω
Ω
+
+
12k
Ω
+
+
µF
27k
Ω
R/P
REC/PB
Y-FM
M EMPH
PB EQ
MONI
LINE OUT
Ω
27kΩ
1k
Ω
2SA1318
TO MICOM
(PB-Low)
0.01µ
F
150
R/P
180
Ω
2SC3331
Ω
1kΩ
1000
µ
P
1k
Ω
2SC3331
+
1
µF
+
SANYO TV . VCR
SANYO TV . VCR
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Video and Audio Signal-Processing IC
VCR SECAM Chrominance
Signal-Processing IC
LA71730EM
LA70100M
Overview
Overview
The LA71730EM is a video signal-processing system IC that handles VHS VCR formats other than SECAM. It supports the PAL
(G, B, I, M, and N), NTSC-M, 4.4.3 NTSC, MESECAM, and NAP (G, B, I, M, and N) formats. Chip internal trimming is used to
make this IC fully adjustment free.
The LA70100M is a SECAM VCR chrominance signal processing IC. It integrates bandpass filter, SECAM discrimination, and Bell
filter circuits to significantly reduce the number of peripheral components required and can supports adjustment-free designs.
This IC significantly reduces the number of peripheral components required, thus providing substantial cost savings in the signal-
processing board.
Additionally, this IC also supports the NAP standard (NTSC to PAL conversion) that is now common in Europe and China.
Functions
Functions
Multi-format VHS VCR video signal record and playback processing
VHS VCR audio signal record and playback processing
I2C bus serial control
Integrates all required filters on a single chip
Automatic adjustment of the Bell filter f0 frequency
Built-in SECAM discrimination circuit
Package: MFP30SD (375mil)
Package: QIP100EJ (14 20)
Block Diagram
OSD
CANAL DECODER
VPS OUT
Block Diagram
(1Vpp)
REC-MUTE
CONTROL
for H.A.
REC/PB
Y-FM
SUB
TITLE
IN STANDBY MODE
SW1 FIXED ON IN1
SW2 FIXED ON IN3
SW3 FIXED ON IN2
DECODER
DRV
65
DRV
63
DRV
61
+
4.7k
Ω
+
60
AGC
TC2
+
+
53
GND
80
PHASE
COMPEN
Q-CTL
79
78
77
76
75
74
73
72
71
70
69
68
67
66
64
62
59
58
57
56
55
54
52
51
FRAME
FM
FBC1 Y-V
FBC3
Y-GND
ALWAYS
AGC
V
5V
V
CC
PHASE
COMPEN
fo-CTL
CC
CC
AGC
DET
DETAIL
ENH
DET
5V
TC1
SERIAL
VIDEO
AGC
CLP4
REC
CLP5
R
P
Video IN 2
SCART1(TV)
C.SYNC IN
29
REC IN
16
SYNC 6DB
AMP
FBC1
SECAM HI
28
5V
PB OUT RP CTL
DECODER
81
50
49
48
47
46
45
CAR
BAL
W/D
NL
FM-EQ
SEP
CLIP EMPHA
4
+
+
+
VCA
DET
AGC BYPASS
FBC3
P
R
3
2
1
P
82 HA GND
83
PB_FM
EQ.
FM
CLP3
CLP2
CLP1
P
R
P
R
SW1
Mute
AGC
60B
5
4
Y-DELAY
Video IN 1
TUNER
+
27
+
21
COMP OUT
AMP
SW2
3
Mute
AGC NORMAL
REC
FM
PHASE
R
P
MAIN
5
2
60B
Chara
FM-EQ
MOD COMPEN
DOUBLE
WHEN SQPB,
30
26
25
24
23
22
20
19
18
17
Y/C PB_C
MIX
DE-EM
SW3
1
ENV
84
REG
4V
AMP
ENV DET
INS.
DET
REC
2.2kΩ
PB_Y
REC CURRENT IS DECIDED
BY THIS RESISTOR VALUE,
AND A TOLERANCE OF THE
RESISTOR VALUE WHICH
REC
/PB
FM
SUB
LPF
C
Y
85
PIC
FM AGC2
DEM
LIM
1/2
EQ BYPASS
F-TEST
CTL
REF
+
FBC2
DET
REC
Buf
fer
86
FM AGC2
Y
VCA
P
R
P
FILT
87
NC1/2
PB-H
Y-DELAY
WE RECOMMEND IS
±1%
PB H OUT 44
43
PB H OUT
P
SECAM
DET
Y-LPF
EP (Hch)
PB
MUTE
NL
REC:ON
R
REC
DeEM
R
R
88
89
90
FBC2
Y.N.R
Y_DELAY
+
DELAYED
Use of commonness is possible
EP (Lch)
Sub
SYNC GATE GEN
/V-SEP
4.3MHz
BELL
ANTI BELL
SIGNAL
CCD
V
CONV
to MUTE
to SYNC GATE
42
BPF2
ACC
CC
2.2MHz
TRAP
H
L
P
R
PB
SYNC
NT/NT
P
BGR
GEN
FRAME 41
GND
BPF3
C
LC89984/85
P
R
4.3MHz
BPF
R
C-MAIN
INV
BPF1
CCD
GND
KIL
to PB AGC
to REC KILLER
H.A.
91
GATE
H.A V
CC
40
D.L
EQ
1H/2H
D.L
MODE
CTL
V
P
CC
to MUTE
Main
B-UP
AMP
Y
C
C-LPF
REC
CONV
HA
92
+
RD 39
FM AGC2
ACC
DET
PRE GND
REC
Fsc
R
CONTROL
LOGIC
CLK
IN
H
L
REC
BGA
PB
BGA-A
PB
BGA-B
R
LIM
93
94
95
96
97
98
99
100
M/M
38
37
36
35
34
33
32
31
VCO
D.L
EQ
COMB
AMP
4.3MHz
BPF
2.2MHz
BPF
2.2MHz
TRAP
R
P
C-DELAY
P
X2
X2
CCD
LPF
SP (Hch)
+B(5V)
PB
SYNC SLICE PED.SIDE
3.9k
REC:ON
R
R
R/PA
PB
2FSC-OUT
Ω
P
+
REC
Use of commonness is
possible
SYNC
1/4
SYNC
1.1MHz
BPF
ANTI BELL
CHOROMA
1.1MHz
GATE
P/S AFC
FILT
DET
AFC
Filter Adj.
SP (Lch)
PB REC/EE
ALC
1.1MHz
P
8200P
2.2
MHz
PB
BELL
PB
KIL
BELL
SECAM DET
PAL M DET
B.D.
4.43MHz
VCO
KIL
DET
REC
AFC
ATT
REC
560
Ω
ANTI BELL
A.GND
LP/EP
R/P-EQ
SEPARATE
(REC)
Vref
NAP
REC
REC
MUTE
INVERTER
R
P
R
P
AE
FE
R/P-EQ
PB
AGC
AMP
AGC
DET
R/P-EQ
SEPARATE
APC
REC
APC
REC
AMP
1kΩ
COMMON
47Ω
NAP
BPF
PB/EE
ALC
PB/EE
LINE
Buf
fer
1
2
3
100
Ω
DET
AMP
Buf
fer
REG
4.0V
SP
EQ
AMP
SP/LP
3.58
NTSC
4.3MHz BELL
FO CTL
REC:LP/EP
PB:EP
AUTO
BIAS
CNC
25
VCO
22
SLD
23
Vref
VXO2 VXO1
FRAME
AUDIO
LPF
MUTE
CHROMA
CC
+
2.3V
ACC
DET
HD-SW
CTL
FO CTL
REG
13
A-V
DET C-GND
C-V
CC
24
1
2
3
4
5
6
7
8
9
10
11
12
14
15
+
1
2
3
1200P
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
26
27
28
29
30
GND
+
+
+
+
+
10k
Ω
2SC3331
2k
+
1.2kΩ
27k
1200P
Ω
12k
0.01
Ω
5.6kΩ
MODE CTL
BGP DELAY CTL
H : +400n
PAL-GBI
PAL-MN
4.3MHz BELL FO CTL
H : +80k
+
+
Ω
+
12k
Ω
+
+
µF
REC-C OUT
PB-C IN
1kΩ
2SA1318
4.43MHz
CW
R/P
180
Ω
M : 0k
: +40k
M :
L
±
0n
2SC3331
: -400n
L
MODECTL
H:SECAM
*PB ONLY
+
OPEN:AUTO DET
L:EXCEPT SECAM
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On-Screen Display Controller IC
On-Screen Display Controller IC
LC74789/M/JM
LC74785/M
Overview
Overview
The LC74785 and LC74785M are integrated EDS on-screen display CMOS ICs that display text and patterns on the TV screen under
control of a microcontroller. The LC74785 and LC74785M display 12 18 dot characters in a display area of 12 lines by 24 columns.
The LC74789, LC74789M, and LC74789JM are on-screen display CMOS ICs that display text and patterns on the TV screen under
control of a microcontroller. The LC74789, LC74789M, and LC74789JM display 12 18 dot characters in a display area of 12 lines
by 24 columns.
Functions
Functions
Display structure: 12 lines 24 characters (up to 288 characters)
Character structure: 12 18 dots (H V)
Character sizes: Three sizes in each of the horizontal and vertical directions
Number of characters: 128 characters
Display start positions: Horizontal: 64 positions, vertical: 64 positions
Blinking: Specified in horizontal units
EDS support
Display structure: 12 lines 24 characters (up to 288 characters)
Character structure: 12 18 dots (H V)
Character size: Three sizes in each of the horizontal and vertical directions
Number of characters: 256 characters (254 characters, one space character, one transparent space character)
Display start positions: Horizontal: 64 positions, vertical: 64 positions
Blinking: Specified in horizontal units
Video input: NTSC composite video signal
Packages: LC74785: DIP24S (300mil)
LC74785M: MFP24 (375mil)
Types of blinking: Two: periods of 1.0 and 0.5 seconds
Blinking of the whole character area (12 18 dots)
Background color: 8 colors (internal synchronization operation) at 4 fsc
6 colors (internal synchronization operation) at 2 fsc
Line background color: Can be set for up to 3 lines
Line background color: 8 colors (internal synchronization operation) at 4 fsc
Line background color: 6 colors (internal synchronization operation) at 2 fsc
External control input: 8-bit serial interface
Types of blinking: Two: periods of 1.0 and 0.5 seconds
Blinking of the whole character area (12 18 dots)
Background color: 8 colors (internal synchronization operation) at both 2 and 4 fsc
Line background color: Can be set for up to 3 lines
Line background color: 8 colors (internal synchronization operation) at both 2 and 4 fsc
External control input: 8-bit serial interface
Built-in sync separator circuit
Video signal inputs: NTSC, PAL, PAL-N, PAL-M, NTSC 4.43, and PAL60 composite video signals
Packages: LC74789: DIP24S (300mil), LC74789M: MFP24 (375mil), LC74789JM: MFP24S (300mil)
Built-in sync separator circuit
Block Diagram
Block Diagram
Serial
CS1
SIN
8-bit latch
+
command
decoder
CS
Serial
8-bit latch
parallel
converter
+
SIN
parallel
converter
SCLK
command
Blinking
Horizontal
direction
Horizontal
display
Vertical
display
position
register
Vertical
direction
RAM
write
Display
control
register
decoder
and
SCLK
inversion
control
register
character
size register
position
register
character
size register
address
counter
Vertical
display
position
register
Horizontal
direction
character
Vertical
direction
character
Horizontal
display
position
register
Blinking
and
inversion
control register
Data output
buffe
RAM write
address
counter
Display
control
register
CPDT
Output control
DATA SLICER
RST
CS2
Horizontal
dot
counter
Blinking
Horizontal
size
counter
Vertical
size
counter
Vertical
size register size register
and
inversion
control
circuit
dot
V
1
LN21
Display RAM
DD
counter
Blinking and
inversion
Horizontal
size counter
counter
Horizontal
dot counter
Vertical dot
counter
Vertical size
V
1
Display RAM
Decoder
SS
control circuit
V
1
1
DD
V
SS
V
2
2
Vertical
display
position
detection
DD
Horizontal
display
position
detection
Vertical display
position detection
Horizontal display
position detection
V
2
2
DD
V
SS
V
SS
Decoder
Sync
discriminator
Character
control
counter
Line control
counter
Line
control
counter
SYNC
Character
control
counter
JDG
Font ROM
Character
output dot
clock
Sync
discriminator
OSC
Font ROM
SYNCJDG
IN
DATA
HSYNC
peak hold
Composite
sync signal
separator
control
generator
OSC
peak hold
OUT
(slicer) circuit
(slicer) circuit
Character output control
Background control
Sync signal generator
Timing generator
Shift register
Character output control
Background control
Video output control
Sync signal
generator
SYN
IN
Shift register
Timing generator
Composite sync
signal separator
control
Sync
discriminator
Pedestal clamp
SEP
C
Character
output dot
SEP
OUT
clock generator
SEP
IN
Xtal
IN
Xtal
OUT
CV
CR
CV
OUT
IN
HFTON
OUT
Xtal
IN
CV
CV
OUT
COLR
SYN
IN
RST
SEP
OSC OSC
OUT
SEP
IN
CTRL1
(CHABLK)
IN
OUT
IN
CTRL1
(CHABLK)
Xtal
OUT
(MUTE)
(MUTE)
COLR
CV
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VPS/PDC Slicer IC
On-Screen Display Controller IC
LC74793/JM
LC74776/M
Overview
Overview
The LC74793 and LC74793JM are PDC/VPS/UDT interface CMOS ICs. The operating mode can be set and the data acquired in the
various modes can be read out by a microcontroller.
The LC74776 and LC74776M are integrated PDC/VPS/UDT interface circuit on-screen display CMOS ICs that display text and
patterns on the TV screen under control of a microcontroller.
The LC74776 and LC74776M display 12 18 dot characters in a display area of 12 lines by 24 columns.
Functions
Functions
Display structure: 12 lines 24 characters (up to 288 characters)
Character structure: 12 18 dots (H V)
VPS data acquisition (bytes 5 and 11 to 15)
VPS: Video Program System
Character sizes: Three sizes in each of the horizontal and vertical directions
Number of characters: 256 characters (256 characters, one space character, one transparent space character)
Display start positions: Horizontal: 64 positions, vertical: 64 positions
Blinking: Specified in character units
PDC (8/30/2) data acquisition (bytes 13 to 25)
PDC: Program Delivery Control
UDT (8/30/1) data acquisition (bytes 13 to 25)
UDT: Unified Date and Time
Types of blinking: Two: periods of 1.0 and 0.5 seconds
Blinking of the whole character area (12 18 dots)
Background color: 8 colors (internal synchronization operation) at both 2 and 4 fsc
Blue background only: NTSC
Header (X/00) data acquisition (bytes 14 to 45)
Status display (8/30/1, 8/30/2) data acquisition (bytes 26 to 45)
Automatic VPS/PDC discrimination mode
Sync separator and AFC circuits
Line background color: Can be set for up to 3 lines
Line background color: 8 colors (internal synchronization operation) at both 2 and 4 fsc
External control input: 8-bit serial interface
Sync discrimination circuit
I2C bus support
Packages: LC74793: DIP24S (300mil)
LC74793JM: MFP24S (300mil)
Built-in sync separator circuit
Video signal input: PAL or NTSC composite video signal
Built-in PDC/VPS/UDT interface (I2C bus support)
Packages: LC74776: DIP30SD (400mil)
LC74776M: MFP30S (375mil)
Block Diagram
Block Diagram
CS
Serial
8-bit latch
+
SIN
SDA
parallel
converter
command
decoder
I2C bus interface
Data latch circuit
SCLK
SRT
SCL
Vertical
display
position
register
Vertical
direction
Horizontal
direction
Horizontal
display
Blinking
and
inversion
control
register
Display
control
register
RAM write
address
counter
Output
control
Data output
buffer
character
size register
character
size register
position
register
DAV
SLC
SDA
Sync separator
and data separator
SYN
IN
Data acquisition circuit
Blinking and
inversion
control circuit
Horizontal
size counter
Horizontal
dot counter
Vertical dot
counter
Vertical size
counter
circuits
SEPC
CP
OUT
Display RAM
Data slicer
circuit
AFC
circuit
VCO
IN
SEP
OUT
VCOR
Horizontal display
position detection
Vertical display
Vertical
separation
circuit
position detection
SEP
IN
Decoder
CTRL2
AFC circuit (VCO)
Sync
discriminator
SYNC
JDG
Character
control
counter
Line control
counter
Timing generator
Font ROM
Sync
discrimination
circuit
Character
output dot
clock
OSC
IN
V
1,2
1,2
DD
OSC
generator
OUT
Character output control
Background control
Video output control
V
SS
Shift register
Timing generator
Sync signal generator
Sync
SYN
Composite
sync signal
separator
control
IN
separator
and data
separator
circuit
SEP
C
SYNC
JDG
CP
OUT
VCO VCOR
IN
H
V
X
X
OUT
CTRL1 CDLR RST
OUT OUT
IN
SEP
OUT
V
1 V 2 V
3
V
1 V 2 V 3
CV
OUT
CV
IN
DD DD DD
SS SS SS
Xtal
OUT
CVCR CDLR
Xtal
IN
CTRL1
(CHABLK)
(MUTE)
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VHF Band RF Module
VHF Band RF Module
LA77000V
LA7161NM/NV
Overview
Overview
The LA77000V is a VHF band RF module that supports channels 3 and 4 in the US.
The LA7161NM and LA7161NV are VHF band RF modules that support channels 3 and 4 in the US, channels 1 and 2 in Japan, and
channel 13 in Taiwan.
Functions
Functions
RF VCO
RF mixer
RF buffer
Video clamp
RF VCO
RF mixer
RF buffer
Video clamp
White clipping
FM audio demodulator
4 V regulator
Reference oscillator
Package: SSOP16 (225mil)
White clipping
FM audio demodulator
4 V regulator
Reference oscillator
Packages: LA7161NM: MFP16 (225mil)
LA7161NV: SSOP16 (225mil)
Block Diagram
Block Diagram
16
15
14
13
12
11
10
9
16
15
14
13
12
11
10
9
RF
MIXER
REG
4V
BUF
BUF
RF
OSC
RF
MIXER
REG
4V
BUF
BUF
RF
OSC
off
off
off
ANT SW
DRIVER
off
BIAS
ANT SW
DRIVER
PLL
BIAS
PLL
CARRIER
OFF SW
WHITE
CLIP
FM
OSC
CARRIER
OFF SW
WHITE
CLIP
FM
OSC
PLL
PLL
REF
OSC
CHANNEL
8
REF
OSC
CLAMP
5
CHANNEL
8
CLAMP
5
+
+
1
2
3
4
6
7
1
2
3
4
6
7
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PWM Capstan + Sensorless Drum
+ Loading Motor Drivers
Package Dimensions
Package Dimensions
(unit:mm)
(Reference Drawing)
LB11885/4
SIP/DIP/SQFP/QIP
SIP7H
SIP7H
SIP10H
SIP10H
SIP10HD
SIP10HD
25.6
3.0
18.0
Overview
2.4
(10.0)
(
2.0)
26.8
20.0
4.0
C 0.7
3.4
3.4
The LB11885 and LB11884 are 3-in-1 motor driver ICs for VCR units.
Functions and Features
[Capstan Motor Drive Block]
[Loading Motor Drive Block]
Three-phase 120° round-trip excitation direct PWM drive
PWM oscillator
Current limiter function (fixed internal and externally settable)
Forward/reverse function
H bridge forward/reverse function
Motor voltage switching function
Short-circuit braking function
Three-value input control
1
10
(1.37)
2.54
1
10
0.5
1.15
0.4
1.2
(1.97)
1.4
2.54
0.5
0.4
2.0
1
7
1.38
2.54
1.0
0.6
0.6
1.2
Two-stage FG amplifier (built-in gain resistor)
Control amplifier output pin
DIP24S(300mil)
DIP24S(300mil)
DIP30SD(400mil)
DIP30SD(400mil)
DIP36S(400mil)
DIP36S(400mil)
[Drum Motor Drive Block]
[Common Circuits]
Thermal protection circuit (TSD)
27.0
Three-phase 120° round-trip excitation soft switching sensorless drive
Sensorless FG function
32.4
21.0
36
19
30
16
24
13
Package: LB11885: HSSOP48 (375mil)
LB11884: SSOP44J (275mil)
Two-stage PG amplifier function
Mixed FG and PG output function (separate output is also possible)
1
18
1
12
1
15
0.95
0.9
0.95
Block Diagram
C_FR
0.48
1.78
C_V
CC
0.48
C_HU+
(1.1)
(0.71)
0.48
1.78
0.95
(1.04)
1.78
Rising voltage protect
C_U OUT
C_HU-
C_HV+
MATRIX
&
LOGIC
C_HV-
C_HW+
C_V OUT
DIP42S(600mil)
DIP42S(600mil)
DIP54S(600mil)
DIP54S(600mil)
SQFP48(7 7)
SQFP48(7 7)
C_W OUT
C_RFP
9.0
7.0
C_HW-
C_FG IN
37.7
V
CC
62k
47.58
TSD
36
25
2k
42
22
-
+
54
28
-
+
Q
-
+
2.5k
2.5k
24
37
C_RFS
R
V
CC
S
+
-
C_CNT
C_LIM
C_FG OUT
C_FG
1
27
1
21
C_MGND
Rising voltage protect
680pF
OSC
48
1.05
13
C_FC
C_PWM
0.95
1
12
D_V
CC
S GND
D_FGO
(0.5)
0.15
0.18
0.48
(0.75)
1.78
D_COM
Rotor position
Detect
V
CC
(0.65)
1.78
0.48
Masking
(1.05)
Timing
Control
Start up
Control
Soft switching
Drive circuit
2200p
D C1
D C2
D_U OUT
D_V OUT
SQFP64(10 10)
SQFP64(10 10)
SQFP144(20 20)
SQFP144(20 20)
QIP48E(14 14)
QIP48E(14 14)
2200p
560k
17.2
14.0
22.0
20.0
12.0
10.0
8 frequency
PLL
VCO
25
36
108
73
D_W OUT
48
33
D PC OUT
D VCO IN
D CX
109
72
0.022µF
37
24
49
32
0.47µ
TSD
D_RF
0.022
µ
1k
0.5
-
+
+
Upper side non saturatc circuit
200
D_CNT
0.1
-
D_MGND
µ
64
17
48
13
L_V
CC
D_FC
1
16
0.18
Rising voltage protect
144
37
+
1
12
0.15
(0.5)
-
0.15
1.0
0.35
-
1
36
(1.25)
0.145
+
(1.5)
0.5
0.2
L_GND
200
200
(1.25)
D_PG+
D_PG-
L_OUT1
L_OUT2
D_PGO1 D_PGO2
L_IN
L_VREI
SANYO TV . VCR
SANYO TV . VCR
63
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Package Dimensions
Package Dimensions
(unit:mm)
(unit:mm)
(Reference Drawing)
(Reference Drawing)
QIP/QFP/MFP/SSOP
SSOP/HSSOP/TO
QIP64E(14 14)
QIP64E(14 14)
QIP80E(14 20)
QIP80E(14 20)
QIP100EJ(14 20)
QIP100EJ(14 20)
SSOP24(225mil)
SSOP24(225mil)
SSOP24(275mil)
SSOP30(275mil)
SSOP30(275mil)
SSOP24(275mil)
17.2
14.0
23.2
20.0
6.5
23.2
20.0
30
16
7.8
48
33
24
13
24
64
41
80
51
32
49
65
40
81
50
12
1
80
25
64
17
100
31
1
15
0.15
24
1
1
1
30
0.5
0.22
0.15
0.15
1
16
0.15
9.75
0.8
0.35
0.15
(0.33)
0.65 0.22
0.65
0.25
0.8
0.35
0.15
(0.5)
(0.8)
(1.0)
(0.58)
(0.33)
0.22
0.65
QFP80(14 14)
QFP80(14 14)
MFP16(225mil)
MFP16(225mil)
MFP24(375mil)
SSOP44J(275mil)
SSOP44J(275mil)
HSSOP48(375mil)
HSSOP48(375mil)
TO220-7H
TO220-7H
MFP24(375mil)
15.2
17.2
14.0
17.8
10.4 max
10.0
10.0
4.5
3.6
TOP VIEW
15.0
BOTTOM VIEW
(6.2)
24
13
60
41
1.3
16
9
48
25
Exposed Die-Pad
61
40
23
44
1
22
8
0.22
0.2
0.65
0.7
1
(0.68)
1
24
(0.56)
1
12
0.15
0.35
1.27
0.2
21
80
0.15
1.27
0.35
SIDE VIEW
1.3
0.65
0.2
(0.62)
20
1
(0.45)
0.25
0.15
0.65
1.27
0.6
0.45
3.15
(0.83)
8.23
1.5
MFP24S(300mil)
MFP24S(300mil)
MFP30S(375mil)
MFP30SD(375mil)
MFP30SD(375mil)
MFP30S(375mil)
15.2
Notes on Package Types and Naming
15.2
24
13
The package names used in this documentation are designed to
indicate rough classification of the packages used,and do not
necessarily indicate the formal name of each individual package.
Refer to the delivery specifications document for the particular
product for the package dimensions figure and the formal name of
the package.
30
16
30
16
15
1
1
15
1.0
0.4
0.25
1
12
0.15
12.5
0.4
1.0
0.15
(0.6)
(0.6)
1.0
(0.75)
0.35
MFP36SD(375mil)
MFP36SD(375mil)
MFP36SDJ(375mil)
MFP36SDJ(375mil)
SSOP16(225mil)
SSOP16(225mil)
15.2
15.2
5.2
16
9
36
19
36
19
1
18
0.8
0.3
0.25
1
18
(0.8)
1
8
0.4
0.8
0.25
0.15
(0.8)
(0.33)
0.22
0.65
SANYO TV . VCR
SANYO TV . VCR
65
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