Philips Speaker ISP1561 User Manual

UM10005_3  
ISP1561 Evaluation Board  
User’s Guide  
April 2003  
User’s Guide  
Rev. 2.0  
Revision History:  
Revision  
2.0  
Date  
Description  
Updated terminology  
Author  
Yuk-lin ONG  
Apr 2003  
Mar 2003  
Oct 2002  
“USB 1.1” to “Original USB”  
“USB 2.0” to “Hi-Speed USB”  
“I2C” to “I2C-bus”  
1.3  
1.2  
Updated the following sections:  
Teh Hock Lye  
Tan Kim Kiat  
Section 4.7  
Section 6.2  
Section 7  
Updated the following sections:  
Section 4.4, removed the last paragraph.  
Section 8: Changed PSR05 to PSR05-  
PD10611.  
1.1  
1.0  
July 2002  
Feb 2002  
Contents update.  
Socol Constantin, Adrian  
Albu and Teh Hock Lye  
Adrian Albu and Socol  
Constantin  
First draft.  
We welcome your feedback. Send it to [email protected].  
Philips Semiconductors - Asia Product Innovation Centre  
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ISP1561 Evaluation Board User’s Guide  
CONTENTS  
1.  
2.  
3.  
4.  
INTRODUCTION.................................................................................................................................. 4  
ISP1561 PIN CONFIGURATION........................................................................................................ 5  
SYSTEM REQUIREMENTS.................................................................................................................. 5  
ISP1561 EVALUATION BOARD ........................................................................................................ 6  
4.1.  
4.2.  
4.3.  
4.4.  
4.5.  
4.6.  
4.7.  
PORT POWERED LEDS ...........................................................................................................................................................6  
GOODLINK LEDS....................................................................................................................................................................6  
VAUX POWER SUPPLY................................................................................................................................................................6  
LEGACY SUPPORT....................................................................................................................................................................7  
INPUT CLOCK..........................................................................................................................................................................8  
EXTERNAL 5 V POWER SOURCE AND S3 WAKE-UP CAPABILITY....................................................................................8  
LOADING THE SUBSYSTEM ID AND VENDOR ID FROM THE EXTERNAL EEPROM........................................................8  
5.  
6.  
HI-SPEED USB (EHCI) DRIVERS ....................................................................................................... 9  
LOADING OF THE ISP1561 DRIVERS............................................................................................ 10  
6.1.  
6.2.  
LOADING OF OHCI DRIVERS.............................................................................................................................................10  
LOADING OF EHCI DRIVERS..............................................................................................................................................13  
7.  
8.  
9.  
SCHEMATICS...................................................................................................................................... 15  
BILL OF MATERIALS ......................................................................................................................... 19  
REFERENCES....................................................................................................................................... 20  
FIGURES  
Figure 1-1: ISP1561 Evaluation Board...........................................................................................................................................................................4  
Figure 2-1: Pin Configuration..........................................................................................................................................................................................5  
Figure 4-1: Evaluation Board Schematic.......................................................................................................................................................................6  
Figure 4-2: Block Diagram of Legacy Signal Connection and Testing .................................................................................................................7  
Figure 4-3: I2C-bus EEPROM Programming Example...............................................................................................................................................9  
I2C-bus is a registered trademark and GoodLink is a trademark of Koninklijke Philips Electronics N.V. Microsoft  
and Windows are either registered trademarks or trademarks of Microsoft Corp. in the United States and/or  
other countries. Intel is a registered trademark of Intel, Inc. The names of actual companies and products  
mentioned herein may be the trademarks of their respective owners. All other names, products, and trademarks  
are the property of their respective owners.  
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1. Introduction  
The ISP1561 evaluation board is a standard implementation of the ISP1561 in a complete configuration that allows  
you to exercise all signals and main features. Figure 1-1 shows the ISP1561 evaluation board.  
Some of the features that are implemented in the ISP1561 evaluation board are as follows:  
Selection between PCI VAUX and PCI VCC power supply, with voltage presence indicator. This feature in  
combination with the auxiliary +5 V input on J1 allows testing the system wake-up from power  
management states, such as S3cold, in which PCI VCC is not present. This is intended mainly for testing the  
ISP1561 in motherboard or notebook designs.  
Selection between 12 MHz clock (from a crystal) or 48 MHz clock (from a 48 MHz oscillator) input. By  
default, 12 MHz crystal is implemented.  
Simple and reliable overcurrent protection scheme that allows testing of the  
Alternative solutions (resettable circuit protection devices) can be adopted.  
and  
signals.  
PWEn  
OCn  
Port power and GoodLink™ LEDs. These may be omitted in a standard commercial implementation but  
are considered useful on the evaluation board for easier understanding of functionality and debugging.  
Connector for testing legacy signals in the case of an on-board solution design. Testing the legacy feature  
requires a motherboard with BIOS support for USB or legacy implementation on OHCI.  
Input for an external power supply (J1). This allows complete testing of power management on a standard  
mainboard, including the power management modes in which the PCI +5 V is cut off.  
Figure 1-1: ISP1561 Evaluation Board  
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2. ISP1561 Pin Configuration  
Figure 2-1: Pin Configuration  
3. System Requirements  
Intel® PII400 MHz processor and above, or equivalent in speed from AMD®, Cyrix® and VIA®, is  
recommended.  
Generally, the processor usage indicator will vary according to the type and number of applications  
launched for exercising USB devices attached. For example, running data transfer tests on two high-speed  
(HS) hard disk drives (HDDs) on a P4 at 1.7 GHz, 128 Mbytes DDRAM, Microsoft® Windows® 2000 will  
determine a processor usage figure of 30% to 40%. Adding two Original USB cameras and an application  
playing MP3 song through Original USB speakers may increase the average processor usage figure up to  
70% to 80%. Also, a Hi-Speed USB camera and an Original USB camera running simultaneously will  
increase the processor usage up to 100% (depending on resolution settings).  
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Motherboard with PCI slots that are compatible with PCI Local Bus Specification, Rev. 2.2 (Supporting at  
least S1 and S3 power management modes for power management features testing.).  
Memory: Minimum amount as indicated by the operating system and applications requirements, similar to  
processor speed requirement mentioned earlier. Only a small amount of memory is occupied by the  
installation of the device drivers itself or OHCI/EHCI functionality.  
HDD space: Mainly determined by the operating system and applications requirements because specific  
drivers need very little space.  
Graphics cards, other adapter cards: No special requirements.  
Operating systems supported: Windows 98 Second Edition (SE), Windows 2000, Windows XP and  
Windows Millennium Edition (Me).  
4. ISP1561 Evaluation Board  
D4  
D6  
J1  
A
PORT1  
D7  
B C  
D5  
D2  
D3  
PORT2  
D8  
2
8
4
3
6
5
JP2  
1
7
PORT3  
D9  
DI  
JP1  
3 2 1  
PORT4  
Figure 4-1: Evaluation Board Schematic  
4.1. Port Powered LEDs  
LEDs D2, D3, D4 and D5 indicate the power status of USB ports. If a port is powered, the respective LED is  
turned on. It is turned off during system boot-up until OHCI or EHCI drivers are loaded, or it is switched off  
whenever an overcurrent condition occurs.  
4.2. GoodLink LEDs  
LEDs D6, D7, D8 and D9 are GoodLink indicators. These LEDs blink when a device is connected to the respective  
port indicating port activity.  
4.3. VAUX Power Supply  
If the motherboard used is PCI 2.2 compliant, jumper JP1 position 2-3 may be shorted, allowing S3cold suspend  
and resume testing (PCI VAUX = 3.3 V is used and an external +5 V is necessary). If the motherboard used is PCI 2.1  
or older version compliant, jumper JP1 position 1-2 must be shorted (PCI VCC = 3.3 V is used because VAUX is not  
present). Note that in both these situations LED D1 must be turned on indicating that the ISP1561 is powered.  
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Important: If the LED D1 is not lit, it indicates that the ISP1561 does not have the VAUX supply (VAUX is not supplied  
in the PCI connector). Therefore, your computer will stop responding or ‘hang’ when the operating system is  
loading OHCI or EHCI drivers. Switch JP1 to position 1-2 to connect to the PCI VCC = 3.3 V (present under  
normal conditions, except some system power management modes, for example, S3cold and S4).  
4.4. Legacy Support  
SMM  
Fixed I/O 60/64H access is  
enabled by the  
EmulationEnable (EE) bit  
System BIOS  
Fixed I/O 60/64H access can be disabled  
or subtractive decode is used  
P C I B U S  
OHCI  
System Chipset  
System Interrupt  
Controller  
System Memory  
Controller  
Target Access  
PCI Bridge...  
IOEnb  
Config Memory  
Access  
Fixed I/O 60H  
and 64H Access  
Memory map  
IO map (60H and 64H)  
IRQ1  
LegacySupport  
...  
LegacyEnable  
00H  
IRQ12  
SMI#  
Legacy Support  
Emulation Reg  
100H  
104H  
108H  
10CH  
A20OUT  
Legacy Mouse and  
Keyboard Controller  
80c42  
Legacy  
Emulation  
Handler  
Operational  
Registers  
KBIRQ1  
MUIRQ12  
MemEnb  
System Chipset  
RootHub  
USB  
Mouse  
Legacy  
Mouse  
USB  
Keyboard  
Legacy  
Keyboard  
Figure 4-2: Block Diagram of Legacy Signal Connection and Testing  
Figure 4-2 shows the necessary connections for testing the legacy support functionality. The necessary signals must  
be accessible on the motherboard used for legacy testing.  
Testing  
R22  
0  
R23  
0 Ω  
R2  
10 kΩ  
10 kΩ  
R3  
10 kΩ  
10 kΩ  
[1]  
[1]  
Legacy support  
Default setting  
(No legacy support)  
[1] When testing the legacy support, resistors R22 and R23 (or the pull-down resistors located at the bottom of the evaluation  
board) must be removed.  
The JP2 connector is used for testing the keyboard and mouse legacy support.  
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Pin Number Signal  
1
2
3
4
5
6
7
8
GND  
GND  
A20OUT  
SMI#  
KBIRQ1  
IRQ12  
MUIRQ12  
IRQ1  
4.5. Input Clock  
You can use either the 12 MHz crystal or the 48 MHz oscillator for the input clock. If the 12 MHz crystal is used,  
both the resistors (R1 and R27) are soldered. If the 48 MHz oscillator is used, resistor R27 (0 ) must be  
removed and pin 1 is pulled HIGH by R1. By default, the 12 MHz solution is implemented on the evaluation board.  
4.6. External 5 V Power Source and S3 Wake-Up Capability  
The jack J1 is used for connection of an external +5 V standby power supply to test the system wake-up from  
S3cold and maintain the connected USB devices powered so that re-enumeration is avoided.  
When the system is in the S3cold Power Management State, the +5 V main power at PCI connectors disappears.  
Therefore, all downstream ports will not be powered because VBUS is derived from the PCI +5 V power supply. In  
this situation, downstream bus-powered devices, such as mouse and keyboard, are not functional and cannot wake  
up the system.  
If you want to use the external +5 V supply, pads A and C on the evaluation board must be soldered together as  
represented in the evaluation board drawing. Similarly, if you only intend to use PCI +5 V as the VBUS power source  
(no testing of the system wake-up from S3cold and no external +5 V connected), then pads B and C must be  
soldered together. Pads A, B and C are copper areas on the upper-right corner of the evaluation board (see Figure  
4-1). This solution, using three copper pads, was adopted to avoid using a jumper because only the default  
configuration (pads B and C connected together) will be used most of the time.  
4.7. Loading the Subsystem ID and Vendor ID from the External EEPROM  
Expansion board vendors can use the Subsystem Vendor ID and the Subsystem ID for identification of the board  
and loading of the correct drivers by the operating system. The PCI SIG assigns the Subsystem Vendor ID and the  
vendor determines the Subsystem ID.  
The Subsystem Vendor ID and the Subsystem ID can be optionally loaded at power-on from the external serial  
I2C-bus® EEPROM present on the ISP1561 evaluation board. A 3.3 V serial EEPROM of any size can be used  
because only a few locations will be used for data loading.  
The serial I2C-bus EEPROM present on the ISP1561 evaluation board cannot be programmed onboard. It should be  
preprogrammed by using a standard serial EEPROM programmer. A socket is provided on the ISP1561 evaluation  
board for repetitive reprogramming of the EEPROM.  
An example on the I2C-bus EEPROM programming is given in Figure 4-3. In the example, it is assumed that the  
Subsystem Vendor ID is 1132H, the Subsystem Device ID for OHCI is 1664H, and the Subsystem Device ID for  
EHCI is 1665H.  
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I2C-Bus EEPROM Content  
Address  
0
1
2
3
4
5
6
7
Subsystem Vendor ID—LOW  
32H  
11H  
64H  
16H  
65H  
16H  
FFH  
15H[1]  
Subsystem Vendor ID—HIGH  
Subsystem Device ID (OHCI)—LOW  
Subsystem Device ID (OHCI)—HIGH  
Subsystem Device ID (EHCI)—LOW  
Subsystem Device ID (EHCI)—HIGH  
reserved  
reserved  
[1] Loads Subsystem Vendor ID and Device ID. For more details, refer to the ISP1561 Hi-Speed USB PCI host controller  
datasheet.  
Figure 4-3: I2C-bus EEPROM Programming Example  
Note: Do not load any other values in reserved fields, otherwise, functionality of the ISP1561 is not guaranteed.  
5. Hi-Speed USB (EHCI) Drivers  
For Windows 2000 and Windows XP, the standard Microsoft EHCI drivers can be used. The best way to obtain  
the latest EHCI drivers is to download from the Microsoft web site. Installation or update of EHCI device drivers  
for the supported operating systems follows the standard installation procedure for device drivers, and so should  
not present any difficulty.  
However, the usb2.inf file must be modified to match the Philips Vendor ID (VID), Device ID (DID) and IC  
revision code.  
If there are difficulties in loading the Hi-Speed USB (EHCI) drivers, particularly for Windows 2000 and Windows  
XP, the first step is to check the correctness of the VID, DID and REV_ID specified in the INF file. These values  
must match with the values implemented in the respective revision of the ISP1561 found on the evaluation board.  
An example of the necessary modifications that must be made to a usb2.inf file is as follows. The file example  
contains information regarding the ISP1561 VID, DID and REV_ID. These modifications are similar for Windows  
2000 and Windows XP.  
1. Add the following line of code under the [Manufacturer] section:  
%Philips%=Philips  
2. Under the USB 2.0 Hub Support section, add the following lines of code:  
; =================== Philips ==================================  
[Philips]  
; for Windows 2000  
%PCI\VEN_1131&DEV_1562&REV_30.DeviceDesc%=EHCI,PCI\VEN_1131&DEV_1562&REV_30  
%USB\ROOT_HUB20.DeviceDesc%=ROOTHUB2,USB\ROOT_HUB20  
; HUBs  
%USB\HubClass.DeviceDesc%=Usb2Hub.Dev,USB\HubClass  
3. Add the following lines of code under the [Strings] section:  
Philips="Philips"  
PCI\VEN_1131&DEV_1562&REV_30.DeviceDesc="PHILIPS PCI to USB Enhanced Host Controller ES5"  
For Windows 98 and Windows Me, Philips provides EHCI device drivers; no modification in its INF file is required.  
Windows 98, Windows Me, Windows 2000 and Windows XP supply the device drivers for OHCI by default.  
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6. Loading of the ISP1561 Drivers  
This section provides an example on loading device drivers after an ISP1561 add-on card is plugged into a  
computer running Windows 98. Loading of OHCI drivers (supplied by the operating system) and Hi-Speed USB  
(EHCI) drivers provided by Philips is shown in a step-by-step process.  
Note: In the case of Windows 2000 and Windows XP, OHCI drivers are automatically installed by the operating  
system without any user intervention.  
6.1. Loading of OHCI Drivers  
The following wizard appears when an ISP1561 add-in card is plugged on a computer running Windows 98,  
enabling you to install OHCI drivers.  
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Click the Browse button and locate the path where the Windows 98 kit is installed.  
Note: The preceding steps will be repeated twice for loading of the drivers for the two OHCI (OHCI1 and  
OHCI2).  
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6.2. Loading of EHCI Drivers  
After the drivers have been loaded for OHCI1 and OHCI2, the following wizard appears, when an ISP1561 add-on  
card is plugged on to a computer running Windows 98, enabling you to install the Hi-Speed USB EHCI drivers.  
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For your reference, the contents of the Windows 98/Windows Me EHCI driver are as follows:  
7. Schematics  
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A V A U X  
A V A U X  
A V A U X  
A V A U X  
1 2 1  
1 1 5  
1 0 8  
9 3  
F
R R E G N D _  
9 4  
V A U X  
V A U X  
8 5  
5
A G N D  
A G N D  
A G N D  
A G N D  
1 2 4  
1 1 8  
1 1 1  
1 0 4  
L L P  
A V A U X _  
1 0 1  
V D D  
8 0  
7 3  
6 5  
5 7  
4 9  
4 1  
3 3  
2 5  
1 7  
1 0  
V D D  
V D D  
V D D  
V D D  
V D D  
V D D  
V D D  
V D D  
V D D  
D G N D  
D G N D  
D G N D  
D G N D  
D G N D  
D G N D  
D G N D  
D G N D  
D G N D  
D G N D  
D G N D  
D G N D  
D G N D  
1 2 8  
8 6  
8 3  
7 6  
6 9  
6 1  
5 3  
4 5  
3 7  
2 9  
2 1  
1 4  
6
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8. Bill of Materials  
The following table provides the bill of materials for the ISP1561 evaluation board.  
Quantity Part Type  
Designator  
JP3 JP4  
C3 C4 C5 C6 C7 C8 C9 C10 C11  
Footprint  
RADO.2  
0603  
Description  
2
13  
0.001 µF  
C12 C13 C16 C17  
3
29  
0.01 µF  
0.1 µF  
C59 C60 C61  
C18 C19 C20 C21 C22 C23 C24  
0603  
0603  
C25 C26 C27 C28 C29 C30 C31  
C32 C33 C34 C35 C36 C37 C38  
C39 C40 C41 C42 C43 C44 C45  
C46  
6
7
1
14  
R22 R23 R24 R25 R26 R27  
C47 C48 C49 C50 C51 C54 C55  
C74  
0603  
0603  
REC1/2  
0603  
0 Ω  
100 pF  
100 µF/10 V  
10 kΩ  
R1 R2 R3 R4 R5 R6 R7 R8 R9 R10  
R11 R12 R13 R14  
1
1
8
2
1
1
4
2
1
1
1
1
1
4
3
1
3
8
1
1
R18  
OSC1  
0603  
XTAL1  
0603  
0603  
30 ppm  
12 k1%  
12 MHz  
15 kΩ  
R37 R38 R39 R40 R41 R42 R43 R44  
R20 R21  
C63  
C64  
C70 C71 C72 C73  
C1 C2  
C75  
R19  
1 kΩ  
2.2 µF /10 V  
2.2 µF /6.3 V  
220 µF/10 V  
22 pF  
22 µF/10 V  
330 Ω  
33 Ω  
4.7 µF/6.3 V  
470 pF  
47 µF/10 V  
47 µF /6.3 V  
48 MHz  
4 kΩ  
560 Ω  
REC1/2  
0603  
REC1/2  
0603  
R28  
C65  
C62  
0603  
CASE-D  
CASE-D  
XTAL3  
0603  
0603  
0603  
C66 C67 C68 C69  
C56 C57 C58  
OSC2  
R15 R16 R17  
R29 R30 R31 R32 R33 R34 R35 R36  
R45  
U1  
30 to 50 ppm, optional  
optional  
optional  
51 kΩ  
AT24C01A-2.7  
Atmel I2C-bus  
EEPROM; optional  
Murata  
7
2
1
4
BLM18PG121SN1 FB1 FB2 FB3 FB4 FB8 FB9 FB10  
BLM31PG121SN1 FB5 FB6  
BLM41PG600SN1 FB7  
1206  
1206Cust  
Murata; optional  
Murata; optional  
PSR05-PD10611-  
Protek devices;  
optional  
ESD  
ESD1 ESD2 ESD3 ESD4  
1
1
1
1
HEADER 3  
HEADER 4X2  
ISP1561  
JP1  
JP2  
U2  
J1  
SIP3  
Optional  
Optional  
Philips  
PCB mount socket pin  
diameter 2.5; optional  
Optional  
JACK  
9
LED  
D1 D2 D3 D4 D5 D6 D7 D8 D9  
LED3  
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Quantity Part Type  
ISP1561 Evaluation Board User’s Guide  
Designator  
U3 U4  
CON2  
CON3  
CON4  
Footprint  
SO-8  
Description  
Micrel  
2
1
1
1
1
MIC2526  
USB 1  
USB 2  
USB 3  
USB 4  
USB-TYPEA  
USB-TYPEA  
USB-TYPEA  
USB-TYPEA  
CON5  
9. References  
ISP1561 Hi-Speed USB PCI host controller datasheet  
Designing a USB 2.0 Host PCI Adapter Using ISP1561 application note  
Universal Serial Bus System Architecture, First and Second Editions from MindShare  
Universal Serial Bus Specification Rev. 1.1  
Universal Serial Bus Specification Rev. 2.0  
PCI Local Bus Specification, Rev. 2.2  
PCI Bus Power Management Interface Specification, Rev. 1.1  
PCI System Architecture, Fourth Edition from MindShare.  
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User’s Guide  
Rev. 2.0—April 2003  
20 of 20  
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Philips Semiconductors  
Philips Semiconductors is a worldwide company with over 100 sales  
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sales offices please e-mail  
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© Koninklijke Philips Electronics N.V. 2003  
All rights reserved. Reproduction in whole or in part is prohibited  
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changed without notice. No liability will be accepted by the publisher  
for any consequence of its use. Publication thereof does not convey  
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property rights.  
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