Philips MP3 Player TDA9605H User Manual

INTEGRATED CIRCUITS  
DATA SHEET  
TDA9605H  
Audio processor with head amplifier  
for VHS hi-fi  
1999 Apr 14  
Product specification  
File under Integrated Circuits, IC02  
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Philips Semiconductors  
Product specification  
Audio processor with head amplifier for VHS hi-fi  
TDA9605H  
1
FEATURES  
All functions controlled via the serial 2-wire I2C-bus  
Integrated standby modes for low power consumption  
Audio FM head amplifier:  
– Programmable recording current  
– Programmable playback amplification  
– Fast record-mute mode control input.  
Hi-fi signal processing:  
2
GENERAL DESCRIPTION  
The TDA9605H is a single-chip device in a small package  
that contains all the required functions, including the head  
amplifier, to realize the audio FM hi-fi stereo system in a  
VHS video recorder (see Fig.1). The device is adjustment  
free by use of an integrated auto-calibration system.  
Extensive signal select functions are offered to support  
pay-TV decoding and video recorder feature modes.  
– Adjustment free  
– High performance  
– Low distortion switching noise suppressor  
– NTSC and PAL (SECAM) system.  
Linear audio input:  
The high performance and functionality of the TDA9605H  
comprises world-wide system and application  
requirements for NTSC, PAL, SECAM and multi-standard  
video recorders from basic up to high-end models.  
– Programmable (playback) level.  
5 stereo inputs and additional mono Second Audio  
Program (SAP) input  
2 stereo outputs (line and decoder) with independent  
output select function  
RF converter output with overload-protection AGC  
Integrated output power muting  
Audio level meter output  
Extensive input and output select function  
Full support of video recorder feature modes.  
3
ORDERING INFORMATION  
TYPE  
PACKAGE  
NUMBER  
NAME  
DESCRIPTION  
VERSION  
TDA9605H  
QFP44  
plastic quad flat package; 44 leads (lead length 1.3 mm);  
SOT307-2  
body 10 × 10 × 1.75 mm  
1999 Apr 14  
3
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   h
V
V
I
ref  
GND  
RMHID  
41  
ENVOUT  
44  
SDA SCL  
CC  
ref  
42  
43  
34  
27  
29  
28  
envelope  
output  
select  
+ playback  
40  
39  
HI-FI  
DETECTOR  
2
V
I C-BUS  
CCH  
SUPPLY  
DCL  
DCR  
INTERFACE  
GNDH  
RM HID  
HID  
AUTN  
HID  
DROPOUT  
CANCELING  
standby select  
NOISE REDUCTION  
37  
35  
LEVEL  
DETECTOR  
HF AGC  
PBIN1  
PBIN2  
26  
25  
24  
23  
NOISE  
DETECTOR  
DETL  
HF LIMITER  
PLL  
CCO  
(1.3 or  
1.4 MHz)  
5th ORDER  
AUDIO LPF  
SUPPRESSION  
W + FM  
RECTIFIER  
DCL  
1.3 or 1.4 MHz  
playback head  
amplification,  
record head  
current  
EMPHL  
DCFBL  
AUDIO  
CLIPPER  
COMPRESSOR  
EXPANDER  
CCA  
36  
38  
RECOUT  
HMSW  
HF LFP  
RM  
LEVEL  
DETECTOR  
30  
31  
32  
33  
M
+
DETECTOR  
RECTIFIER  
DETR  
DCR  
5th ORDER  
AUDIO LPF  
NOISE  
HF LIMITER  
PLL  
CCO  
(1.7 or  
1.8 MHz)  
W + FM  
SUPPRESSION  
carrier ratio select,  
record-mute  
EMPHR  
DCFBR  
playback. +  
record-mute,  
recording  
1.7 or 1.8 MHz  
COMPRESSOR  
EXPANDER  
CCA  
AUDIO  
CLIPPER  
HEAD AMPLIFIER  
HF LFP  
decoder  
select  
SAP  
TUL  
TUR  
1
2
+1 dB 12 V  
SAP  
TUNL  
TUNR  
CINL  
FM (DE-)MODULATOR  
volume left  
3
19  
20  
AUTN output select  
TUL  
E1L  
SAP  
DECL  
DECR  
4
5
L
CINR  
M
E1L  
E1R  
E2L  
E2R  
TUR  
E1R  
SAP  
+
+
+
+
+
6
EXT1L  
EXT1R  
EXT2L  
EXT2R  
AUXL  
AUXR  
M
7
R
N
M
line select  
8
dub  
volume right  
M
9
16  
15  
10  
11  
LINEL  
N
E2L  
E2R  
MUTEL  
dub  
17  
18  
envelope output  
select + record  
LINER  
input select  
I/O CONTROL  
MUTER  
mute  
PEAK HOLD  
PEAK HOLD  
DCL  
DCR  
L
V
AUTO-MUTE  
SAP  
CC  
M
TUL  
TUR  
+
+
M
R
13  
14  
normal  
input  
level  
RFCOUT  
MUTEC  
E2L  
E2R  
M
normal select  
TDA9605H  
RF converter  
mute  
21  
22  
12  
MGR834  
2
I C-bus  
= mute  
M
LINOUT LININ  
RFCAGC  
control  
Fig.1 Block diagram.  
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Philips Semiconductors  
Product specification  
Audio processor with head amplifier for VHS hi-fi  
TDA9605H  
5
PINNING  
SYMBOL PIN  
DESCRIPTION  
tuner input mono  
SYMBOL PIN  
DESCRIPTION  
SAP  
1
2
3
4
5
6
7
8
9
DCL  
25 DC decoupling noise reduction  
connection left  
TUNL  
TUNR  
CINL  
tuner input left  
DETL  
26 detector noise reduction connection  
left  
tuner input right  
CINCH input left  
CINCH input right  
external 1 input left  
external 1 input right  
external 2 input left  
external 2 input right  
GND  
Iref  
27 ground  
CINR  
28 reference standard current connection  
29 reference voltage connection  
EXT1L  
EXT1R  
EXT2L  
EXT2R  
AUXL  
AUXR  
Vref  
DETR  
30 detector noise reduction connection  
right  
DCR  
31 DC decoupling noise reduction  
connection right  
10 auxiliary input left  
11 auxiliary input right  
EMPHR  
DCFBR  
32 emphasis noise reduction connection  
right  
RFCAGC 12 RF converter AGC timing connection  
RFCOUT 13 RF converter output  
33 DC feedback noise reduction  
connection right  
MUTEC  
MUTEL  
LINEL  
14 mute for RF converter output  
15 mute for line output left  
16 line output left  
VCC  
34 power supply  
PBIN2  
35 head 2 playback input  
RECOUT 36 recording current output  
LINER  
MUTER  
DECL  
17 line output right  
PBIN1  
HMSW  
GNDH  
VCCH  
37 head 1 playback input  
18 mute for line output right  
19 decoder output left  
20 decoder output right  
21 linear audio output  
22 linear audio input  
38 head amplifier mode switch connection  
39 ground of head amplifier  
DECR  
40 power supply of head amplifier  
LINOUT  
LININ  
RMHID  
41 record-mute mode or head  
identification input  
DCFBL  
23 DC feedback noise reduction  
connection left  
SDA  
SCL  
42 I2C-bus data input/output  
43 I2C-bus clock input  
EMPHL  
24 emphasis noise reduction connection  
left  
ENVOUT 44 HF or AF envelope output  
1999 Apr 14  
5
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Philips Semiconductors  
Product specification  
Audio processor with head amplifier for VHS hi-fi  
TDA9605H  
1
2
3
4
5
6
7
8
9
33 DCFBR  
EMPHR  
SAP  
TUNL  
32  
TUNR  
CINL  
31 DCR  
30 DETR  
CINR  
29 V  
ref  
EXT1L  
EXT1R  
EXT2L  
EXT2R  
28 I  
ref  
TDA9605H  
27 GND  
26 DETL  
25 DCL  
AUXL 10  
AUXR 11  
24 EMPHL  
23 DCFBL  
MGR835  
Fig.2 Pin configuration.  
6
FUNCTIONAL DESCRIPTION  
Input and output selections for the various modes are given in the following diagrams:  
Standard operating mode (see Fig.3)  
Dub-mix mode (see Fig.4)  
Standby mode: active or passive (see Fig.5).  
1999 Apr 14  
6
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  h
decoder select  
TUNER  
line output  
amplification  
DECL  
DECR  
EXT1  
SAP  
MUTE  
TUNL  
TUNR  
OUTPUT SELECT  
input select  
TUNER  
tape  
volume left  
output select  
MUTE  
PBIN1  
PBIN2  
0 dB  
+1 dB  
CINL  
CINR  
RECOUT  
CINCH  
EXT1  
MUTE  
(47 to 0 dB;  
0 to +15 dB)  
line select  
LEFT  
EXT1L  
EXT1R  
LINEL  
LINER  
RIGHT  
EXT2  
HI-FI  
EXT2  
SAP  
AUX  
EXT2L  
EXT2R  
STEREO  
NORMAL  
NORMAL  
NORMAL  
NORMAL  
OUTPUT SELECT  
AUDIO FM  
PROCESSING  
MUTE  
(47 to 0 dB;  
0 to +15 dB)  
SAP  
RF converter AGC  
LEFT  
AUXL  
AUXR  
DUB MIX  
NORMAL  
RIGHT  
STEREO  
0 dB AGC  
MUTE  
RFCOUT  
(1)  
volume right  
envelope select  
OUTPUT SELECT  
STEREO  
normal select  
normal input level  
ENVOUT  
HF envelope  
HF ENVELOPE  
MGR836  
INPUT SELECT  
INPUT LEFT  
VOLUME  
VOLUME LEFT  
SAP  
MUTE  
(0 to +14 dB)  
TUNER  
EXT2  
LINOUT LININ  
linear audio  
processing  
MUTE  
(1) For dub-mix mode signal selections see Fig.4.  
Fig.3 Input and output selections for standard operating mode.  
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  h
decoder select  
TUNER  
line output  
amplification  
DECL  
DECR  
EXT1  
SAP  
MUTE  
TUNL  
TUNR  
OUTPUT SELECT  
input select  
tape  
volume aux  
output select  
MUTE  
PBIN1  
PBIN2  
0 dB  
+1 dB  
CINL  
CINR  
RECOUT  
MUTE  
(47 to 0 dB;  
0 to +15 dB)  
line select  
LEFT  
EXT1L  
EXT1R  
LINEL  
LINER  
RIGHT  
EXT2  
HI-FI  
STEREO  
NORMAL  
NORMAL  
NORMAL  
NORMAL  
EXT2L  
EXT2R  
OUTPUT SELECT  
AUDIO FM  
PROCESSING  
MUTE  
(47 to 0 dB;  
0 to +15 dB)  
SAP  
RF converter AGC  
(playback)  
AUXL  
AUXR  
DUB MIX  
0 dB AGC  
MUTE  
RFCOUT  
volume hi-fi  
MUTE  
LEFT  
RIGHT  
LEFT  
normal select  
normal input level  
RIGHT  
INPUT SELECT  
INPUT LEFT  
VOLUME  
VOLUME LEFT  
SAP  
MUTE  
LEFT  
RIGHT  
LEFT  
MUTE  
(0 to +14 dB)  
RIGHT  
envelope select  
TUNER  
OUTPUT SELECT  
STEREO  
EXT2  
LINOUT LININ  
ENVOUT  
MUTE  
linear audio  
processing  
(record)  
HF envelope  
HF ENVELOPE  
MGR837  
Dub-mix mode: IS2 = 1, IS1 = 0 and IS0 = 1.  
Input mixing of the hi-fi (playback) signal with the auxiliary, used for linear audio dubbing recording.  
Selections generally used in combination with dub-mix mode are shown in heavy line type.  
Fig.4 Input and output selections for dub-mix mode.  
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hadnbo,kfullpagewidt  
decoder select  
TUNER  
line output  
amplification  
DECL  
DECR  
EXT1  
SAP  
MUTE  
TUNL  
TUNR  
OUTPUT SELECT  
input select  
output select  
0 dB  
+1 dB  
CINL  
CINR  
line select  
EXT1L  
EXT1R  
LINEL  
LINER  
MUTE  
EXT2  
MUTE  
EXT2L  
EXT2R  
OUTPUT SELECT  
SAP  
RF converter AGC  
AUXL  
AUXR  
RFCOUT  
MUTE  
MGR838  
a. Active standby mode (bit STBA = 1, bit STBP = 0); over 80% power reduction.  
TUNL  
TUNR  
input select  
CINL  
CINR  
EXT1L  
EXT1R  
MUTE  
EXT2L  
EXT2R  
SAP  
AUXL  
AUXR  
b. Passive standby mode (bit STBP = 1); over 90% power reduction.  
Fig.5 Input and output selections for standby modes.  
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Product specification  
Audio processor with head amplifier for VHS hi-fi  
TDA9605H  
The state of the RM control signal on pin RMHID is don’t  
care in the playback mode.  
6.1  
Record-mute mode or head identification  
selection  
I2C-bus control bits HAC2, HAC1 and HAC0 offer a wide  
selection of playback amplification to fit different head and  
head transformer specifications. The advised setting of the  
playback amplification realizes a level of 24 mV (RMS) for  
each carrier signal after the head amplifier to obtain a  
17 dB overhead compared to the auto-normal level (hi-fi  
detection). However, performance is not critical and a  
different setting can be used if desired.  
Pin RMHID allows input of two independent digital control  
signals for selecting the record-mute or head identification  
modes which are voltage coded. The RM control signal is  
selected via a 10 kresistor and the HID control signal is  
selected via a 18 kresistor. This set-up enables the two  
signals within the TDA9605H to be separated. The RM  
control signal is only in use during the record mode  
(bit AFM = 1); during the playback mode (bit AFM = 0) the  
RM signal is ignored. Pin RMHID should be connected to  
ground when the RM control signal is not used.  
The carrier level can be measured using the HF envelope  
output voltage on pin ENVOUT (bit EOS = 1). During  
standard operating mode the HF envelope signal is  
derived from the left channel carrier amplitude  
The use of the RM control signal is optional since the same  
function is available via the I2C-bus control in the  
(1.3 or 1.4 MHz carrier) but the special test 10 of the test  
mode also enables the HF envelope output of the right  
channel carrier amplitude (1.7 or 1.8 MHz carrier).  
The advised carrier playback level of 24 mV (RMS) equals  
an HF envelope voltage of 3.3 V.  
record-mute mode. However, accurate timing of recording  
start and stop may sometimes be difficult to realize via the  
I2C-bus control. In this event the RM control signal can be  
used instead. There is also the possibility to use the  
record-mute mode control line of the video head amplifier.  
The head amplifier output signal can be monitored directly  
by using test 8 of the test mode. Pin ENVOUT functions as  
the test output showing 6 dB attenuation compared to the  
actual head amplifier output level (see Section 14.4).  
6.2  
Hi-fi audio output level  
When the application circuit is used in accordance with the  
application diagram, the standard FM deviation of 50 kHz  
equals a 1 kHz audio signal of 8 dBV line output level  
(bit LOH = 0). A different standard audio level can be  
selected by changing the external filter components of the  
noise reduction on pins EMPHL and EMPHR  
(see Section 14.3). The standard audio level changes  
proportionally to the impedance of the external  
de-emphasis filter.  
Table 1 Selection of the head signal  
HID  
SIGNAL  
SELECTION OF  
HEAD SIGNAL  
LEVEL ON PIN RMHID  
LOW  
lower than 0.6 V or  
pin PBIN2  
between 2.65 and 3.8 V (head 2)  
HIGH  
between 1.0 and 2.35 V pin PBIN1  
6.3  
Reference current  
or higher than 4.3 V  
(head 1)  
The external resistor connected to pin Iref defines the  
internal reference currents and determines the  
temperature stability of circuits adjusted by the  
auto-calibration function.  
6.4.2  
RECORD-MUTE MODE  
The record-mute mode is selected by setting bit AFM = 1  
and either setting bits DOC, SHH and DETH to logic 0 or  
switching the RM control signal to HIGH-level.  
6.4  
Head amplifier  
During the record-mute mode no recording current is  
present on pin RECOUT (see Fig.6). The head amplifier  
status actually equals the playback mode, however, the  
second amplifier stage is disabled to minimize power  
consumption.  
6.4.1  
PLAYBACK MODE  
The playback mode is selected by setting bit AFM = 0.  
During the playback mode the input circuit on pins PBIN2  
and PBIN1 is enabled (see Fig.6). Pin RECOUT is  
disabled and pin HMSW shows a low impedance to  
ground, so realizing an AC ground for the head circuit via  
the external capacitor connected between these pins.  
The RM control signal on pin RMHID enables fast  
switching between the record and record-mute modes  
(see Table 2). If the I2C-bus control is set to the record  
mode, the use of record-mute mode control via pin RM  
allows for accurate timing of recording start and stop,  
independent of the I2C-bus control (see Section 6.1).  
The head identification (HID) signal on pin RMHID selects  
between the head signals on pins PBIN2 or PBIN1. Head  
selection is defined as shown in Table 1.  
1999 Apr 14  
10  
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Philips Semiconductors  
Product specification  
Audio processor with head amplifier for VHS hi-fi  
TDA9605H  
The DC bias current on pin RECOUT is changed  
proportional to the selected recording current for  
optimizing the performance and minimizing the power  
consumption for each recording current selected.  
Table 2 Selection of recording modes  
RM  
LEVEL ON  
PIN RMHID  
RECORD MODE  
SIGNAL  
LOW  
lower than 2.35 V record or record-mute  
mode as defined by  
A Boucherot damping circuit is connected between  
pin HMSW and ground to prevent head current resonance  
peaking. A capacitor of 10 nF and a resistor of 470 are  
specified in Fig.14, but the component values are not  
critical.  
I2C-bus control  
HIGH  
higher than 2.65 V record-mute mode  
6.4.3  
RECORD MODE  
6.4.4  
HEAD AMPLIFIER POWER SUPPLY AND GROUND  
The record mode is selected by setting bit AFM = 1 and  
setting bits DOC, SHH and DETH from logic 001 to 111  
and switching the RM control signal to LOW-level.  
The head amplifier is supplied via a separate 5 V supply  
(pin VCCH) and ground (pin GNDH).  
During the record mode actual recording is activated and  
the recording current is output on pin RECOUT  
(see Fig.6). Pins PBIN2 and PBIN1 form a connection to  
the 5 V head amplifier supply voltage (VCCH). Pin HMSW  
is internally connected to pin RECOUT and the external  
capacitor has no function in this mode.  
A capacitor of 100 nF should be placed close to the device  
between pins VCCH and GNDH for proper decoupling of  
the power supply.  
The head amplifier ground (pin GNDH) should be  
connected to the main ground (pin GND).  
The desired carrier mix ratio is set via I2C-bus control  
bits DOC, SHH and DETH. A wide selection of recording  
currents is available to fit different head and head  
transformer specifications and are set via bits HAC2,  
HAC1, HAC0 and range bit HRL. The setting of the carrier  
mix ratio does not change the selected recording current.  
V
CCH  
35 kΩ  
PBIN2  
PBIN2  
35  
36  
35  
36  
AH2  
AH1  
AH2  
AH1  
GNDH  
RECOUT  
RECOUT  
V
CCH  
35 kΩ  
PBIN1 37  
HMSW 38  
PBIN1 37  
HMSW 38  
5 Ω  
GNDH  
GNDH  
GNDH  
TDA9605H  
TDA9605H  
MGR841  
a. Playback mode and record-mute mode.  
b. Record mode.  
Fig.6 Simplified circuit diagrams of the head amplifier modes.  
1999 Apr 14  
11  
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Philips Semiconductors  
Product specification  
Audio processor with head amplifier for VHS hi-fi  
TDA9605H  
frequency difference between the left and right channel  
carrier near to 401.2 kHz. This value effectively reduces  
the crosstalk from hi-fi carriers to video colour signal as  
present during Extended Play (EP) tape speed. NTSC  
calibration uses a standard HID control signal of 29.97 Hz  
(pulse width =16.683 ms) where PAL calibration uses a  
standard HID control signal of 25 Hz (pulse  
width = 20 ms). After auto-calibration the maximum  
frequency error is ±5 kHz assuming a time error of  
maximum of 5 µs when the HID control signal is at  
HIGH-level. Jitter on the HID control signal should not  
exceed 1 µs to realize EP optimization within ±2 kHz for  
NTSC. In general, the crystal based HID control signal  
available in the video recorder can be used without  
modification.  
6.5  
Automatic calibration  
The integrated auto-calibration system is activated by  
means of bit CALS of the power byte (see Fig.7).  
The auto-calibration system ensures hi-fi processing is  
well in accordance with the VHS hi-fi system standard by  
an automated adjustment of carrier frequencies,  
band-pass filters and noise reduction filters. Calibration is  
only needed after start-up of the video recorder.  
The calibration settings remain stable as long as the  
supply voltage (VCC) is present.  
Auto-calibration is only executed in the record-mute mode  
or record mode and no standby mode or test mode should  
be selected, i.e. auto-calibration requires the setting of  
bit AFM = 1, bit STBP = 0, bit STBA = 0 and bit TEST = 0.  
Auto-calibration is started after setting bit CALS = 1.  
Calibration is performed fully automatically, using the HID  
control signal as a time reference. Audio signals are not  
disturbed during the calibration process.  
When the calibration of the oscillators is completed the  
band-pass filters are calibrated. The integrated weighting  
and FM de-emphasis filters of the noise reduction are  
calibrated at the same time.  
Calibration of the oscillator frequencies is performed by  
measuring the number of oscillator cycles within one  
period when the HID control signal is at HIGH-level and  
comparing this result with an internal value stored in the  
Read Only Memory (ROM). Four different ROM values are  
available for NTSC or PAL (SECAM) system calibration of  
both the left and right channel carrier.  
The total auto-calibration time needed is maximum  
17 cycles of the HID control signal. Completion of the  
calibration is signalled by bit CALR =1 of the read byte.  
The calibration can also be monitored by means of the  
envelope output. For this purpose the voltage on  
pin ENVOUT is forced to >2.5 V during the calibration.  
The audio signal to the audio envelope function (level  
meter) should be muted (i.e. output select = mute).  
In case of NTSC a special routine is active for the  
calibration of the right channel carrier which results in a  
2
I C-bus write bit CALS  
logic 0  
logic 1  
RMHD input  
left channel oscillator  
right channel oscillator  
band-pass and  
noise reduction filters  
logic 0 logic 1  
2
I C-bus read bit CALR  
ENVOUT output  
5 V  
3 V  
4 V  
calibration  
ready  
MGR842  
Fig.7 Example of automatic calibration flow.  
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Product specification  
Audio processor with head amplifier for VHS hi-fi  
TDA9605H  
Otherwise, the audio envelope output voltage may  
become >2.5 V which makes it impossible to detect the  
completion of the calibration on pin ENVOUT.  
6.6  
Power muting  
Switching off and on of the power supply voltage or using  
the built-in passive standby mode results in rising and  
dropping of the output DC voltages and causes strong  
disturbances on the output pins. The TDA9605H includes  
three integrated mute switches to block such disturbances  
so avoiding the need for an external mute circuit. Pop-free  
line and RF converter output signals are realized by  
connecting the integrated power mute switches behind the  
line and RFC output capacitors.  
Calibration relies upon the frequency accuracy of the HID  
control signal. The calibration result may be incorrect  
when the HID control signal is disturbed during a critical  
part of the calibration. An additional check is incorporated  
to detect such a situation by reading bit CALE during  
calibration. When bit CALE = 1, the calibration result is  
detected to be unreliable due to external causes. A new  
auto-calibration can be started by setting bit CALS = 0  
followed by setting bit CALS = 1. Bit CALE always reads  
logic 1 when bit CALS is logic 0.  
Power muting is active when bit MUTE = 1 (see Fig.8).  
Power muting is automatically activated when VCC is  
switched on, because this situation is the Power-on reset  
default state. The integrated mute switches on  
pins MUTEC, MUTEL and MUTER are closed and form a  
low-impedance path to ground. Furthermore, the  
pins RFCOUT, LINEL and LINER are current limited to  
1 mA to avoid excessive supply currents and to achieve  
good noise attenuation without the need for a series  
resistor between the output and mute pins. Pins DECL and  
DECR are also current limited for using the integrated  
power mute switches or for assisting external muting.  
The oscillators and band-pass filters can be switched  
between NTSC and PAL system frequencies after a  
calibration in NTSC or PAL mode without the need of  
additional calibration. Switching between these system  
modes is executed immediately and can be done in any  
operating mode. The frequency accuracy of system  
switching is 100 ±3 kHz for both carriers. To obtain the  
best possible frequency accuracy in the record mode it is  
good practice to recalibrate after system switching.  
V
CC  
auto-mute  
(V  
< 7 V)  
CC  
(1)  
(1)  
2
bit MUTE (I C-bus)  
2
bit STBP (I C-bus)  
RFCOUT  
LINEL  
LINER  
output signal  
with power mute  
MUTEC  
MUTEL  
MUTER  
auto-mute  
power  
off  
active  
operation  
passive  
standby  
active  
operation  
power off  
(standby)  
active  
operation  
power  
off  
t
t
t
t
t
mute  
MGR843  
mute  
mute  
mute  
mute  
(1) Power-on reset.  
Fig.8 Examples of power mute control and the auto-mute function.  
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Product specification  
Audio processor with head amplifier for VHS hi-fi  
TDA9605H  
During power muting the internal output signal is also  
muted. After the output DC voltage has been established  
power muting can be de-activated by setting bit MUTE = 0.  
Now the mute switches are opened resulting in a  
high-impedance path of 100 kto ground. The output  
current limiting is not active.  
6.7  
Envelope output  
Pin ENVOUT is an analog output for stereo audio level  
(e.g. level meter display) and for playback FM carrier level  
(e.g. auto-tracking). The functional diagram is given in  
Fig.9 and the timing diagram is shown in Fig.10. Only one  
ADC input is needed on the microcontroller for reading all  
the required information.  
Power muting is also used in combination with the  
integrated passive standby mode (bit STBP = 1). During  
this mode the output circuits are switched off and the line,  
decoder and RF converter output voltages decrease to 0 V  
using a discharge current of 1 mA. Do not set power mute  
mode and change the passive standby mode at the same  
time. Power mute mode should be activated first, followed  
by switching on or off of the passive standby mode to avoid  
possible output glitches.  
During the playback mode the selection between audio  
level and carrier level information is realized by setting  
I2C-bus control bit EOS (see Table 3). The AF envelope  
output is defined by the signal selection made at the output  
select.  
During the record mode bit EOS offers the selection  
between the audio level of the output select or the audio  
level of the fixed hi-fi stereo signal. This is a helpful setting  
when the microcontroller uses the audio level information  
to adjust the hi-fi recording level (volume control).  
It should be noted that the time needed for stabilizing the  
output DC voltage is proportional to the output capacitor  
value. A safe mute time is 200 ms using a 10 µF capacitor  
(tmute = C ×20000 s). Power muting consumes  
approximately 4 mA additional supply current, so to obtain  
minimum power consumption the mute mode should be  
de-activated after use. Very good performance is achieved  
for power-up, power-down and passive standby mode  
switching.  
The HF envelope output signal is continuous and is  
derived from the left channel carrier. The HF envelope  
output exhibits a logarithmic characteristic (see Fig.11).  
In a standard application circuit only the left channel carrier  
level is required to support auto-tracking or manual  
tracking. However, test 10 of the special test mode allows  
for the right channel carrier level output instead for  
measurement purposes (see Section 14.4).  
An auto-mute function is included which activates power  
muting when the supply voltage drops below 7 V.  
The performance of this auto-mute function depends upon  
the power voltage drop rate. The voltage drop rate should  
not exceed 1 V during 10 ms. The best performance  
independent of voltage drop rate is realized by activating  
the passive standby mode before switching off the power  
supply voltage (by setting bit MUTE = 1 and bit STBP = 1).  
The AF envelope output as a function of the output level is  
given in Fig.12.  
The AF envelope circuit uses time multiplexing for the left  
and right channel audio level. A peak-hold function and  
dynamic range compression (square root function) are  
included for easy read out. The peak-hold function and the  
left and right channel multiplexing are controlled by the  
HID control signal on pin RMHID (see Table 4).  
Table 3 Selection of the envelope output  
MODE  
BIT AFM  
BIT EOS  
ENVELOPE OUTPUT  
AF envelope: via output select level meter display  
HF envelope auto-tracking or manual tracking display  
AF envelope: via output select level meter display  
AF envelope: hi-fi stereo record volume control (and level display)  
FUNCTION  
Playback  
0
1
0
1
0
Record  
1
Table 4 AF envelope output with channel multiplexing  
HID SIGNAL  
LOW  
LEVEL ON PIN RMHID  
AF ENVELOPE OUTPUT  
lower than 0.6 V or between 2.65 and 3.8 V  
between 1.0 and 2.35 V or higher than 4.3 V  
left channel audio peak level  
right channel audio peak level  
HIGH  
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Product specification  
Audio processor with head amplifier for VHS hi-fi  
TDA9605H  
RM  
RMHID  
HID  
t
d
left channel audio:  
output select  
hi-fi  
SAMPLE  
RESET  
FULL-WAVE  
RECTIFIER  
SQUARE ROOT  
COMPRESSION  
SAMPLE-  
AND-HOLD  
PEAK HOLD  
right channel audio:  
output select  
ENVOUT  
SAMPLE  
RESET  
FULL-WAVE  
RECTIFIER  
SQUARE ROOT  
COMPRESSION  
AF  
envelope  
SAMPLE-  
AND-HOLD  
PEAK HOLD  
hi-fi  
EOS • AFM  
EOS • AFM  
HF  
envelope  
1.3 or 1.4 MHz carrier  
1.7 or 1.8 MHz carrier  
HF LEVEL DETECTOR  
HF LEVEL DETECTOR  
test  
10  
MGR845  
Fig.9 Functional diagram of the envelope output circuit.  
2
I C-bus  
registers  
EOS = 0 or AFM = 1  
EOS = 1 and  
AFM = 0  
HID signal  
0
1
2
3
HID period  
ENVOUT  
peak right  
in period 1  
peak right  
in period +1  
peak right  
in period 0  
peak right  
in period +2  
peak left  
in period +3  
peak left  
in period 1  
peak left  
in period 0  
HF envelope  
peak left  
in period 2  
left (period 0)  
left (period 1)  
left (period 2)  
right (period 2)  
MGR844  
level meter  
display  
tracking level  
indication  
right (period 0)  
right (period 1)  
Fig.10 Timing diagram of the envelope output signal.  
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Product specification  
Audio processor with head amplifier for VHS hi-fi  
TDA9605H  
MGR846  
MGR847  
5
5
handbook, halfpage  
handbook, halfpage  
ENVOUT  
output  
ENVOUT  
output  
voltage  
voltage  
4
4
(V)  
(V)  
3
2
3
2
1
1
0
0
40  
1  
2
3
10  
1
10  
10  
10  
30  
20  
10  
0
10  
LINEL and LINER output level (dBV)  
left channel carrier amplitude (RMS value) (mV)  
1.3 MHz (NTSC) or 1.4 MHz (PAL) at internal node between head  
amplifier and HF AGC.  
Bit LOH = 0.  
Fig.11 HF envelope output (playback carrier level).  
Fig.12 AF envelope output (audio peak level).  
6.8  
RF converter output  
MGR848  
handbook, halfpage  
RF  
An AGC function is incorporated to avoid overmodulation  
in the RF converter connected to pin RFCOUT. The AGC  
limits the maximum signal level on the RF converter output  
to 3 dBV (see Fig.13).  
converter  
output  
(dBV)  
3  
The RF converter output can be muted by setting  
bit RFCM = 1. When using this RF converter mute, the  
AGC control is reset by discharging the capacitor  
connected to pin RFACG.  
3  
line output (dBV)  
Fig.13 AGC output of RF converter.  
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Audio processor with head amplifier for VHS hi-fi  
TDA9605H  
The circuit changes into a mixing desk when using the  
dub-mix mode of the input select function in combination  
with the volume setting of normal select. A new linear  
audio recording can be created by mixing together the new  
and the original sound.  
6.9  
Audio dubbing  
The TDA9605H includes unparalleled functionality  
supporting the audio dubbing function of hi-fi video  
recorders. Audio dubbing is a feature which enables the  
recording of new sound material on the linear audio track  
(i.e. normal sound) of an existing recording. The dub-mix  
mode is selected by setting bit IS2 = 1, bit IS1 = 0 and  
bit IS0 = 1. Audio dubbing can be used in two different  
ways:  
Continuous user control over amplitude and ratio mix of  
the auxiliary input signal (e.g. a microphone input) and the  
original hi-fi playback sound is possible using the left and  
right channel volume controls. This function is realized  
inside the IC by connecting the auxiliary input signal pair  
(pins AUXL and AUXR) to the left channel volume control  
and the hi-fi output signal pair to the right channel volume  
control.  
Output mix  
Input mix.  
6.9.1  
OUTPUT MIX  
The settings of the output select function are used to  
arrange the hi-fi selection and the output signals in the  
dub-mix mode. However, some of these settings are  
overruled in the dub-mix mode. The normal signal is  
available on the line outputs for monitoring the dub-mix  
recording signals in the output select function modes  
mix-left, mix-right and mix-stereo.  
A new additional recording is made on the linear audio  
track. In the playback mode, the new linear audio sound  
and the original hi-fi sound are combined. In this way the  
hi-fi stereo quality remains and the linear audio sound is  
partly used (e.g. for commentary only). However, there is  
no control over the original hi-fi sound.  
Mixing of the hi-fi and normal sound signals in the playback  
mode is supported by the output select function mix-left,  
mix-right and mix-stereo (bits OSN, OSR and OSL) and  
creates a new fixed output signal of 12 × hi-fi plus  
12 × normal.  
Mix-stereo of the output select function is generally used  
for audio dubbing. In combination with the volume setting  
of normal select, user control over amplitude and ratio is  
offered for the auxiliary and the hi-fi signal as follows:  
(14 × aux left + 14 × aux right) × volume left plus  
(14 × hi-fi left + 14 × hi-fi right) × volume right.  
6.9.2  
INPUT MIX  
The dub-mix mode is to be used in the (hi-fi) playback  
mode. In the record mode, a signal loop from output to  
input can be closed which may cause audio oscillation.  
The auto-normal switching is not active during the dub-mix  
mode. The hi-fi sound is muted when no hi-fi input signal  
is detected; bit AUTN is not affected.  
A new complete recording is made on the linear audio  
track (see Fig.4). In the playback mode, only the linear  
audio sound is used. In this way the hi-fi stereo quality is  
lost, but total freedom in defining the new sound material  
is an extra advantage. Furthermore, such recording is no  
longer restricted to playback on hi-fi video recorders (with  
an output mix option).  
Table 5 Dub-mix mode  
DUB-MIX INPUT  
OUTPUT SELECT  
MODE  
DUB-MIX OUTPUT  
SELECTION  
LEFT CHANNEL  
aux stereo  
RIGHT CHANNEL  
mute  
mute  
mute  
hi-fi left  
hi-fi left  
hi-fi right  
hi-fi stereo  
normal  
aux stereo  
aux stereo  
aux stereo  
aux stereo  
aux stereo  
aux stereo  
aux stereo  
hi-fi left  
hi-fi right  
hi-fi stereo  
normal  
hi-fi right  
hi-fi stereo  
mute  
mix-left  
normal  
hi-fi left  
mix-right  
mix-stereo  
normal  
hi-fi right  
hi-fi stereo  
normal  
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Audio processor with head amplifier for VHS hi-fi  
TDA9605H  
7
I2C-BUS PROTOCOL  
7.1  
Addresses and data bytes  
Full control of the TDA9605H is accomplished via the 2-wire I2C-bus. Bus speeds up to 400 kbits/s can be used in  
accordance with the I2C-bus fast-mode specification.  
Seven data byte registers are available for programming the device (write mode) and one data byte register is available  
for reading data from the device (read mode). The registers are addressable via eight subaddresses. Automatic  
subaddress incrementing enables writing of successive data bytes in one transmission.  
During power-up, the data byte registers and auto-calibration registers are reset to a default state by the use of a  
Power-On Reset (POR) circuit. The reset signal is derived from an internally generated voltage supplied by VCC  
.
Table 6 Addresses and POR state bits  
NAME  
ADDRESS  
BIT 7  
BIT 6  
BIT 5  
BIT 4  
BIT 3  
BIT 2  
BIT 1  
BIT 0  
Write mode  
Slave byte  
B8H  
1
0
0
0
1
0
1
0
1
0
0
0
0
Subaddress byte  
00H to 07H;  
note 1  
0 or 1  
0 or 1  
0 or 1  
Control byte  
POR state  
subaddress 00H AFM  
DOC  
0
SHH  
0
DETH  
0
NTSC  
1
HAC2  
0
HAC1  
0
HAC0  
0
1
Select byte  
POR state  
subaddress 01H DOS1  
DOS0  
0
s5  
HRL  
0
NIL3  
0
NIL2  
0
NIL1  
0
NIL0  
0
0
0(2)  
IS1  
0
Input byte  
subaddress 02H i7  
IS2  
0
IS0  
0
NS2  
1
NS1  
1
NS0  
1
i0  
POR state  
0(2)  
0(2)  
RFCM  
1
Output byte  
POR state  
subaddress 03H LOH  
OSN  
0
OSR  
0
OSL  
0
EOS  
0
LOS  
0
DOS  
0
0
subaddress 04H l7  
0(2)  
Left volume byte  
POR state  
VLS  
1
VL5  
0
VL4  
0
VL3  
0
VL2  
0
VL1  
0
VL0  
0
Right volume byte  
POR state  
subaddress 05H r7  
0(2)  
VRS  
1
VR5  
0
VR4  
0
VR3  
0
VR2  
0
VR1  
0
VR0  
0
Volume byte  
Power byte  
POR state  
subaddress 06H simultaneous loading of the subaddress 04H and subaddress 05H registers  
subaddress 07H CALS  
0
VCCS  
0
TEST  
0
PORR HPD  
MUTE  
1
STBP  
0
STBA  
0
0
0
Read mode  
Slave address byte B9H  
1
0
1
1
1
0
0
1
Read byte  
B9H  
CALR  
AUTN  
CALE  
POR  
0(3)  
0(3)  
0(3)  
0(3)  
Notes  
1. Continuous writing to a single data byte register is possible when subaddresses F0H to F7H (1111 0xxx) are used  
instead of 00H to 07H (0000 0xxx). In that case automatic subaddress incrementing is disabled.  
2. It is advised to keep the not-used write bits equal to the POR state to accommodate future compatibility.  
3. You cannot rely upon the state of the not-used read bits because their state may change during development.  
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Product specification  
Audio processor with head amplifier for VHS hi-fi  
TDA9605H  
7.2  
Valid transmissions to and from the TDA9605H  
Table 7 Examples of valid transmissions  
FUNCTION  
Write  
DATA TRANSFER SEQUENCE  
START, B8H, 00H, data for 00, STOP  
START, B8H, 00H, data for 00, data for 01, data for 02, STOP  
Write with auto-increment  
Write with auto-increment ‘wrap-around’ START, B8H, 07H, data for 07, data for 00, data for 01, STOP  
Write without auto-increment  
Read  
START, BBH, F6H, data for 06, data for 06, data for 06, STOP  
START, B9H, data from IC, STOP  
Read (continued)  
START, B9H, data from IC, data from IC, data from IC, STOP  
7.3  
Overview of the TDA9605H I2C-bus control  
Table 8 Condensed overview  
FUNCTION  
Audio FM mode  
MODES  
playback and record  
on and off  
CONTROL BITS  
AFM  
DOC  
SHH  
DETH  
Playback dropout cancelling  
Playback head switch noise cancel time 6 µs and 8 µs  
Playback hi-fi carrier detection time  
Record-mute and carrier ratio select  
slow and fast  
record-mute, 3, 4.5, 6, 8, 9.5, 11  
and 12.5 dB mix ratio  
DOC, SHH and DETH  
System standard  
NTSC and PAL  
NTSC  
Playback head amplifier amplification  
Record head amplifier current  
48, 51, 54, 57, 60, 63, 66 and 69 dB  
HAC2, HAC1 and HAC0  
12.5, 15, 17.5, 21, 25, 30, 35, 42, 50, 60, HAC2, HAC1, HAC0 and HRL  
71 and 84 mA (p-p)  
Normal input level  
Input select  
0 to 14 dB and mute  
NIL3, NIL2, NIL1 and NIL0  
tuner, CINCH, ext1, ext2, SAP, dub-mix, IS2, IS1 and IS0  
normal and aux  
Normal select  
input select, volume, input-left,  
NS2, NS1 and NS0  
volume-left, SAP, tuner, ext2 and mute  
Line output amplification  
Output select  
0 dB and +1 dB  
LOH  
mute, left, right, stereo, normal, mix-left, OSN, OSR and OSL  
mix-right and mix-stereo  
Envelope select  
Line select  
output select, stereo and HF envelope  
output select and ext2  
EOS and AFM  
LOS  
Decoder select  
RF converter mute  
Volume left  
output select, tuner, ext1, SAP and mute DOS, DOS1 and DOS0  
0 dB AGC and mute  
RFCM  
47 to 0 dB, mute and 0 to 15 dB  
47 to 0 dB, mute and 0 to 15 dB  
off and start calibration  
9 V and 12 V  
VLS and VL5 to VL0  
VRS and VR5 to VR0  
CALS  
Volume right  
Auto-calibration  
Supply voltage select  
Test  
VCCS  
standard operating mode and test mode TEST, HRL, NIL3, NIL2, NIL1  
and NIL0  
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Audio processor with head amplifier for VHS hi-fi  
TDA9605H  
FUNCTION  
MODES  
CONTROL BITS  
Playback head amplifier disable  
standard operating mode and playback HPD  
disabled  
Power output muting  
Operating mode  
power mute  
MUTE  
standard operating mode, active standby STBP and STBA  
and passive standby  
7.4  
Control byte at subaddress 00H  
The control byte is used to set the parameters of hi-fi processing and head amplifier control.  
7.4.1  
AUDIO FM MODE  
Bit AFM controls the main mode of the hi-fi processing and head amplifier. The function of other bits of the control byte  
and bit EOS of the output byte depends on the state of bit AFM.  
Table 9 Audio FM mode selection (bit AFM)  
AFM  
MODE  
playback  
DESCRIPTION  
0
1
hi-fi processing in playback mode and head amplifier in playback mode  
record  
hi-fi processing in record mode and head amplifier is in record mode or record-mute mode  
7.4.2  
PLAYBACK MODE  
When during the playback mode no FM carrier is detected from tape, the normal audio signal on pin LININ is  
automatically selected by the output select function.  
For this auto-normal mode:  
The timing of the hi-fi carrier detection can be selected via bit DETH which defines the auto-normal release time:  
– Fast mode: hi-fi detection delay is 1 to 2 HID control signal periods (for NTSC: 33 to 66 ms; for PAL: 40 to 80 ms)  
– Slow mode: hi-fi detection delay is 7 to 8 HID control signal periods (for NTSC: 233 to 267 ms;  
for PAL: 280 to 320 ms).  
The state of hi-fi detection and auto-normal can be monitored by I2C-bus control bit AUTN of the read byte.  
In case automatic selection of the normal audio signal is not required the normal input level control can be set to mute  
(bits NIL3 to NIL0 of the select byte).  
Table 10 Dropout cancelling (bit DOC), sample-and-hold high-state (bit SHH) and detector time hi-fi (bit DETH) in the  
playback mode; note 1  
AFM DOC SHH DETH  
MODE  
playback and DOC off  
playback and DOC on  
DESCRIPTION  
0
0
0
0
0
0
0
1
X
X
0
X
X
X
X
0
dropout cancelling disabled  
dropout cancelling active  
X
X
X
X
playback and sample-and-hold time = 6 µs head switch noise cancel time set to 6 µs  
playback and sample-and-hold time = 8 µs head switch noise cancel time set to 8 µs  
playback and hi-fi detect = fast  
playback and hi-fi detect = slow  
1
X
X
fast mode hi-fi detector timing  
slow mode hi-fi detector timing  
1
Note  
1. X = don’t care.  
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Product specification  
Audio processor with head amplifier for VHS hi-fi  
TDA9605H  
7.4.3  
RECORD MODE  
During the record-mute mode, the recording output current on pin RECOUT is muted and the head amplifier is partly  
disabled. The record mode, set by I2C-bus control, can also be changed to the record-mute mode by an external control  
signal on pin RMHID. Sometimes the record-mute mode is named loop-through mode or EE mode.  
Table 11 Dropout cancelling (bit DOC), sample-and-hold high-state (bit SHH) and detector time hi-fi (bit DETH) in the  
record mode  
AFM  
DOC  
SHH DETH  
MODE  
record-mute  
DESCRIPTION  
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
record-mute and no recording output current; note 1  
recording with 3 dB output carrier ratio (1 : 1.4)  
recording with 4.5 dB output carrier ratio (1 : 1.7)  
recording with 6 dB output carrier ratio (1 : 2)  
recording with 8 dB output carrier ratio (1 : 2.5)  
recording with 9.5 dB standard output carrier ratio (1 : 3)  
recording with 11 dB output carrier ratio (1 : 3.5)  
recording with 12.5 dB output carrier ratio (1 : 4.2)  
record and 3 dB mix  
record and 4.5 dB mix  
record and 6 dB mix  
record and 8 dB mix  
record and 9.5 dB mix  
record and 11 dB mix  
record and 12.5 dB mix  
Note  
1. Power-on reset state.  
7.4.4  
SYSTEM STANDARD SELECTION  
Bit NTSC selects between the NTSC and PAL (SECAM) system carrier frequencies for the CCO modulators or PLL  
demodulators and the band-pass filters. FM carrier frequencies of 1.3 and 1.7 MHz are used for the NTSC system where  
1.4 and 1.8 MHz are used for the PAL system. Different code settings for the auto-calibration circuit assure proper  
calibration using the standard HID control signal frequency of 29.97 Hz for NTSC mode and 25 Hz for PAL mode. After  
auto-calibration is completed bit NTSC enables instant switching between the NTSC and PAL system.  
Table 12 System standard selection (bit NTSC)  
NTSC  
MODE  
DESCRIPTION  
hi-fi circuit in PAL mode  
hi-fi circuit in NTSC mode; note 1  
0
1
PAL  
NTSC  
Note  
1. Power-on reset state.  
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Product specification  
Audio processor with head amplifier for VHS hi-fi  
TDA9605H  
7.4.5  
HEAD AMPLIFIER PLAYBACK AMPLIFICATION  
Eight settings of playback amplification can be selected for the head amplifier. The amplification values are valid for the  
head signals from pins PBIN1 or PBIN2 to the internal node between the head amplifier and HF AGC circuit. The setting  
of the playback amplification results in a selection of the hi-fi detection level (auto-normal function). The hi-fi detection  
level indicated is the RMS value of the left channel carrier signal on pins PBIN1 and PBIN2.  
The signal at the internal node can be monitored for testing purposes via pin ENVOUT using test 8 of the test mode.  
It should be noted that the output level of test 8 shows 6 dB attenuation compared to the internal node level.  
Table 13 Head amplifier control (bits HAC2, HAC1 and HAC0) in the playback mode  
AFM  
HAC2  
HAC1  
HAC0  
MODE  
48 dB  
DESCRIPTION  
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
hi-fi detection level equals 13 µV (RMS) from head  
hi-fi detection level equals 9.4 µV (RMS) from head  
hi-fi detection level equals 6.7 µV (RMS) from head  
hi-fi detection level equals 4.7 µV (RMS) from head  
hi-fi detection level equals 3.3 µV (RMS) from head  
hi-fi detection level equals 2.4 µV (RMS) from head  
hi-fi detection level equals 1.7 µV (RMS) from head  
hi-fi detection level equals 1.2 µV (RMS) from head  
51 dB  
54 dB  
57 dB  
60 dB  
63 dB  
66 dB  
69 dB  
7.4.6  
HEAD AMPLIFIER RECORD CURRENT  
A total of twelve settings of the recording current can be selected for the head amplifier record output pin RECOUT.  
Bit HRL of the select byte selects between high and low current settings. The recording current is defined as the  
peak-to-peak value of the current of the record output signal which includes both the left and right carrier signal.  
The selected recording current is independent of the selected record mix ratio setting, but recording is disabled during  
the record-mute mode as defined by the bits DOC, SHH and DETH or the control signal on pin RMHID.  
Table 14 Head amplifier control (bits HAC2, HAC1 and HAC0) and head record current low (bit HRL) in the record  
mode  
AFM HAC2 HAC1 HAC0 HRL  
MODE  
DESCRIPTION  
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
0
0
0
0
0
0
0
1
1
1
1
25 mA (p-p)  
30 mA (p-p)  
35 mA (p-p)  
42 mA (p-p)  
50 mA (p-p)  
60 mA (p-p)  
71 mA (p-p)  
84 mA (p-p)  
high recording current is 25 mA (p-p)  
high recording current is 30 mA (p-p)  
high recording current is 35 mA (p-p)  
high recording current is 42 mA (p-p)  
high recording current is 50 mA (p-p)  
high recording current is 60 mA (p-p)  
high recording current is 71 mA (p-p)  
high recording current is 84 mA (p-p)  
12.5 mA (p-p) low recording current is 12.5 mA (p-p)  
15 mA (p-p) low recording current is 15 mA (p-p)  
17.5 mA (p-p) low recording current is 17.5 mA (p-p)  
21 mA (p-p) low recording current is 21 mA (p-p)  
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Product specification  
Audio processor with head amplifier for VHS hi-fi  
TDA9605H  
7.5  
Select byte at subaddress 01H  
The select byte is used for decoder output select, record current range select and linear audio volume control.  
7.5.1  
DECODER OUTPUT SELECT  
By setting bit DOS = 0 of the output byte, the decoder output signal on pins DECL and DECR is defined by the output  
select function. However, by setting bit DOS = 1 the decoder select function enables several independent signal  
selections controlled via bits DOS1 and DOS0. Via the decoder select function the input signals on pins TUNL  
and TUNR, pins EXT1L and EXT1R and pin SAP can be selected. The mute mode can also be selected.  
The indicated decoder select function modes are also available during the active standby mode by setting bit STBA = 1.  
Table 15 Decoder output select (bits DOS1 and DOS0)  
DOS1  
DOS0  
MODE  
DESCRIPTION  
0
0
1
1
0
1
0
1
tuner  
ext1  
selection of input signal on pins TUNL and TUNR; note 1  
selection of input signal on pins EXT1L and EXT1R  
selection of input signal on pin SAP  
SAP  
mute  
muting the input signal  
Note  
1. Power-on reset state.  
7.5.2  
HEAD AMPLIFIER RECORD CURRENT RANGE SELECT  
The default selection of eight recording currents set by bits HAC2, HAC1 and HAC0 of the control byte is extended with  
four additional low level recording currents by setting bit HRL = 1.  
Table 16 Head amplifier record low current (bit HRL)  
HRL  
MODE  
high current  
low current  
DESCRIPTION  
0
1
selection of 8 medium and high-level recording currents; note 1  
selection of 4 low-level recording currents  
Note  
1. Power-on reset state.  
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Product specification  
Audio processor with head amplifier for VHS hi-fi  
TDA9605H  
7.5.3  
NORMAL INPUT LEVEL  
Fifteen settings of amplification and mute can be selected for the linear audio input signal on pin LININ. The normal input  
level control can replace the manual adjustment of the playback level at the linear audio circuit.  
All selections using the normal linear audio signal include the normal input level control.  
Table 17 Normal input level (bits NIL3 to NIL0)  
NIL3  
NIL2  
NIL1  
NIL0  
MODE  
DESCRIPTION  
0
0
:
0
0
:
0
0
:
0
1
:
0 dB  
1 dB  
:
amplification of linear audio of 0 dB; note 1  
amplification of linear audio of 1 dB  
:
1
1
1
1
1
1
0
1
1
1
0
1
13 dB  
14 dB  
mute  
amplification of linear audio of 13 dB  
amplification of linear audio of 14 dB  
linear audio signal muted  
Note  
1. Power-on reset state.  
7.6  
Input byte at subaddress 02H  
The input byte is used for input selection of the hi-fi and linear audio.  
7.6.1  
INPUT SELECT  
The input select function defines the input signal which is forwarded to the volume control function of hi-fi processing and  
usually via the normal select function to the external linear audio circuit on pin LINOUT.  
Table 18 Input select (bits IS2, IS1 and IS0)  
IS2  
IS1  
IS0  
MODE  
tuner  
DESCRIPTION  
0
0
0
0
1
1
0
0
1
1
0
0
0
1
0
1
0
1
tuner input signal on pins TUNL and TUNR; note 1  
CINCH input signal on pins CINL and CINR  
TV input signal on pins EXT1L and EXT1R  
decoder input signal on pins EXT2L and EXT2R  
mono input signal on pin SAP  
CINCH  
ext1  
ext2  
SAP  
dub-mix  
input signal on pins AUXL and AUXR (for left channel)  
and from hi-fi output signal (for right channel); note 2  
1
1
1
1
0
1
normal  
aux  
from linear audio circuit (from pin LININ)  
input on pins AUXL and AUXR (e.g. camcorder input)  
Notes  
1. Power-on reset state.  
2. The dub-mix mode is a special selection which supports audio dubbing. This video recorder feature enables the  
recording of the sound signal of the linear audio only (see Section 6.9).  
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Product specification  
Audio processor with head amplifier for VHS hi-fi  
TDA9605H  
7.6.2  
NORMAL SELECT  
The normal select function defines which of the input signals is forwarded to pin LINOUT for the connection to an external  
linear audio circuit.  
Table 19 Normal select (bits NS2, NS1 and NS0)  
NS2  
0
NS1  
0
NS0  
0
MODE  
DESCRIPTION  
input select left plus right channel signal selected by input select  
0
0
1
volume  
left plus right channel signal including hi-fi volume control  
selected by input select  
0
0
1
1
0
1
input-left  
left channel only (language 1) selected by input select  
volume-left left channel only (language 1) including hi-fi volume control  
selected by input select  
1
1
1
1
0
0
1
1
0
1
0
1
SAP  
tuner  
ext2  
mono input signal from pin SAP  
tuner input signal from pins TUNL and TUNR  
external input signals from pins EXT2L and EXT2R  
mute of the input signals; note 1  
mute  
Note  
1. Power-on reset state.  
7.7  
Output byte at subaddress 03H  
The output byte is used for selecting and controlling the output.  
7.7.1  
LINE OUTPUT AMPLIFICATION  
An additional 1 dB amplification for the line and decoder outputs on pins LINEL, LINER, DECL and DECR can be  
selected by the line output high function.  
Table 20 Line output high (bit LOH)  
LOH  
MODE  
0 dB  
DESCRIPTION  
no line output amplification; note 1  
1 dB line output amplification  
0
1
1 dB  
Note  
1. Power-on reset state.  
7.7.2  
OUTPUT SELECT  
The auto-normal function is activated when no hi-fi signal is found on tape in the playback mode. Except for the mute  
mode, all output select function modes will be overruled and changed to normal. Control of normal input level should be  
set to mute for muting the hi-fi sound. The state of the auto-normal function can be monitored by reading bit AUTN of the  
read byte.  
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Product specification  
Audio processor with head amplifier for VHS hi-fi  
TDA9605H  
Table 21 Output select normal, right and left (bits OSN, OSR and OSL)  
OSN  
OSR  
OSL  
MODE  
mute  
DESCRIPTION  
mute; no selection; note 1  
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
left  
left hi-fi channel selected (language 1)  
right hi-fi channel selected (language 2)  
hi-fi stereo selected  
right  
stereo  
normal  
mix-left  
mix-right  
normal signal selected (linear audio from pin LININ)  
mix of hi-fi left with normal (12 × left + 12 × normal)  
mix of hi-fi right with normal (12 × right + 12 × normal)  
mix-stereo mix of hi-fi stereo with normal (12 × stereo + 12 × normal)  
Note  
1. Power-on reset state.  
In case the dub-mix mode is selected via the input select function, the performance of mix-left, mix-right and mix-stereo  
modes is changed to support audio dubbing input mixing. The hi-fi channel is available for the input select function and  
normal sound is available at the output for monitoring the linear audio recording. The auto-normal state is ignored during  
the dub-mix mode and the hi-fi playback signal is muted instead.  
Table 22 Dub-mix mode (bits OSN, OSR and OSL)  
OSN  
OSR  
OSL  
MODE  
mute  
OUTPUT IN DUB-MIX MODE  
mute  
INPUT IN DUB-MIX MODE  
mute  
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
left  
left channel  
left channel  
right  
right channel  
stereo signal  
normal signal  
normal signal  
normal signal  
right channel  
12 × left + 12 × right  
mute  
stereo  
normal  
mix-left  
mix-right  
left channel  
right channel  
12 × left + 12 × right  
mix-stereo normal signal  
7.7.3  
ENVELOPE OUTPUT SELECT  
The output signal on pin ENVOUT is selected via the envelope select function.  
In the playback mode the HF envelope displays the amplitude of the left channel carrier. Display of the right channel  
carrier amplitude for special measurement purposes can be selected via test 10 in the test mode.  
Table 23 Envelope output select (bit EOS)  
AFM  
X(1)  
0
EOS  
MODE  
output select  
HF envelope  
stereo envelope  
DESCRIPTION  
0
1
1
audio peak envelope of selected signal via output select function; note 2  
HF envelope of the left channel carrier in the playback mode  
audio peak envelope of the hi-fi stereo signal in the record mode  
1
Notes  
1. X = don’t care.  
2. Power-on reset state.  
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Product specification  
Audio processor with head amplifier for VHS hi-fi  
TDA9605H  
7.7.4  
LINE OUTPUT SELECT  
7.7.6  
RF CONVERTER MUTE  
An independent selection of the input signals from  
pins EXT2L and EXT2R to the line outputs on pins LINEL  
and LINER is offered by the line select function.  
The RF converter output signal on pin RFCOUT can be  
muted by setting bit RFCM = 1. In this mute mode, the  
AGC capacitor on pin RFCAGC is discharged and the  
AGC control is reset.  
In the active standby mode (bit STBA = 1) the output  
select signal is muted. However, the line select function of  
the ext2 input signal is still operating.  
Table 26 RF converter mute (bit RFCM)  
RFCM  
MODE  
AGC  
DESCRIPTION  
In combination with the decoder select function a complete  
pay-TV decoder switching feature is offered via the  
SCART connector.  
0
RF converter output signal is set by  
the output select function:  
AGC active  
Table 24 Line output select (bit LOS)  
1
mute  
RF converter output signal is muted  
and AGC control is reset; note 1  
LOS  
MODE  
output  
DESCRIPTION  
Note  
0
line output signal is set by output  
select; note 1  
select  
1. Power-on reset state.  
1
ext2  
line output signal is from input  
signal on pins EXT2L and EXT2R  
7.8  
Volume bytes at subaddresses 04H, 05H  
and 06H  
Note  
1. Power-on reset state.  
The volume bytes are used to set left and right channel  
volume control.  
7.7.5  
DECODER OUTPUT SELECT  
7.8.1  
Left and right volume control  
The output signals on pins DECL and DECR can be  
selected by the decoder select function. By setting  
bit DOS = 0, the output signals are selected by the output  
select function. By setting bit DOS = 1, an independent  
selection between the input signals on pins TUNL  
and TUNR, pins EXT1L and EXT1R, pin SAP or mute is  
possible. These signals are selected by the decoder select  
function (bits DOS1 and DOS2).  
Left channel volume control can be set by using  
subaddress 04H. Right channel volume control can be set  
by using subaddress 05H. Left and right channel volume  
control can be set simultaneous by using subaddress 06H.  
In the active standby mode (bit STBA = 1) the output  
select signal is muted. However, the decoder select  
function is still operating.  
In combination with the line select function a complete  
pay-TV decoder switching feature is offered via the  
SCART connector.  
Table 25 Decoder output select (bit DOS)  
DOS  
MODE  
DESCRIPTION  
0
output  
select  
decoder output signal is set by the  
output select function; note 1  
1
decoder decoder output signal is set by the  
select decoder select function  
Note  
1. Power-on reset state.  
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Product specification  
Audio processor with head amplifier for VHS hi-fi  
TDA9605H  
Table 27 Volume left sign (bit VLS), volume left (bits VL5 to VL0), volume right sign (bit VRS) and volume right  
(bits VR5 to VR0); note 1  
VLS  
VRS  
VL5  
VR5  
VL4  
VR4  
VL3  
VR3  
VL2  
VR2  
VL1  
VR1  
VL0  
VR0  
MODE  
DESCRIPTION  
volume 0 dB  
0
0
0
:
0
0
0
:
0
0
0
:
0
0
0
:
0
0
0
:
0
0
1
:
0
1
0
:
0 dB  
1 dB  
2 dB  
:
volume 1 dB  
volume 2 dB  
:
0
0
0
1
1
1
:
1
1
1
X
X
X
:
0
0
1
X
X
X
:
1
1
X
0
0
0
:
1
1
X
0
0
0
:
1
1
X
0
0
1
:
0
1
X
0
1
0
:
46 dB  
47 dB  
mute  
0 dB  
1 dB  
2 dB  
:
volume 46 dB  
volume 47 dB  
mute  
volume 0 dB; note 2  
volume 1 dB  
volume 2 dB  
:
1
1
X
X
X
X
1
1
1
1
1
1
0
1
14 dB  
15 dB  
volume 14 dB  
volume 15 dB  
Notes  
1. X = don’t care.  
2. Power-on reset state.  
The combination of bit CALR = 1 and bit CALE = 0  
indicates a successful calibration. Bit CALS should remain  
at logic 1 after the calibration to keep a reliable state of  
bit CALR and bit CALE.  
7.9  
Power byte at subaddress 07H  
The power byte is used for power-up settings and the  
standby control mode.  
7.9.1  
CALIBRATION START  
7.9.2  
DC OUTPUT VOLTAGE SELECTION  
Automatic frequency calibration by setting the hi-fi modem,  
the band-pass filter and the noise reduction is performed  
after a change of bit CALS from logic 0 to logic 1. The use  
of auto-calibration is only needed after power-up  
The DC output level on pins LINEL, LINER, DECL  
and DECR can be changed by setting bit VCCS to  
maximize the output power when using a supply voltage  
of 12 V.  
(Power-on reset) of the supply voltage (see Section 6.5).  
The use of power muting (bit MUTE = 1) ensures  
disturbance free switching of the line output signal when  
setting bit VCCS after power-up.  
Table 28 Calibration start (bit CALS)  
CALS  
MODE  
DESCRIPTION  
Table 29 VCC supply voltage select (bit VCCS)  
0
1
no calibration note 1  
start  
start of the automatic calibration  
cycle  
VCCS  
MODE  
9 V  
DESCRIPTION  
calibration  
0
line and decoder output DC voltage  
is 4.5 V; note 1  
Note  
1. Power-on reset state.  
1
12 V  
line and decoder output DC voltage  
is 6 V  
The output signal on pin ENVOUT or bit CALR (calibration  
ready) and bit CALE (calibration error) of the read byte can  
be monitored to check for completion of the calibration.  
Note  
1. Power-on reset state.  
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Product specification  
Audio processor with head amplifier for VHS hi-fi  
TDA9605H  
7.9.3  
TEST MODE  
7.9.5  
HEAD AMPLIFIER DISABLE  
Several special tests can be selected for test, evaluation  
and measurement purposes. The selection of these tests  
is made by setting bit HRL and bits NIL3 to NIL0.  
See Section 14.4 for an overview of the test modes.  
Bit HPD offers a special setting intended for use with some  
of the built-in test modes and for support of particular  
applications that do not require use of the integrated head  
amplifier. By setting bit HPD = 1 the head amplifier  
playback circuit is disabled. This mode enables direct input  
signal to the HF AGC circuit via pin HMSW (AC coupled  
via a 10 nF capacitor).  
Table 30 Test mode (bit TEST)  
TEST  
MODE  
DESCRIPTION  
0
operating standard operating; note 1  
mode  
Table 32 Head amplifier playback disable (bit HPD)  
HPD  
MODE  
DESCRIPTION  
1
test mode test mode for special  
measurements  
0
operating standard operating mode; note 1  
mode  
Note  
1. Power-on reset state.  
1
head  
amplifier mode (for test or special  
disable application)  
head amplifier disabled in playback  
7.9.4  
POWER-ON RESET  
Note  
1. Power-on reset state.  
Setting bit PORR = 1 ensures a reset of bit POR of the  
read byte to logic 0. In this way, a reading of logic 1 for  
bit POR always indicates the occurrence of an actual  
I2C-bus register Power-on reset and can not be caused  
accidentally by other I2C-bus control bits. Bit PORR has no  
control function but it is an unused bit, dedicated by name  
to change the I2C-bus register content from the Power-on  
reset state.  
7.9.6  
POWER MUTING  
The power mute function controls the mute switches on the  
line and RF converter outputs. The power mute mode is  
automatically activated via the Power-on reset function  
during power-up of the supply voltage. During  
power-down, the mute switches are activated  
Bit POR of the read byte is a logic AND function for  
checking all I2C-bus register bits. Bit POR will read logic 1  
when the I2C-bus register content equals the Power-on  
reset default state and also when this state is set via the  
I2C-bus control. Since a setting of bit PORR = 1 differs  
from the Power-on reset default state, it forces a reset of  
bit POR to logic 0 independent of other bit settings.  
automatically by means of the auto-mute circuit which is  
independent of the setting of bit MUTE. When setting  
bit MUTE = 1 the output current on pins RFCOUT, LINEL,  
LINER, DECL and DECR is limited to 1 mA for controlled  
power-up response and the selected output signal is  
muted (see Section 6.6).  
Table 33 Power mute (bit MUTE)  
Table 31 Resetting of bit POR (bit PORR)  
MUTE  
MODE  
DESCRIPTION  
PORR  
MODE  
DESCRIPTION  
0
no mute  
power muting released: mute  
switches are open  
0
1
no reset  
note 1  
reset of bit POR (read byte)  
bit POR  
reset  
1
mute  
power muting activated: mute  
switches are closed; note 1  
Note  
Note  
1. Power-on reset state.  
1. Power-on reset state.  
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Product specification  
Audio processor with head amplifier for VHS hi-fi  
TDA9605H  
7.9.7  
STANDBY SELECT  
7.10.1 CALIBRATION READY  
The TDA9605H is switched in the low-power active  
standby mode by setting bit STBA = 1. Most circuits are  
switched inactive for reducing power consumption.  
However, the RF converter, line and decoder outputs  
remain active in this mode and the direct audio selections  
offered via the line select function and the decoder select  
function remain available. The selected output signal is  
muted during the active standby mode.  
The completion of calibration is signalled by changing  
bit CALR from logic 0 to logic 1. Bit CALR remains logic 0  
if for some reason a calibration can not be completed (i.e.  
no HID control signal available or the hi-fi processing is in  
the playback mode). Bit CALR will also return to logic 0 if  
calibration is lost due to a Power-on reset situation.  
Additional information about the calibration result is  
available via bit CALE. Calibration is found correct if  
bit CALR = 1 and bit CALE = 0.  
The TDA9605H is switched in the minimum power passive  
standby mode by setting bit STBP = 1. All circuits are  
switched inactive to obtain minimum power consumption  
except for the power mute circuit, the I2C-bus and the line  
input reference buffer (i.e. the DC voltage on pins 1 to 11  
remains active). When bit STBP = 1 a discharge current of  
1 mA is active on pins RFCOUT, LINEL, LINER, DECL  
and DECR.  
Pin ENVOUT can also be used to monitor calibration  
(see Section 6.5).  
Table 35 Calibration ready (bit CALR)  
CALR  
DESCRIPTION  
not calibrated; note 1  
auto-calibration completed  
0
1
Power muting ensures disturbance-free switching of the  
line and RF converter outputs to and from the passive  
standby mode. In the passive standby mode power muting  
can be de-activated again to achieve minimum power  
consumption. The calibration and I2C-bus registers are not  
affected in the active standby or passive standby mode.  
Note  
1. Power-on reset state.  
7.10.2 AUTO-NORMAL SELECTION  
The auto-normal function is activated when no hi-fi carrier  
input signal is detected in the playback mode.  
Table 34 Standby passive (bit STBP) and standby active  
(bit STBA); note 1  
The auto-normal function overrules the settings of the  
output select function and selects normal sound (i.e. linear  
audio) instead of hi-fi. The state of the auto-normal  
function can be checked by reading bit AUTN.  
STBP STBA  
MODE  
DESCRIPTION  
0
0
operating standard operating mode:  
full function; note 2  
0
1
active  
standby  
active standby mode:  
reduced power  
consumption  
The auto-normal function and therefore bit AUTN is only  
valid in the playback mode. Bit AUTN is always logic 0 in  
the record mode.  
1
X
passive  
standby  
passive standby mode:  
minimum power  
consumption  
Table 36 Auto-normal (bit AUTN)  
AUTN  
DESCRIPTION  
Notes  
0
hi-fi carrier available; audio FM signal is  
detected from tape in playback mode; note 1  
1. X = don’t care.  
1
normal sound selected instead of hi-fi carrier;  
no audio FM signal is detected from tape  
2. Power-on reset state.  
7.10 Read byte  
Note  
The read byte is used for reading the device state  
information.  
1. Power-on reset state.  
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Product specification  
Audio processor with head amplifier for VHS hi-fi  
TDA9605H  
Detecting the occurrence of a Power-on reset by reading  
bit POR requires a setting of bit PORR = 1 after power-up.  
Bit POR is forced to logic 0 only by setting bit PORR = 1,  
so this setting is independent of other I2C-bus bit settings.  
7.10.3 CALIBRATION ERROR  
An unreliable calibration result is indicated when reading  
bit CALE = 1. The calibration result is not reliable when  
during calibration the control signal on pin RMHID is  
disturbed due to an external cause. Such a disturbance of  
the HID control signal is detected when reading  
bit CALE = 1. A new calibration should be started to  
ensure proper calibration.  
After calibration a Power-on reset occurrence is also  
indicated by bit CALR = 0, because calibration will be lost.  
Table 38 Power-on reset (bit POR)  
Calibration is found correct when bit CALR = 1 and  
bit CALE = 0.  
POR  
DESCRIPTION  
0
I2C-bus bit state differs from the Power-on reset  
state  
I2C-bus bit state equals the Power-on reset  
state; note 1  
Table 37 Calibration error (bit CALE)  
1
CALE  
DESCRIPTION  
0
not calibrated or calibration result is found  
correct; note 1  
Note  
1. Power-on reset state.  
1
calibration error encountered during calibration  
Note  
1. Power-on reset state.  
7.10.4 POWER-ON RESET  
An internal Power-on reset signal is generated at  
power-up or during a power voltage dip. The I2C-bus data  
bits and auto-calibration registers are reset to a  
pre-defined state. When reading bit POR = 1, it indicates  
that the internal data bits are found to be in the POR state  
due to an actual Power-on reset or the I2C-bus control  
settings.  
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Product specification  
Audio processor with head amplifier for VHS hi-fi  
TDA9605H  
8
LIMITING VALUES  
In accordance with the Absolute Maximum Rating System (IEC 134).  
SYMBOL PARAMETER CONDITIONS  
VCC  
MIN.  
MAX.  
13.2  
UNIT  
supply voltage  
0
0
V
V
VCCH  
Tstg  
head amplifier supply voltage  
storage temperature  
5.5  
65  
0
+150  
70  
°C  
°C  
V
Tamb  
Ves  
operating ambient temperature  
electrostatic handling voltage  
machine model  
300  
3000  
+300  
+3000  
human body model  
V
Ilu(prot)  
latch-up protection current on  
pin HSMW  
Tj = 100 °C  
70  
60  
100  
+100  
+100  
+100  
mA  
mA  
mA  
pin SDA  
all other pins  
9
THERMAL CHARACTERISTICS  
SYMBOL  
PARAMETER  
CONDITIONS  
VALUE  
60  
UNIT  
Rth(j-a)  
thermal resistance from junction to ambient in free air  
K/W  
10 GENERAL CHARACTERISTICS  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN.  
TYP.  
MAX.  
UNIT  
Supplies  
VCC  
supply voltage  
VCCS = 0  
8.1  
9
13.2  
V
VCCS = 1  
8.1  
4.75  
12  
5
13.2  
5.5  
48  
12  
6
V
VCCH  
ICC  
head amplifier supply voltage  
supply current  
V
standard operating mode  
active standby (STBA = 1)  
passive standby (STBP = 1)  
36  
8
mA  
mA  
mA  
mA  
mA  
mA  
mA  
mA  
mA  
4
ICCH  
head amplifier supply current playback mode  
record-mute mode  
21  
18  
23  
35  
67  
0
28  
24  
31  
47  
89  
record mode (HAC = 000)  
record mode (HAC = 011)  
record mode, (HAC = 111)  
active or passive standby  
(STBA = 1 or STBP = 1)  
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Product specification  
Audio processor with head amplifier for VHS hi-fi  
TDA9605H  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN.  
TYP.  
MAX.  
UNIT  
Internally generated voltage levels  
Vn1  
DC voltage on pins SAP,  
TUNL, TUNR, CINL, CINR,  
EXTL1, EXTLR, AUXL,  
3.8  
V
AUXR, LININ and RFCOUT  
Vn2  
Vn3  
DC voltage on pin LINOUT  
4.5  
4.5  
6
V
V
V
DC voltage on pins LINEL,  
LINER, DECL and DECR  
VCC = 9 V (VCCS = 0)  
VCC =12 V (VCCS = 1)  
Control signal input: pin RMHID  
VI input voltage  
record or record-mute with  
I2C-bus control (RM = LOW)  
for head 2 (HID = LOW)  
for head 1 (HID = HIGH)  
record-mute (RM = HIGH)  
for head 2 (HID = LOW)  
for head 1 (HID = HIGH)  
0
0.6  
V
V
1.0  
2.35  
2.65  
4.3  
3.8  
5.5  
V
V
11 RECORD-MUTE MODE CHARACTERISTICS  
CC = 12 V; Tamb = 25 °C; tuner audio input level 8 dBV at f = 1 kHz; Power-on reset state with output select = stereo;  
V
bit RFCM = 0; bit MUTE = 0; auto-calibrated; measured in typical application circuit of Fig.14; unless otherwise  
specified.  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN.  
TYP.  
MAX.  
UNIT  
Line inputs: pins SAP, TUNL, TUNR, CINL, CINR, EXT1L, EXT1R, EXT2L, EXT2R, AUXL and AUXR  
Vi  
Ri  
input voltage  
100  
130  
9
dBV  
input impedance  
kΩ  
Linear audio input: pin LININ  
Vi  
Ri  
input voltage  
100  
130  
8
dBV  
input impedance  
kΩ  
Linear audio output: pin LINOUT  
Vo  
Ro  
output voltage  
9  
8  
200  
7  
300  
dBV  
output impedance  
Line and decoder outputs: pins LINEL, LINER, DECL and DECR  
Vo  
output voltage  
normal output (LOH = 0)  
output = 1 dB (LOH = 1)  
VCC = 9 V; note 1  
9  
8  
7
8  
7  
8
7  
6  
150  
0.1  
dBV  
dBV  
dBV  
dBV  
mA  
mA  
Vo(max)  
maximum output voltage  
VCC = 12 V; note 1  
10  
11  
1
Io(dch)  
Io(max)  
Ro  
discharge output current  
output current limiting  
output impedance  
passive standby (STBP = 1)  
power mute (MUTE = 1)  
1  
100  
0.01  
THD  
total harmonic distortion  
%
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Product specification  
Audio processor with head amplifier for VHS hi-fi  
TDA9605H  
SYMBOL  
αcb  
PARAMETER  
channel balance  
CONDITIONS  
MIN.  
1  
TYP.  
MAX.  
+1  
UNIT  
dB  
0
Vn  
noise level  
tuner input signal at zero level  
−∞ dBV; note 2  
volume bytes left and right set  
to mute mode  
94  
96  
86  
90  
<93  
90  
70  
70  
70  
dBV  
αmute(v)  
αmute(o)  
αct(ch)  
αct(ch)(i)  
mute volume  
dB  
mute output  
output select bits set to mute  
mode  
dB  
crosstalk between channels  
one of tuner input signals at  
zero level dBV  
note 3  
dB  
crosstalk between input  
channels  
dB  
RF converter output: pin RFCOUT  
Vo  
output voltage  
tuner input signal at  
normal level -8 dB  
high level 8 dBV  
9  
4.5  
8  
3  
7  
1.5  
dBV  
dBV  
THD  
Vn  
total harmonic distortion  
noise level  
tuner input signal at  
normal level 8 dBV  
levels from 8 to +8 dBV  
tuner input signal on zero level  
−∞ dBV; note 2  
0.03  
<0.2  
80  
%
%
dBV  
Ro  
output impedance  
200  
1  
1
300  
mA  
mA  
Io(max)  
Io  
output current limiting  
discharge output current  
power mute (MUTE = 1)  
passive standby (STBP = 1)  
Power mute outputs: pins MUTEC, MUTEL and MUTER  
Ro  
output impedance  
no mute (MUTE = 0)  
50  
100  
15  
kΩ  
muting (MUTE = 1);  
DC load from 1 to +1 mA  
Audio peak envelope output: pin ENVOUT  
Vo  
output voltage  
tuner input signal at  
normal level 8 dBV  
at high level +8 dBV  
at zero level dBV  
1.65  
4.0  
1.8  
4.5  
1.96  
5.0  
V
V
V
V
0.3  
at zero level dBV and  
maximum volume +15 dB  
0.35  
αcb  
Ro  
channel balance  
output impedance  
0.11  
0
1
+0.11  
1.5  
V
kΩ  
Notes  
1. THD = 1%, output load with RL = 5 kand CL = 2.2 nF, volume = 3 dB for VCC = 12 V and tuner input level varied.  
2. B = 20 Hz to 20 kHz, unweighted.  
3. Crosstalk of any line input pair (tuner, CINCH, ext1, ext2, aux and SAP) to any other line input.  
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Product specification  
Audio processor with head amplifier for VHS hi-fi  
TDA9605H  
12 RECORD MODE CHARACTERISTICS  
VCC = 12 V; Tamb = 25 °C; tuner audio input level 8 dBV at f = 1 kHz; auto-calibrated; measured in typical application  
circuit of Fig.14; unless otherwise specified.  
SYMBOL PARAMETER  
Noise reduction (test 25b)  
CONDITIONS  
MIN.  
TYP. MAX. UNIT  
THD  
total harmonic distortion  
tuner input signal at  
normal level 8 dBV  
high level +8 dBV  
1  
0.1  
0.2  
0
0.3  
1.0  
+1  
%
%
αcb  
αlin  
channel balance  
linearity  
dB  
tuner input signal at  
low level 68 to 8 dBV  
high level 8 to +8 dBV  
tuner input signal level  
from to 8 dBV; note 1  
32  
7.5  
30.5 29  
dB  
dB  
dB  
8
8.5  
αn  
noise level with respect to  
signal level  
46  
41  
tatt  
attack time  
in accordance with VHS specification −  
in accordance with VHS specification −  
5
ms  
ms  
dB  
trec  
recovery time  
70  
0.2  
αres(f1)  
frequency response 300 Hz tuner input frequency from  
300 to 1000 Hz  
0.7  
3.1  
0.5  
+0.3  
αres(f2)  
frequency response 10 kHz tuner input frequency from  
10 to 1 kHz  
3.9  
4.7  
dB  
dB  
dB  
αres(lpf1)  
αres(lpf2)  
audio low-pass filter  
response 20 kHz  
tuner input frequency from  
20 to 1 kHz; test 26b  
0.1  
24  
+0.5  
12  
audio low-pass filter  
response 60 kHz  
tuner input frequency from  
60 to 1 kHz; test 26b  
FM modulator  
THD  
total harmonic distortion  
fFM = 50 kHz; test 25a and 26a  
0.1  
0.2  
%
fFM(max)  
maximum FM deviation of  
clipper  
test 25a and 26a  
140  
150  
160  
kHz  
fc(acc)  
fc  
carrier frequency accuracy  
auto-calibration  
5  
0
+5  
kHz  
carrier frequency difference fc(R) fc(L) for NTSC auto-calibration 399.2 401.2 403.2 kHz  
fc(shift)  
TC  
carrier frequency shift  
temperature coefficient  
NTSC/PAL system switching  
97  
100  
103  
kHz  
±50  
ppm/K  
Noise reduction and FM modulator  
fFM FM deviation  
Record output on pin RECOUT  
44.5  
50  
56.1  
kHz  
Io(acc)  
αf(acc)  
αIM2  
output current accuracy  
carrier mix ratio accuracy  
IM2 product  
left and right carrier 1st harmonic  
left compared to right carrier  
note 2  
1.5  
1  
0
+1.5  
+1  
dB  
dB  
dB  
0
66  
Notes  
1. B = 20 Hz to 20 kHz, unweighted.  
2. Amplitude of 400 kHz intermodulation product fc(R) and fc(L) compared to amplitude of recording current fc(R) + fc(L)  
.
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Product specification  
Audio processor with head amplifier for VHS hi-fi  
TDA9605H  
13 PLAYBACK MODE CHARACTERISTICS  
VCC = 12 V; Tamb = 25 °C; measured in typical application circuit of Fig.14; unless otherwise specified.  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN.  
TYP. MAX.  
UNIT  
Play back input on pins PBIN2 and PBIN1  
Ri  
input resistance  
700  
pF  
Ci  
input capacitance  
input noise voltage  
input noise current  
35  
Vn(i)  
In(i)  
0.5  
2.5  
nV/Hz  
pA/Hz  
Head mode switch: pin HSMW  
Ri input impedance  
Head amplifier  
with respect to ground  
1
2
Gacc  
Gbal  
αct  
gain accuracy  
test 8  
3  
1  
0
+3  
+1  
dB  
dB  
dB  
gain balance  
between pins PBIN1 and PBIN2  
between pins PBIN1and PBIN2  
0
head-to-head crosstalk  
45  
HF AGC (test 5)  
Vi(p-p) AGC start level  
playback mode (HPD = 1);  
left plus right channel  
47  
67  
10  
94  
mV  
(peak-to-peak value)  
control bandwidth  
B
note 1  
kHz  
Left channel band-pass filter (test 3)  
αf  
output voltage ratio  
(f0 400 kHz)/f0  
(f0 150 kHz)/f0  
30  
6  
5  
17  
12  
20  
12  
9  
30  
dB  
dB  
dB  
dB  
dB  
dB  
µs  
9  
9  
(f0 + 150 kHz)/f0  
(f0 + 250 kHz)/f0  
(f0 + 250 kHz)/(f0 + 150 kHz)  
(f0 + 400 kHz)/f0  
td(g)  
ripple group delay  
(f0 150 kHz) to (f0 + 150 kHz)  
0.5  
Right channel band-pass filter (test 4)  
αf  
output voltage ratio  
(f0 400 kHz)/f0  
(f0 250 kHz)/f0  
(f0 250 kHz)/(f0 150 kHz)  
(f0 1 150 kHz)/f0  
9  
9  
30  
10  
9  
20  
dB  
dB  
dB  
dB  
dB  
dB  
µs  
17  
12  
5  
6  
30  
0.5  
(f0 + 150 kHz)/f0  
(f0 + 400 kHz)/f0  
td(g)  
ripple group delay  
(f0 150 kHz) to (f0 + 150 kHz)  
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Product specification  
Audio processor with head amplifier for VHS hi-fi  
TDA9605H  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN.  
TYP. MAX.  
UNIT  
Hi-fi detector (bit AUTN)  
Vth(rms)  
Vth(acc)  
td(sw)  
threshold level (RMS value)  
playback mode (HPD = 1);  
left channel carrier  
2.4  
3.3  
0
4.6  
+5  
mV  
accuracy of threshold level  
left channel carrier on pins PBIN1 5  
and PBIN2  
dB  
switch-on delay  
carrier to no-carrier  
150  
300  
500  
µs  
Hi-fi dropout cancelling (bit DOC)  
Vth  
threshold level  
with respect to threshold level of 7  
bit AUTN  
4  
2  
dB  
td(sw)  
switch-off delay  
no-carrier to carrier  
5
9
14  
µs  
Head switching noise suppression  
th  
hold time  
sample-and-hold time bit SHH = 0 5  
sample-and-hold time bit SHH = 1 7  
6
7
µs  
µs  
dB  
µs  
8
9
THD  
td  
total harmonic distortion  
delay  
test 25c; note 2  
0.3  
73  
between HID control signal and  
hold status  
PLL FM demodulator (test 25c)  
Vi  
sensitivity  
fFM = 150 kHz; S/N = 35 dB  
normal; fFM = 50 kHz  
maximum; fFM = 150 kHz  
fFM = 50 to 0 kHz  
54  
0.3  
0.05  
0.2  
60  
1
mV  
%
THD  
total harmonic distortion  
0.3  
1.5  
%
S/N  
signal-to-noise ratio  
channel crosstalk  
dB  
dB  
αct(ch)  
left or right carrier; fFM = 0 kHz  
80  
Noise reduction (test 26c)  
Vn  
noise level  
tuner input signal level  
at dBV; note 3  
tuner input signal level  
at 6.5 dBV  
tuner input signal level  
from 6.5 to 36.5 dBV  
tuner input frequency from  
300 to 1000 Hz  
95  
90  
0.2  
dBV  
%
THD  
αlin  
total harmonic distortion  
linearity  
0.05  
59.6  
+0.4  
7.7  
58  
62  
dB  
dB  
dB  
αres(f1)  
αres(f2)  
frequency response 300 Hz  
frequency response 10 kHz  
0.6  
9.2  
+1.4  
6.2  
tuner input frequency from  
10 to 1 kHz  
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Product specification  
Audio processor with head amplifier for VHS hi-fi  
TDA9605H  
SYMBOL  
Envelope output: pin ENVOUT  
Vo output voltage  
PARAMETER  
CONDITIONS  
MIN.  
TYP. MAX.  
UNIT  
left channel input signal at  
1.6 mV (RMS)  
0.6  
0.9  
2.9  
4.7  
1.2  
3.3  
5.0  
V
V
V
16 mV (RMS)  
2.5  
4.2  
160 mV (RMS)  
FM demodulator and noise reduction: pins LINEL and LINER  
Vo  
output voltage  
10  
1.5  
8  
0
6  
+1.5  
dBV  
dB  
αcb  
channel balance  
Notes  
1. Amplitude modulated single carrier signal of 60 mV (RMS) on pin HMSW; for playback mode HPD = 1. Control  
bandwidth is defined as the modulation frequency at which the amplitude modulation is attenuated with 3 dB by the  
HF AGC.  
2. Sample-and-hold audio distortion is measured using a HID control signal of 500 Hz on pin RMHID, fmod = 10 kHz and  
fFM = 50 kHz. Audio distortion is measured using a 3 kHz 4th-order low-pass filter. The measured value is corrected  
with 24 dB in order to calculate the equivalent distortion for the standard NTSC 29.97 Hz HID control signal.  
3. B = 20 Hz to 20 kHz, unweighted.  
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   h
9 to 12 V  
47 µF  
SDA SCL  
5 V  
47 µF  
RM  
HID  
AF/HF envelope  
10 kΩ  
18 kΩ  
10 nF  
39 kΩ  
(2%)  
2.2 µF  
41  
44  
42  
43  
34  
27  
29  
28  
envelope  
output  
select  
+ playback  
40  
39  
HI-FI  
DETECTOR  
2
I
C-BUS  
SUPPLY  
DCL  
100 nF  
INTERFACE  
DCR  
RM HID  
HID  
AUTN  
HID  
DROPOUT  
CANCELING  
standby select  
NOISE REDUCTION  
37  
35  
LEVEL  
DETECTOR  
HF AGC  
10 µF  
26  
25  
24  
23  
head drum  
NOISE  
SUPPRESSION  
DETECTOR  
HF LIMITER  
PLL  
CCO  
(1.3 or  
1.4 MHz)  
5th ORDER  
AUDIO LPF  
47 µF  
W + FM  
RECTIFIER  
AH1  
AH2  
6.8 nF  
1.3 or 1.4 MHz  
playback head  
amplification,  
record head  
current  
AUDIO  
CLIPPER  
COMPRESSOR  
EXPANDER  
2.7 kΩ  
CCA  
36  
38  
10 µF  
33 kΩ  
HF LFP  
RM  
100 nF  
LEVEL  
10 µF  
30  
31  
32  
33  
DETECTOR  
DETECTOR  
RECTIFIER  
M
+
470 Ω  
10 nF  
5th ORDER  
AUDIO LPF  
NOISE  
SUPPRESSION  
47 µF  
HF LIMITER  
PLL  
CCO  
(1.7 or  
1.8 MHz)  
W + FM  
6.8 nF  
1.7 or 1.8 MHz  
carrier ratio select,  
record-mute  
playback. +  
COMPRESSOR  
EXPANDER  
2.7 kΩ  
CCA  
AUDIO  
CLIPPER  
record-mute,  
recording  
10 µF  
HEAD AMPLIFIER  
33 kΩ  
HF LFP  
decoder  
select  
SAP  
TUL  
TUR  
1
2
+1 dB 12 V  
SAP  
FM (DE-)MODULATOR  
tuner  
CINCH  
ext1  
volume left  
10 µF  
3
19  
20  
AUTN output select  
TUL  
E1L  
SAP  
4
decoder  
5
L
M
10 µF  
E1L  
E1R  
E2L  
E2R  
TUR  
E1R  
SAP  
+
+
+
+
+
6
M
7
R
N
M
line select  
8
ext2  
dub  
volume right  
M
9
10 µF  
16  
15  
10  
11  
N
E2L  
E2R  
aux  
dub  
line  
220 nF  
(11×)  
10 µF  
17  
18  
envelope output  
select + record  
input select  
I/O CONTROL  
mute  
PEAK HOLD  
PEAK HOLD  
DCL  
DCR  
L
V
AUTO-MUTE  
SAP  
CC  
M
TUL  
TUR  
+
+
10 µF  
M
R
13  
14  
normal  
input  
level  
RFC  
E2L  
E2R  
M
normal select  
TDA9605H  
RF converter  
mute  
21  
22  
12  
MGR839  
2
I
C-bus  
= mute  
M
10 µF  
220 nF  
control  
10 µF  
3.3 MΩ  
linear audio  
Fig.14 Application diagram.  
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Audio processor with head amplifier for VHS hi-fi  
TDA9605H  
14.1 RM and HID control signals  
To assure proper input conditions on pin RMHID the RM and HID control signals (see Fig.15) should satisfy the  
requirements given in Table 39.  
10 k(5 %)  
10 k(5 %)  
TDA9605H  
TDA9605H  
RM  
HID  
RM  
RMHID  
RMHID  
41  
41  
HID  
18 k(5 %)  
18 k(5 %)  
MGR840  
a. HID input only.  
b. HID and RM input.  
Fig.15 RMHID input.  
Table 39 Conditions of RM and HID input signal  
HID INPUT SIGNAL ONLY  
HID AND RM INPUT SIGNALS  
SIGNAL  
CONDITIONS  
MIN.  
MAX.  
CONDITIONS  
MIN.  
MAX.  
HID  
LOW  
HIGH  
0 V  
3 V  
1.5 V  
5.5 V  
LOW  
HIGH  
LOW  
HIGH  
0 V  
4.3 V  
0 V  
0.4 V  
5.5 V  
0.4 V  
5.5 V  
RM  
grounded  
4.3 V  
14.2 Reference current resistor  
The requirements for the reference current resistor on pin 28 are:  
R = 39 k±2%  
Temperature coefficient = ±50 ppm/°C.  
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TDA9605H  
14.3 Setting line output level  
The audio level can be set by selecting the external filter components connected to the emphasis noise reduction  
pins 24 and 32 (pins EMPHL and EMPHR).  
Table 40 Component values for setting the line output level  
RESISTOR CONNECTED  
BETWEEN  
RESISTOR IN SERIES WITH CAPACITOR CONNECTED  
BETWEEN  
LINE  
OUTPUT  
LEVEL(1)  
PINS 24 AND 23 PINS 32 AND 33  
PIN 24 AND GROUND  
PIN 32 AND GROUND  
4.9 dBV  
5.7 dBV  
6.4 dBV  
7.2 dBV  
8.0 dBV  
8.8 dBV  
9.6 dBV  
10.6 dBV  
11.4 dBV  
47 kΩ  
43 kΩ  
39 kΩ  
36 kΩ  
33 kΩ  
30 kΩ  
27 kΩ  
24 kΩ  
22 kΩ  
47 kΩ  
43 kΩ  
39 kΩ  
36 kΩ  
33 kΩ  
30 kΩ  
27 kΩ  
24 kΩ  
22 kΩ  
3.9 kΩ  
3.6 kΩ  
3.3 kΩ  
3.0 kΩ  
2.7 kΩ  
2.4 kΩ  
2.2 kΩ  
2.0 kΩ  
1.8 kΩ  
4.7 nF  
5.1 nF  
5.6 nF  
6.2 nF  
6.8 nF  
7.5 nF  
8.2 nF  
9.1 nF  
10 nF  
3.9 kΩ  
3.6 kΩ  
3.3 kΩ  
3.0 kΩ  
2.7 kΩ  
2.4 kΩ  
2.2 kΩ  
2.0 kΩ  
1.8 kΩ  
4.7 nF  
5.1 nF  
5.6 nF  
6.2 nF  
6.8 nF  
7.5 nF  
8.2 nF  
9.1 nF  
10 nF  
Note  
1. Standard 50 kHz FM deviation at f = 1 kHz.  
14.4 Test modes  
Special test modes are implemented for testing, evaluation and measurement purposes. These test modes are available  
when bit TEST = 1 and the test select function is enabled via five bits of the select byte (see Table 41). When selecting  
test modes the normal input level setting is changed as defined by bits NIL3 to NIL0. Calibration may be lost when a not  
listed test mode is selected.  
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Product specification  
Audio processor with head amplifier for VHS hi-fi  
TDA9605H  
Table 41 Test modes for evaluation and measurement purposes  
TEST HRL NIL3 NIL2 NIL1 NIL0 MODE  
DESCRIPTION  
1
1
1
0
0
0
0
0
0
0
0
0
0
1
1
1
0
1
test 1 record mode; left channel FM carrier only (1.3 or 1.4 MHz)  
test 2 record mode; right channel FM carrier only (1.7 or 1.8 MHz)  
test 3 playback mode; left channel band-pass filter with HF AGC off;  
EOS = 1 (test output on pin ENVOUT); notes 1 and 2  
1
1
1
1
1
1
0
0
0
0
0
1
0
0
0
1
1
1
1
1
1
0
0
0
0
0
1
0
1
0
0
1
0
0
0
1
test 4 playback mode; right channel band-pass filter with HF AGC off;  
EOS = 1 (test output on pin ENVOUT); notes 1 and 2  
test 5 playback mode; HF AGC (left channel band-pass filter);  
EOS = 1 (test output on pin ENVOUT); notes 1 and 2  
test 6 playback mode; HF AGC (right channel band-pass filter);  
EOS = 1 (test output on pin ENVOUT); notes 1 and 2  
test 8 playback mode; head amplifier output signal;  
EOS = 1 (test output on pin ENVOUT; notes 2 and 3  
test 10 playback mode; HF envelope of right channel carrier;  
EOS = 1 (test output on pin ENVOUT)  
test 25 noise reduction and modem; note 4  
test 25a left channel FM modulator (left carrier only);  
record mode; volume setting = 3 dB; test input = line input left  
test 25b left and right noise reduction (compressor);  
record mode; output select function = mute;  
test output = line output  
test 25c left and right channel FM demodulator; playback mode;  
output select function = mute; test output = line output  
1
1
1
0
1
0
test 26 noise reduction and modem; note 4  
test 26a right channel FM modulator (right carrier only);  
record mode; volume setting = 3 dB; test input = line input right  
test 26b left and right channel audio lowpass filter; record mode;  
volume setting = 3 dB; output select function = mute;  
test input = line input; test output = line output  
test 26c left and right channel noise reduction (expander); playback mode;  
volume setting = 3 dB; test input = line input; note 5  
Notes  
1. This test can be used with a HIGH-level input signal by setting bit HPD = 1; test input signal applied to pin HMSW.  
2. Auto-normal is activated (bit AUTN = 1) during the test, i.e. the playback audio signal is not available.  
3. The output level on pin ENVOUT shows 6 dB attenuation compared to the internal signal of the head amplifier output.  
4. This test connects internal signal lines between the noise reduction and (de-)modulator circuit. The signals found  
here are not compensated for temperature or tolerance spread and therefore level measurements are only relative.  
Absolute values are not an indication of the overall performance. Typical audio level of the test inputs and outputs is  
approximately 6.5 dBV for the standard 8 dBV line level and 50 kHz FM deviation.  
5. The expander test requires the auto-normal function to be set inactive; i.e. an FM carrier signal should be available.  
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Product specification  
Audio processor with head amplifier for VHS hi-fi  
TDA9605H  
15 INTERNAL CIRCUITRY  
The indicated DC voltages are given for the record-mute mode in the typical application circuit without audio signal;  
unless otherwise specified.  
PIN  
1
SYMBOL  
SAP  
VOLTAGE  
EQUIVALENT CIRCUIT  
3.8 V  
V
CC  
2
TUNL  
57 kΩ  
3
TUNR  
CINL  
1 to 11  
4
73 kΩ  
3.8 V  
5
CINR  
6
EXT1L  
EXT1R  
EXT2L  
EXT2R  
AUXL  
MGR849  
7
8
9
10  
11  
12  
AUXR  
RFCAGC  
0 V  
V
CC  
100 Ω  
12  
bit RFCM  
500 Ω  
MGR850  
13  
RFCOUT  
3.8 V  
V
CC  
200 Ω  
13  
230  
µA  
180 kΩ  
MGR851  
14  
15  
18  
MUTEC  
MUTEL  
MUTER  
0 V  
bit MUTE or V  
<7 V  
CC  
14, 15, 18  
100 kΩ  
MGR852  
16  
17  
19  
20  
LINEL  
LINER  
DECL  
DECR  
4.5 V (VCCS = 0);  
6 V (VCCS = 1)  
22.8 k2.8 kΩ  
20 kΩ  
bit VCCS V  
V
CC  
CC  
100 Ω  
bit LOH  
16, 17, 19, 20  
class AB  
MGR853  
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Product specification  
Audio processor with head amplifier for VHS hi-fi  
TDA9605H  
PIN  
SYMBOL  
VOLTAGE  
EQUIVALENT CIRCUIT  
21  
LINOUT  
4.5 V  
V
CC  
30 kΩ  
17.7 kΩ  
3.8 V  
200 Ω  
21  
96.4 kΩ  
600  
µA  
MGR854  
22  
LININ  
3.8 V  
V
CC  
22  
bits NIL2 to NIL0  
total = 130 kΩ  
MGR855  
3.8 V  
23  
33  
DCFBL  
DCFBR  
3.8 V  
V
CC  
23, 33  
3.8 V  
bit AFM  
MGR856  
24  
32  
EMPHL  
EMPHR  
3.8 V  
V
CC  
240 Ω  
24, 32  
3.8 V  
bit  
AFM  
MGR857  
25  
31  
DCL  
DCR  
3.8 V  
V
CC  
2.8 kΩ  
25, 31  
3.8 V  
MGR858  
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Product specification  
Audio processor with head amplifier for VHS hi-fi  
TDA9605H  
PIN  
SYMBOL  
VOLTAGE  
EQUIVALENT CIRCUIT  
26  
30  
DETL  
DETR  
0.7 V  
V
CC  
26, 30  
7.5 kΩ  
0.5 V  
MGR859  
27  
GND  
0 V  
27  
substrate  
MGR860  
28  
29  
Iref  
3.8 V  
V
CC  
Vref  
200 Ω  
28  
29  
3.8 V from  
reference  
generator  
V
CC  
20  
kΩ  
(3.8a) V  
bit STBA  
bit STBP  
3.8 V  
MGR861  
34  
VCC  
9 to 12 V  
V
34  
CC  
MGR862  
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Audio processor with head amplifier for VHS hi-fi  
TDA9605H  
PIN  
SYMBOL  
VOLTAGE  
EQUIVALENT CIRCUIT  
35  
36  
37  
38  
PBIN2  
0.7 V;  
4.3 V (recording)  
V
playback or  
record-mute  
mode  
signal RM  
bit AFM  
CCH  
RECOUT  
PBIN1  
bit  
bit  
DOC  
SHH  
HMSW  
0 V;  
35  
kΩ  
bit DETH  
4.3 V (recording)  
35  
V
CC  
GNDH  
36  
GNDH  
5 Ω  
V
CCH  
GNDH  
35  
kΩ  
37  
GNDH  
V
CC  
&
38  
&
bit HPD  
GNDH  
MGR863  
to HF AGC  
39  
40  
GNDH  
0 V  
5 V  
GNDH  
39  
MGR864  
VCCH  
V
40  
CCH  
MGR865  
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Audio processor with head amplifier for VHS hi-fi  
TDA9605H  
PIN  
SYMBOL  
VOLTAGE  
EQUIVALENT CIRCUIT  
41  
RMHID  
0 to 5 V  
V
CC  
2.5 V  
3 kΩ  
41  
signal RM  
0.8 V  
4.05 V  
signal HID  
MGR866  
42  
SDA  
0 or 5 V  
275 Ω  
42  
bit ACK  
2
(I C-bus acknowledge)  
MGR867  
43  
44  
SCL  
0 or 5 V  
275 Ω  
43  
MGR868  
ENVOUT  
0 V  
V
CC  
40 µA  
1 kΩ  
44  
test modes  
MGR869  
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Audio processor with head amplifier for VHS hi-fi  
TDA9605H  
16 PACKAGE OUTLINE  
QFP44: plastic quad flat package; 44 leads (lead length 1.3 mm); body 10 x 10 x 1.75 mm  
SOT307-2  
y
X
A
33  
23  
34  
22  
Z
E
e
H
E
E
A
2
A
(A )  
3
A
1
w M  
θ
b
p
L
p
pin 1 index  
L
12  
44  
detail X  
1
11  
w M  
Z
v
M
A
D
b
p
e
D
B
H
v
M
B
D
0
2.5  
5 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
A
(1)  
(1)  
(1)  
(1)  
UNIT  
A
A
A
b
c
D
E
e
H
D
H
L
L
v
w
y
Z
Z
θ
1
2
3
p
E
p
D
E
max.  
10o  
0o  
0.25 1.85  
0.05 1.65  
0.40 0.25 10.1 10.1  
0.20 0.14 9.9 9.9  
12.9 12.9  
12.3 12.3  
0.95  
0.55  
1.2  
0.8  
1.2  
0.8  
mm  
2.10  
0.25  
0.8  
1.3  
0.15 0.15 0.1  
Note  
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
EIAJ  
95-02-04  
97-08-01  
SOT307-2  
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TDA9605H  
If wave soldering is used the following conditions must be  
observed for optimal results:  
17 SOLDERING  
17.1 Introduction to soldering surface mount  
packages  
Use a double-wave soldering method comprising a  
turbulent wave with high upward pressure followed by a  
smooth laminar wave.  
This text gives a very brief insight to a complex technology.  
A more in-depth account of soldering ICs can be found in  
our “Data Handbook IC26; Integrated Circuit Packages”  
(document order number 9398 652 90011).  
For packages with leads on two sides and a pitch (e):  
– larger than or equal to 1.27 mm, the footprint  
longitudinal axis is preferred to be parallel to the  
transport direction of the printed-circuit board;  
There is no soldering method that is ideal for all surface  
mount IC packages. Wave soldering is not always suitable  
for surface mount ICs, or for printed-circuit boards with  
high population densities. In these situations reflow  
soldering is often used.  
– smaller than 1.27 mm, the footprint longitudinal axis  
must be parallel to the transport direction of the  
printed-circuit board.  
The footprint must incorporate solder thieves at the  
downstream end.  
17.2 Reflow soldering  
For packages with leads on four sides, the footprint must  
be placed at a 45° angle to the transport direction of the  
printed-circuit board. The footprint must incorporate  
solder thieves downstream and at the side corners.  
Reflow soldering requires solder paste (a suspension of  
fine solder particles, flux and binding agent) to be applied  
to the printed-circuit board by screen printing, stencilling or  
pressure-syringe dispensing before package placement.  
During placement and before soldering, the package must  
be fixed with a droplet of adhesive. The adhesive can be  
applied by screen printing, pin transfer or syringe  
dispensing. The package can be soldered after the  
adhesive is cured.  
Several methods exist for reflowing; for example,  
infrared/convection heating in a conveyor type oven.  
Throughput times (preheating, soldering and cooling) vary  
between 100 and 200 seconds depending on heating  
method.  
Typical dwell time is 4 seconds at 250 °C.  
A mildly-activated flux will eliminate the need for removal  
of corrosive residues in most applications.  
Typical reflow peak temperatures range from  
215 to 250 °C. The top-surface temperature of the  
packages should preferable be kept below 230 °C.  
17.4 Manual soldering  
17.3 Wave soldering  
Fix the component by first soldering two  
diagonally-opposite end leads. Use a low voltage (24 V or  
less) soldering iron applied to the flat part of the lead.  
Contact time must be limited to 10 seconds at up to  
300 °C.  
Conventional single wave soldering is not recommended  
for surface mount devices (SMDs) or printed-circuit boards  
with a high component density, as solder bridging and  
non-wetting can present major problems.  
To overcome these problems the double-wave soldering  
method was specifically developed.  
When using a dedicated tool, all other leads can be  
soldered in one operation within 2 to 5 seconds between  
270 and 320 °C.  
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TDA9605H  
17.5 Suitability of surface mount IC packages for wave and reflow soldering methods  
SOLDERING METHOD  
PACKAGE  
WAVE  
REFLOW(1)  
BGA, SQFP  
not suitable  
suitable  
suitable  
suitable  
suitable  
suitable  
HLQFP, HSQFP, HSOP, HTSSOP, SMS not suitable(2)  
PLCC(3), SO, SOJ  
LQFP, QFP, TQFP  
SSOP, TSSOP, VSO  
suitable  
not recommended(3)(4)  
not recommended(5)  
Notes  
1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum  
temperature (with respect to time) and body size of the package, there is a risk that internal or external package  
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the  
Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”.  
2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink  
(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).  
3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.  
The package footprint must incorporate solder thieves downstream and at the side corners.  
4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm;  
it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.  
5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is  
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.  
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Product specification  
Audio processor with head amplifier for VHS hi-fi  
TDA9605H  
18 DEFINITIONS  
Data sheet status  
Objective specification  
Preliminary specification  
Product specification  
This data sheet contains target or goal specifications for product development.  
This data sheet contains preliminary data; supplementary data may be published later.  
This data sheet contains final product specifications.  
Limiting values  
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or  
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation  
of the device at these or at any other conditions above those given in the Characteristics sections of the specification  
is not implied. Exposure to limiting values for extended periods may affect device reliability.  
Application information  
Where application information is given, it is advisory and does not form part of the specification.  
19 LIFE SUPPORT APPLICATIONS  
These products are not designed for use in life support appliances, devices, or systems where malfunction of these  
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for  
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such  
improper use or sale.  
20 PURCHASE OF PHILIPS I2C COMPONENTS  
Purchase of Philips I2C components conveys a license under the Philips I2C patent to use the  
components in the I2C system provided the system conforms to the I2C specification defined by  
Philips. This specification can be ordered using the code 9398 393 40011.  
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Philips Semiconductors – a worldwide company  
Argentina: see South America  
Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB,  
Tel. +31 40 27 82785, Fax. +31 40 27 88399  
Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113,  
Tel. +61 2 9805 4455, Fax. +61 2 9805 4466  
New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND,  
Tel. +64 9 849 4160, Fax. +64 9 849 7811  
Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213,  
Tel. +43 1 60 101 1248, Fax. +43 1 60 101 1210  
Norway: Box 1, Manglerud 0612, OSLO,  
Tel. +47 22 74 8000, Fax. +47 22 74 8341  
Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6,  
220050 MINSK, Tel. +375 172 20 0733, Fax. +375 172 20 0773  
Pakistan: see Singapore  
Belgium: see The Netherlands  
Philippines: Philips Semiconductors Philippines Inc.,  
106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI,  
Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474  
Brazil: see South America  
Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor,  
51 James Bourchier Blvd., 1407 SOFIA,  
Tel. +359 2 68 9211, Fax. +359 2 68 9102  
Poland: Ul. Lukiska 10, PL 04-123 WARSZAWA,  
Tel. +48 22 612 2831, Fax. +48 22 612 2327  
Portugal: see Spain  
Canada: PHILIPS SEMICONDUCTORS/COMPONENTS,  
Tel. +1 800 234 7381, Fax. +1 800 943 0087  
Romania: see Italy  
China/Hong Kong: 501 Hong Kong Industrial Technology Centre,  
72 Tat Chee Avenue, Kowloon Tong, HONG KONG,  
Tel. +852 2319 7888, Fax. +852 2319 7700  
Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW,  
Tel. +7 095 755 6918, Fax. +7 095 755 6919  
Singapore: Lorong 1, Toa Payoh, SINGAPORE 319762,  
Colombia: see South America  
Tel. +65 350 2538, Fax. +65 251 6500  
Czech Republic: see Austria  
Slovakia: see Austria  
Denmark: Sydhavnsgade 23, 1780 COPENHAGEN V,  
Slovenia: see Italy  
Tel. +45 33 29 3333, Fax. +45 33 29 3905  
South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale,  
2092 JOHANNESBURG, P.O. Box 7430 Johannesburg 2000,  
Tel. +27 11 470 5911, Fax. +27 11 470 5494  
Finland: Sinikalliontie 3, FIN-02630 ESPOO,  
Tel. +358 9 615 800, Fax. +358 9 6158 0920  
France: 51 Rue Carnot, BP317, 92156 SURESNES Cedex,  
Tel. +33 1 4099 6161, Fax. +33 1 4099 6427  
South America: Al. Vicente Pinzon, 173, 6th floor,  
04547-130 SÃO PAULO, SP, Brazil,  
Tel. +55 11 821 2333, Fax. +55 11 821 2382  
Germany: Hammerbrookstraße 69, D-20097 HAMBURG,  
Tel. +49 40 2353 60, Fax. +49 40 2353 6300  
Spain: Balmes 22, 08007 BARCELONA,  
Tel. +34 93 301 6312, Fax. +34 93 301 4107  
Hungary: see Austria  
Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM,  
Tel. +46 8 5985 2000, Fax. +46 8 5985 2745  
India: Philips INDIA Ltd, Band Box Building, 2nd floor,  
254-D, Dr. Annie Besant Road, Worli, MUMBAI 400 025,  
Tel. +91 22 493 8541, Fax. +91 22 493 0966  
Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,  
Tel. +41 1 488 2741 Fax. +41 1 488 3263  
Indonesia: PT Philips Development Corporation, Semiconductors Division,  
Gedung Philips, Jl. Buncit Raya Kav.99-100, JAKARTA 12510,  
Tel. +62 21 794 0040 ext. 2501, Fax. +62 21 794 0080  
Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1,  
TAIPEI, Taiwan Tel. +886 2 2134 2886, Fax. +886 2 2134 2874  
Ireland: Newstead, Clonskeagh, DUBLIN 14,  
Tel. +353 1 7640 000, Fax. +353 1 7640 200  
Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,  
209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260,  
Tel. +66 2 745 4090, Fax. +66 2 398 0793  
Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053,  
TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007  
Turkey: Talatpasa Cad. No. 5, 80640 GÜLTEPE/ISTANBUL,  
Tel. +90 212 279 2770, Fax. +90 212 282 6707  
Italy: PHILIPS SEMICONDUCTORS, Piazza IV Novembre 3,  
20124 MILANO, Tel. +39 2 6752 2531, Fax. +39 2 6752 2557  
Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7,  
252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461  
Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku,  
TOKYO 108-8507, Tel. +81 3 3740 5130, Fax. +81 3 3740 5077  
United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,  
MIDDLESEX UB3 5BX, Tel. +44 181 730 5000, Fax. +44 181 754 8421  
Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL,  
Tel. +82 2 709 1412, Fax. +82 2 709 1415  
United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,  
Tel. +1 800 234 7381, Fax. +1 800 943 0087  
Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR,  
Tel. +60 3 750 5214, Fax. +60 3 757 4880  
Uruguay: see South America  
Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905,  
Vietnam: see Singapore  
Tel. +9-5 800 234 7381, Fax +9-5 800 943 0087  
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,  
Middle East: see Italy  
Tel. +381 11 62 5344, Fax.+381 11 63 5777  
For all other countries apply to: Philips Semiconductors,  
International Marketing & Sales Communications, Building BE-p, P.O. Box 218,  
5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825  
© Philips Electronics N.V. 1999  
SCA63  
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.  
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed  
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license  
under patent- or other industrial or intellectual property rights.  
Printed in The Netherlands  
545004/750/01/pp52  
Date of release: 1999 Apr 14  
Document order number: 9397 750 04687  
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