Cat. No. W483-E1-03
SYSMAC CP Series
CP1E-E@@D@-@
CP1E-N@@D@-@
CP1E-NA@@D@-@
CP1E CPU Unit
INSTRUCTIONS
REFERENCE MANUAL
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SYSMAC CP Series
CP1E-E@@D@-@
CP1E-N@@D@-@
CP1E-NA@@D@-@
CP1E CPU Unit
Instructions Reference Manual
Revised December 2009
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Introduction
Thank you for purchasing a SYSMAC CP-series CP1E Programmable Controller.
This manual contains information required to use the CP1E. Read this manual completely and be sure
you understand the contents before attempting to use the CP1E.
Intended Audience
This manual is intended for the following personnel, who must also have knowledge of electrical sys-
tems (an electrical engineer or the equivalent).
• Personnel in charge of installing FA systems
• Personnel in charge of designing FA systems
• Personnel in charge of managing FA systems and facilities
Applicable Products
ꢀ CP-series CP1E CPU Units
• Basic Models CP1E-EꢀꢀDꢀ-ꢀ
A basic model of CPU Unit that support basic control applications using instructions such as
basic, movement, arithmetic, and comparison instructions.
• Application Models CP1E-N/NAꢀꢀDꢀ-ꢀ
An application model of CPU Unit that supports connections to Programmable Terminals, invert-
ers, and servo drives.
The CP Series is centered around the CP1H, CP1L, and CP1E CPU Units and is designed with the
same basic architecture as the CS and CJ Series.
Always use CP-series Expansion Units and CP-series Expansion I/O Units when expanding I/O
capacity. I/O words are allocated in the same way as for the CPM1A/CPM2A PLCs, i.e., using fixed
areas for inputs and outputs.
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CP1E CPU Unit Manuals
Information on the CP1E CPU Units is provided in the following manuals.
Refer to the appropriate manual for the information that is required.
This Manual
CP1E CPU Unit Hardware
CP1E CPU Unit Instructions
CP1E CPU Unit Software
User’s Manual(Cat. No. W479)
Reference Manual(Cat. No. W483)
User’s Manual(Cat. No. W480)
Mounting and
Setting Hardware
1
· Names and specifications of the parts of all Units
· Basic system configuration for each CPU Unit
· Connection methods for Expansion I/O Units
and Expansion Units
2
Wiring
· Wiring methods for the power supply
· Wiring methods between external I/O devices
and Expansion I/O Units or Expansion Units
Connecting
Online to the PLC
3
4
Connecting Cables for CX-Programmer
Support Software
Procedures for connecting the
CX-Programmer Support Software
Software Setup
Software setting methods for the CPU
Units (PLC Setup)
5
Creating the Program
Detailed information on
programming instructions
· Program types and basic information
· CPU Unit operation
· Internal memory
· Built-in CPU functions
· Settings
Checking and
Debugging Operation
6
7
· Checking I/O wiring, setting the Auxiliary Area
settings, and performing trial operation
· Monitoring and debugging with the
CX-Programmer
Maintenance and
Troubleshooting
Error codes and remedies if a problem occurs
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2
Manual Configuration
The CP1E CPU manuals are organized in the sections listed in the following tables. Refer to the appro-
priate section in the manuals as required.
CP1E CPU Unit Instructions Reference Manual (Cat. No. W483)
(This Manual)
Section
Contents
Section 1 Summary of Instructions
This section provides a summary of instructions used with a CP1E CPU
Unit.
Section 2 Instruction
This section describes the functions, operands and sample programs of
the instructions that are supported by a CP1E CPU Unit.
Section 3 Instruction Execution
Times and Number of Steps
This section provides the execution times for all instructions used with a
CP1E CPU Unit.
Section 4 Monitoring and
Computing the Cycle Time
This section describes how to monitor and calculate the cycle time of a
CP1E CPU Unit that can be used in the programs.
Appendices
The appendices provide a list of instructions by Mnemonic and ASCII
code table for the CP1E CPU Unit.
CP1E CPU Unit Software User’s Manual (Cat. No. W480)
Section
Section 1 Overview
Contents
This section gives an overview of the CP1E, describes its application
procedures.
Section 2 CPU Unit Memory
This section describes the types of internal memory in a CP1E CPU
Unit and the data that is stored.
Section 3 CPU Unit Operation
This section describes the operation of a CP1E CPU Unit.
Section 4 Programming Concepts
This section provides basic information on designing ladder programs
for a CP1E CPU Unit.
Section 5 I/O Memory
Section 6 I/O Allocation
Section 7 PLC Setup
This section describes the types of I/O memory areas in a CP1E CPU
Unit and the details.
This section describes I/O allocation used to exchange data between
the CP1E CPU Unit and other units.
This section describes the PLC Setup, which are used to perform basic
settings for a CP1E CPU Unit.
Section 8 Overview and Allocation
of Built-in Functions
This section lists the built-in functions and describes the overall applica-
tion flow and the allocation of the functions.
Section 9 Quick-response Inputs
This section describes the quick-response inputs that can be used to
read signals that are shorter than the cycle time.
Section 10 Interrupts
This section describes the interrupts that can be used with CP1E PLCs,
including input interrupts and scheduled interrupts.
Section 11 High-speed Counters
Section 12 Pulse Outputs
This section describes the high-speed counter inputs, high-speed
counter interrupts, and the frequency measurement function.
This section describes positioning functions such as trapezoidal control,
jogging, and origin searches.
Section 13 PWM Outputs
This section describes the variable-duty-factor pulse (PWM) outputs.
Section 14 Serial Communications
This section describes communications with Programmable Terminals
(PTs) without using communications programming, no-protocol commu-
nications with general components, and connections with a Modbus-
RTU Easy Master, Serial PLC Link, and host computer.
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Section
Contents
Section 15 Analog I/O Function
This section describes the built-in analog function for NA-type CPU
Units.
Section 16 Built-in Functions
This section describes PID temperature control, clock functions, DM
backup functions, security functions.
Section 17 Operating the Program-
ming Device
This section describes basic functions of the CX-Programmer, such as
using the CX-Programmer to write ladder programs to control the CP1E
CPU Unit, to transfer the programs to the CP1E CPU Unit, and to debug
the programs.
Appendices
The appendices provide lists of programming instructions, the Auxiliary
Area, cycle time response performance, PLC performance at power
interruptions.
CP1E CPU Unit Hardware User’s Manual (Cat. No. W479)
Section
Contents
Section 1 Overview and Specifica-
tions
This section gives an overview of the CP1E, describes its features, and
provides its specifications.
Section 2 Basic System Configura-
tion and Devices
This section describes the basic system configuration and unit models
of the CP1E.
Section 3 Part Names and Functions This section describes the part names and functions of the CPU Unit,
Expansion I/O Units, and Expansion Units in a CP1E PLC .
Section 4 Programming Device
This section describes the features of the CX-Programmer used for pro-
gramming and debugging PLCs, as well as how to connect the PLC with
the Programming Device by USB.
Section 5 Installation and Wiring
Section 6 Troubleshooting
This section describes how to install and wire CP1E Units.
This section describes how to troubleshoot problems that may occur
with a CP1E PLC, including the error indications provided by the CP1E
Units.
Section 7 Maintenance and Inspec-
tion
This section describes periodic inspections, the service life of the Bat-
tery, and how to replace the Battery.
Section 8 Using Expansion Units
and Expansion I/O Units
This section describes application methods for Expansion Units.
Appendices
The appendices provide information on dimensions, wiring diagrams,
and wiring serial communications for the CP1E.
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Manual Structure
Page Structure and Icons
The following page structure and icons are used in this manual.
5 Installation and wiring
Level 1 heading
Level 2 heading
Level 3 heading
5-2 Installation
Level 2 heading
Level 3 heading
Gives the current
headings.
5-2-1 Installation Location
DIN Track Installation
1
Use a screwdriver to pull down the DIN Track mounting pins from the back of the Units to release
them, and mount the Units to the DIN Track.
Step in a procedure
Indicates a step in a
procedure.
DIN Track mounting pins
Page tab
5
Release
Gives the number
of the section.
Fit the back of the Units onto the DIN Track by catching the top of the Units on the Track and then
pressing in at the bottom of the Units, as shown below.
2
3
DIN Track
Press in all of the DIN Track mounting pins to securely lock the Units in place.
Special Information
(See below.)
Icons are used to indicate
precautions and
additional information.
DIN Track mounting pins
Precautions for Correct Use
Tighten terminal block screws and cable screws to the following torques.
M4: 1.2 N·m
M3: 0.5 N·m
CP1E CPU Unit Hardware User’s Manual(W479)
5 - 3
Manual name
This illustration is provided only as a sample and may not literally appear in this manual.
Special Information
Special information in this manual is classified as follows:
Precautions for Safe Use
Precautions on what to do and what not to do to ensure using the product safely.
Precautions for Correct Use
Precautions on what to do and what not to do to ensure proper operation and performance.
Additional Information
Additional information to increase understanding or make operation easier.
References to the location of more detailed or related information.
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5
Terminology and Notation
Term
Description
E-type CPU Unit
N-type CPU Unit
NA-type CPU Unit
A basic model of CPU Unit that support basic control applications using instructions such
as basic, movement, arithmetic, and comparison instructions.
Basic models of CPU Units are called “E-type CPU Units” in this manual.
An application model of CPU Unit that supports connections to Programmable Terminals,
inverters, and servo drives.
Application models of CPU Units are called “N-type CPU Units” in this manual.
An application model of CPU Unit that supports built-in analog and connections to Pro-
grammable Terminals, inverters, and servo drives.
Application models of CPU Units with built-in analog are called “NA-type CPU Units” in
this manual.
CX-Programmer
A programming device that applies for programming and debugging PLCs.
The CX-Programmer includes the Micro PLC Edition CX-Programmer (CX-One Lite), the
CX-Programmer (CX-One) and the CX-Programmer for CP1E.
This manual describes the unique applications and functions of the Micro PLC Edition
CX-Programmer version 9.03 or higher CX-Programmer for CP1E.
“CX-Programmer” refers to the Micro PLC Edition CX-Programmer version 9.03 or higher
CX-Programmer for CP1E in this manual.
Note E20/30/40 and N20/30/40 CPU Units are supported by CX-Programmer version 8.2
or higher. E10/14, N14/60 and NA20 CPU Units are supported by CX-Programmer
version 9.03 or higher.
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Sections in this Manual
1
2
3
4
A
Summary of Instructions
1
Instructions
2
Instruction Execution Times and Number
of Steps
3
4
Monitoring and Computing the Cycle Time
Appendices
A
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CONTENTS
Introduction ...............................................................................................................1
CP1E CPU Unit Manuals...........................................................................................2
Manual Structure.......................................................................................................5
Safety Precautions..................................................................................................15
Precautions for Safe Use........................................................................................18
Regulations and Standards....................................................................................19
Related Manuals......................................................................................................20
Section 1
Summary of Instructions .............................................. 1-1
1-1 Summary of Instructions ........................................................................................................ 1-2
Section 2
Instructions .................................................................... 2-1
Notation and Layout of Instruction Descriptions ......................................................................... 2-2
Sequence Input Instructions .......................................................................................................... 2-5
LD/LD NOT ................................................................................................................................................ 2-7
AND/AND NOT ..........................................................................................................................................2-9
OR/OR NOT .............................................................................................................................................2-11
AND LD/OR LD ........................................................................................................................................2-13
NOT .......................................................................................................................................................... 2-16
UP/DOWN ................................................................................................................................................2-17
Sequence Output Instructions ..................................................................................................... 2-18
OUT/OUT NOT ........................................................................................................................................2-18
TR ............................................................................................................................................................2-20
KEEP .......................................................................................................................................................2-21
DIFU .........................................................................................................................................................2-25
DIFD .........................................................................................................................................................2-27
SET/RSET ...............................................................................................................................................2-29
SETA/RSTA .............................................................................................................................................. 2-31
SETB/RSTB .............................................................................................................................................2-33
Sequence Control Instructions..................................................................................................... 2-35
END .........................................................................................................................................................2-38
NOP .........................................................................................................................................................2-39
IL/ILC .......................................................................................................................................................2-40
MILH/MILR/MILC ..................................................................................................................................... 2-44
JMP/CJP/JME .......................................................................................................................................... 2-53
FOR/NEXT ...............................................................................................................................................2-56
BREAK .....................................................................................................................................................2-59
Timer and Counter Instructions ................................................................................................... 2-60
TIM/TIMX ................................................................................................................................................. 2-66
TIMH/TIMHX ............................................................................................................................................ 2-69
TMHH/TMHHX ......................................................................................................................................... 2-72
TTIM/TTIMX .............................................................................................................................................2-74
TIML/TIMLX .............................................................................................................................................2-77
CNT/CNTX ...............................................................................................................................................2-80
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CNTR/CNTRX ......................................................................................................................................... 2-83
CNR/CNRX .............................................................................................................................................. 2-86
Comparison Instructions .............................................................................................................. 2-88
=, <>, <, <=, >, >= .................................................................................................................................... 2-88
=DT, <>DT, <DT, <=DT, >DT, >=DT ......................................................................................................... 2-91
CMP/CMPL .............................................................................................................................................. 2-95
CPS/CPSL ............................................................................................................................................... 2-98
TCMP .................................................................................................................................................... 2-101
BCMP .................................................................................................................................................... 2-103
ZCP/ZCPL ............................................................................................................................................. 2-105
Data Movement Instructions....................................................................................................... 2-108
MOV/MOVL/MVN ................................................................................................................................... 2-108
MOVB .................................................................................................................................................... 2-111
MOVD .................................................................................................................................................... 2-113
XFRB ..................................................................................................................................................... 2-115
XFER ..................................................................................................................................................... 2-117
BSET ..................................................................................................................................................... 2-119
XCHG .................................................................................................................................................... 2-121
DIST ...................................................................................................................................................... 2-123
COLL ..................................................................................................................................................... 2-125
Data Shift Instructions ................................................................................................................ 2-127
SFT ........................................................................................................................................................ 2-127
SFTR ..................................................................................................................................................... 2-129
WSFT .................................................................................................................................................... 2-131
ASL ........................................................................................................................................................ 2-133
ASR ....................................................................................................................................................... 2-134
ROL ....................................................................................................................................................... 2-135
ROR ....................................................................................................................................................... 2-137
SLD/SRD ............................................................................................................................................... 2-139
NASL/NSLL ........................................................................................................................................... 2-141
NASR/NSRL .......................................................................................................................................... 2-144
Increment/Decrement Instructions ............................................................................................ 2-147
++/++L ................................................................................................................................................... 2-147
--/--L ...................................................................................................................................................... 2-150
++B/++BL .............................................................................................................................................. 2-153
--B/--BL ................................................................................................................................................. 2-156
Symbol Math Instructions........................................................................................................... 2-158
+/+L ....................................................................................................................................................... 2-158
+C/+CL .................................................................................................................................................. 2-160
+B/+BL ................................................................................................................................................... 2-162
+BC/+BCL ............................................................................................................................................. 2-164
–/–L ........................................................................................................................................................ 2-166
–C/–CL .................................................................................................................................................. 2-170
–B/–BL ................................................................................................................................................... 2-172
–BC/–BCL .............................................................................................................................................. 2-175
*/*L ......................................................................................................................................................... 2-177
*B/*BL .................................................................................................................................................... 2-179
/, /L ......................................................................................................................................................... 2-181
/B, /BL .................................................................................................................................................... 2-183
Conversion Instructions.............................................................................................................. 2-185
BIN/BINL ................................................................................................................................................ 2-185
BCD/BCDL ............................................................................................................................................ 2-187
NEG ....................................................................................................................................................... 2-189
MLPX ..................................................................................................................................................... 2-191
DMPX .................................................................................................................................................... 2-196
ASC ....................................................................................................................................................... 2-201
HEX ....................................................................................................................................................... 2-205
Logic Instructions........................................................................................................................ 2-210
ANDW/ANDL ......................................................................................................................................... 2-210
ORW/ORWL .......................................................................................................................................... 2-212
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XORW/XORL .........................................................................................................................................2-214
COM/COML ...........................................................................................................................................2-216
Special Math Instructions ........................................................................................................... 2-218
APR ........................................................................................................................................................2-218
BCNT .....................................................................................................................................................2-227
Floating-point Math Instructions................................................................................................ 2-229
FIX/FIXL .................................................................................................................................................2-233
FLT/FLTL ................................................................................................................................................2-235
+F, –F, *F, /F ...........................................................................................................................................2-237
=F, <>F, <F, <=F, >F, >=F ........................................................................................................................2-241
FSTR ......................................................................................................................................................2-244
FVAL ......................................................................................................................................................2-249
Table Data Processing Instructions........................................................................................... 2-253
SWAP .....................................................................................................................................................2-253
FCS ........................................................................................................................................................2-255
Data Control Instructions............................................................................................................ 2-257
PIDAT .....................................................................................................................................................2-257
TPO ........................................................................................................................................................2-269
SCL ........................................................................................................................................................2-276
SCL2 ......................................................................................................................................................2-280
SCL3 ......................................................................................................................................................2-284
AVG ........................................................................................................................................................2-287
Subroutines Instructions ............................................................................................................ 2-290
SBS ........................................................................................................................................................2-290
SBN/RET ...............................................................................................................................................2-295
Interrupt Control Instructions..................................................................................................... 2-298
MSKS .....................................................................................................................................................2-300
CLI .........................................................................................................................................................2-303
DI ...........................................................................................................................................................2-306
EI ............................................................................................................................................................2-307
High-speed Counter/Pulse Output Instructions........................................................................ 2-308
INI ..........................................................................................................................................................2-308
PRV ........................................................................................................................................................2-311
CTBL ......................................................................................................................................................2-315
SPED .....................................................................................................................................................2-319
PULS ......................................................................................................................................................2-323
PLS2 ......................................................................................................................................................2-325
ACC .......................................................................................................................................................2-331
ORG .......................................................................................................................................................2-336
PWM ......................................................................................................................................................2-339
Step Instructions ......................................................................................................................... 2-341
SNXT/STEP ...........................................................................................................................................2-342
Basic I/O Unit Instructions.......................................................................................................... 2-352
IORF ......................................................................................................................................................2-352
SDEC .....................................................................................................................................................2-354
DSW .......................................................................................................................................................2-357
MTR .......................................................................................................................................................2-361
7SEG .....................................................................................................................................................2-365
Serial Communication Instructions ........................................................................................... 2-369
TXD ........................................................................................................................................................2-369
RXD .......................................................................................................................................................2-374
Clock Instructions........................................................................................................................ 2-380
CADD/CSUB ..........................................................................................................................................2-380
DATE ......................................................................................................................................................2-385
Failure Diagnosis Instructions ................................................................................................... 2-387
FAL .........................................................................................................................................................2-387
FALS ......................................................................................................................................................2-393
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Other Instructions........................................................................................................................ 2-398
STC/CLC ............................................................................................................................................... 2-398
WDT ...................................................................................................................................................... 2-399
Section 3
Instruction Execution Times and Number of Steps ... 3-1
3-1 CP1E CPU Unit Instruction Execution Times and Number of Steps .................................. 3-2
Section 4
Monitoring and Computing the Cycle Time................. 4-1
4-1 Monitoring the Cycle Time...................................................................................................... 4-2
4-1-1
Monitoring the Cycle Time.......................................................................................................... 4-2
4-2 Computing the Cycle Time ..................................................................................................... 4-3
4-2-1
4-2-2
4-2-3
4-2-4
4-2-5
CPU Unit Operation Flowchart ................................................................................................... 4-3
Cycle Time Overview.................................................................................................................. 4-4
I/O Refresh Times for PLC Units ................................................................................................ 4-5
Cycle Time Calculation Example................................................................................................ 4-6
Increase in Cycle Time for Online Editing................................................................................... 4-6
Section A
Appendices ....................................................................A-1
Alphabetical List of Instructions by Mnemonic .............................................................................A-2
Revision History ....................................................................................... Revision-1
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Read and Understand this Manual
Please read and understand this manual before using the product. Please consult your OMRON representative
if you have any questions or comments.
Warranty and Limitations of Liability
WARRANTY
OMRON’s exclusive warranty is that the products are free from defects in materials and workmanship for a
period of one year (or other period if specified) from date of sale by OMRON.
OMRON MAKES NO WARRANTY OR REPRESENTATION, EXPRESS OR IMPLIED, REGARDING NON-
INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR PARTICULAR PURPOSE OF THE
PRODUCTS. ANY BUYER OR USER ACKNOWLEDGES THAT THE BUYER OR USER ALONE HAS
DETERMINED THAT THE PRODUCTS WILL SUITABLY MEET THE REQUIREMENTS OF THEIR
INTENDED USE. OMRON DISCLAIMS ALL OTHER WARRANTIES, EXPRESS OR IMPLIED.
LIMITATIONS OF LIABILITY
OMRON SHALL NOT BE RESPONSIBLE FOR SPECIAL, INDIRECT, OR CONSEQUENTIAL DAMAGES,
LOSS OF PROFITS OR COMMERCIAL LOSS IN ANY WAY CONNECTED WITH THE PRODUCTS,
WHETHER SUCH CLAIM IS BASED ON CONTRACT, WARRANTY, NEGLIGENCE, OR STRICT
LIABILITY.
In no event shall the responsibility of OMRON for any act exceed the individual price of the product on which
liability is asserted.
IN NO EVENT SHALL OMRON BE RESPONSIBLE FOR WARRANTY, REPAIR, OR OTHER CLAIMS
REGARDING THE PRODUCTS UNLESS OMRON’S ANALYSIS CONFIRMS THAT THE PRODUCTS
WERE PROPERLY HANDLED, STORED, INSTALLED, AND MAINTAINED AND NOT SUBJECT TO
CONTAMINATION, ABUSE, MISUSE, OR INAPPROPRIATE MODIFICATION OR REPAIR.
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Application Considerations
SUITABILITY FOR USE
OMRON shall not be responsible for conformity with any standards, codes, or regulations that apply to the
combination of products in the customer’s application or use of the products.
At the customer’s request, OMRON will provide applicable third party certification documents identifying
ratings and limitations of use that apply to the products. This information by itself is not sufficient for a
complete determination of the suitability of the products in combination with the end product, machine,
system, or other application or use.
The following are some examples of applications for which particular attention must be given. This is not
intended to be an exhaustive list of all possible uses of the products, nor is it intended to imply that the uses
listed may be suitable for the products:
• Outdoor use, uses involving potential chemical contamination or electrical interference, or conditions or
uses not described in this manual.
• Nuclear energy control systems, combustion systems, railroad systems, aviation systems, medical
equipment, amusement machines, vehicles, safety equipment, and installations subject to separate
industry or government regulations.
• Systems, machines, and equipment that could present a risk to life or property.
Please know and observe all prohibitions of use applicable to the products.
NEVER USE THE PRODUCTS FOR AN APPLICATION INVOLVING SERIOUS RISK TO LIFE OR
PROPERTY WITHOUT ENSURING THAT THE SYSTEM AS A WHOLE HAS BEEN DESIGNED TO
ADDRESS THE RISKS, AND THAT THE OMRON PRODUCTS ARE PROPERLY RATED AND INSTALLED
FOR THE INTENDED USE WITHIN THE OVERALL EQUIPMENT OR SYSTEM.
PROGRAMMABLE PRODUCTS
OMRON shall not be responsible for the user’s programming of a programmable product, or any
consequence thereof.
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Disclaimers
CHANGE IN SPECIFICATIONS
Product specifications and accessories may be changed at any time based on improvements and other
reasons.
It is our practice to change model numbers when published ratings or features are changed, or when
significant construction changes are made. However, some specifications of the products may be changed
without any notice. When in doubt, special model numbers may be assigned to fix or establish key
specifications for your application on your request. Please consult with your OMRON representative at any
time to confirm actual specifications of purchased products.
DIMENSIONS AND WEIGHTS
Dimensions and weights are nominal and are not to be used for manufacturing purposes, even when
tolerances are shown.
PERFORMANCE DATA
Performance data given in this manual is provided as a guide for the user in determining suitability and does
not constitute a warranty. It may represent the result of OMRON’s test conditions, and the users must
correlate it to actual application requirements. Actual performance is subject to the OMRON Warranty and
Limitations of Liability.
ERRORS AND OMISSIONS
The information in this manual has been carefully checked and is believed to be accurate; however, no
responsibility is assumed for clerical, typographical, or proofreading errors, or omissions.
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Safety Precautions
Definition of Precautionary Information
The following notation is used in this manual to provide precautions required to ensure safe usage of a
CP-series PLC. The safety precautions that are provided are extremely important to safety. Always read
and heed the information provided in all safety precautions.
Indicates an imminently hazardous situation which,
if not avoided, will result in death or serious injury.
Additionally, there may be severe property damage.
WARNING
Indicates a potentially hazardous situation which,
if not avoided, may result in minor or moderate
injury, or property damage.
Caution
Precautions for Safe Use
Indicates precautions on what to do and what not to do to ensure using the product safely.
Precautions for Correct Use
Indicates precautions on what to do and what not to do to ensure proper operation
and performance.
Symbols
The triangle symbol indicates precautions (including
warnings). The specific operation is shown in the triangle
and explained in text. This example indicates a precau-
tion for electric shock.
The circle and slash symbol indicates operations that you
must not do. The specific operation is shown in the circle
and explained in text.
The filled circle symbol indicates operations that you
must do. The specific operation is shown in the circle and
explained in text. This example shows a general precau-
tion for something that you must do.
The triangle symbol indicates precautions (including
warnings). The specific operation is shown in the triangle
and explained in text. This example indicates a general
precaution.
The triangle symbol indicates precautions (including
warnings). The specific operation is shown in the triangle
and explained in text. This example indicates a precau-
tion for hot surfaces.
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Caution
Be sure to sufficiently confirm the safety at the destination when you transfer
the program or I/O memory or perform procedures to change the I/O memory.
Devices connected to PLC outputs may incorrectly operate regardless of the operat-
ing mode of the CPU Unit.
With an E-type CPU Unit or with an N/NA-type CPU Unit without a Battery, the con-
tents of the DM Area (D) *, Holding Area (H), the Counter Present Values (C), the sta-
tus of Counter Completion Flags (C), and the status of bits in the Auxiliary Area (A)
related to clock functions may be unstable when the power supply is turned ON.
*This does not apply to areas backed up to EEPROM using the DM backup function.
If the DM backup function is being used, be sure to use one of the following methods
for initialization.
1. Clearing All Areas to All Zeros
Select the Clear Held Memory (HR/DM/CNT) to Zero Check Box in the Startup
Data Read Area in the PLC Setup.
2. Clearing Specific Areas to All Zeros or Initializing to Specific Values
Make the settings from a ladder program.
If the data is not initialized, the unit or device may operate unexpectedly because of
unstable data.
Execute online edit only after confirming that no adverse effects will be caused
by extending the cycle time.
Otherwise, the input signals may not be readable.
The DM Area (D), Holding Area (H), Counter Completion Flags (C), and Counter
Present Values (C) will be held by the Battery if a Battery is mounted in a CP1E-
N/NAꢀꢀDꢀ-ꢀ CPU Unit. When the battery voltage is low, however, I/O memory
areas that are held (including the DM, Holding, and Counter Areas) will be unstable.
The unit or device may operate unexpectedly because of unstable data.
Use the Battery Error Flag or other measures to stop outputs if external out-
puts are performed from a ladder program based on the contents of the DM
Area or other I/O memory areas.
Sufficiently check safety if I/O bit status or present values are monitored in the
Ladder Section Pane or present values are monitored in the Watch Pane.
If bits are set, reset, force-set, or force-reset by inadvertently pressing a shortcut key,
devices connected to PLC outputs may operate incorrectly regardless of the operat-
ing mode.
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16
Caution
Program so that the memory area of the start address is not exceeded when
using a word address or symbol for the offset.
For example, write the program so that processing is executed only when the indirect
specification does not cause the final address to exceed the memory area by using
an input comparison instruction or other instruction.
If an indirect specification causes the address to exceed the area of the start address,
the system will access data in other area, and unexpected operation may occur.
Set the temperature range according to the type of temperature sensor con-
nected to the Unit.
Temperature data will not be converted correctly if the temperature range does not
match the sensor.
Do not set the temperature range to any values other than those for which tem-
perature ranges are given in the following table.
An incorrect setting may cause operating errors.
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Precautions for Safe Use
Observe the following precautions when using a CP-series PLC.
ꢀ Handling
• To initialize the DM Area, back up the initial contents for the DM Area to backup memory using
one of the following methods.
• Set the number of words of the DM Area to be backed up starting with D0 in the Number of
CH of DM for backup Box in the Startup Data Read Area.
• Include programming to back up specified words in the DM Area to built-in EEPROM by turn-
ing ON A751.15 (DM Backup Save Start Bit).
• Check the ladder program for proper execution before actually running it on the Unit. Not checking
the program may result in an unexpected operation.
• The ladder program and parameter area data in the CP1E CPU Units are backed up in the built-in
EEPROM backup memory. The BKUP indicator will light on the front of the CPU Unit when the
backup operation is in progress. Do not turn OFF the power supply to the CPU Unit when the
BKUP indicator is lit. The data will not be backed up if power is turned OFF and a memory error
will occur the next time the power supply is turned ON.
• With a CP1E CPU Unit, data memory can be backed up to the built-in EEPROM backup memory.
The BKUP indicator will light on the front of the CPU Unit when backup is in progress. Do not turn
OFF the power supply to the CPU Unit when the BKUP indicator is lit. If the power is turned OFF
during a backup, the data will not be backed up and will not be transferred to the DM Area in RAM
the next time the power supply is turned ON.
• Before replacing the battery, supply power to the CPU Unit for at least 30 minutes and then com-
plete battery replacement within 5 minutes. Memory data may be corrupted if this precaution is
not observed.
• The equipment may operate unexpectedly if inappropriate parameters are set. Even if the appro-
priate parameters are set, confirm that equipment will not be adversely affected before transfer-
ring the parameters to the CPU Unit.
• Before starting operation, confirm that the contents of the DM Area is correct.
• After replacing the CPU Unit, make sure that the required data for the DM Area, Holding Area, and
other memory areas has been transferred to the new CPU Unit before restarting operation.
• Do not attempt to disassemble, repair, or modify any Units. Any attempt to do so may result in mal-
function, fire, or electric shock.
• Confirm that no adverse effect will occur in the system before attempting any of the following. Not
doing so may result in an unexpected operation.
• Changing the operating mode of the PLC (including the setting of the startup operating mode).
• Force-setting/force-resetting any bit in memory.
• Changing the present value of any word or any set value in memory.
ꢀ External Circuits
• Always configure the external circuits to turn ON power to the PLC before turning ON power to the
control system. If the PLC power supply is turned ON after the control power supply, temporary
errors may result in control system signals because the output terminals on DC Output Units and
other Units will momentarily turn ON when power is turned ON to the PLC.
• Fail-safe measures must be taken by the customer to ensure safety in the event that outputs from
output terminals remain ON as a result of internal circuit failures, which can occur in relays, tran-
sistors, and other elements.
• If the I/O Hold Bit is turned ON, the outputs from the PLC will not be turned OFF and will maintain
their previous status when the PLC is switched from RUN or MONITOR mode to PROGRAM mode.
Make sure that the external loads will not produce dangerous conditions when this occurs. (When
operation stops for a fatal error, including those produced with the FALS instruction, all outputs from
PLC will be turned OFF and only the internal output status in the CPU Unit will be maintained.)
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Regulations and Standards
Trademarks
SYSMAC is a registered trademark for Programmable Controllers made by OMRON Corporation.
CX-One is a registered trademark for Programming Software made by OMRON Corporation.
Windows is a registered trademark of Microsoft Corporation.
Other system names and product names in this document are the trademarks or registered trademarks
of their respective companies.
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Related Manuals
The following manuals are related to the CP1E. Use them together with this manual.
Manual name
Cat. No.
W483
Model numbers
CP1E-EꢀꢀDꢀ-ꢀ
CP1E-NꢀꢀDꢀ-ꢀ
CP1E-NAꢀꢀDꢀ-ꢀ
Application
Contents
SYSMAC CP Series
CP1E CPU Unit Instruc-
tions Reference Manual
(this manual)
To learn program-
ming instructions in
detail
Describes each programming instruction in
detail.
When programming, use this manual together
with the CP1E CPU Unit Software User’s Man-
ual (Cat. No. W480).
SYSMAC CP Series
CP1E CPU Unit Soft-
ware User’s Manual
W480
CP1E-EꢀꢀDꢀ-ꢀ
CP1E-NꢀꢀDꢀ-ꢀ
CP1E-NAꢀꢀDꢀ-ꢀ
To learn the software Describes the following information for CP1E
specifications of the
CP1E PLCs
PLCs.
• CPU Unit operation
• Internal memory
• Programming
• Settings
• CPU Unit built-in functions
• Interrupts
• High-speed counter inputs
• Pulse outputs
• Serial communications
• Other functions
Use this manual together with the CP1E CPU Unit Hardware User’s
Manual (Cat. No. W479) and Instructions Reference Manual (Cat. No.
W483).
SYSMAC CP Series
CP1E CPU Unit Hard-
ware User’s Manual
W479
CP1E-EꢀꢀDꢀ-ꢀ
CP1E-NꢀꢀDꢀ-ꢀ
CP1E-NAꢀꢀDꢀ-ꢀ
To learn the hard-
ware specifications
of the CP1E PLCs
Describes the following information for CP1E
PLCs.
• Overview and features
• Basic system configuration
• Part names and functions
• Installation and settings
• Troubleshooting
Use this manual together with the CP1E CPU Unit Software User’s
Manual (Cat. No. W480) and Instructions Reference Manual (Cat. No.
W483).
CS/CJ/CP/NSJ Series
Communications Com-
mands Reference Man-
ual
W342
CS1G/H-CPUꢀꢀH
CS1G/H-CPUꢀꢀ-V1
CS1D-CPUꢀꢀH
CS1D-CPUꢀꢀS
CS1W-SCUꢀꢀ-V1
CS1W-SCBꢀꢀ-V1
CJ1G/H-CPUꢀꢀH
CJ1G-CPUꢀꢀP
CJ1M-CPUꢀꢀ
To learn communica- Describes
tions commands for
CS/CJ/CP/NSJ-
1) C-mode commands and
2) FINS commands in detail.
series Controllers in
Read this manual for details on C-mode and
detail
FINS commands addressed to CPU Units.
Note This manual describes commands addressed to CPU Units. It
does not cover commands addressed to other Units or ports (e.g.,
serial communications ports on CPU Units, communications ports
on Serial Communications Units/Boards, and other Communica-
tions Units).
CJ1G-CPUꢀꢀ
CJ1W-SCUꢀꢀ-V1
CP1L-L10Dꢀ-ꢀ
CP1L-L14Dꢀ-ꢀ
CP1L-L20Dꢀ-ꢀ
CP1L-M30Dꢀ-ꢀ
CP1L-M40Dꢀ-ꢀ
CP1L-M60Dꢀ-ꢀ
CP1E-EꢀꢀDꢀ-ꢀ
CP1E-NꢀꢀDꢀ-ꢀ
CP1E-NAꢀꢀDꢀ-ꢀ
To learn the basic
setup methods of the CP1L/CP1E PLCs.
CP1L/CP1E PLCs
Describes the following information for
SYSMAC CP Series
CP1L/CP1E CPU Unit
Introduction Manual
W461
• Basic configuration and component names
• Mounting and wiring
• Programming, data transfer, and debugging
using the CX-Programmer
• Application program examples
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1
Summary of Instructions
This section provides a summary of instructions used with a CP1E CPU Unit.
1-1 Summary of Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2
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1-1
1 Summary of Instructions
1-1 Summary of Instructions
There are 200 types of instructions can be used by CP1E.
The following table lists the instructions by function. Refer to the reference pages for the
detail of each instruction.
Instrucion
Type
FUN
No.
Instruction
LOAD
Mnemonic
LD
Function
Page
Sequence
Input Instruc-
tions
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Indicates a logical start and creates an ON/OFF execution condition based on
the ON/OFF status of the specified operand bit.
2-7
@LD
%LD
!LD
!@LD
!%LD
LOAD NOT
LD NOT
@LD NOT
%LD NOT
!LD NOT
!@LD NOT
!%LD NOT
AND
Indicates a logical start and creates an ON/OFF execution condition based on
the reverse of the ON/OFF status of the specified operand bit.
2-7
AND
Takes a logical AND of the status of the specified operand bit and the current
execution condition.
2-9
@AND
%AND
!AND
!@AND
!%AND
AND NOT
@AND NOT
%AND NOT
!AND NOT
!@AND NOT
!%AND NOT
OR
AND NOT
Reverses the status of the specified operand bit and takes a logical AND with
the current execution condition.
2-9
OR
Takes a logical OR of the ON/OFF status of the specified operand bit and the
current execution condition.
2-11
@OR
%OR
!OR
!@OR
!%OR
OR NOT
OR NOT
@OR NOT
%OR NOT
!OR NOT
!@OR NOT
!%OR NOT
AND LD
OR LD
Reverses the status of the specified bit and takes a logical OR with the current
execution condition.
2-11
AND LOAD
OR LOAD
NOT
Takes a logical AND between logic blocks.
Takes a logical OR between logic blocks.
2-13
2-13
2-16
2-17
NOT
520 Reverses the execution condition.
CONDITION ON
UP
521 UP(521) turns ON the execution condition for one cycle when the execution
condition goes from OFF to ON.
CONDITION OFF
DOWN
522 DOWN(522) turns ON the execution condition for one cycle when the execution
condition goes from ON to OFF.
2-17
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1-2
1 Summary of Instructions
Instrucion
Type
FUN
No.
Instruction
OUTPUT
Mnemonic
OUT
Function
Page
Sequence
Output
Instructions
-
-
-
-
-
Outputs the result (execution condition) of the logical processing to the speci-
fied bit.
2-18
2-18
!OUT
OUTPUT NOT
OUT NOT
!OUT NOT
TR
Reverses the result (execution condition) of the logical processing, and outputs
it to the specified bit.
TR Bits
KEEP
TR bits are used to temporarily retain the ON/OFF status of execution condi-
tions in a program when programming in mnemonic code.
2-20
2-21
KEEP
!KEEP
DIFU
011 Operates as a latching relay.
1
DIFFERENTIATE
UP
013 DIFU(013) turns the designated bit ON for one cycle when the execution condi-
tion goes from OFF to ON (rising edge).
2-25
2-27
2-29
!DIFU
DIFFERENTIATE
DOWN
DIFD
014 DIFD(014) turns the designated bit ON for one cycle when the execution condi-
tion goes from ON to OFF (falling edge).
!DIFD
SET
SET
-
-
-
-
-
-
-
-
-
-
-
-
SET turns the operand bit ON when the execution condition is ON.
@SET
%SET
!SET
!@SET
!%SET
RSET
@RSET
%RSET
!RSET
!@RSET
!%RSET
RESET
RSET turns the operand bit OFF when the execution condition is ON.
2-29
MULTIPLE BIT SET SETA
@SETA
RSTA
530 SETA(530) turns ON the specified number of consecutive bits.
2-31
2-31
2-33
MULTIPLE BIT
RESET
531 RSTA(531) turns OFF the specified number of consecutive bits.
@RSTA
SETB
SINGLE BIT SET
532 SETB(532) turns ON the specified bit in the specified word when the execution
condition is ON.
@SETB
!SETB
Unlike the SET instruction, SETB(532) can be used to set a bit in a DM word.
!@SETB
SINGLE BIT RESET RSTB
@RSTB
533 RSTB(533) turns OFF the specified bit in the specified word when the execu-
tion condition is ON.
2-33
Unlike the RSET instruction, RSTB(533) can be used to reset a bit in a DM
word.
!RSTB
!@RSTB
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1-3
1 Summary of Instructions
Instrucion
Type
FUN
No.
Instruction
END
Mnemonic
Function
Page
Sequence
Control
Instructions
END
NOP
IL
001 Indicates the end of a program.
2-38
2-39
2-40
NO OPERATION
INTERLOCK
000 This instruction has no function. (No processing is performed for NOP(000).)
002 Interlocks all outputs between IL(002) and ILC(003) when the execution condi-
tion for IL(002) is OFF.
INTERLOCK
CLEAR
ILC
003 All outputs between IL(002) and ILC(003) are interlocked when the execution
condition for IL(002) is OFF.
2-40
2-44
MULTI-INTERLOCK MILH
DIFFERENTIATION
HOLD
517 When the execution condition for MILH(517) is OFF, the outputs for all instruc-
tions between that MILH(517) instruction and the next MILC(519) instruction
are interlocked.
MULTI-INTERLOCK MILR
DIFFERENTIATION
RELEASE
518 When the execution condition for MILR(518) is OFF, the outputs for all instruc-
tions between that MILR(518) instruction and the next MILC(519) instruction
are interlocked.
2-44
MULTI-INTERLOCK MILC
CLEAR
519 Clears an interlock started by an MILH(517) or MILR(518) with the same inter-
lock number.
2-44
2-53
JUMP
JMP
004 When the execution condition for JMP(004) is OFF, program execution jumps
directly to the first JME(005) in the program with the same jump number.
JUMP END
JME
CJP
005 Indicates the end of a jump initiated by JMP(004) or CJP(510).
2-53
2-53
CONDITIONAL
JUMP
510 The operation of CJP(510) is the basically the opposite of JMP(004). When the
execution condition for CJP(510) is ON, program execution jumps directly to the
first JME(005) in the program with the same jump number.
FOR LOOP
FOR
512 The instructions between FOR(512) and NEXT(513) are repeated a specified
number of times.
2-56
2-56
2-59
NEXT LOOP
BREAK LOOP
NEXT
BREAK
513 The instructions between FOR(512) and NEXT(513) are repeated a specified
number of times.
514 Programmed in a FOR-NEXT loop to cancel the execution of the loop for a
given execution condition. The remaining instructions in the loop are processed
as NOP(000) instructions.
Timer and
Counter
Instructions
HUNDRED-MS
TIMER
TIM
-
TIM/TIMX(550) operates a decrementing timer with units of 0.1-s.
2-66
2-69
2-72
2-74
2-77
2-80
2-83
2-86
TIMX
550
TEN-MS TIMER
ONE-MS TIMER
TIMH
015 TIMH(015)/TIMHX(551) operates a decrementing timer with units of 10-ms.
TIMHX
TMHH
TMHHX
TTIM
551
540 TMHH(540)/TMHHX(552) operates a decrementing timer with units of 1-ms.
552
ACCUMULATIVE
TIMER
087 TTIM(087)/TTIMX(555) operates an incrementing timer with units of 0.1-s.
TTIMX
TIML
555
LONG TIMER
COUNTER
542 TIML(542)/TIMLX(553) operates a decrementing timer with units of 0.1-s.
553
TIMLX
CNT
-
CNT/CNTX(546) operates a decrementing counter.
CNTX
CNTR
CNTRX
546
REVERSIBLE
COUNTER
012 CNTR(012)/CNTRX(548) operates a reversible counter.
548
RESET TIMER/
COUNTER
CNR/
@CNR
545 CNR(545)/CNRX(547) resets the timers or counters within the specified range
of timer or counter numbers.
CNRX/
547
@CNRX
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1-4
1 Summary of Instructions
Instrucion
Type
FUN
No.
Instruction
Mnemonic
Function
Page
Comparison
Instructions
Symbol Comparison = , <> , < , <= ,
> , >=
300 Symbol comparison instructions compare two values and create an ON execu-
2-88
∼
tion condition when the comparison condition is true.
328
Time Comparison
LD, AND,
OR+=DT
341 Time comparison instructions compare two BCD time values and create an ON
execution condition when the comparison condition is true.
2-91
LD, AND,
OR+<>DT
342
343
344
345
346
LD, AND,
OR+<DT
1
LD, AND,
OR+<=DT
LD, AND,
OR+>DT
LD, AND,
OR+>=DT
UNSIGNED
COMPARE
CMP
020 Compares two unsigned binary values (constants and/or the contents of speci-
fied words) and outputs the result to the Arithmetic Flags in the Auxiliary Area.
2-95
2-95
!CMP
CMPL
DOUBLE
UNSIGNED
COMPARE
060 Compares two double unsigned binary values (constants and/or the contents of
specified words) and outputs the result to the Arithmetic Flags in the Auxiliary
Area.
SIGNED BINARY
COMPARE
CPS
114 Compares two signed binary values (constants and/or the contents of specified
words) and outputs the result to the Arithmetic Flags in the Auxiliary Area.
2-98
2-98
!CPS
CPSL
DOUBLE SIGNED
BINARY COMPARE
115 Compares two double signed binary values (constants and/or the contents of
specified words) and outputs the result to the Arithmetic Flags in the Auxiliary
Area.
TABLE COMPARE
TCMP
085 Compares the source data to the contents of 16 words and turns ON the corre-
sponding bit in the result word when the contents are equal.
2-101
2-103
@TCMP
UNSIGNED BLOCK BCMP
COMPARE
068 Compares the source data to 16 ranges (defined by 16 lower limits and 16
upper limits) and turns ON the corresponding bit in the result word when the
source data is within the range.
@BCMP
AREA RANGE
COMPARE
ZCP
088 Compares the 16-bit unsigned binary value in CD (word contents or constant)
to the range defined by LL and UL and outputs the results to the Arithmetic
Flags in the Auxiliary Area.
2-105
2-105
2-108
DOUBLE AREA
RANGE COMPARE
ZCPL
116 Compares the 32-bit unsigned binary value in CD and CD+1 (word contents or
constant) to the range defined by LL and UL and outputs the results to the
Arithmetic Flags in the Auxiliary Area.
Data Move-
ment Instruc-
tions
MOVE
MOV
021 Transfers a word of data to the specified word.
@MOV
!MOV
!@MOV
DOUBLE MOVE
MOVE NOT
MOVL/
@MOVL
498 Transfers two words of data to the specified words.
022 Transfers the complement of a word of data to the specified word.
082 Transfers the specified bit.
2-108
2-108
2-111
2-113
2-115
2-117
2-119
2-121
2-123
2-125
MVN/
@MVN
MOVE BIT
MOVB/
@MOVB
MOVE DIGIT
MOVD/
@MOVD
083 Transfers the specified digit or digits. (Each digit is made up of 4 bits.)
062 Transfers the specified number of consecutive bits.
070 Transfers the specified number of consecutive words.
071 Copies the same word to a range of consecutive words.
073 Exchanges the contents of the two specified words.
MULTIPLE BIT
TRANSFER
XFRB/
@XFRB
BLOCK TRANSFER XFER/
@XFER
BLOCK SET
BSET/
@BSET
DATA EXCHANGE
XCHG/
@XCHG
SINGLE WORD
DISTRIBUTE
DIST/
@DIST
080 Transfers the source word to a destination word calculated by adding an offset
value to the base address.
DATA COLLECT
COLL/
@COLL
081 Transfers the source word (calculated by adding an offset value to the base
address) to the destination word.
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1-5
1 Summary of Instructions
Instrucion
Type
FUN
No.
Instruction
Mnemonic
Function
Page
Data Shift
Instructions
SHIFT REGISTER
SFT
010 Operates a shift register.
2-127
2-129
REVERSIBLE
SFTR/
084 Creates a shift register that shifts data to either the right or the left.
SHIFT REGISTER
@SFTR
WORD SHIFT
WSFT/
@WSFT
016 Shifts data between St and E in word units.
2-131
2-133
2-134
2-135
2-137
2-139
2-139
2-141
2-141
2-144
2-144
2-147
2-147
2-150
2-150
2-153
2-153
2-156
2-156
ARITHMETIC
SHIFT LEFT
ASL/
@ASL
025
Shifts the contents of Wd one bit to the left.
ARITHMETIC
SHIFT RIGHT
ASR/
@ASR
026 Shifts the contents of Wd one bit to the right.
ROTATE LEFT
ROL/
@ROL
027 Shifts all Wd bits one bit to the left including the Carry Flag (CY).
028 Shifts all Wd bits one bit to the right including the Carry Flag (CY).
074 Shifts data by one digit (4 bits) to the left.
ROTATE RIGHT
ROR/
@ROR
ONE DIGIT SHIFT
LEFT
SLD/
@SLD
ONE DIGIT SHIFT
RIGHT
SRD/
@SRD
075 Shifts data by one digit (4 bits) to the right.
SHIFT N-BITS LEFT NASL/
@NASL
580 Shifts the specified 16 bits of word data to the left by the specified number of
bits.
DOUBLE SHIFT
N-BITS LEFT
NSLL/
@NSLL
582 Shifts the specified 32 bits of word data to the left by the specified number of
bits.
SHIFT N-BITS
RIGHT
NASR/
@NASR
581 Shifts the specified 16 bits of word data to the right by the specified number of
bits.
DOUBLE SHIFT
N-BITS RIGHT
NSRL/
@NSRL
583 Shifts the specified 32 bits of word data to the right by the specified number of
bits.
Increment/
Decrement
Instructions
INCREMENT
BINARY
++/
@++
590 Increments the 4-digit hexadecimal content of the specified word by 1.
591 Increments the 8-digit hexadecimal content of the specified words by 1.
592 Decrements the 4-digit hexadecimal content of the specified word by 1.
593 Decrements the 8-digit hexadecimal content of the specified words by 1.
594 Increments the 4-digit BCD content of the specified word by 1.
595 Increments the 8-digit BCD content of the specified words by 1.
596 Decrements the 4-digit BCD content of the specified word by 1.
597 Decrements the 8-digit BCD content of the specified words by 1.
DOUBLE INCRE-
MENT BINARY
++L/
@++L
DECREMENT
BINARY
--/
--
@
DOUBLE DECRE-
MENT BINARY
--L/
--
@
L
INCREMENT BCD
++B/
@++B
DOUBLE INCRE-
MENT BCD
++BL/
@++BL
DECREMENT BCD
--B/
--
@
B
DOUBLE DECRE-
MENT BCD
--
@
BL/
BL
--
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1-6
1 Summary of Instructions
Instrucion
Type
FUN
No.
Instruction
Mnemonic
+/
Function
Page
Symbol Math
Instructions
SIGNED BINARY
ADD WITHOUT
CARRY
400 Adds 4-digit (single-word) hexadecimal data and/or constants.
2-158
@+
DOUBLE SIGNED
BINARY ADD
+L/
@+L
401 Adds 8-digit (double-word) hexadecimal data and/or constants.
2-158
WITHOUT CARRY
SIGNED BINARY
ADD WITH CARRY
+C/
@+C
402 Adds 4-digit (single-word) hexadecimal data and/or constants with the Carry
Flag (CY).
2-160
2-160
DOUBLE SIGNED
BINARY ADD WITH @+CL
CARRY
+CL/
403 Adds 8-digit (double-word) hexadecimal data and/or constants with the Carry
Flag (CY).
1
BCD ADD
WITHOUT CARRY
+B/
@+B
404 Adds 4-digit (single-word) BCD data and/or constants.
2-162
2-162
2-164
2-164
2-166
DOUBLE BCD ADD +BL/
WITHOUT CARRY
405 Adds 8-digit (double-word) BCD data and/or constants.
@+BL
BCD ADD WITH
CARRY
+BC/
@+BC
406 Adds 4-digit (single-word) BCD data and/or constants with the Carry Flag (CY).
407 Adds 8-digit (double-word) BCD data and/or constants with the Carry Flag (CY).
410 Subtracts 4-digit (single-word) hexadecimal data and/or constants.
DOUBLE BCD ADD +BCL/
WITH CARRY
@+BCL
SIGNED BINARY
SUBTRACT
WITHOUT CARRY
-/
@
-
-
DOUBLE SIGNED
BINARY
-
L/
411 Subtracts 8-digit (double-word) hexadecimal data and/or constants.
2-166
@
L
SUBTRACT WITH-
OUT CARRY
SIGNED BINARY
SUBTRACT WITH
CARRY
-
@
C/
-
412 Subtracts 4-digit (single-word) hexadecimal data and/or constants with the
Carry Flag (CY).
2-170
2-170
C
DOUBLE SIGNED
BINARY WITH
CARRY
-
@
CL/
-
413 Subtracts 8-digit (double-word) hexadecimal data and/or constants with the
Carry Flag (CY).
CL
BCD SUBTRACT
WITHOUT CARRY
-
@
B/
-
414 Subtracts 4-digit (single-word) BCD data and/or constants.
415 Subtracts 8-digit (double-word) BCD data and/or constants.
2-172
2-172
B
DOUBLE BCD
SUBTRACT
-
@
BL/
BL
-
WITHOUT CARRY
BCD SUBTRACT
WITH CARRY
-
@
BC/
BC
416 Subtracts 4-digit (single-word) BCD data and/or constants with the Carry Flag
(CY).
2-175
2-175
-
DOUBLE BCD
SUBTRACT
-
@
BCL/
-BCL
417 Subtracts 8-digit (double-word) BCD data and/or constants with the Carry Flag
(CY).
WITH CARRY
SIGNED BINARY
MULTIPLY
∗/
@∗
420 Multiplies 4-digit signed hexadecimal data and/or constants.
421 Multiplies 8-digit signed hexadecimal data and/or constants.
424 Multiplies 4-digit (single-word) BCD data and/or constants.
425 Multiplies 8-digit (double-word) BCD data and/or constants.
430 Divides 4-digit (single-word) signed hexadecimal data and/or constants.
431 Divides 8-digit (double-word) signed hexadecimal data and/or constants.
434 Divides 4-digit (single-word) BCD data and/or constants.
435 Divides 8-digit (double-word) BCD data and/or constants.
2-177
2-177
2-179
2-179
2-181
2-181
2-183
2-183
DOUBLE SIGNED
BINARY MULTIPLY
∗L/
@∗L
BCD MULTIPLY
∗B/
@∗B
DOUBLE BCD
MULTIPLY
∗BL/
@∗BL
SIGNED BINARY
DIVIDE
/
@/
DOUBLE SIGNED
BINARY DIVIDE
/L
@/L
BCD DIVIDE
/B
@/B
DOUBLE BCD
DIVIDE
/BL
@/BL
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1-7
1 Summary of Instructions
Instrucion
Type
FUN
No.
Instruction
Mnemonic
Function
Page
Conversion
Instructions
BCD TO BINARY
BIN/
@BIN
023 Converts BCD data to binary data.
2-185
DOUBLE BCD TO
DOUBLE BINARY
BINL/
@BINL
058 Converts 8-digit BCD data to 8-digit hexadecimal (32-bit binary) data.
024 Converts a word of binary data to a word of BCD data.
2-185
2-187
2-187
2-189
2-191
BINARY TO BCD
BCD/
@BCD
DOUBLE BINARY
TO DOUBLE BCD
BCDL/
@BCDL
059 Converts 8-digit hexadecimal (32-bit binary) data to 8-digit BCD data.
160 Calculates the 2' complement of a word of hexadecimal data.
2’S COMPLEMENT
NEG/
@NEG
DATA DECODER
MLPX/
@MLPX
076 Reads the numerical value in the specified digit (or byte) in the source word,
turns ON the corresponding bit in the result word (or 16-word range), and turns
OFF all other bits in the result word (or 16-word range).
DATA ENCODER
ASCII CONVERT
ASCII TO HEX
DMPX/
@DMPX
077 FInds the location of the first or last ON bit within the source word (or 16-word
range), and writes that value to the specified digit (or byte) in the result word.
2-196
2-201
2-205
2-210
2-210
2-212
2-212
2-214
2-214
2-216
2-216
2-218
2-227
ASC/
@ASC
086 Converts 4-bit hexadecimal digits in the source word into their 8-bit ASCII
equivalents.
HEX/
@HEX
162 Converts up to 4 bytes of ASCII data in the source word to their hexadecimal
equivalents and writes these digits in the specified destination word.
Logic Instruc- LOGICAL AND
tions
ANDW/
@ANDW
034 Takes the logical AND of corresponding bits in single words of word data and/or
constants.
DOUBLE LOGICAL
AND
ANDL/
@ANDL
610 Takes the logical AND of corresponding bits in double words of word data
and/or constants.
LOGICAL OR
ORW/
@ORW
035 Takes the logical OR of corresponding bits in single words of word data and/or
constants.
DOUBLE LOGICAL
OR
ORWL/
@ORWL
611 Takes the logical OR of corresponding bits in double words of word data and/or
constants.
EXCLUSIVE OR
XORW/
@XORW
036 Takes the logical exclusive OR of corresponding bits in single words of word
data and/or constants.
DOUBLE EXCLU-
SIVE OR
XORL/
@XORL
612 Takes the logical exclusive OR of corresponding bits in double words of word
data and/or constants.
COMPLEMENT
COM/
@COM
029 Turns OFF all ON bits and turns ON all OFF bits in Wd.
DOUBLE
COMPLEMENT
COML/
@COML
614 Turns OFF all ON bits and turns ON all OFF bits in Wd and Wd+1.
069 Calculates the sine, cosine, or a linear extrapolation of the source data.
067 Counts the total number of ON bits in the specified word(s).
Special Math
Instructions
ARITHMETIC PRO- APR/
CESS
@APR
BIT COUNTER
BCNT/
@BCNT
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1-8
1 Summary of Instructions
Instrucion
Type
FUN
No.
Instruction
Mnemonic
FIX/
Function
Page
Floating-point FLOATING TO
Math Instruc-
tions
450 Converts a 32-bit floating-point value to 16-bit signed binary data and places
the result in the specified result word.
2-233
2-233
2-235
2-235
2-237
2-237
2-237
2-237
16-BIT
@FIX
FLOATING TO
32-BIT
FIXL/
@FIXL
451 Converts a 32-bit floating-point value to 32-bit signed binary data and places
the result in the specified result words.
16-BIT TO
FLOATING
FLT/
@FLT
452 Converts a 16-bit signed binary value to 32-bit floating-point data and places
the result in the specified result words.
32-BIT TO
FLOATING
FLTL/
@FLTL
453 Converts a 32-bit signed binary value to 32-bit floating-point data and places
the result in the specified result words.
1
FLOATINGPOINT
ADD
+F/
@+F
454 Adds two 32-bit floating-point numbers and places the result in the specified
result words.
FLOATINGPOINT
SUBTRACT
-
F/
455 Subtracts one 32-bit floating-point number from another and places the result in
the specified result words.
@
-F
FLOATING-
POINT MULTIPLY
∗F/
@∗F
456 Multiplies two 32-bit floating-point numbers and places the result in the speci-
fied result words.
FLOATING-
POINT DIVIDE
/F
@/F
457 Divides one 32-bit floating-point number by another and places the result in the
specified result words.
FLOATING
SYMBOL
COMPARISON
=F
329 Compares the specified single-precision data (32 bits) or constants and creates
2-241
2-241
2-241
2-241
2-241
2-241
2-244
an ON execution condition if the comparison result is true. Three kinds of sym-
bols can be used with the floating-point symbol comparison instructions: LD
<>F
<F
330
331
332
333
334
(Load), AND, and OR.
<=F
>F
>=F
FLOATING-
POINT TO ASCII
FSTR/
@FSTR
448 Converts the specified single-precision floating-point data (32-bit decimal- point
or exponential format) to text string data (ASCII) and outputs the result to the
destination word.
ASCII TO
FLOATING-POINT
FVAL/
@FVAL
449 Converts the specified text string (ASCII) representation of single-precision
floating-point data (decimal-point or exponential format) to 32-bit single-preci-
sion floating-point data and outputs the result to the destination words.
2-249
Table Data
Processing
Instructions
SWAP BYTES
SWAP/
@SWAP
637 Switches the leftmost and rightmost bytes in all of the words in the range.
2-253
2-255
2-257
FRAME
CHECKSUM
FCS/
@FCS
180 Calculates the ASCII FCS value for the specified range.
Data Control
Instructions
PID CONTROL
WITH AUTOTUN-
ING
PIDAT
191 Executes PID control according to the specified parameters. The PID constants
can be auto-tuned with PIDAT(191).
TIME-PROPOR-
TIONAL OUTPUT
TPO
685 Inputs the duty ratio or manipulated variable from the specified word, converts
the duty ratio to a time-proportional output based on the specified parameters,
and outputs the result from the specified output.
2-269
SCALING
SCL/
@SCL
194 Converts unsigned binary data into unsigned BCD data according to the speci-
fied linear function.
2-276
2-280
2-284
2-287
2-290
2-295
2-295
2-300
2-303
2-306
2-307
SCALING 2
SCALING 3
AVERAGE
SCL2/
@SCL2
486 Converts signed binary data into signed BCD data according to the specified
linear function. An offset can be input in defining the linear function.
SCL3/
@SCL3
487 Converts signed BCD data into signed binary data according to the specified
linear function. An offset can be input in defining the linear function.
AVG
195 Calculates the average value of an input word for the specified number of
cycles.
Subroutine
Instructions
SUBROUTINE
CALL
SBS/
@SBS
091 Calls the subroutine with the specified subroutine number and executes that
program.
SUBROUTINE
ENTRY
SBN
RET
092 Indicates the beginning of the subroutine program with the specified subroutine
number.
SUBROUTINE
RETURNI
093 Indicates the end of a subroutine program.
Interrupt
Control
Instructions
SET INTERRUPT
MASK
MSKS/
@MSKS
690 Sets up interrupt processing for I/O interrupts or scheduled interrupts.
CLEAR
INTERRUPT
CLI/
@CLI
691 Clears or retains recorded interrupt inputs for I/O interrupts or sets the time to
the first scheduled interrupt for scheduled interrupts.
DISABLE
INTERRUPTS
DI/
@DI
693 Disables execution of all interrupt tasks except the power OFF interrupt.
ENABLE
EI
694 Enables execution of all interrupt tasks that were disabled with DI(693).
INTERRUPTS
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1-9
1 Summary of Instructions
Instrucion
Type
FUN
No.
Instruction
Mnemonic
Function
Page
High-speed
Counter and
Pulse Output
Instructions
MODE CONTROL
INI/
@INI
880 INI(880) is used to start and stop target value comparison, to change the
present value (PV) of a high-speed counter, to change the PV of an interrupt
input (counter mode), to change the PV of a pulse output, or to stop pulse out-
put.
2-308
HIGH-SPEED
COUNTER PV
READ
PRV/
@PRV
881 PRV(881) is used to read the present value (PV) of a highspeed counter, pulse
output, or interrupt input (counter mode).
2-311
COMPARISON
TABLE LOAD
CTBL/
@CTBL
882 CTBL(882) is used to perform target value or range comparisons for the
present value (PV) of a high-speed counter.
2-315
2-319
2-323
2-325
SPEED OUTPUT
SPED/
@SPED
885 SPED(885) is used to specify the frequency and perform pulse output without
acceleration or deceleration.
SET PULSES
PULS/
@PULS
886 PULS(886) is used to set the number of pulses for pulse output.
PULSE OUTPUT
PLS2/
@PLS2
887 PLS2(887) is used to set the pulse frequency and acceleration/deceleration
rates, and to perform pulse output with acceleration/deceleration (with different
acceleration/deceleration rates). Only positioning is possible.
ACCELERATION
CONTROL
ACC/
@ACC
888 ACC(888) is used to set the pulse frequency and acceleration/deceleration
rates, and to perform pulse output with acceleration/deceleration (with the
same acceleration/deceleration rate). Both positioning and speed control are
possible.
2-331
ORIGIN SEARCH
ORG/
@ORG
889 ORG(889) is used to perform origin searches and returns.
2-336
2-339
PULSE WITH
VARIABLE DUTY
FACTOR
PWM/
@PWM
891 PWM(891) is used to output pulses with a variable duty factor.
Step
Instructions
STEP START
SNXT
STEP
009 SNXT(009) is used in the following three ways:
(1)To start step programming execution.
(2)To proceed to the next step control bit.
(3)To end step programming execution.
2-342
2-342
STEP DEFINE
008 STEP(008) functions in following 2 ways, depending on its position and whether
or not a control bit has been specified.
(1)Starts a specific step.
(2)Ends the step programming area (i.e., step execution).
097 Refreshes the specified I/O words.
Basic I/O Unit I/O REFRESH
Instructions
IORF/
@IORF
2-352
2-354
7-SEGMENT
DECODER
SDEC/
@SDEC
078 Converts the hexadecimal contents of the designated digit(s) into 8-bit, 7-seg-
ment display code and places it into the upper or lower 8-bits of the specified
destination words.
DIGITAL SWITCH
INPUT
DSW
MTR
210 Reads the value set on an external digital switch (or thumbwheel switch) con-
nected to an Input Unit or Output Unit and stores the 4-digit or 8-digit BCD data
in the specified words.
2-357
2-361
MATRIX INPUT
213 Inputs up to 64 signals from an 8 ⋅ 8 matrix connected to an Input Unit and
Output Unit (using 8 input points and 8 output points) and stores that 64-bit data
in the 4 destination words.
7-SEGMENT DIS-
PLAY OUTPUT
7SEG
214 Converts the source data (either 4-digit or 8-digit BCD) to 7-segment display
data, and outputs that data to the specified output word.
2-365
2-369
Serial Com-
munications
Instructions
TRANSMIT
TXD/
@TXD
236 Outputs the specified number of bytes of data from the RS-232C port built into
the CPU Unit or the serial port of a Serial Communications Board (version 1.2
or later).
RECEIVE
RXD/
@RXD
235 Reads the specified number of bytes of data from the RS-232C port built into
the CPU Unit or the serial port of a Serial Communications Board (version 1.2
or later).
2-374
Clock
Instructions
CALENDAR ADD
CADD/
@CADD
730 Adds time to the calendar data in the specified words.
731 Subtracts time from the calendar data in the specified words.
735 Changes the internal clock setting to the setting in the specified source words.
006 Generates or clears user-defined non-fatal errors.
2-380
2-380
2-385
2-387
2-393
CALENDAR
SUBTRACT
CSUB/
@CSUB
CLOCK
ADJUSTMENT
DATE/
@DATE
Failure
Diagnosis
Instructions
FAILURE ALARM
FAL/
@FAL
SEVERE FAILURE
ALARM
FALS
007 Generates user-defined fatal errors.
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1-10
1 Summary of Instructions
Instrucion
Type
FUN
No.
Instruction
SET CARRY
Mnemonic
STC/
Function
Page
Other
Instructions
040 Sets the Carry Flag (CY).
2-398
@STC
CLEAR CARRY
CLC/
041 Turns OFF the Carry Flag (CY).
2-398
@CLC
EXTEND MAXIMUM WDT/
CYCLE TIME @WDT
094 Extends the maximum cycle time, but only for the cycle in which this instruction
is executed.
2-399
1
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1-11
1 Summary of Instructions
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1-12
2
Instructions
This section describes the functions, operands and sample programs of the instruc-
tions that are supported by a CP1E CPU Unit.
Notation and Layout of Instruction Descriptions . . . . . . . . . . . . . . . . . . . . 2-2
Sequence Input Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-5
Sequence Output Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-18
Sequence Control Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-35
Timer and Counter Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-60
Comparison Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-88
Data Movement Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-108
Data Shift Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-127
Increment/Decrement Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-147
Symbol Math Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-158
Conversion Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-185
Logic Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-210
Special Math Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-218
Floating-point Math Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-229
Table Data Processing Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-253
Data Control Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-257
Subroutines Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-290
Interrupt Control Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-298
High-speed Counter/Pulse Output Instructions . . . . . . . . . . . . . . . . . . . 2-308
Step Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-341
Basic I/O Unit Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-352
Serial Communication Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-369
Clock Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-380
Failure Diagnosis Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-387
Other Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-398
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2-1
2 Instructions
Notation and Layout of Instruction Descriptions
Instructions are described in groups by function. Refer to Appendix A List of Instructions by Function
Code for a list of instructions by mnemonic that lists the page number in this section for each instruc-
tion.
The description of each instruction is organized as described in the following table.
Item
Contents
Indicates the name of the instruction. Example: MOVE BIT
Indicates the mnemonic.
Instruction
Mnemonic
Example: MOVB(082)
Variations
Differentiation
@ Instruction that differentiates when the execution condition turns ON.
% Instruction that differentiates when the execution condition turns OFF.
Immediate refreshing
!
Refreshes data in the I/O area specified by the operands or the Special I/O Unit words when
the instruction is executed.
repeatedly as long a
execution condition
JMP
N
a
Function code
Function
Indicates the function code.
The basic purpose of the instruction is described after the section heading.
Symbol
The ladder symbol used to represent the instruction on the CX-Programmer is shown, as in the exam-
ple for the MOVE BIT instruction given below. The name of each operand is also provided with the lad-
der symbol.
MOVB
S
C
D
S: Source word or data
C: Control word
D: Destination word
Applicable Program Areas
The program areas in which the instruction can be used are specified. “OK” indicates the areas in
which the instruction can be used.
Area Step program areas
Usage OK
Subroutines
OK
Interrupt tasks
OK
Operands
Indicates a description of the operand, the data type, and the size.
Where necessary, the meaning of words and bits used in specific operands, such as control words, is
given.
15
8 7
0
C
m
n
Source bit: 00 to 0F
(0 to 15 decimal)
Destination bit: 00 to 0F
(0 to 15 decimal)
Operand Specifications
The memory areas addresses that can be used each operand are listed in a table like the following
one. The letters used in the column headings on the above are the same as those used in the ladder
symbol. “---” is used to indicate when an area cannot be specific for an operand.
Indirect DM
Word addresses
Con-
stants
Pulse TR
bits bits
addresses
Area
CF
CIO WR HR AR
T
C
DM @DM *DM
S
C
D
OK
---
OK OK OK OK OK OK OK
OK
OK
---
---
---
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2-2
2 Instructions
Item
Contents
Flags
The flags table indicates the status of the condition flags immediately after execution of the instruction.
Any flags that are not listed are not affected by the instruction. “OFF” indicates that a flag is turned
OFF immediately after execution of the instruction regardless of the results of executing the instruc-
tion.
Name
Label
Operation
Error Flag
Equal Flag
ER
=
OFF
• ON if the data being transferred (D) is 0.
• OFF in all other cases.
Negative Flag
N
• ON if the leftmost bit of the data being transferred (D) is 1.
• OFF in all other cases.
Function
Hint
Indicates the function of the instruction.
Indicates a supplemental explanation of other than the main function.
Indicates important points when using an instruction.
Precautions
2
Sample program
An example of using the instruction with specific operands is provided to further explain the function of
the instruction.
Constants
Constants input for operands are given as listed below.
Operand Descriptions and Operand Specifications
• Operands Specifying Bit Strings (Normally Input as Hexadecimal):
Only the hexadecimal form is given for operands specifying bit strings, e.g., only “#0000 to #FFFF” is
specified as the S operand for the MOV(021) instruction. On the CX-Programmer, however, bit strings
can be input in decimal form by using the & prefix.
• Operands Specifying Numeric Values (Normally Input as Decimal, Including Jump Numbers):
Both the decimal and hexadecimal forms are given for operands specifying numeric values, e.g.,
“#0000 to #FFFF” and “&0 to &65535” are given for the N operand for the XFER(070) instruction.
• Operands Indicating Control Numbers (Except for Jump Numbers):
The decimal form is given for control numbers, e.g., “0 to 1023” is given for the N operand for the
SBS(091) instruction.
Examples
In the examples, constants are given using the CX-Programmer notation, e.g., operands specifying
numeric values are given in decimal for with an & prefix, as shown in the following example.
XFER
&10
D100
D200
The input methods for constants for the Programming Devices are given in the following table.
Operand
CX-Programmer
Operands specifying bit strings (normally input as hexadeci- Input as decimal with an & prefix or input as hexadecimal
mal)
with an # prefix. (See note.)
Operands specifying numeric values (normally input as deci-
mal)
Operands specifying control numbers (except for jump num- Input as decimal with an # prefix. (See note.)
bers)
Note When operands are input on the CX-Programmer, the input ranges will be displayed along with the appropri-
ate prefixes.
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2 Instructions
Condition Flags
With the CX-Programmer, the condition flags are registered in advance as global symbols with “P_” in
front of the symbol name.
Flag
Error Flag
CX-Programmer label
P_ER
P_AER
P_CY
P_GT
P_EQ
P_LT
Access Error Flag
Carry Flag
Greater Than Flag
Equals Flag
Less Than Flag
Negative Flag
P_N
Overflow Flag
P_OF
P_UF
P_GE
P_NE
P_LE
P_On
P_Off
Underflow Flag
Greater Than or Equals Flag
Not Equal Flag
Less Than or Equals Flag
Always ON Flag
Always OFF Flag
Symbol Instructions
Some of the C/CV-series PLC instructions have been changed to different instructions with the same
functionality for the CP1E-series PLCs.
Instruction group
Comparison
C/CV Series
CP1E Series
EQU
MOVQ
INC
AND=
MOV
++B
++BL
++
Data Movement
Increment/Decrement
INCL
INCB
INBL
DEC
DECL
DECB
DCBL
ADB
++L
--B
--BL
--
--L
Symbol Math
+C
ADBL
ADD
ADDL
SBB
+CL
+BC
+BCL
-C
SBBL
SUB
-CL
-BC
-BCL
*
SUBL
MBS
MBSL
MUL
MULL
DBS
*L
*B
*BL
/
DBSL
DIV
/L
/B
DIVL
INT
/BL
Interrupt Control
MSKS / CLIDI / EI
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2 Instructions
Sequence Input Instructions
Differentiated and Immediate Refreshing Instructions
• The LOAD, AND, and OR instructions have differentiated and immediate refreshing variations in addi-
tion to their ordinary forms, and there are also two combinations available.
• The LOAD NOT, AND NOT, OR NOT, OUT, and OUT NOT instructions have immediate refreshing
variations in addition to their ordinary forms.
• The I/O timing for data handled by instructions differs for ordinary and differentiated instructions,
immediate refreshing instructions, and immediate refreshing differentiated instructions.
2
• Ordinary and differentiated instructions are executed using data input by previous I/O refresh pro-
cessing, and the results are output with the next I/O processing. Here “I/O refreshing” means the data
exchanged between the CPU’s internal memory and the I/O Unit.
• In addition to the above I/O refreshing, an immediate refresh instruction exchanges data with the I/O
Unit for those words that are accessed by the instruction. An immediate refresh instruction refreshes
eight bits simultaneously (leftmost or rightmost eight bits) in addition to the specified bit.
Immediate refresh instructions (i.e., instructions with !) cannot be used for I/O on CP Expansion
Units or CP Expansion I/O Units. Use IORF(097) for I/O on CP Expansion Units or CP Expansion I/O
Units.
Instruction variation
Mnemonic
Function
I/O refresh
Ordinary
LD, AND, OR, LD NOT,
AND NOT, OR NOT
The ON/OFF status of the specified bit is Cyclic refreshing
taken by the CPU with cyclic refreshing,
and it is reflected in the next instruction
execution.
OUT, OUT NOT
After the instruction is executed, the
ON/OFF status of the specified bit is out-
put with the next cyclic refreshing.
Differentiated up
Differentiated down
Immediate refresh
@LD, @AND, @OR
%LD, %AND, %OR
The instruction is executed once when
the specified bit turns from OFF to ON
and the ON state is held for one cycle.
The instruction is executed once when
the specified bit turns from ON to OFF
and the ON state is held for one cycle.
!LD, !AND, !OR, !LD NOT,
!AND NOT, !OR NOT
The input data for the specified bit is
taken by the CPU and the instruction is
executed.
Before instruction execu-
tion
!OUT, !OUT NOT
After the instruction is executed, the data After instruction execution
for the specified bit is output.
Differentiated up /
immediate refresh
!@LD, !@AND, !@OR
The input data for the specified bit is
refreshed by the CPU, and the instruc-
tion is executed once when the bit turns
from OFF to ON and the ON state is held
for one cycle.
Before instruction execu-
tion
Differentiated down /
immediate refresh
!%LD, !%AND, !%OR
The input data for the specified bit is
refreshed by the CPU, and the instruc-
tion is executed once when the bit turns
from ON to OFF and the ON state is held
for one cycle.
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2-5
2 Instructions
Operation Timing for I/O Instructions
The following chart shows the differences in the timing of instruction operations for a program config-
ured from LD and OUT.
A
Input
received
Input
received
B1
A
B1
B2
B3
B4
B5
B6
Input
received
B2
↑
A
Input
B3
↓
A
received
Input
received
Input
received
B4
!
A
Input
received
B5
!↑
A
Input
received
B6
!↓
A
Input received
Input
B7
received
!
!
A
B7
Input
received
B8
!
↑
A
B8
Input
received
B9
!
↓
A
B9
B10
B11
B12
!
!
A
B10
!
!↑
A
B11
!
!↓
A
B12
CPU
processing
Instruction execution
I/O refreshing
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2-6
2 Instructions
LD/LD NOT
Function
code
Instruction
Mnemonic
Variations
Function
Indicates a logical start and creates an ON/OFF
execution condition based on the ON/OFF status
of the specified operand bit.
@LD, %LD, !LD,
!@LD, !%LD
LOAD
LD
---
@LD NOT, %LD
NOT, ! LD NOT,
!@LD NOT, !%LD
NOT
Indicates a logical start and creates an ON/OFF
execution condition based on the reverse of the
ON/OFF status of the specified operand bit.
LOAD NOT
LD NOT
---
2
LD
LD NOT
Bus bar
Starting point of block
Bus bar
Starting point of block
Symbol
Applicable Program Areas
Area
Step program areas
Subroutines
Interrupt tasks
OK
Usage
OK
OK
Operands
Operand
Description
Data type
BOOL
Size
---
---
---
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
LD
OK
---
OK
OK
OK
OK
OK
OK
---
---
---
OK
OK
---
LD NOT
Flags
There are no flags affected by this instruction.
Function
ꢀ LD
LD is used for the first normally open bit from the bus bar or for the first normally open bit of a logic
block. If there is no immediate refreshing specification, the specified bit in I/O memory is read. If there is
an immediate refreshing specification, the status of the CPU Unit’s built-in input terminal is read and
used.
ꢀ LD NOT
LD NOT is used for the first normally closed bit from the bus bar, or for the first normally closed bit of a
logic block. If there is no immediate refreshing specification, the specified bit in I/O memory is read and
reversed. If there is an immediate refreshing specification, the status of the CPU Unit’s built-in input ter-
minal is read, reversed, and used.
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2 Instructions
Hint
• LD/LD NOT is used in the following circumstances as an instruction for indicating a logical start.
1. When directly connecting to the bus bar.
2. When logic blocks are connected by AND LD or OR LD, i.e., at the beginning of a logic block.
The AND LOAD and OR LOAD instructions are used to connect in series or in parallel logic blocks
beginning with LD or LD NOT.
• At least one LOAD or LOAD NOT instruction is required for the execution condition when output-
related instructions cannot be connected directly to the bus bar. If there is no LOAD or LOAD NOT
instruction, a programming error will occur with the program check by the Peripheral Device.
• When logic blocks are connected by AND LOAD or OR LOAD instructions, the total number of AND
LOAD/OR LOAD instructions must match the total number of LOAD/LOAD NOT instructions minus1.
If they do not match, a programming error will occur. For details, refer to AND LOAD: AND LD and
OR LOAD: OR LD.
Precautions
• Differentiate up (@) or differentiate down (%) can be specified for LD. If differentiate up (@) is speci-
fied, the execution condition is turned ON for one cycle only after the status of the operand bit goes
from OFF to ON. If differentiate down (%) is specified, the execution condition is turned ON for one
cycle only after the status of the operand bit goes from ON to OFF.
• Immediate refreshing (!) can be specified for LD/LD NOT. An immediate refresh instruction updates
the status of the built-in input bit just before the instruction is executed from the CPU Unit.
• For LD, it is possible to combine immediate refreshing and up or down differentiation (!@ or !%). If
either of these is specified, the input is refreshed from the Basic Input Unit just before the instruction
is executed and the execution condition is turned ON for one cycle only after the status goes from
OFF to ON, or from ON to OFF.
Sample program
i
LD
LD
100.00
Instruction Operand
0.01
0.02
0.00
0.04
LD
LD
0.00
0.01
0.02
0.03
--
AND LD
LD
OR LD
0.03
LD
AND
OR LD
OR LD
AND LD
LD NOT
AND
--
0.05
0.04
0.05
--
LD NOT
OR LD
OUT
100.00
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2-8
2 Instructions
AND/AND NOT
Function
code
Instruction
Mnemonic
Variations
Function
@AND, %AND,
!AND, !@AND,
!%AND
Takes a logical AND of the status of the specified
operand bit and the current execution condition.
AND
AND
---
@AND NOT,
%AND NOT,
!AND NOT,
!@AND NOT,
!%AND NOT
Reverses the status of the specified operand bit
and takes a logical AND with the current execution
condition.
AND NOT
AND NOT
---
2
AND
AND NOT
Symbol
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Operand
Description
Data type
Size
---
---
BOOL
---
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
AND
OK
OK
OK
OK
OK
OK
---
---
---
---
OK
OK
---
AND NOT
Flags
There are no flags affected by this instruction.
Function
ꢀ AND
AND is used for a normally open bit connected in series. AND cannot be directly connected to the bus
bar, and cannot be used at the beginning of a logic block. If there is no immediate refreshing specifica-
tion, the specified bit in I/O memory is read. If there is an immediate refreshing specification, the status
of the CPU Unit’s built-in input terminal is read.
ꢀ AND NOT
AND NOT is used for a normally closed bit connected in series. AND NOT cannot be directly connected
to the bus bar, and cannot be used at the beginning of a logic block. If there is no immediate refreshing
specification, the specified bit in I/O memory is read. If there is an immediate refreshing specification,
the status the CPU Unit’s built-in input terminals is read.
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2 Instructions
Precautions
• Differentiate up (@) or differentiate down (%) can be specified for AND. If differentiate up (@) is spec-
ified, the execution condition is turned ON for one cycle only after the status of the operand bit goes
from OFF to ON. If differentiate down (%) is specified, the execution condition is turned ON for one
cycle only after the status of the operand bit goes from ON to OFF.
• Immediate refreshing (!) can be specified for AND/AND NOT. An immediate refresh instruction
updates the status of the built-in input bit just before the instruction is executed from the CPU Unit.
• For AND, it is possible to combine immediate refreshing and up or down differentiation (!@ or !%). If
either of these is specified, the input is refreshed from the Basic Input Unit just before the instruction
is executed and the execution condition is turned ON for one cycle only after the status goes from
OFF to ON, or from ON to OFF.
Sample program
i
AND
AND
Instruction Operand
100.00
0.00
0.01
0.02
0.04
0.03
LD
AND
0.00
0.01
0.02
0.03
0.04
0.05
--
LD
0.05
AND
LD
AND NOT
AND NOT
OR LD
AND LD
OUT
--
100.00
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2 Instructions
OR/OR NOT
Function
code
Instruction
Mnemonic
Variations
Function
@OR, %OR,
!OR, !@OR,
!%OR
Takes a logical OR of the ON/OFF status of the
specified operand bit and the current execution
condition.
OR
OR
---
@OR NOT, %OR
NOT, !OR NOT,
!@OR NOT,
Reverses the status of the specified bit and takes
a logical OR with the current execution condition.
OR NOT
OR NOT
---
!%OR NOT
2
OR
OR NOT
Bus bar
Bus bar
Symbol
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Operand
Description
Data type
Size
---
---
BOOL
---
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
OR
OK
OK
OK
OK
OK
OK
---
---
---
---
OK
OK
---
OR NOT
Flags
There are no flags affected by this instruction.
Function
ꢀ OR
OR is used for a normally open bit connected in parallel. A normally open bit is configured to form a log-
ical OR with a logic block beginning with a LOAD or LOAD NOT instruction (connected to the bus bar or
at the beginning of the logic block). If there is no immediate refreshing specification, the specified bit in
I/O memory is read. If there is an immediate refreshing specification, the status of the CPU Unit’s built-
in input terminal is read.
ꢀ OR NOT
OR NOT is used for a normally closed bit connected in parallel. A normally closed bit is configured to
form a logical OR with a logic block beginning with a LOAD or LOAD NOT instruction (connected to the
bus bar or at the beginning of the logic block). If there is no immediate refreshing specification, the
specified bit in I/O memory is read. If there is an immediate refreshing specification, the status of the
CPU Unit’s built-in input terminal is read.
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2 Instructions
Precautions
• Differentiate up (@) or differentiate down (%) can be specified for OR. If differentiate up (@) is speci-
fied, the execution condition is turned ON for one cycle only after the status of the operand bit goes
from OFF to ON. If differentiate down (%) is specified, the execution condition is turned ON for one
cycle only after the status of the operand bit goes from ON to OFF.
• Immediate refreshing (!) can be specified for OR/OR NOT. An immediate refresh instruction updates
the status of the built-in input bit just before the instruction is executed from the CPU Unit.
• For OR, it is possible to combine immediate refreshing and up or down differentiation (!@ or !%). If
either of these is specified, the input is refreshed from the Basic Input Unit just before the instruction
is executed and the execution condition is turned ON for one cycle only after the status of the oper-
and bit goes from OFF to ON, or from ON to OFF.
Sample program
i
100.00
0.00
0.01
0.02
0.04
0.05
0.07
0.06
Instruction Operand
LD
AND
0.00
0.01
0.02
0.03
0.04
0.05
0.06
0.07
--
0.03
AND
OR
OR NOT
OR
AND
LD
AND
OR NOT
AND LD
OUT
100.00
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2 Instructions
AND LD/OR LD
Function
code
Instruction
Mnemonic
Variations
Function
AND LOAD
OR LOAD
AND LD
---
---
---
---
Takes a logical AND between logic blocks.
Takes a logical OR between logic blocks.
OR LD
AND LD
OR LD
Logic block
Symbol
Logic block
Logic block
2
Logic block
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Flags
There are no flags affected by this instruction.
Function
ꢀ AND LD
LD
to
AND LD connects in series the logic block just
Logic block A
before this instruction with another logic block.
LD
to
The logic block consists of all the instructions
from a LOAD or LOAD NOT instruction until
just before the next LOAD or LOAD NOT
instruction on the same rungs.
Logic block B
AND LD
Serial connection between logic block A and
logic block B.
ꢀ OR LD
LD
to
OR LD connects in parallel the logic block just
before this instruction with another logic block.
Logic block A
LD
to
The logic block consists of all the instructions
from a LOAD or LOAD NOT instruction until
just before the next LOAD or LOAD NOT
instruction on the same rungs.
Logic block B
OR LD
Parallel connection between logic block A and
logic block B.
Hint
ꢀ AND LD
• Three or more logic blocks can be connected in series using this instruction to first connect two of the
logic blocks and then to connect the next and subsequent ones in order. It is also possible to continue
placing this instruction after three or more logic blocks and connect them together in series.
ꢀ OR LD
• Three or more logic blocks can be connected in parallel using this instruction to first connect two of
the logic blocks and then to connect the next and subsequent ones in order. It is also possible to con-
tinue placing this instruction after three or more logic blocks and connect them together in parallel.
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2 Instructions
Precautions
When a logic block is connected by AND LOAD or OR LOAD instructions, the total number of AND
LOAD/OR LOAD instructions must match the total number of LOAD/LOAD NOT instructions minus 1. If
they do not match, a programming error will occur.
ꢀ AND LD
In the following diagram, the two logic blocks are indicated by dotted lines. Studying this example shows
that an ON execution condition will be produced when either of the execution conditions in the left logic
block is ON (i.e., when either CIO 0.00 or CIO 0.01 is ON) and either of the execution conditions in the
right logic block is ON (i.e., when either CIO 0.02 is ON or CIO 0.03 is OFF).
i
Coding
100.00
0.00
0.01
0.02
0.03
Instruction
LD
Operand
0.00
OR
0.01
0.02
0.03
---
LD
OR NOT
AND LD
OUT
100.00
Second LD: Used for first bit of next block connected in series to previous block.
ꢀ OR LD
The following diagram requires an OR LOAD instruction between the top logic block and the bottom
logic block. An ON execution condition would be produced either when CIO 0.00 is ON and CIO 0.01 is
OFF or when CIO 0.02 and CIO 0.03 are both ON. The operation of and mnemonic code for the OR
LOAD instruction is exactly the same as those for a AND LOAD instruction except that the current exe-
cution condition is ORed with the last unused execution condition.
i
Coding
100.01
0.00
0.01
Instruction
LD
Operand
0.00
0.02
0.03
AND NOT
LD
0.01
0.02
0.03
---
AND
OR LD
OUT
100.01
Second LD: Used for first bit of next block connected in series to previous block.
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2 Instructions
Sample program
ꢀ AND LD
i
Coding Example (1)
Coding Example (2)
Instruction Operand
LD 0.00
100.00
0.00
0.02
0.03
0.04
0.05
Instruction
LD
Operand
0.01
0.00
0.01
0.02
0.03
---
OR NOT
LD NOT
OR
OR NOT
LD NOT
OR
0.01
0.02
0.03
0.04
0.05
AND LD
LD
LD
0.04
0.05
---
OR
2
OR
.
.
.
.
AND LD
AND LD
AND LD
---
---
.
.
.
.
OUT
100.00
.
.
.
.
OUT
100.00
• The AND LOAD instruction can be used repeatedly. In programming method (2) above, however, the
number of AND LOAD instructions becomes one less than the number of LOAD and LOAD NOT
instructions before that.
• In method (2), make sure that the total number of LOAD and LOAD NOT instructions before AND
LOAD is not more than eight.
• To use nine or more, program using method (1).
• If there are nine or more with method (2), then a program error will occur during the program check by
the Peripheral Device.
ꢀ OR LD
i
Coding Example (1)
Coding Example (2)
Instruction Operand
LD
100.01
0.00
0.02
0.04
0.01
0.03
0.05
Instruction
LD
Operand
0.00
0.01
0.02
0.03
---
0.00
0.01
0.02
0.03
0.04
0.05
AND NOT
LD NOT
AND NOT
OR LD
LD
AND NOT
LD NOT
AND NOT
LD
0.04
0.05
---
AND
AND
.
.
.
.
OR LD
OR LD
OR LD
---
---
.
.
.
.
OUT
100.01
.
.
.
.
OUT
100.01
• The OR LOAD instruction can be used repeatedly. In programming method (2) above, however, the
number of OR LOAD instructions becomes one less than the number of LOAD and LOAD NOT
instructions before that.
• In method (2), make sure that the total number of LOAD and LOAD NOT instructions before OR
LOAD is not more than eight.
• To use nine or more, program using method (1).
• If there are nine or more with method (2), then a program error will occur during the program check by
the Peripheral Device.
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2 Instructions
NOT
Function
code
Instruction
Mnemonic
NOT
Variations
Function
NOT
---
520
Reverses the execution condition.
NOT
Symbol
NOT(520)
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Flags
There are no flags affected by NOT(520).
Function
NOT(520) is placed between an execution condition and another instruction to invert the execution con-
dition.
Precautions
NOT(520) is an intermediate instruction, i.e., it cannot be used as a right-hand instruction. Be sure to
program a right-hand instruction after NOT(520).
Sample program
i
100.00
0.00
0.01
NOT(520) reverses the execution condition
in the following example.
NOT(520)
0.02
0.00
1
0.01
1
0.02
1
100.00
0
0
1
0
1
1
1
1
1
1
0
1
0
1
0
1
1
1
0
0
0
1
0
0
0
1
0
0
0
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2 Instructions
UP/DOWN
Function
code
Instruction
Mnemonic
Variations
Function
UP(521) turns ON the execution condition for the
next instruction for one cycle when the execution
condition it receives goes from OFF to ON.
CONDITION ON
UP
---
521
522
DOWN(522) turns ON the execution condition for
the next instruction for one cycle when the execu-
tion condition it receives goes from ON to OFF.
CONDITION OFF
DOWN
---
UP
DOWN
2
Symbol
DOWN(522)
UP(521)
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Flags
There are no flags affected by UP(521) and DOWN(522).
Function
ꢀ UP
UP(521) is placed between an execution condition and another instruction to turn the execution condi-
tion into an up-differentiated condition. UP(521) causes the connecting instruction to be executed just
once when the execution condition goes from OFF to ON.
ꢀ DOWN
DOWN(522) is placed between an execution condition and another instruction to turn the execution
condition into a down-differentiated condition. DOWN(522) causes the connecting instruction to be exe-
cuted just once when the execution condition goes from ON to OFF.
Precautions
• The operation of UP(521) and DOWN(522) depends on the execution condition for the instruction as
well as the execution condition for the program section when it is programmed in an interlocked pro-
gram section, a jumped program section, or a subroutine.
• The operation of UP(521) and DOWN(522) will not be consistent if the same subroutine is executed
more than once in the same cycle.
• An subroutine will not be executed while the input condition for the subroutine is OFF. Caution is thus
required when using UP(521) and DOWN(522) in a function block definition. For details, refer to infor-
mation on SBS(091).
Sample program
ꢀ UP
i
When CIO 0.00 goes from OFF to ON, CIO
100.01 is turned ON for just one cycle.
0.00
100.01
UP
0.00
100.01
Cycle
time
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2 Instructions
Sequence Output Instructions
OUT/OUT NOT
Function
code
Instruction
Mnemonic
Variations
Function
Outputs the result (execution condition) of the
logical processing to the specified bit.
OUTPUT
OUT
!OUT
---
Reverses the result (execution condition) of the
logical processing, and outputs it to the specified
bit.
OUTPUT NOT
OUT NOT
!OUT NOT
---
OUT
OUT NOT
Symbol
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Operand
Description
Data type
Size
---
---
BOOL
---
ꢀ Operand Specifications
Word addresses
Indirect DM addresses
Area
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
OUT
OK
OK
OK
OK
---
---
---
---
---
---
---
OK
OK
OUT NOT
Flags
There are no flags affected by this instruction.
Function
ꢀ OUT
If there is no immediate refreshing specification, the status of the execution condition (power flow) is
written to the specified bit in I/O memory. If there is an immediate refreshing specification, the status of
the execution condition (power flow) is also written to the CPU Unit’s built-in output terminal in addition
to the output bit in I/O memory.
ꢀ OUT NOT
If there is no immediate refreshing specification, the status of the execution condition (power flow) is
reversed and written to a specified bit in I/O memory. If there is an immediate refreshing specification,
the status of the execution condition (power flow) is reversed and also written to the CPU Unit’s built-in
output terminal in addition to the output bit in I/O memory.
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2 Instructions
Hint
• Immediate refreshing (!) can be specified for OUT and OUT NOT. An immediate refresh instruction
updates the status of the built-in output terminal just after the instruction is executed for the CPU Unit,
at the same time as it writes the status of the execution condition (power flow) to the specified output
bit in I/O memory.
• Difference between SET/RSET and OUT
For OUT, the operand bit is turned ON when the input condition turns ON and is turned OFF when
the input condition turns OFF. For SET and RSET, the operand bit turns ON or OFF, respectively,
when the input condition turns ON and the operand bit does not change when the input condition
turns OFF.
Sample program
2
100.00
100.01
0.00
Instruction
Operand
LD
0.00
OUT
100.00
100.01
OUT NOT
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2 Instructions
TR
Function
code
Instruction
Mnemonic
Variations
Function
TR bits are used to temporarily retain the ON/OFF
status of execution conditions in a program when
programming in mnemonic code.
TR Bits
TR
---
---
Function
TR bits are used to temporarily retain the ON/OFF status of execution conditions in a program when
programming in mnemonic code. They are not used when programming directly in ladder program form
because the processing is automatically executed by the Peripheral Device. The following diagram
shows a simple application using two TR bits.
Coding
Instruction
Operands
100.00
100.01
100.02
100.03
TR0
TR1
0.00
0.01
0.02
0.03
LD
0.00
TR0
OUT
AND
OUT
AND
OUT
LD
0.01
TR1
0.04
0.05
0.02
100.00
TR1
AND
OUT
LD
0.03
100.01
TR0
AND
OUT
LD
0.04
100.02
TR0
100.00
100.03
AND NOT
OUT
Relay Address
Temporary Relay
TR0 to TR15
ꢀ Using TR0 to TR15
• TR0 to TR15 are used only with LOAD and
OUTPUT instructions.
• There are no restrictions on the order in
which the bit addresses are used.
• Sometimes it is possible to simplify a pro-
gram by rewriting it so that TR bits are not
required. The following diagram shows one
case in which a TR bit is unnecessary and
one in which a TR bit is required.
In instruction block (1), the ON/OFF status at
point A is the same as for output CIO 100.00,
so AND 0.01 and OUT 100.01 can be coded
without requiring a TR bit. In instruction block
(2), the status of the branching point and that
of output CIO 100.02 are not necessarily the
same, so a TR bit must be used. In this case,
the number of steps in the program could be
reduced by using instruction block (1) in place
of instruction block (2).
100.00
100.01
0.00
A
(1)
(2)
0.01
0.03
100.02
100.03
TR0
0.02
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2 Instructions
KEEP
Function
code
Instruction
Mnemonic
KEEP
Variations
Function
Operates like a latching relay.
KEEP
!KEEP
011
KEEP
S(SET)
Symbol
KEEP(011)
R(RESET)
R
R: Bit
2
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Operand
Description
Data type
BOOL
Size
R
Bit
---
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
---
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
R
OK
OK
OK
OK
---
---
---
---
---
---
---
OK
Flags
No flags are affected by KEEP(011).
Function
When S turns ON, the designated bit will go
ON and stay ON until reset, regardless of
whether S stays ON or goes OFF. When R
turns ON, the designated bit will go OFF. The
relationship between execution conditions and
KEEP(011) bit status is shown below on the
right.
Set
KEEP
C
A
B
A
C
B
C
=
Reset
ON
OFF
S execution condition
R execution condition
Status of C
ON
OFF
ON
OFF
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2 Instructions
Hint
• KEEP(011) has an immediate refreshing variation (!KEEP(011)). When a CPU Unit built-in output bit
has been specified for R in a !KEEP(011) instruction, any changes to R will be refreshed when
!KEEP(011) is executed and reflected immediately in the output bit.
• KEEP(011) operates like the self-maintaining bit, but a self-maintaining bit programmed with
KEEP(011) requires one less instruction.
100.00
0.02
0.03
5.00
0.02
0.03
KEEP
100.00
Self-maintaining bits programmed with KEEP(011) will maintain status even in an interlock program
section, unlike the self-maintaining bit programmed without KEEP(011).
IL
IL
KEEP
C
A
B
A
C
B
C
ILC
ILC
Output bit C will maintain its
previous status in an interlock.
Output bit C will be turned
OFF in an interlock.
• KEEP(011) can be used to create flip-flops as shown below.
A
B
↑
KEEP
B
A
B
↑
A
B
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2 Instructions
• If a holding bit is used for R, the bit status will be retained even during a power interruption.
KEEP(011) can thus be used to program bits that will maintain status after restarting the PLC follow-
ing a power interruption. An example of this that can be used to produce a warning display following
a system shutdown for an emergency situation is shown below.
0.02
KEEP
H0.00
0.03
0.04
Indicates
emergency
situation
0.05
Reset input
2
100.00
Activates
warning
display
H0.00
• The status of I/O Area bits can be retained in the event of a power interruption by turning ON the IOM
Hold Bit and setting IOM Hold Bit Hold in the PLC Setup. In this case, I/O Area bits used in
KEEP(011) will maintain status after restarting the PLC following a power interruption, just like hold-
ing bits. Be sure to restart the PLC after changing the PLC Setup; otherwise the new settings will not
be used.
Precautions
• If S and R are ON simultaneously, the reset
input takes precedence.
ON
OFF
Set
ON
OFF
Reset
ON
OFF
Status of C
• The set input (S) cannot be received while
R is ON.
ON
OFF
Set
ON
OFF
Reset
ON
OFF
Status of C
Input Unit
• Never use an input bit in a normally closed
condition on the reset (R) for KEEP(011)
when the input device uses an AC power
supply. The delay in shutting down the
PLC’s DC power supply (relative to the AC
power supply to the input device) can cause
the operand bit of KEEP(011) to be reset.
This situation is shown on the right.
A
S
R
KEEP
A
NEVER
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2 Instructions
Sample program
0.00
When CIO 0.00 goes ON in the left example, CIO 100.00
is turned ON. CIO 100.00 remains ON until CIO 0.01
goes ON.
KEEP
100.00
When CIO 0.02 goes ON and CIO 0.03 goes OFF in the
left example, CIO 100.01 is turned ON. CIO 100.01
remains ON until CIO 0.04 or CIO 0.05 goes ON.
0.01
0.02
0.04
0.03
KEEP
100.01
0.05
Coding
Instruction
Operand
LD
LD
0.00
0.01
KEEP (011)
LD
100.00
0.02
AND NOT
LD
0.03
0.04
OR
0.05
KEEP (011)
100.01
Note KEEP(011) is input in different orders on in ladder and mnemonic form. In ladder form, input the set input,
KEEP(011), and then the reset input. In mnemonic form, input the set input, the reset input, and then
KEEP(011).
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2 Instructions
DIFU
Function
code
Instruction
Mnemonic
Variations
Function
DIFU(013) turns the designated bit ON for one
cycle when the execution condition goes from
OFF to ON (rising edge).
DIFFERENTIATE UP
DIFU
!DIFU
013
DIFU
Symbol
DIFU(013)
R
R: Bit
2
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Operand
Description
Data type
Size
R
Bit
BOOL
---
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
R
OK
OK
OK
OK
---
---
---
---
---
---
---
---
---
Flags
No flags are affected by DIFU(013).
Function
When the execution condition goes from OFF
to ON, DIFU(013) turns R ON. When
DIFU(013) is reached in the next cycle, R is
turned OFF.
Execution condition
Status of R
1 cycle
Hint
• UP(521) can be used to execute an instruction for just one cycle when the execution condition goes
from OFF → ON.
• DIFU(013) has immediate refreshing variation (!DIFU(013)). When a CPU Unit built-in output bit has
been specified for R in this instruction, any changes to R will be refreshed when the instruction is exe-
cuted and reflected immediately in the output bit.
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2 Instructions
Precautions
• The operation of DIFU(013) depends on the execution condition for the instruction itself as well as the
execution condition for the program section when it is programmed in an interlocked program section,
a jumped program section, or a subroutine.
• An subroutine will not be executed while the input condition for the subroutine is OFF. Caution is thus
required when using DIFU(013) in a function block definition. For details, refer to information on
SBS(091).
• The operation of DIFU(013) will not be consistent if the same subroutine is executed more than once
in the same cycle.
Sample program
When CIO 0.00 goes from ON to OFF in the following example, CIO 100.00 is turned ON for one cycle.
i
0.00
DIFU
100.00
0.00
100.00
1 cycle
1 cycle
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2 Instructions
DIFD
Function
code
Instruction
Mnemonic
Variations
Function
DIFD(014) turns the designated bit ON for one
cycle when the execution condition goes from ON
to OFF (falling edge).
DIFFERENTIATE DOWN
DIFD
!DIFD
014
DIFD
Symbol
DIFD(014)
2
R
R: Bit
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Operand
Description
Data type
Size
R
Bit
BOOL
---
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
B
OK
OK
OK
OK
---
---
---
---
---
---
---
---
---
Flags
No flags are affected by DIFD(014).
Function
When the execution condition goes from ON
to OFF, DIFD(014) turns R ON. When
DIFD(014) is reached in the next cycle, R is
turned OFF.
Execution condition
Status of R
1 cycle
Hint
• DOWN(522) can be used to execute an instruction for just one cycle when the execution condi-
tion goes from ON → OFF.
• The operation of DIFD(014) depends on the execution condition for the instruction itself as well
as the execution condition for the program section when it is programmed in an interlocked pro-
gram section, a jumped program section, or a subroutine.
• DIFD(014) has immediate refreshing variation (!DIFD(014)). When a CPU Unit built-in output bit
has been specified for R in this instruction, any changes to R will be refreshed when the instruc-
tion is executed and reflected immediately in the output bit.
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2 Instructions
Precautions
• The operation of DIFD(014) will not be consistent if the same function block instance is executed
more than once in the same cycle.
• An subroutine will not be executed while the input condition for the subroutine is OFF. Caution is thus
required when using DIFD(014) in a function block definition. For details, refer to information on
SBS(091).
Sample program
When CIO 0.00 goes from ON to OFF in the following example, CIO 100.00 is turned ON for one cycle.
i
0.00
DIFD
100.00
0.00
100.00
1 cycle
1 cycle
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2 Instructions
SET/RSET
Function
code
Instruction
Mnemonic
Variations
Function
SET turns the operand bit ON when the execution
condition is ON. After this, the specified contact
will remain ON regardless of ON/OFF of the input
condition.
@SET, %SET, !SET,
!@SET, !%SET
SET
SET
---
---
RSET turns the operand bit OFF when the
execution condition is ON. After this, the specified
contact will remain OFF regardless of ON/OFF of
the input condition.
@RSET, %RSET,
!RSET, !@RSET,
!%RSET
RESET
RSET
2
SET
RSET
RSET
Symbol
SET
R
R: Bit
R
R: Bit
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Operand
Description
Data type
Size
R
Bit
BOOL
---
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
R
OK
OK
OK
OK
---
---
---
---
---
---
---
---
---
Flags
No flags are affected by SET and RSET.
Function
ꢀ SET
SET turns the operand bit ON when the execution con-
dition is ON, and does not affect the status of the oper-
and bit when the execution condition is OFF. Use
RSET to turn OFF a bit that has been turned ON with
SET.
ON
OFF
Execution condition
of SET
ON
OFF
Status of R
ꢀ RSET
RSET turns the operand bit OFF when the execution
condition is ON, and does not affect the status of the
operand bit when the execution condition is OFF. Use
SET to turn ON a bit that has been turned OFF with
RSET.
ON
OFF
Execution condition
of RSET
ON
OFF
Status of R
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2 Instructions
Hint
• Differences between OUT/OUT NOT and SET/RSET
The operation of SET differs from that of OUT because the OUT instruction turns the operand bit
OFF when its execution condition is OFF. Likewise, RSET differs from OUT NOT because OUT NOT
turns the operand bit ON when its execution condition is OFF. For OUT, the operand bit is turned ON
when the input condition turns ON and is turned OFF when the input condition turns OFF. For SET
and RSET, the operand bit turns ON or OFF, respectively, when the input condition turns ON and the
operand bit does not change when the input condition turns OFF.
100.00
0.00
CIO 100.00 is turned ON/OFF
when CIO 0.00 goes ON/OFF.
0.01
CIO 100.00 is turned ON when
CIO 0.01 goes ON; it remains ON
until CIO 0.02 goes ON.
SET
100.00
0.02
RSET
100.00
• The set and reset inputs for a KEEP(011) instruction must be programmed with the instruction, but
the SET and RSET instructions can be programmed completely independently. Furthermore, the
same bit may be used as the operand in any number of SET or RSET instructions.
• SET and RSET have immediate refreshing variations (!SET and !RSET). When a CPU Unit built-in
output bit has been specified for R in one of these instructions, any changes to R will be refreshed
when the instruction is executed and reflected immediately in the output bit.
If external output is specified for R by !SET (or !RSET), R will be OUT-refreshed as soon as it turns
ON (or OFF) (when the instruction is executed). R, which turned ON (or OFF), will remain ON (or
OFF) as normal until a RSET instruction (or SET instruction) is executed.
Precautions
• SET and RSET cannot be used to set and reset timers and counters. When SET or RSET is pro-
grammed between IL(002) and ILC(003) or JMP(004) and JME(005), the status of the specified bit
will not be changed if the program section is interlocked or jumped.
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2 Instructions
SETA/RSTA
Function
code
Instruction
MULTIPLE BIT SET
MULTIPLE BIT RESET
Mnemonic
SETA
RSTA
Variations
@SETA
@RSTA
Function
SETA(530) turns ON the specified number of
consecutive bits.
530
531
RSTA(531) turns OFF the specified number of
consecutive bits.
SETA
RSTA
SETA(530)
RSTA(531)
2
D
D: Beginning word
N1: Beginning bit
N2: Number of bits
D
Symbol
D: Beginning word
N1
N2
N1
N2
N1: Beginning bit
N2: Number of bits
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Operand
Description
Data type
UINT
Size
D
Beginning Word
Beginning Bit
Variable
N1
N2
UINT
1
1
Number of Bits
UINT
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
D
---
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
N1,N2
OK
Flags
Operand
Description
Data type
Error Flag
P_ER
• ON if N1 is not within the specified range of 0000 to 000F (&0 to &15).
• OFF in all other cases.
Function
ꢀ SETA
N1
SETA(530) turns ON N2 bits, beginning
from bit N1 of D, and continuing to the left
(more-significant bits). All other bits are
left unchanged. (No changes will be
made if N2 is set to 0.)
15
0
N2 bits are set to 1 (ON).
D 1
1
1
1
1
1
1
D+1
D+2
Bits turned ON by SETA(530) can be
turned OFF by any other instructions, not
just RSTA(531).
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2 Instructions
ꢀ RSTA
N1
RSTA(531) turns OFF N2 bits, beginning
15
0
0
from bit N1 of D, and continuing to the left
(more-significant bits). All other bits are
left unchanged. (No changes will be
made if N2 is set to 0.)
D
D+1
D+2
0
0
0
N2 bits are
reset to 0 (OFF).
0
0
0
Bits turned OFF by RSTA(531) can be
turned ON by any other instructions, not
just SETA(530).
Hint
ꢀ SETA
• SETA(530) can be used to turn ON bits in data areas that are normally accessed by words only, such
as the DM areas.
ꢀ RSTA
• RSTA(531) can be used to turn OFF bits in data areas that are normally accessed by words only,
such as the DM areas.
Sample program
ꢀ SETA
When CIO 0.00 is turned ON in the following example, the 20 bits (0014 hexadecimal) beginning
with bit 5 of CIO 100 are turned ON.
0.00
SETA
N1: Bit 5
D
N1
N2
100
&5
15
D: 100 1
101
1211
8 7
5 4
1
3
1
0
1
1
1
1
1
1
1
1
1
1
1
1
N2: 20 bits
1
1
1
1
1
&20
ꢀ RSTA
When CIO 0.00 is turned ON in the following example, the 20 bits (0014 hexadecimal) beginning
with bit 3 of CIO 100 are turned OFF.
0.00
RSTA
N1: Bit 3
D
N1
N2
100
&3
15
D: 100 0
101
1211
8 7
4
0
0
3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
N2: 20 bits
0
0
0
&20
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2 Instructions
SETB/RSTB
Function
code
Instruction
SINGLE BIT SET
SINGLE BIT RESET
Mnemonic
SETB
RSTB
Variations
Function
@SETB, !SETB,
!@SETB
532
533
SETB(532) turns ON the specified bit.
RSTB(533) turns OFF the specified bit.
@RSTB, !RSTB,
!@RSTB
SETB
RSTB
RSTB(533)
SETB(532)
2
Symbol
D
N
D: Word address
N: Bit number
D
N
D: Word address
N: Bit number
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Operand
Description
Word address
Bit number
Data type
UINT
Size
D
N
1
1
UINT
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
D
N
---
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
OK
Flags
Operand
Description
Data type
Error Flag
P_ER
• ON if N is not within the specified range of 0000 to 000F (&0 to &15).
• OFF in all other cases.
Function
ꢀ SETB
15
SETB(532) turns ON bit N of word D
when the execution condition is ON. The
status of the bit is not affected when the
execution condition is OFF.
This bit is turned OFF.
ON
OFF
Execution condition
Bit N of word D
ON
OFF
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2 Instructions
ꢀ RSTB
15
RSTB(533) turns OFF bit N of word D
when the execution condition is ON. The
status of the bit is not affected when the
execution condition is OFF. (Use
SETB(532) to turn ON the bit.)
This bit is turned OFF.
ON
OFF
Execution condition
Bit N of word D
ON
OFF
Hint
• Differences between SET/RSET and SETB(532)/RSTB(533)
The instructions operate in the same way when the specified bit is in the CIO, W, H, or A Area.
The SETB(532) and RSTB(533) instructions can control bits in the DM Areas, unlike SET and RSET.
• The set and reset inputs for a KEEP(011) instruction must be programmed with the instruction, but
the SETB(532) and RSTB(533) instructions can be programmed completely independently. Further-
more, the same bit may be used as the operand in any number of SETB(532) and RSTB(533)
instructions.
Precautions
• Bits turned ON by SETB(532) can be turned OFF by any other instruction, not just RSTB(533).
Bits turned OFF by RSTB(533) can be turned ON by any other instruction, not just SETB(532).
• SETB(532) and RSTB(533) cannot set/reset timers and counters.
• When SETB(532) or RSTB(533) is programmed between IL(002) and ILC(003) or JMP(004) and
JME(005), the status of the specified bit will not be changed if the program section is interlocked or
jumped, i.e., when the interlock condition or jump condition is OFF.
• SETB(532) and RSTB(533) have immediate refreshing variations (!SETB(532) and !RSTB(533)).
When a CPU Unit built-in output bit has been specified in one of these instructions, any changes to
the specified bit will be refreshed when the instruction is executed and reflected immediately in the
output bit.
• When a CPU Unit built-in output is specified for bit address N of word D by !SETB (or !RSTB instruc-
tion), bit address N of word D which turned ON (or OFF) will be OUT-refreshed at that point (when the
instruction is executed). Bit address N of word D which was turned ON (or OFF) remains ON (or
OFF) as normal until an RSTB instruction (or SETB instruction) is executed.
Sample program
0.00
Bit 02 of D0 is turned ON when CIO 0.00 is ON.
Bit 02 of D0 is turned OFF when CIO 0.01 is ON.
SETB
D0
&2
0.01
RSTB
D0
&2
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2 Instructions
Sequence Control Instructions
Overview of Interlock Instructions
ꢀ Interlock Instructions
The following instruction combinations can be used to interlock outputs in a program section.
• INTERLOCK and INTERLOCK CLEAR (IL(002) and IL(003))
• MULTI-INTERLOCK DIFFERENTIATION HOLD and MULTI-INTERLOCK CLEAR (MILH(517)
and MILC(519))*
2
Note MILH(517) holds the status of the Differentiation Flag, so differentiated instructions that were interlocked are
executed after the interlock is cleared.
• MULTI-INTERLOCK DIFFERENTIATION RELEASE and MULTI-INTERLOCK CLEAR (MILR(518)
and MILC(519))*
Note MILR(518) does not hold the status of the Differentiation Flag, so differentiated instructions that were inter-
locked are not executed after the interlock is cleared.
ꢀ Differences between Interlocks and Multiple Interlocks
Regular interlocks (IL(002) and IL(003)) cannot be nested, but multiple interlocks (MILH(517),
MILR(518), and MILC(519)) can be nested. Ladder programming can be simplified by nesting multiple
interlocks, as shown in the following diagram.
Interlocks with MILH and MILC
Interlocks with IL and ILC
a
a
MILH
0
IL
A1
A1
ILC
b
a
a
b
b
MILH
1
IL
A2
A3
A2
ILC
IL
c
MILH
2
c
A3
ILC
MILC
2
MILC
1
MILC
0
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2 Instructions
ꢀ Differences between MILH(517) and MILR(518)
Differentiated instructions (DIFU, DIFD, or instructions with a @ or % prefix) operate differently in inter-
locks created with MILH(517) and MILR(518).
The operation of differentiated instructions in an interlock created with MILH(517) is identical to the
operation in an interlock created with IL(002).
For details, refer to MULTI-INTERLOCK DIFFERENTIATION HOLD, MULTI-INTERLOCK DIFFEREN-
TIATION RELEASE, and MULTI-INTERLOCK CLEAR: MILH(517), MILR(518), and MILC(519).
ꢀ Precautions
Do not combine interlocks created with different interlock instructions (IL-ILC, MILH-MILC, and MILR-
MILC). The interlocks may not operate properly if different interlock methods are used together. For
details on combining instructions, refer to MULTI-INTERLOCK DIFFERENTIATION HOLD, MULTI-
INTERLOCK DIFFERENTIATION RELEASE, and MULTI-INTERLOCK CLEAR: MILH(517),
MILR(518), and MILC(519).
For example, an MILH(517) instruction cannot be inserted between IL(002) and IL(003).
IL
MILH(517) is in an interlocked area
between IL(002) and ILC.(003).
MILH
ILC
Note The different interlocks (IL-ILC, MILH-MILC, and MILR-MILC) can be used together as long as the inter-
locked program sections do not overlap.
For example, all three interlock methods can be used without overlapping, as shown in the following
diagram.
IL
ILC
MILH
Different interlock methods can be
used as long as the interlocked
areas do not overlap.
MILC
MILR
MILC
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2 Instructions
ꢀ Differences between Interlocks and Jumps
The following table shows the differences between interlocks (created with IL(002)/ILC(003),
MILH(517)/MILC(519), or MILR(518)/MILC(519)) and jumps created with JMP(004)/JME(005).
Treatment in IL(002)/ILC(003),
Treatment in
Item
MILH(517)/MILC (519), or
MILR(518)/MILC (519)
JMP(004)/JME(005)
Instruction execution
Except OUT, OUT NOT, and timer
instructions, all instructions are not
executed.
No instructions are executed.
Output status in instructions
Except for outputs in OUT, OUT NOT,
and timer instructions, all outputs
retain their previous status.
All outputs retain their previous status.
2
Bits in OUT, OUT NOT
OFF
All outputs retain their previous status.
Status of timer instructions
(except (TTIM(087), TTIMX(555),
MTIM(543), and MTIMX(554))
Reset
Operating timers (TIM, TIMX(550),
TIMH(015), TIMHX(551), TMHH(540),
TMHHX(552) only) continue timing
because the PVs are updated even
when the timer instruction is not being
executed.
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2 Instructions
END
Function
code
Instruction
Mnemonic
END
Variations
Function
END
---
001
Indicates the end of a program.
END
Symbol
END(001)
Applicable Program Areas
Area
Step program areas
Subroutines
Not allowed
Interrupt tasks
OK
Usage
Not allowed
Flags
There are no flags affected by this instruction.
Function
END(001) completes the execution of a program for that cycle. No instructions written after END(001)
will be executed.
Precautions
• Always place END(001) at the end of each program. A programming error will occur if there is not an
END(001) instruction in the program.
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2 Instructions
NOP
Function
code
Instruction
Mnemonic
NOP
Variations
Function
This instruction has no function.
NO OPERATION
---
000
NOP
Symbol
(There is no ladder symbol associated with NOP(000).)
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
2
Flags
No flags are affected by NOP(000).
Function
• No processing is performed for NOP(000), but this instruction can be used to set aside lines in the
program where instructions will be inserted later.
• NOP(000) can only be used with mnemonic displays, not with ladder programs.
Hint
• When the instructions are inserted later, there will be no change in program addresses.
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2 Instructions
IL/ILC
Function
code
Instruction
Mnemonic
Variations
Function
Interlocks all outputs between IL(002) and
ILC(003) when the execution condition for IL(002)
is OFF.
INTERLOCK
IL
---
---
002
003
INTERLOCK CLEAR
ILC
Indicates the end of the interlock range.
IL
ILC
Symbol
ILC(003)
IL(002)
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
Not allowed
Flags
There are no flags affected by this instruction.
Function
When the execution condition for IL(002) is OFF, the outputs for all instructions between IL(002) and
ILC(003) are interlocked. When the execution condition for IL(002) is ON, the instructions between
IL(002) and ILC(003) are executed normally.
The following table shows the treatment of various outputs in an interlocked section between IL(002)
and ILC(003).
Instruction
Treatment
Bits specified in OUT, OUT NOT
OFF
TIM, TIMX(550), TIMH(015), TIMHX(551), TMHH(540),
TMHHX(552), TIML(542), and TIMXL(553)
Completion Flag
PV
OFF (reset)
Time set value (reset)
Retain previous status.
Bits/words specified in all other instructions (See note.)
Note Bits and words in all other instructions including TTIM(087), TTIMX(555), SET, RSET, CNT, CNTX(546),
CNTR(012), CNTRX(548), SFT, and KEEP(011) retain their previous status.
Execution
Execution
condition ON condition OFF
Execution
condition
IL
Interlocked section
of the program
Normal Outputs
execution interlocked.
ILC
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2 Instructions
Hint
• If there are bits which you want to remain
ON in an interlocked program section, set
these bits to ON with SET just before
IL(002).
IL
A
A
• It is often more efficient to switch a program
section with IL(002) and ILC(003). When
several processes are controlled with the
same execution condition, it takes fewer
program steps to put these processes
between IL(002) and ILC(003).
IL
2
Precautions
• The cycle time is not shortened when a section of the program is interlocked because the interlocked
instructions are executed internally.
• In general, IL(002) and ILC(003) are used in pairs, although it is possible to use more than one
IL(002) with a single ILC(003) as shown in the following diagram. If IL(002) and ILC(003) are not
paired, an error message will appear when the program check is performed but the program will be
executed properly.
IL
Execution
condition
Program section
a
b
a
b
A
B
A
B
OFF
OFF
ON
ON
Interlocked
Interlocked
Interlocked
Interlocked
OFF
OFF
ON
Not interlocked Interlocked
IL
ON
Not interlocked Not interlocked
ILC
• IL(002) and ILC(003) cannot be nested, as in the following diagram. (Use MILH(517)/MILR(518) and
MILC(519) when it is necessary to nest interlocks.)
IL
A
IL
B
ILC
B
ILC
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2 Instructions
ꢀ Operation of Differentiated Instructions
If there is a differentiated instruction (DIFU, DIFD, or instruction prefixed by @ or %) between IL(002)
and ILC(003) instructions, that instruction will be executed when the interlock is cleared if the differenti-
ation condition of the instruction is satisfied by means of a change in the input condition between start-
ing and clearing of the interlock.
Example:
When a DIFFERENTIATE UP (DIFU(013)) instruction is used and the input condition is OFF when the
interlock starts and ON when the interlock is cleared, the DIFFERENTIATE UP (DIFU(013)) instruction
will be executed when the interlock is cleared.
i
0.00
IL
1. When 0.00 is OFF (interlock starts), input condition 0.01 of DIFU is OFF.
2. Input condition 0.01 of DIFU goes from OFF to ON while 0.00 is OFF (interlock in effect),
3. When 0.00 goes from OFF to ON (interlock cleared), the DIFU instruction is executed if input condition 0.01 of DIFU is ON.
0.01
DIFU
10.00
ILC
Reference:
An IL(002) instruction operates in the same way as an MILH(517) instruction in relation to differentiated
instruction operation.
Timing Chart
Not interlocked
Interlocked
Not interlocked
ON
0.00
0.01
OFF
ON Differentiation condition is satisfied
The DIFU(013) instruction is executed.
ON
OFF
OFF
ON
10.00
OFF
1 cycle
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2 Instructions
Sample program
When CIO 0.00 is OFF in the right
example, all outputs between IL(002)
and ILC(003) are interlocked. When
CIO 0.00 is ON in the right example,
the instructions between IL(002) and
ILC(003) are executed normally.
0.00
0.01
0.00 ON
0.00 OFF
IL
2.00
OFF
H0
0.02
OFF
2
Outputs
Normal
execution
interlocked
TIM
Reset
SET
0.03
Retained
Retained
CNT
ILC
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2 Instructions
MILH/MILR/MILC
Function
code
Instruction
Mnemonic
Variations
Function
Interlocks all outputs between MILH(517) and
MILC(519) when the execution condition for
MILH(517) is OFF.
MULTI-INTERLOCK DIFFER-
ENTIATION HOLD
MILH
---
517
518
519
Interlocks all outputs between MILR(518) and
MILC(519) when the execution condition for
MILR(518) is OFF.
MULTI-INTERLOCK DIFFER-
ENTIATION RELEASE
MILR
MILC
---
---
Indicates the end of a multi-interlock range by
means of an MILH or MILR instruction with the
same interlock number.
MULTI-INTERLOCK CLEAR
MILH
MILR
MILC
MILH(517)
MILR(518)
MILC(519)
N
N
D
N
D
Symbol
N: Interlock Number
N: Interlock Number
N: Interlock Number
D: Interlock Status Bit
D: Interlock Status Bit
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
Not allowed
Operands
Operand
Description
Data type
--
Size
1
N
D
Interlock number
Interlock status bit
BOOL
--
N: Interlock Number
The interlock number must be between 0 and 15. Match the interlock number of the MILH(517) (or
MILR(518)) instruction with the same number in the corresponding MILC(519) instruction.
The interlock numbers can be used in any order.
D: Interlock Status Bit
• ON when the program section is not interlocked.
• OFF when the program section is interlocked.
When the interlock is engaged, the Interlock Status Bit can be force-set to release the interlock. Con-
versely, when the interlock is not engaged, the Interlock Status Bit can be force-reset to engage the
interlock.
ꢀ Operand Specifications
Word addresses
Indirect DM addresses
Area
Constants
CF
Pulse bits
TR bits
CIO
---
WR
---
HR
AR
---
T
C
DM
@DM
*DM
N
D
---
OK
---
---
---
---
---
---
---
---
---
OK
OK
OK
OK
Flags
Name
Label
Operation
Error Flag
P_ER
OFF
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2 Instructions
Function
When the execution condition for MILH(517) (or MILR(518)) with interlock number N is OFF, the outputs
for all instructions between that MILH(517)/MILR(518) instruction and the next MILC(519) with interlock
number N are interlocked.
When the execution condition for MILH(517) (or MILR(518)) with interlock number N is ON, the instruc-
tions between that MILH(517)/MILR(518) instruction and the next MILC(519) with interlock number N
are executed normally.
ꢀ Interlock Status
The following table shows the treatment of various outputs in an interlocked section between
MILH(517)/MILR(518) instruction and the next MILC(519).
Instruction
Treatment
2
Bits specified in OUT, OUT NOT
OFF
TIM, TIMX(550), TIMH(015),
TIMHX(551), TMHH(540),
TMHHX(552), TIML(542), and
TIMXL(553)
Completion Flag
PV
OFF (reset)
Time set value (reset)
Bits/words specified in all other instructions (See note.) Retain previous status.
Note Bits and words in all other instructions including TTIM(087), TTIMX(555), SET, RSET, CNT, CNTX(546),
CNTR(012), CNTRX(548), SFT, and KEEP(011) retain their previous status.
The MILH(517)/MILR(518) instruction turns
Input condition ON
(Normal operation)
OFF the Interlock Status Bit (operand D)
when the interlock is in engaged and turns ON
the bit when the interlock is not engaged.
Consequently, the Interlock Status Bit can be
monitored to check whether or not the inter-
lock for a given interlock number is engaged.
Input condition OFF
MILH
Input condition
n
d
Normal
Outputs interlocked.
(Outputs OFF, timers
reset, etc.)
Interlock Status Bit (d)
OFF
operation
Interlock
Status Bit
(d) ON
Interlocked program
section
MILC
n
ꢀ Nesting
Interlocks are nested when an interlocked program section (MILH(517)/MILR(518) and MILC(519) com-
bination) is placed within another interlocked program section (MILH(517)/MILR(518) and MILC(519)
combination). Interlocks can be nested up to 16 levels.
Nesting can be used for the following kinds of applications.
Example 1
Global interlock
(Emergency stop)
Interlocking the entire program with one con-
dition and interlocking a part of the program
A1 (Peripheral processing)
with another condition (1 nesting level)
Partial interlock
(Conveyor RUN)
A2 (Conveyor operation)
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• A1 and A2 are interlocked when the
Emergency Stop Button is ON.
Global interlock
(Emergency stop)
When the Emergency Stop is ON (input
condition OFF), both A1 and A2 are
interlocked.
When the Emergency Stop is OFF (input
condition ON), A1 is executed normally and
A2 is controlled by the Conveyor RUN
switch as described below.
MILH
0
• A2 is interlocked when Conveyor
RUN is OFF.
A1 (Peripheral processing)
Partial interlock
(Conveyor RUN)
When the Conveyor RUN switch is OFF
(input condition OFF), A2 is interlocked.
When the Conveyor RUN switch is ON
(input condition ON), A2 is executed
normally.
MILH
1
A2 (Conveyor operation)
MILC
1
MILC
0
Example 2
Global interlock
(Emergency stop)
Interlocking the entire program with
one condition and interlocking two
overlapping parts of the program with
other conditions (2 nesting levels)
A1 (Peripheral processing)
Partial interlock
(Conveyor RUN)
A2 (Conveyor operation)
Partial interlock
(Arm RUN)
A3 (Arm operation)
• A1, A2, and A3 are interlocked
when the Emergency Stop Button is
ON.
Global interlock
(Emergency stop)
MILH
0
When the Emergency Stop is ON (input condition
OFF), A1, A2, and A3 are interlocked.
When the Emergency Stop is OFF (input
condition ON), A1 is executed normally and A2
and A3 are controlled by the Conveyor RUN and
Arm RUN switches as described below.
• A2 and A3 are interlocked when
Conveyor RUN is OFF.
A1 (Peripheral processing)
• A3 is interlocked when Arm RUN is
OFF.
Partial interlock
(Conveyor RUN)
MILH
1
When the Conveyor RUN switch is OFF (input
condition OFF), both A2 and A3 are interlocked.
When the Conveyor RUN switch is ON (input
condition ON), A2 is executed normally and A3 is
controlled by the Arm RUN switch as described
below.
A2 (Conveyor operation)
Partial interlock
(Arm RUN)
MILH
2
When the Arm RUN switch is OFF (input
condition OFF), A3 is interlocked.
When the Arm RUN switch is ON (input
condition ON), A3 is executed normally.
A3 (Arm operation)
MILC
2
MILC
1
MILC
0
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2 Instructions
ꢀ Differences between MILH(517) and MILR(518)
Differentiated instructions (DIFU, DIFD, or instructions with a @ or % prefix) operate differently in inter-
locks created with MILH(517) and MILR(518).
When a program section is interlocked with MILR(518), a differentiated instruction will not be executed
when the interlock is cleared even if the differentiation condition was activated during the interlock
(comparing the status of the execution condition when the interlock started to its status when the inter-
lock was cleared).
When a program section is interlocked with MILH(517), a differentiated instruction will be executed
when the interlock is cleared if the differentiation condition was activated during the interlock (compar-
ing the status of the execution condition when the interlock started to its status when the interlock was
cleared).
Instruction
MILH(517)
Operation of Differentiated Instructions
2
A differentiated instruction (DIFU, DIFD, or instruction with a @ or % prefix) will
MULTI-INTERLOCK DIFFER- be executed after the interlock is cleared if the differentiation condition of the
ENTIATION HOLD
instruction was established while the instruction was interlocked. (The status of
the execution condition when the interlock started is compared to its status when
the interlock was cleared.)
MILR(518)
A differentiated instruction (DIFU, DIFD, or instruction with a @ or % prefix) will
MULTI-INTERLOCK DIFFER- not be executed after the interlock is cleared even if the differentiation condition
ENTIATION RELEASE of the instruction was established while the instruction was interlocked.
ꢀ Operation of Differentiated Instructions in an MILH(517) Interlock
If there is a differentiated instruction (DIFU, DIFD, or instruction with a @ or % prefix) between
MILH(517) and the corresponding MILC(519), that instruction will be executed after the interlock is
cleared if the differentiation condition of the instruction was established.
In the same way, a differentiated instruction will be executed if its execution condition is established at
the same time that the interlock is started or cleared.
Many other conditions in the program may cause the differentiation condition to be reset even if it was
established during the interlock. In this case, the differentiation instruction will not be executed when the
interlock is cleared.
Example
When a DIFFERENTIATE UP (DIFU(013)) instruction is being used and the input condition is OFF
when the interlock starts and ON when the interlock is cleared, DIFU(013) will be executed when the
interlock is cleared. (Differentiated instructions operate the same in the MILH(517) interlock as they
would in an IL(002) interlock.)
Timing chart
0.00
Not interlocked
Interlocked
Not interlocked
MILH
0
ON
0.00
0.01
OFF
,
1. When CIO 0.00 is OFF (interlock starts), the DIFU s CIO 0.01 input condition is OFF.
2. The DIFU s CIO 0.01 input condition goes from OFF to ON while CIO 0.00 is OFF (DIFU interlocked),
3. When CIO 0.00 goes from OFF to ON (interlock cleared), DIFU is executed if CIO 0.01 is still ON.
,
Status (OFF) at
start of interlock
ON
Differentiation condition established
ON
0.01
OFF
DIFU
Status (ON) when
interlock is cleared
DIFU(013) is executed.
OFF
MILH(517) interlock
W0.0
ON
MILC
0
W0.0
OFF
1 cycle
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2 Instructions
ꢀ Operation of Differentiated Instructions in an MILR(518) Interlock
If there is a differentiated instruction (DIFU, DIFD, or instruction with a @ or % prefix) between
MILR(518) and the corresponding MILC(519), that instruction will not be executed after the interlock is
cleared even if the differentiation condition of the instruction was established.
In the same way, a differentiated instruction will not be executed if its execution condition is established
at the same time that the interlock is started or cleared.
Example
When a DIFFERENTIATE UP (DIFU(013)) instruction is being used and the input condition is OFF
when the interlock starts and ON when the interlock is cleared, DIFU(013) will not be executed when
the interlock is cleared.
Timing chart
Not interlocked
Interlocked
Not interlocked
0.00
MILR
0
ON
0.00
0.01
OFF
,
1. When CIO 0.00 is OFF (interlock starts), the DIFU s CIO 0.01 input condition is OFF.
2. The DIFU s CIO 0.01 input condition goes from OFF to ON while CIO 0.00 is OFF (DIFU interlocked),
3. When CIO 0.00 goes from OFF to ON (interlock cleared), DIFU is not executed even though CIO 0.01 is still ON.
,
ON
ON
0.01
OFF
OFF
DIFU
W0.0
MILR(518) interlock
DIFU(013) is not executed.
ON
MILC
0
W0.0
OFF
ꢀ Controlling Interlock Status from a Programming Device
An interlock can be engaged or released manually by force-resetting or force-setting the Interlock Sta-
tus Bit (specified with operand D of MILH(517) and MILR(518)) from a Programming Device. The forced
status of the Interlock Status Bit has priority and overrides the interlock status calculated by program
execution.
Force-set: Releases the interlock.
Force-reset: Engages the interlock.
OFF
MILH
n
ON
MILH
n
100.00
100.00
CIO 100.00 is OFF when the interlock is engaged.
CIO 100.00 is ON when the interlock is not engaged.
Program section
controlled by interlock
Program section
controlled by interlock
If CIO 100.00 is force-reset (OFF), the interlock is engaged.
If CIO 100.00 is force-set (ON), the interlock is released.
MILC
n
MILC
n
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2 Instructions
Hint
• The cycle time is not shortened when a section of the program is interlocked by MILH(517) or
MILR(518) because the interlocked instructions are executed internally.
• When nesting interlocks, assign interlock numbers so that the nested program section does not
exceed the outer program section.
a
Execution
condition
MILH
Program section
0
a
b
A1
A2
A3
OFF
ON
Interlocked
Interlocked
Interlocked
OFF
OFF
ON
A1
ON
Not interlocked Interlocked
Interlocked
2
b
Not interlocked Not interlocked Not interlocked
MILH
1
A2
A3
MILC
0
The nested program section
must not go beyond the outer
program section.
MILC
1
• Other instructions can be input between
the MILC(519) instructions, as shown in
the following diagram.
a
b
MILH
0
100.00
A1
MILH
1
100.01
A2
MILC
1
Other instructions can be inserted
between two MILC(519) instructions. In
this case, sections A1 and A3 operate
together. (They are interlocked when “a”
is OFF, regardless of the ON/OFF status
A3
of “b”.)
MILC
0
a
• If there is an ILC(003) instruction between
an MILH(517) and MILC(519) pair, the pro-
gram section between MILH(517) and
ILC(003) will be interlocked.
MILH
0
When input condition “a” is OFF, only
program section A1 is interlocked.
A1
A2
If there is an ILC(003) instruction,
the interlock is cleared at that point.
ILC
The MILC(519) instruction is ignored.
MILC
0
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2 Instructions
a
• If there is an ILC(003) instruction between
When input condition “a” is OFF, program
sections A1 and A2 are interlocked.
MILR
0
an MILR(518) and MILC(519) pair, the
ILC(003) instruction will be ignored and the
full program section between MILR(518)
and MILC(519) will be interlocked.
A1
A2
The ILC(003) instruction is ignored.
ILC
MILC
0
a
b
• If there is another MILH(517) or MILR(518)
instruction with the same interlock number
between an MILH(517) and MILC(519)
pair and the first MILH(517) instruction’s
interlock is engaged, the second
MILH(517)/MILR(518) will not operate.
When input condition “a” is OFF,
program sections A1 and A2 are both
interlocked, even if input condition “b”
is ON.
MILH
0
A1
A2
MILH
0
When input condition “a” is ON and “b”
is OFF, only program section A2 is
interlocked.
• If there is another MILH(517) or MILR(518)
instruction with the same interlock number
between an MILH(517) and MILC(519)
pair and the first MILH(517) instruction’s
interlock is not engaged, the second
MILH(517)/MILR(518) will operate normally.
MILC
0
Note The MILR(518) interlocks operate in the same way if there is another MILH(517) or MILR(518) instruction
with the same interlock number between an MILR(518) and MILC(519) pair.
• If there is an MILC(519) instruction with a
a
MILH
0
When input condition “a” is OFF, program
sections A1 and A2 are both interlocked.
different interlock number between an
MILH(517)/MILR(518) and MILC(519) pair,
that MILC(519) instruction will be ignored.
A1
A2
This MILC(519) instruction is ignored.
MILC
1
MILC
0
a
b
• If there is an MILH(517) instruction
between an IL(002) and ILC(003) pair and
the IL(002) interlock is engaged, the
MILH(517) instruction has no effect. In this
case, the program section between IL(002)
and ILC(003) will be interlocked.
If the IL(002) interlock is not engaged and
the MILH(517) instruction’s execution con-
dition (b in this case) is OFF, the program
section between MILH(517) and ILC(003)
will be interlocked.
IL
When input condition “a” is OFF, program
sections A1 and A2 are both interlocked.
A1
A2
If the program section is not interlocked
by IL(002) and “b” is OFF, program
section A2 is interlocked.
MILH
0
ILC
IL
a
• If there is an MILC(519) instruction
between an IL(002) and ILC(003) pair, that
MILC(519) instruction will be ignored and
the entire program section between
IL(002) and ILC(003) will be interlocked.
When input condition “a” is OFF, program
sections A1 and A2 are both interlocked.
A1
A2
The MILC(519) instruction is ignored.
MILC
0
ILC
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2 Instructions
• Program operation can be switched more efficiently by using interlocks with MILH(517) or MILR(518).
Instead of switching processing with compound conditions, insert an MILH(517) or MILR(518)
instruction before each process and an MILC(519) instruction after each process.
a
a
A1
MILH
0
b
A2
A1
A2
b
MILH
1
2
MILC
1
MILC
0
• Unlike the IL(002) interlocks, MILH(517) and MILR(518) interlocks can be nested, so the operation of
similar programs will be different if MILH(517) or MILR(518) is used instead of ILC(002).
• Program with MILH(517)/MILC(519) Interlocks
a
MILH
Execution
condition
0
Program section
100.00
a
b
A1
A2
A3
A1
OFF
ON
Interlocked
Interlocked
Not interlocked
b
OFF
OFF
ON
MILH
1
ON
ON
Not interlocked Interlocked
Not interlocked
100.01
Not interlocked Not interlocked Not interlocked
A2
A3
MILC
1
MILC
0
• Program with IL(002)/ILC(003) Interlocks
a
b
IL
Execution
condition
Program section
A1
a
b
A1
A2
A3
OFF
ON
Interlocked
Interlocked
Not interlocked
(Not controlled
by the
IL(002)/ILC(003)
interlock.)
IL
OFF
OFF
ON
ON
ON
Not interlocked Interlocked
A2
A3
Not interlocked Not interlocked
ILC
This program section is not
controlled by the interlock.
This ILC(003)
instruction is ignored
so ...
ILC
• If there are bits which you want to remain ON in a program section interlocked by MILH(517) or
MILR(518), set these bits to ON with SET just before the MILH(517) or MILR(518) instruction.
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2 Instructions
Sample program
When W0.00 and W0.01 are both ON, the instructions between MILH(517) with interlock number 0 and
MILC(519) with interlock number 0 are executed normally.
When W0.00 is OFF, the instructions between MILH(517) with interlock number 0 and MILC(519) with
interlock number 0 are interlocked.
When W0.00 is ON and W0.01 are OFF, the instructions between MILH(517) with interlock number 1
and MILC(519) with interlock number 1 are interlocked. The other instructions are executed normally.
i
W0.00 and W0.01
both ON
W0.00 ON and W0.01
OFF
W0.00 OFF
W0.00
MILH
0
100.00
Executed
normally.
2.00
0.01
OFF
W0.01
MILH
1
100.01
H0
0.02
Executed
normally.
OFF
Held
Outputs
interlocked.
Outputs
interlocked.
SET
0.03
MILC
1
CNT
1
Executed
normally.
Held
#0010
MILC
0
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2 Instructions
JMP/CJP/JME
Function
code
Instruction
Mnemonic
Variations
Function
When the execution condition for JMP(004) is
OFF, program execution jumps directly to the first
JME(005) in the program with the same jump
number.
JUMP
JMP
---
004
When the execution condition for CJP(510) is ON,
program execution jumps directly to the first
JME(005) in the program with the same jump
number.
CONDITIONAL JUMP
JUMP END
CJP
JME
---
---
510
005
Indicates the end position of a jump by JMP or
CJP instruction.
2
JMP
JME
JME(005)
JMP(004)
N
N:Jump number
N: Jump number
N
N: Jump number
Symbol
CJP
CJP(510)
N
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
Not allowed
Operands
Operand
Description
Data type
Size
N
Jump number
UINT
1
N: Jump Number
The jump number must be 0000 to 007F (&0 to &127 decimal).
ꢀ Operand Specifications
Word addresses
Indirect DM addresses
Area
Constants
CF
Pulse bits
TR bits
CIO
OK
---
WR
OK
---
HR
AR
OK
---
T
C
OK
---
DM
OK
---
@DM
OK
*DM
OK
---
JMP/CJP
JME
N
N
OK
---
OK
---
OK
---
---
---
---
Flags
ꢀ JMP/CJP
Name
Label
Operation
• ON if N is not within the specified range of 0000 to 007F.
Error Flag
P_ER
• ON if there is a JMP(004) in the program without a JME(005) with the same jump number.
• OFF in all other cases.
ꢀ JME
There are no flags affected by this instruction.
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2 Instructions
Function
Execution condition
ON OFF
ꢀ JMP
Instructions
jumped
JMP
N
When the execution condition for JMP(004) is
ON, no jump is made and the program is exe-
cuted consecutively as written.
Instructions in this
section are not executed
and output status is
maintained. The
instruction execution time
for these instructions is
eliminated.
Instructions
executed
When the execution condition for JMP(004) is
OFF, program execution jumps directly to the
first JME(005) in the program with the same
jump number. The instructions between
JMP(004) and JME(005) are not executed, so
the status of outputs between JMP(004) and
JME(005) is maintained. In block programs, the
instructions between JMP(004) and JME(005)
are skipped regardless of the status of the exe-
cution condition.
JME
N
ꢀ CJP
Execution
condition OFF
Execution
condition ON
When the execution condi-
Instructions
jumped
CJP
N
tion for CJP(510) is OFF, no
jump is made and the pro-
gram is executed consecu-
tively as written.
When the execution condi-
tion for CJP(510) is ON, pro-
Instructions in this section are not executed
and output status is maintained. The
instruction execution time for these
instructions is eliminated.
Instructions
executed
gram
execution
jumps
JME
N
directly to the first JME(005)
in the program with the
same jump number.
Hint
• Because all of instructions between JMP(004)/CJP(510) and JME(005) are skipped when the execu-
tion condition for JMP(004) is OFF, the cycle time is reduced by the total execution time of the
skipped instructions. In contrast, processing time equivalent to NOP(000) processing is required for
instructions between JMP0(515) and JME0(516), so the cycle time is not reduced as much with those
jump instructions.
• The following table compares the various jump instructions.
JMP(004)
JME(005)
CJP(510)
JME(005)
Item
Execution condition for jump
Number allowed
OFF
ON
128
Instruction processing when
jumped
Not executed.
Instruction execution time when
jumped
None
Status of outputs (bits and words)
when jumped
Bits and words maintain their previous status.
Operating timers continue timing.
Status of operating timers when
jumped
Processing in block programs
Always jump.
Jump when ON.
Precautions
• All of the outputs (bits and words) in jumped instructions retain their previous status. Operating timers
(TIM, TIMX(550), TIMH(015), TIMHX(551), TMHH(540) and TMHHX(552)) continue timing because
the PVs are updated even when the timer instruction is not being executed.
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2 Instructions
• When there are two or more JME(005) instruc-
tions with the same jump number, only the
instruction with the lower address will be valid.
The JME(005) with the higher program
address will be ignored.
JME
N
Program section A is executed
repeatedly as long as
execution condition a is OFF.
A
• CJP(510) jumps to the first JME(005) when the
execution condition is ON and JMP(004) jumps
to the first JME(005) when the execution condi-
tion is OFF.
JMP
N
a
• When JME(005) precedes JMP(004)/CJP(510) in the program, the instructions between JME(005)
and JMP(004)/CJP(510) will be executed repeatedly as long as the execution condition for
JMP(004)/CJP(510) is OFF. A Cycle Time Too Long error will occur if the execution condition is not
turned ON or END(001) is not executed within the maximum cycle time.
2
• The operation of DIFU(013), DIFD(014), and differentiated instructions is not dependent solely on the
status of the execution condition when they are programmed between JMP(004)/CJP(510) and
JME(005). When DIFU(013), DIFD(014), or a differentiated instruction is executed in an jumped sec-
tion immediately after the execution condition for the JMP(004)/CJP(510) has gone ON, the execution
condition for the DIFU(013), DIFD(014), or differentiated instruction will be compared to the execution
condition that existed before the jump became effective (i.e., before the execution condition for
JMP(004) went OFF).
Sample program
When CIO 0.00 is OFF in the right example,
the instructions between JMP(004) and
JME(005) are not executed and the outputs
maintain their previous status.
0.00
JMP
CIO 0.00
OFF
CIO 0.00
ON
&1
When CIO 0.00 is ON in the right example,
the instructions between JMP(004) and
JME(005) are executed normally.
Normal
execution
Instructions
not executed.
(Outputs
remain
unchanged.)
TIM
SET
CNT
JME
&1
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2 Instructions
FOR/NEXT
Function
code
Instruction
Mnemonic
Variations
Function
The instructions between FOR(512) and
NEXT(513) are repeated a specified number of
times.
FOR
---
---
512
513
---
NEXT
FOR
NEXT
NEXT(513)
FOR(512)
Symbol
N
N: Number of loops
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
---
Operands
Operand
Description
Data type
Size
N
Number of loops
UINT
1
N: Number of loops
The number of loops must be 0000 to FFFF (0 to 65,535 decimal).
ꢀ Operand Specifications
Word addresses
Indirect DM addresses
Area
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
OK
AR
T
C
DM
@DM
*DM
N
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
Flags
Name
Label
Operation
Error Flag
P_ER
• ON if more than 15 loops are nested.
• OFF in all other cases.
Equals Flag
P_EQ
P_N
OFF
OFF
Negative Flag
Function
The instructions between FOR(512) and NEXT(513)
are executed N times and then program execution con-
tinues with the instruction after NEXT(513). The
BREAK(514) instruction can be used to cancel the
loop.
FOR
N
Repeated N times
Repeated program section
If N is set to 0, the instructions between FOR(512) and
NEXT(513) are processed as NOP(000) instructions.
Loops can be used to process tables of data with a
minimum amount of programming.
NEXT
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2 Instructions
Hint
There are two ways to repeat a program section until a given execution condition is input.
• FOR-NEXT Loop with BREAK
Start a FOR-NEXT loop with a maximum of N repetitions. Program BREAK(514) within the loop with
the desired execution condition. The loop will end before N repetitions if the execution condition is
input.
• JME(005)-JMP(004) Loop
Program a loop with JME(005) before JMP(004). The instructions between JME(005) and JMP(004)
will be executed repeatedly as long as the execution condition for JMP(004) is OFF. (A Cycle Time
Too Long error will occur if the execution condition is not turned ON or END(001) is not executed
within the maximum cycle time.)
2
Precautions
• Program FOR(512) and NEXT(513) in the same task. Execution will not be repeated if these instruc-
tions are not in the same task.
• If a loop repeats in one cycle and a differentiated instruction is used in the FOR-NEXT loop, that
instruction will be executed only once.It is not executed the number of loops.
• UP(521),DOWN(522)
• DIFU(013),DIFD(014)
• Differentiated up instruction(Differentiation variation:@)
• Differentiated down instruction(Differentiation variation:%)
• FOR-NEXT loops can be nested up to 15 levels.
FOR
&3
A
FOR
&2
B
NEXT
C
NEXT
In the example above, program sections A, B, and C are executed as follows:
A → B → B → C, A → B → B → C, and A → B → B → C
• Use BREAK(514) to escape from a FOR-NEXT loop. Several BREAK(514) instructions (the number
of levels nested) are required to escape from nested loops.
• The remaining instructions in the loop after BREAK(514) are processed as NOP(000) instructions.
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2 Instructions
FOR
&3
FOR
&3
Escapes from loop
when condition a
is ON.
FOR
&2
BREAK
NEXT
Remaining
a
instructions are
processed as
Breaks FOR-NEXT loop 2.
Breaks FOR-NEXT loop 1.
1
2
BREAK
NOP(000).
NEXT
BREAK
NEXT
• A jump instruction such as JMP(004) may be executed within a FOR-NEXT loop, but do not jump
beyond the FOR-NEXT loop.
• The following instructions cannot be used within FOR-NEXT loops:
• STEP DEFINE and STEP START: STEP(008)/SNXT(009)
Sample program
In the left example, the looped program section transfers
the content of D100 to the address indicated in D200
and then increments the content of D200 by 1.
FOR
&3
Repeated 3 times.
MOV
D100
@D200
MOV
++
D100
D0
D1
D2
D200
NEXT
#0000
D200
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2 Instructions
BREAK
Instruction
Function
code
Mnemonic
Variations
Function
Programmed in a FOR-NEXT loop to cancel the
execution of the loop for a given execution condi-
tion. The remaining instructions in the loop are
processed as NOP(000) instructions.
BREAK LOOP
BREAK
---
514
BREAK
Symbol
BREAK(514)
2
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
---
Flags
Name
Label
Operation
Error Flag
P_ER
P_EQ
P_N
OFF
Equals Flag
Negative Flag
OFF
OFF
Function
Program BREAK(514) between FOR(512) and
NEXT(513) to cancel the FOR-NEXT loop
when BREAK(514) is executed. When
BREAK(514) is executed, the rest of the
instructions up to NEXT(513) are processed as
NOP(000).
Condition a ON
N repetitions
FOR
N
Repetitions
forced to
end.
BREAK
NEXT
a
Processed as
NOP(000).
Precautions
• A BREAK(514) instruction cancels only one loop, so several BREAK(514) instructions (the number of
levels nested) are required to escape from nested loops.
• BREAK(514) can be used only in a FOR-NEXT loop.
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2 Instructions
Timer and Counter Instructions
Refresh Methods for Timer/Counter PV
ꢀ Overview
There are two PV refresh methods for instructions related to timer/counters, “BCD” and “BINARY”.
Method
BCD
Description
Sets the timer set value in BCD.
Sets the timer set value in BINARY.
Setting range
Set value
#0000~9999
&0~65535 or #0000~FFFF
0~9.999
Binary
0~65.535
The PLC Setup for all of the timer/counter-related instructions. The refresh method is valid also when
setting an SV indirectly (i.e., using the contents of memory word). (That is, the contents of the
addressed word is taken as either BCD or binary data according to the refresh method that is set.)
ꢀ Applicable Instructions
Mnemonic
Classification
Instruction
BCD
Binary
TIMX(550)
Timer/counter
instructions
HUNDRED-MS TIMER
TIM
TEN-MS TIMER
TIMH(015)
TMHH(540)
TTIM(087)
TIML(542)
CNT
TIMHX(551)
TMHHX(552)
TTIMX(555)
TIMLX(553)
CNTX(546)
CNTRX(548)
CNRX(547)
ONE-MS TIMER
ACCUMULATIVE TIMER
LONG TIMER
COUNTER
REVERSIBLE COUNTER
RESET TIMER/COUNTER
CNTR(012)
CNR(545)
ꢀ Setting method for PV refresh
BCD and binary PV refreshing can both be used in the same project. The setting of the PV refresh
method in the PLC Setup will be ignored.
ꢀ Basic Timer Specifications
TIM/TIMX
(550)
TIMH(015)/
TIMHX(551)
TMHH(540)/
TMHHX(552)
TTIM(087)/
TTIMX(555)
TIML(542)/
TIMLX(553)
Item
Timing method
Timing units
Decrementing
100 ms
Decrementing
10 ms
Decrementing
1 ms
Incrementing
100 ms
Decrementing
100 ms
TIM: 999.9 s
TIMX: 6,553.5 s
1
TIMH: 99.99 s
TIMHX: 655.35 s
1
TMHH: 9.999 s
TMHHX: 65.535 s
1
TTIM: 999.9 s
TTIMX: 6,553.5 s
1
TIML:115 days
TIMLX: 49,710 days
1
Maximum SV
Outputs/instruction
Timer numbers
Used
Used
Used
Used
Not used
Completion Flag refresh- When the instruction
When the instruction is
executed
When the instruction is
executed
When the instruction is
executed
When the instruction is
executed
ing
is executed
Timer PV refreshing
(See note)
When the instruction
is executed
When the instruction is
executed
When the instruction is
executed
When the instruction is
executed
When the instruction is
executed
Completion OFF
Flags
OFF
OFF
OFF
OFF
Valueafter
reset
PVs
SV
SV
SV
0
SV
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2 Instructions
ꢀ Operating Mode
Item
TIM/TIMX
(550)
TIMH(015)/
TIMHX(551)
TMHH(540)/
TMHHX(552)
TTIM(087)/
TTIMX(555)
TIML(542)/
TIMLX(553)
PV = 0
Completion Flag = OFF
---
Operating mode change
Power interrupt/reset
Execution of CNR(545)/CNRX(547)
PV = 0
Completion Flag = OFF
---
Binary: PV = FFFF, Completion Flag = OFF
BCD: PV = FFFF or 9999, Completion Flag = OFF
Not applicable
Operation in jumped program sec- Operating timers continue timing.
Timer status is maintained.
tion (JMP(004)-JME(005))
Operation in interlocked program
section (IL(002)-ILC(003))
PV = SV
Completion Flag = OFF
Timer status main-
tained.
PV = SV
Completion Flag =
OFF
2
Completion Flag ON
---
---
---
Forced set
PVs
Set to 0.
OFF
Completion
Flags
Forced reset
PVs
Reset to SV.
Set to 0.
---
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2 Instructions
ꢀ Example Timer and Counter Applications
Example 1: Long-term Timers
The following program examples show three ways to create long-term timers with standard TIM and
CNT instructions.
1) Two TIM Instructions
In this example, two TIM instructions are combined to make a 30-minute timer.
0.00
(900 seconds)
TIM
0001
#9000
Instruction
Operands
LD
0.00
1
TM
T0001
#9000
T0001
2
(900 seconds)
TIM
0002
#9000
LD
TM
#9000
T000
100.00
100.00
T0002
LD
OUT
2) TIM and CNT Instructions
In this example, a TIM instruction and a CNT instruction are combined to make a 500-second timer.
TIM 0001 generates a pulse every 5 s and CNT 0002 counts these pulses. The set value for this combi-
nation is the timer interval × counter SV. In this case, the timer SV would be 5 s × 100 = 500 s. With this
combination, the long-term timer’s PV is actually the PV of a counter, which is maintained through
power interruptions.
100.00
Instruction
Operands
(100 times)
CNT
0002
LD
LD
100.00
0.01
#0100
0.01
CNT
2
#0100
0.00
0.00
100.00
C0002
LD
(5 seconds)
TIM
0001
#0050
AND NOT
AND NOT
TIM
100.00
C0002
1
Start
Count up
100.00
#0050
T0001
100.00
C0002
100.01
T0001
C0002
LD
OUT
LD
100.01
OUT
3) Clock Pulse and CNT Instruction
In this example, a CNT instruction counts the pulses from the 1-s clock pulse to make a 700-second
timer.
If the First Cycle Flag (A200.11) is ORed with the counter’s reset input (CIO 0.01), the counter’s PV will
be reset to the SV (0700) when program execution begins rather than resuming the count from the pre-
vious PV.
0.00
P_1s (1-s clock)
Instruction
Operands
CNT
0001
0.00
1s
LD
AND
0.01
#0700
0.01
1
LD NOT
CNT
A200.11
#0700
C0001
100.02
100.02
C0001
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2 Instructions
Example 2: Two-stage Counter
When an SV higher than 9999 is required, two counters can be combined as shown in the following
example. In this case, two CNT instructions are combined to make a BCD counter with an SV of
20,000.
0.00
0.01
Instruction
Operands
CNT
0001
(100 times)
LD
AND
LD NOT
OR
0.00
0.01
0.02
0.02
#0100
C0001
C0002
1
C0001
OR
CNT
C0002
C0001
#0100
C0001
0.02
2
LD
LD NOT
CNT
(200 times)
CNT
0002
2
0.02
#0200
C0002
100.03
#0200
LD
100.03
OUT
C0002
Example 3: ON/OFF Delay
In this example two TIM timers are combined with KEEP(011) to make an ON delay and an OFF delay.
CIO 5.00 will be turned ON 5.0 seconds after CIO 0.00 goes ON and it will be turned OFF 3.0 seconds
after CIO 0.00 goes OFF.
0.00
Instruction
Operands
TIM
0001
#0050
LD
0.00
1
TIM
#0050
5.00
5.00
0.00
LD
LD NOT
TIM
TIM
0002
#0030
0.00
2
#0030
T0001
T0002
100.05
T0001
T0002
LD
LD
KEEP
100.05
KEEP(011)
0.00
100.05
5.0 s
3.0 s
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2 Instructions
Example 4: One-shot Bit
A TIM timer can be combined with OUT or OUT NOT to control how long a particular bit is ON or OFF.
In this example, CIO 2.04 will be ON for 1.5 seconds (the SV of T0001) after CIO 0.00 goes ON.
10.00
0.00
Instruction
Operands
LD
0.00
10.00
10.00
100.00
LD
AND NOT
OR LD
OUT
10.00
100.00
--
(1.5seconds)
10.00
10.00
1
TIM
0001
#0015
LD
TIM
#0015
T0001
100.00
100.00
T0001
10.00
LD
OUT
100.04
LD
10.00
100.00
100.04
100.00
AND NOT
OUT
0.00
100.04
1.5 s
1.5 s
Example 5: Flicker Bit
1) Two TIM Instructions
Two TIM timers can be combined to make a bit turn ON and OFF at regular intervals while the execution
condition is ON. In this example, CIO 2.05 will be OFF for 1.0 second and then ON for 1.5 seconds as
long as CIO 0.00 is ON.
0.00
2.05
T0002
Instruction
Operands
TIM
0001
#0010
(1 second)
LD
0.00
T0002
1
AND LD
TIM
#0010
2.05
2
LD
TIM
0002
#0015
(1.5 seconds)
TIM
#0015
T0001
100.05
LD
100.05
T0001
OUT
0.00
100.05
1.0 s 1.5 s 1.0 s 1.5 s
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2 Instructions
2) Clock Pulse
The desired execution condition can be combined with a clock pulse to mimic the clock pulse (0.1 s, 0.2
s, or 1.0 s).
100.06
0.00
P. 1s (1-s clock pulse)
Instruction
Operands
LD
0.00
1s
AND
OUT
100.06
0.00
1s
• The internal clock pulse (0.1 s, 0.2 s, 1 s) can be
used to easily program a flicker circuit.
A
B
100.06
2
A,B=0.5s
ꢀ Timer reset method
There are two methods for resetting a timer instruction.
1. Turn OFF the execution condition for the timer instruction.
The timer will be reset when its execution condition turns OFF.
The timer will start timing again when its execution condition turns ON.
With this method, a timer cannot be reset and then restarted within the same cycle.
0.01
TIM
0010
#100
When CIO 0.01 turns ON, the timer starts timing.
When CIO 0.01 turns OFF, the timer is reset.
ON
Timer input
CIO 0.01
OFF
Timer PV
T0010
The timer cannot be reset and then
restarted within the same cycle.
ON
Completion
Flag
T0010
OFF
2. Use the RESET TIMER/COUNTER instruction.
The specified instruction will be reset when the RESET TIMER/COUNTER instruction (CNR/CNRX) is
executed.
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2 Instructions
TIM/TIMX
Function
code
Instruction
Mnemonic
Variations
Function
TIM or TIMX(550) operates a decrementing timer
with units of 0.1-s.
HUNDRED-MS TIMER
TIM/TIMX
---
550
TIM
TIMX
BCD
Binary
TIMX(550)
TIM
Symbol
N: Timer number
S: Set value
N:Timer number
S: Set value
N
S
N
S
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
Usage
OK
Not allowed
Operands
Data type
Operand
Description
Size
TIM
TIMX
TIMER
UINT
N
S
Timer Number
Set Value
TIMER
WORD
1
1
N: Timer Number
The timer number must be between 0000 and 0255 (decimal).
S: Set Value (100-ms Units)
TIM (BCD): #0000 to #9999.
TIMX (Binary): &0 to &65535 (decimal) or #0000 to #FFFF (hex).
ꢀ Operand Specifications
Word addresses
Indirect DM addresses
Area
Constants
CF
Pulse bits
TR bits
CIO
---
WR
---
HR
---
AR
---
T
C
---
DM
---
@DM
---
*DM
---
N
S
---
OK
---
---
---
OK
OK
OK
OK
OK
OK
OK
OK
OK
Flags
Name
Label
P_ER
Operation
Error Flag
• ON if in BCD mode and S does not contain BCD data.
• OFF in all other cases.
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2 Instructions
Function
• When the timer input is OFF, the timer spec-
ON
OFF
Timer input
Timer PV
ified by N is reset, i.e., the timer’s PV is
reset to the SV and its Completion Flag is
turned OFF.
SV
0
• When the timer input goes from OFF to ON,
TIM/TIMX(550) starts decrementing the PV.
The PV will continue timing down as long as
the timer input remains ON and the timer’s
Completion Flag will be turned ON when
the PV reaches 0.
Completion
Flag
ON
OFF
The following timing chart shows the behavior
of the timer’s PV and Completion Flag when
the timer input is turned OFF before the timer
times out.
• The status of the timer’s PV and Comple-
tion Flag will be maintained after the timer
times out. To restart the timer, the timer
input must be turned OFF and then ON
again or the timer’s PV must be changed to
a non-zero value (by MOV(021), for exam-
ple).
2
ON
OFF
Timer input
SV
Timer PV
• The setting range for the set value (SV) is 0
to 999.9 s for TIM and 0 to 6,553.5 s for
TIMX(550).
0
ON
OFF
Completion
Flag
• The timer accuracy is -0.01 to 0 s.
Hint
• A TIM/TIMX(550) instruction’s PV and Completion Flag can be refreshed in the following ways
depending on the timer number that is used.
Refresh timing
Execution of TIM/TIMX(550)
Description
• The PV is updated every time that TIM/TIMX(550) is executed.
• The Completion Flag is turned ON if the PV is 0.
The Completion Flag is turned OFF if the PV is not 0.
• Timers are reset (PV = SV, Completion Flag
Execution
condition
1-s clock
pulse bit
OFF) by power interruptions unless the IOM
Hold Bit (A500.12) is ON and the bit is pro-
tected in the PLC Setup. It is also possible
use a clock pulse bit and a counter instruc-
tion to program a timer that will retain its PV
in the event of a power interruption, as
shown in the following diagram.
Count input
Reset input
CNT
N
S
• When the timer set value is #0000, timeup
occurs when the instruction is executed.
Precautions
• Timer numbers are shared with other timer instructions. If two timers share the same timer number,
but are not used simultaneously, a duplication error will be generated when the program is checked,
but the timers will operate normally. Timers which share the same timer number will not operate prop-
erly if they are used simultaneously.
• Timers will not operate properly when the CPU Unit cycle time exceeds 4s. Use timer instructions
when the cycle time is no longer than 4s.
• Timers will be reset or paused in the following cases. (When a timer is reset, its PV is reset to the SV
and its Completion Flag is turned OFF.)
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2 Instructions
Condition
PV
Completion Flag
Operating mode changed from RUN or MONITOR mode
0
0
OFF
*1
to PROGRAM mode or vice versa.
OFF
OFF
Power off and reset
Execution of CNR(545)/CNRX(547), the RESET
BCD: 9999
*2
Binary: FFFF
TIMER/COUNTER instructions
Operation in interlocked program
section (IL(002)–ILC(003))
Reset to SV.
OFF
Operation in jumped program section
(JMP(004)–JME(005))
Retains previous
status.
Retains previous
status.
*1 If the IOM Hold Bit (A500.12) has been turned ON, the status of timer Completion Flags and PVs will be maintained when
the operating mode is changed.
*2 The PV will be set to the SV when TIM/TIMX(550) is executed.
• When TIM/TIMX(550) is in a program section between IL(002) and ILC(003) and the program section
is interlocked, the PV will be reset to the SV and the Completion Flag will be turned OFF.
• When an operating TIM/TIMX(550) timer is in a jumped program section (JMP(004), CJP(510),
JME(005)), the timer’s PV will not be refreshed.
• When a TIM/TIMX(550) timer is forced set, its Completion Flag will be turned ON and its PV will be
set to 0000. When a TIM/TIMX(550) timer is forced reset, its Completion Flag will be turned OFF and
its PV will be reset to the SV.
• The timer’s Completion Flag is refreshed only when TIM/TIMX(550) is executed, so a delay of up to
one cycle may be required for the Completion Flag to be turned ON after the timer times out.
• If online editing is used to overwrite a timer instruction, always reset the Completion Flag. The timer
will not operate properly unless the Completion Flag is reset.
Sample program
When timer input CIO 0.00 goes from OFF to ON in the following example, the timer PV will begin
counting down from the SV. Timer Completion Flag T0000 will be turned ON when the PV reaches 0.
When CIO 0.00 goes OFF, the timer PV will be reset to the SV and the Completion Flag will be turned
OFF.
i
0.00
TIM
0000
#0100
or
0.00
TIMX
ON
OFF
0000
Timer input
0.00
&0100
100
ON
Timer PV
T0000
OFF
ON
OFF
Timer
Completion
Flag
T0000
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2 Instructions
TIMH/TIMHX
Function
code
Instruction
Mnemonic
Variations
Function
TIMH
TIMHX
---
---
015
551
TIMH(015)/TIMHX(551) operates a decrementing
timer with units of 10-ms.
TEN-MS TIMER
TIMH
TIMHX
BCD
Binary
TIMH(015)
TIMHX(551)
Symbol
N
S
N
S
N: Timer number
S: Set value
N: Timer number
S: Set value
2
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
Usage
OK
Not allowed
Operands
Data type
Operand
Description
Size
TIMH
TIMHX
TIMER
UINT
N
S
Timer Number
Set Value
TIMER
WORD
1
1
N: Timer Number
The timer number must be between 0000 and 0255 (decimal).
S: Set Value
TIMH (BCD): #0000 to #9999
TIMHX (Binary): &0 to &65535 (decimal) or #0000 to #FFFF (hex)
ꢀ Operand Specifications
Word addresses
Indirect DM addresses
Area
Constants
CF
Pulse bits
TR bits
CIO
---
WR
---
HR
---
AR
---
T
C
---
DM
---
@DM
---
*DM
---
N
S
---
OK
---
---
---
OK
OK
OK
OK
OK
OK
OK
OK
OK
Flags
Name
Label
Operation
Error Flag
ER
• ON if in BCD mode and S does not contain BCD data.
• OFF in all other cases.
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2 Instructions
Function
• When the timer input is OFF, the timer specified
by N is reset, i.e., the timer’s PV is reset to the
SV and its Completion Flag is turned OFF.
ON
OFF
Timer input
Timer PV
SV
0
• When the timer input goes from OFF to ON,
TIMH(015)/TIMHX(551) starts decrementing the
PV. The PV will continue timing down as long as
the timer input remains ON and the timer’s Com-
pletion Flag will be turned ON when the PV
reaches 0000.
Completion
Flag
ON
OFF
The following timing chart shows the
behavior of the timer’s PV and Completion
Flag when the timer input is turned OFF
before the timer times out.
• The status of the timer’s PV and Completion Flag
will be maintained after the timer times out. To
restart the timer, the timer input must be turned
OFF and then ON again or the timer’s PV must
be changed to a non-zero value (by MOV(021),
for example).
ON
OFF
Timer input
SV
• The setting range for the set value (SV) is 0 to
99.99 s for TIMH(015) and 0 to 655.35 s for
TIMHX(551).
Timer PV
0
Completion
Flag
ON
OFF
• The timer accuracy is 0 to 0.01 s.
Hint
A TIMH(015)/TIMHX(551) instruction’s PV and Completion Flag can be refreshed in the following ways
depending on the timer number that is used.
Refresh timing
Description
Execution of TIMH(015)/TIMHX(551) • The PV is updated every time that TIMH(015)/TIMHX(551) is executed.
• The Completion Flag is turned ON if the PV is 0.
The Completion Flag is turned OFF if the PV is not 0.
Precautions
• Timer numbers are shared with other timer instructions. If two timers share the same timer number,
but are not used simultaneously, a duplication error will be generated when the program is checked,
but the timers will operate normally. Timers which share the same timer number will not operate prop-
erly if they are used simultaneously.
• Timers will not operate properly when the CPU Unit cycle time exceeds 4s. Use timer instructions
when the cycle time is no longer than 4s.
• Timers will be reset or paused in the following cases. (When a timer is reset, its PV is reset to the SV
and its Completion Flag is turned OFF.)
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2 Instructions
Condition
PV
Completion Flag
Operating mode changed from RUN or MONITOR mode
0
0
OFF
*1
to PROGRAM mode or vice versa.
OFF
OFF
Power off and reset
Execution of CNR(545)/CNRX(547), the RESET
BCD: 9999
*2
Binary: FFFF
TIMER/COUNTER instructions
Operation in interlocked program
section (IL(002)-ILC(003))
Reset to SV.
OFF
Operation in jumped program section
(JMP(004)-JME(005))
Retains previous
status.
Retains previous
status.
2
*1 If the IOM Hold Bit (A500.12) has been turned ON, the status of timer Completion Flags and PVs will be maintained when
the operating mode is changed.
*2 The PV will be set to the SV when TIMH(015)/TIMHX(551) is executed.
• When an operating TIMH(015)/TIMHX(551) timer is in a jumped program section (JMP(004),
CJP(510), JME(005)), the timer’s PV will not be refreshed in the above case.
• When TIMH(015)/TIMHX(551) is in a program section between IL(002) and ILC(003) and the pro-
gram section is interlocked, the PV will be reset to the SV and the Completion Flag will be turned
OFF.
• When a TIMH(015)/TIMHX(551) timer is forced set, its Completion Flag will be turned ON and its PV
will be set to 0000. When a TIMH(015)/TIMHX(551) timer is forced reset, its Completion Flag will be
turned OFF and its PV will be reset to the SV.
• The timer’s Completion Flag is refreshed only when TIMH(015)/TIMHX(551) is executed, so a delay
of up to one cycle may be required for the Completion Flag to be turned ON after the timer times out.
• If online editing is used to overwrite a timer instruction, always reset the Completion Flag. The timer
will not operate properly unless the Completion Flag is reset.
Sample program
When timer input CIO 0.00 goes from OFF to ON in the following example, the timer PV will begin
counting down from the SV (#0064 = 100 = 1.00 s). The Timer Completion Flag, T0000, will be turned
ON when the PV reaches 0.
When CIO 0.00 goes OFF, the timer PV will be reset to the SV and the Completion Flag will be turned
OFF.
i
Timer input
0.00
0.00
ON
OFF
TIMH
0
Timer PV
100
T0000
100
#0100
0
(1.00 s)
or
0.00
Timer Completion
Flag
T0000
ON
OFF
TIMHX
0
&100
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2 Instructions
TMHH/TMHHX
Function
code
Instruction
Mnemonic
Variations
Function
TMHH
TMHHX
---
---
540
552
TMHH(540)/TMHHX(552) operates a decrement-
ing timer with units of 1-ms.
ONE-MS TIMER
TMHH
TMHHX
BCD
Binary
TMHHX(552)
TMHH(540)
Symbol
N
S
N
S
N: Timer number
S: Set value
N: Timer number
S: Set value
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
Not allowed
Usage
OK
Operands
Data type
Operand
Description
Size
TMHH
TIMER
WORD
TMHHX
TIMER
UINT
N
S
Timer Number
Set Value
1
1
N: Timer Number
The timer must be between 0000 and 0015 decimal.
S: Set Value
TMHH (BCD): #0000 to #9999
TMHHX (Binary): &0 to &65535 (decimal) or #0000 to #FFFF (hex)
ꢀ Operand Specifications
Word addresses
Indirect DM addresses
Area
Constants
CF
Pulse bits
TR bits
CIO
---
WR
---
HR
---
AR
---
T
C
---
DM
---
@DM
---
*DM
---
N
S
---
OK
---
---
---
OK
OK
OK
OK
OK
OK
OK
OK
OK
Flags
Name
Label
Operation
Error Flag
P_ER
• ON if in BCD mode and S does not contain BCD data.
• OFF in all other cases.
Function
• When the timer input is OFF, the timer specified by N is reset, i.e., the timer’s PV is reset to the SV
and its Completion Flag is turned OFF.
• When the timer input goes from OFF to ON, TMHH(540)/TMHHX(552) starts decrementing the PV.
The PV will continue timing down as long as the timer input remains ON and the timer’s Completion
Flag will be turned ON when the PV reaches 0000.
• The status of the timer’s PV and Completion Flag will be maintained after the timer times out. To
restart the timer, the timer input must be turned OFF and then ON again or the timer’s PV must be
changed to a non-zero value (by MOV(021), for example).
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2 Instructions
• The setting range for the set value (SV) is 0 to 9.999 s for TMHH(540) and 0 to 65.535 for
TMHHX(552).
• The timer accuracy is -0.01 to 0 s.
Hint
The timer PV and timeup used in TMHH/TMHHX instructions are refreshed at the timing below.
Refresh timing
Description
When each instruction is executed
• The PV is updated every time that each instruction is executed.
• The timeup flag is ON when the PV is 0 and OFF otherwise.
Precautions
2
• Timer numbers are shared with other timer instructions. If two timers share the same timer number,
but are not used simultaneously, a duplication error will be generated when the program is checked,
but the timers will operate normally. Timers which share the same timer number will not operate prop-
erly if they are used simultaneously.
• The Completion Flag is updated only when TMHH(540)/TMHHX(552) is executed. The Completion
Flag can thus be delayed by up to one cycle time from the actual set value.
• The present value of a timer will not be refreshed even if the task is on standby.
• Timers will be reset or paused in the following cases. (When a timer is reset, its PV is reset to the SV
and its Completion Flag is turned OFF.)
Condition
PV
Completion Flag
Operating mode changed from RUN or MONITOR mode
0
0
OFF
*1
to PROGRAM mode or vice versa.
Power supply interrupted and reset
OFF
OFF
Execution of CNR(545)/CNRX(547), the RESET
BCD: 9999
*2
Binary: FFFF
TIMER/COUNTER instructions
Operation in interlocked program
section (IL(002)-ILC(003))
Reset to SV.
OFF
Operation in jumped program section
(JMP(004)-JME(005))
Retains previous
status.
Retains previous
status.
*1 If the IOM Hold Bit (A500.12) has been turned ON, the status of timer Completion Flags and PVs will be maintained when
the operating mode is changed.
*2 The PV will be set to the SV when TMHH(540)/TMHHX(552) is executed.
• The present value of all operating timers will not be refreshed even if the timer is in a program section
that is jumped using JMP(004), CJP(510), JME(005).
• When TMHH(540)/TMHHX(552) is in a program section between IL(002) and ILC(003) and the pro-
gram section is interlocked, the PV will be reset to the SV and the Completion Flag will be turned
OFF.
• When a TMHH(540)/TMHHX(552) timer is forced set, its Completion Flag will be turned ON and its
PV will be set to 0. When a TMHH(540)/TMHHX(552) timer is forced reset, its Completion Flag will be
turned OFF and its PV will be reset to the SV.
• If online editing is used to overwrite a timer instruction, always reset the Completion Flag. The timer
will not operate properly unless the Completion Flag is reset.
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2 Instructions
TTIM/TTIMX
Function
code
Instruction
Mnemonic
Variations
Function
TTIM
---
---
087
555
TTIM(087)/TTIMX(555) operates an incrementing
timer with units of 0.1-s.
ACCUMULATIVE TIMER
TTIMX
TTIM
TTIMX
BCD
Binary
Timer input
Reset input
Timer input
TTIMX(555)
TTIM(087)
Symbol
N
S
N
S
N: Timer number
S: Set value
N: Timer number
S: Set value
Reset input
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
Not allowed
Usage
OK
Operands
Data type
Operand
Description
Size
TTIM
TIMER
WORD
TTIMX
N
S
Timer Number
Set Value
TIMER
UINT
1
1
N: Timer Number
The timer number must be between 0000 to 0255 (decimal).
S: Set Value
TTIM (BCD): #0000 to #9999
TTIMX (Binary): &0 to &65535 (decimal) or #0000 to #FFFF (hex)
ꢀ Operand Specifications
Word addresses
Indirect DM addresses
Area
Constants
CF
Pulse bits
TR bits
CIO
---
WR
---
HR
---
AR
---
T
C
---
DM
---
@DM
---
*DM
---
N
S
---
OK
---
---
---
OK
OK
OK
OK
OK
OK
OK
OK
OK
Flags
Name
Label
Operation
Error Flag
P_ER
• ON if in BCD mode and S does not contain BCD data.
• OFF in all other cases.
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2 Instructions
Function
• When
the
timer
input
is
ON,
ON
OFF
Timer input
Timer PV
TTIM(087)/TTIMX(555) increments the PV.
When the timer input goes OFF, the timer
will stop incrementing the PV, but the PV will
retain its value. The PV will resume timing
when the timer input goes ON again. The
timer’s Completion Flag will be turned ON
when the PV reaches the SV.
SV
Timing resumes.
PV maintained.
0
ON
OFF
Completion
Flag
• The status of the timer’s PV and Completion
Flag will be maintained after the timer times
out. There are three ways to restart the
timer: the timer’s PV can be changed to a
non-zero value (by MOV(021), for example),
the reset input can be turned ON, or
CNR(545)/CNRX(547) can be executed.
Reset input
ON
OFF
2
• The setting range for the set value (SV) is 0
to 999.9 s for TTIM(087) and 0 to 6,553.5 s
for TTIMX(555).
• The timer accuracy is 0 to 0.01 s.
Hint
• Typical timers such as TIM/TIMX(550) are decrementing counters and the PV shows the time remain-
ing until the timer times out. The PV of TTIM(087)/TTIMX(555) shows how much time has elapsed,
so the PV can be used unchanged in many calculations and display outputs.
Precautions
• Timer numbers are shared with other timer instructions. If two timers share the same timer number,
but are not used simultaneously, a duplication error will be generated when the program is checked,
but the timers will operate normally. Timers which share the same timer number will not operate prop-
erly if they are used simultaneously.
• Timers will be reset or paused in the following cases. (When a TTIM(087)/TTIMX(555) timer is reset,
its PV is reset to 0 and its Completion Flag is turned OFF.)
Condition
PV
Completion Flag
Operating mode changed from RUN or MONITOR mode
0
0
OFF
*1
to PROGRAM mode or vice versa.
Power supply interrupted and reset
OFF
OFF
Execution of CNR(545)/CNRX(547), the RESET
BCD: 9999
*2
Binary: FFFF
TIMER/COUNTER instructions
Operation in interlocked program
section (IL(002)-ILC(003))
Retains previous
status.
Retains previous
status.
Operation in jumped program section
(JMP(004)-JME(005))
Retains previous
status.
Retains previous
status.
*1 If the IOM Hold Bit (A500.12) has been turned ON, the status of timer Completion Flags and PVs will be maintained when
the operating mode is changed.
*2 The PV will be set to the SV when TTIM(087)/TTIMX(555) is executed.
• When TTIM(087)/TTIMX(555) is in a program section between IL(002) and ILC(003) and the program
section is interlocked, the PV will retain its previous value (it will not be reset). Be sure to take this fact
into account when TTIM(087)/TTIMX(555) is programmed between IL(002) and ILC(003).
• When an operating TTIM(087)/TTIMX(555) timer is in a program section between JMP(004) and
JME(005) and the program section is jumped, the PV will retain its previous value. Be sure to take
this fact into account when TTIM(087)/TTIMX(555) is programmed between JMP(004) and
JME(005).
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2 Instructions
• When a TTIM(087)/TTIMX(555) timer is forced set, its Completion Flag will be turned ON and its PV
will be reset to 0. When a TTIM(087)/TTIMX(555) timer is forced reset, its Completion Flag will be
turned OFF and its PV will be reset to 0. The forced set and forced reset operations take priority over
the status of the timer and reset inputs.
• The timer’s PV is refreshed only when TTIM(087)/TTIMX(555) is executed, so the timer will not oper-
ate properly when the cycle time exceeds 100 ms because the timer increments in 100-ms units.
• The timer’s Completion Flag is refreshed only when TTIM(087)/TTIMX(555) is executed, so a delay of
up to one cycle may be required for the Completion Flag to be turned ON after the timer times out.
Sample program
When timer input CIO 0.00 is ON in the following example, the timer PV will begin counting up from 0.
Timer Completion Flag T0001 will be turned ON when the PV reaches the SV.
If the reset input is turned ON, the timer PV will be reset to 0 and the Completion Flag (T0001) will be
turned OFF. (Usually the reset input is turned ON to reset the timer and then the timer input is turned
ON to start timing.)
If the timer input is turned OFF before the SV is reached, the timer will stop timing but the PV will be
maintained. The timer will resume from its previous PV when the timer input is turned ON again.
0.00
0.00
TTIM
0001
TTIMX
0001
or
0.01
#0100
0.01
&0100
ON
OFF
ON
OFF
Timer input
0.00
#0100
#0100
Timer PV
T0001
Timing resumes.
PV maintained.
0
0
Timer Completion
Flag
T0001
ON
ON
OFF
OFF
ON
OFF
ON
OFF
Reset input
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2 Instructions
TIML/TIMLX
Function
code
Instruction
Mnemonic
Variations
Function
TIML
TIMLX
---
---
542
553
TIML(542)/TIMLX(553) operates a decrementing
timer with units of 0.1s.
LONG TIMER
TIML
TIMLX
BCD
Binary
TIML(542)
TIMLX(553)
Symbol
D1: Completion Flag
D1
D2
S
D1
D2
S
D1: Completion Flag
D2: PV word
2
D2: PV word
S: SV word
S: SV word
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
Not allowed
Usage
OK
Operands
Data type
Operand
Description
Size
TIML
TIMLX
UINT
D1
D2
S
Completion Flag
PV word
SV word
WORD
1
2
2
DWORD
DWORD
UDINT
UDINT
D1: Completion Flag
The PV and SV can range from #00000000
to #99999999 for TIML(542) and &00000000
to &4294967294 (decimal) or #00000000 to
#FFFFFFFF (hexadecimal) for TIMLX(553).
15
0
D1
Do not use.
Completion Flag
Note S, S+1, D2 and D2+1 must be in the same
data area.
D2: PV Word
D2+1
D2
D2
D2+1 is the leftmost 4 digits,
D2 is the rightmost 4 digits
S: SV Word
S+1
S
S
S+1 is the leftmost 4 digits,
S is the rightmost 4 digits
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
---
DM
@DM
*DM
D1,D2
S
---
---
OK
OK
OK
OK
OK
OK
OK
---
---
---
OK
OK
OK
Flags
Name
Label
Operation
Error Flag
P_ER
• ON if in BCD mode and D2 does not contained BCD data.
• ON if in BCD mode and S does not contained BCD data.
• OFF in all other cases.
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2 Instructions
Function
• When the timer input is OFF, the timer is
reset, i.e., the timer’s PV is reset to the SV
and its Completion Flag is turned OFF.
ON
OFF
Timer input
Timer PV
SV
• When the timer input goes from OFF to ON,
TIML(542)/TIMLX(553) starts decrementing
the PV in D2+1 and D2. The PV will con-
tinue timing down as long as the timer input
remains ON and the timer’s Completion
Flag will be turned ON when the PV
reaches 0.
0
ON
OFF
Completion Flag
(Bit 00 of D1)
• The status of the timer’s PV and Comple-
tion Flag will be maintained after the timer
times out. To restart the timer, the timer
input must be turned OFF and then ON
again or the timer’s PV must be changed to
a non-zero value (by MOV(021), for exam-
ple).
• TIML(542)/TIMLX(553) can time up to 115 days for TIML(542) and 4,971 days for TIMLX(553).
• The timer accuracy is 0 to 0.01 s.
Precautions
• Unlike most timers, TIML(542)/TIMLX(553) does not use a timer number. (Timer area PV refreshing
is not performed for TIML(542)/TIMLX(553).)
• Since the Completion Flag for TIML(542)/TIMLX(553) is in a data area it can be forced set or forced
reset like other bits, but the PV will not change.
• The timer’s PV is refreshed only when TIML(542)/TIMLX(553) is executed, so the timer will not oper-
ate properly when the cycle time exceeds 100 ms because the timer increments in 100-ms units.
• The timer’s Completion Flag is refreshed only when TIML(542)/TIMLX(553) is executed, so a delay of
up to one cycle may be required for the Completion Flag to be turned ON after the timer times out.
• When TIML(542)/TIMLX(553) is in a program section between IL(002) and ILC(003) and the program
section is interlocked, the PV will be reset to the SV and the Completion Flag will be turned OFF.
• When an operating TIML(542)/TIMLX(553) timer is in a program section between JMP(004) and
JME(005) and the program section is jumped, the PV will retain its previous value. Be sure to take
this fact into account when TIML(542)/TIMLX(553) is programmed between JMP(004) and JME(005).
• Be sure that the words specified for the Completion Flag and PV (D1, D2, and D2+1) are not used in
other instructions. If these words are affected by other instructions, the timer might not time out
properly.
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2 Instructions
Sample program
When timer input CIO 0.00 is ON in the following example, the timer PV (in D201 and D200) will be set
to the SV (in D101 and D100) and the PV will begin counting down. The timer Completion Flag (CIO
200.00) will be turned ON when the PV reaches 0.
When CIO 0.00 goes OFF, the timer PV will be reset to the SV and the Completion Flag will be turned
OFF.
0.00
ON
TIML
200
OFF
Timer input
Timer SV
D1
D2
S
S: D200 and up
S+1: Content of D201
1000.00
D100
D200
Timer PV
2
(D101 and D100)
0
ON
OFF
Timer Completion
Flag
(CIO 200.00)
15141312 1110 9
8
7
6
5
4
3
2
1
0
0
D1:200
Timer Completion
Flag
(CIO 0200.00)
15
Timer’s PV (LSB)
Timer’s PV (MSB)
D2:D100
D101
D201
#0010
D200
Timer SV:
(100,000 decimal= 10,000 s)
#0000
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2 Instructions
CNT/CNTX
Function
code
Instruction
Mnemonic
Variations
Function
CNT/CNTX(546) operates a decrementing
counter.
COUNTER
CNT/CNTX
---
546
CNT
CNTX
BCD
Binary
Count input
Count input
Symbol
CNTX(546)
CNT
N: Counter number
S: Set value
N
S
N
S
N: Counter number
S: Set value
Reset input
Reset input
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Data type
Operand
Description
Size
CNT
CNTX
N
S
Counter Number
Set Value
COUNTER
WORD
COUNTER
UINT
1
1
N: Counter Number
The counter number must be between 0000 and 0255 (decimal).
S: Set Value
CNT (BCD): #0000 to #9999
CNTX (Binary): &0 to &65535 (decimal) or #0000 to #FFFF (hex)
ꢀ Operand Specifications
Word addresses
Indirect DM addresses
Area
Constants
CF
Pulse bits
TR bits
CIO
---
WR
---
HR
---
AR
---
T
C
DM
---
@DM
---
*DM
---
N
S
---
---
---
---
OK
---
OK
OK
OK
OK
OK
OK
OK
OK
OK
OK
OK
Flags
Name
Label
Operation
Error Flag
P_ER
• ON if in BCD mode and S does not contain BCD data.
• OFF in all other cases.
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2 Instructions
Function
• The counter PV is decremented by 1 every
ON
time that the count input goes from OFF to
ON. The Completion Flag is turned ON
when the PV reaches 0.
Count input
OFF
ON
Reset input
Counter PV
OFF
• Once the Completion Flag is turned ON,
reset the counter by turning the reset input
ON or by using the CNR(545)/CNRX(547)
instruction. Otherwise, the counter cannot
be restarted.
SV
0
ON
Completion
Flag
• The counter is reset and the count input is
ignored when the reset input is ON. (When
a counter is reset, its PV is reset to the SV
and the Completion Flag is turned OFF.)
OFF
2
• The setting range 0 to 9,999 for CNT and 0 to 65,535 for CNTX(546).
Hint
• Counter PVs are retained even through a
power interruption. If you want to restart
counting from the SV instead of resuming
the count from the retained PV, add the
First Cycle Flag (A200.11) as a reset input
to the counter.
CNT
N
S
First Cycle Flag
(A200.11)
Note 1 In case CP1E CPU Unit is backed up in the capacitor and power remained OFF for a period in excess of
the following, the Counters PVs and Countup Flags are unfixed.
E-type CPU Unit
9 hours (60°C), 50 hours (25°C)
N/NA-type CPU Unit
7 hours (60°C), 40 hours (25°C)
2 By setting “Zero Clear Holding Memory” for the PLC Setup, the Counters PVs and Countup Flags will be
cleared each time power turns ON. In this case, the DM area (D) and Holding Area (H) will be cleared at
the same time.
3 N/NA-type CP1E CPU Unit (CP1E-N/NAꢀꢀDꢀ-ꢀ) can be equipped with a battery. With the battery
installed, the Counters PVs and Countup Flags can be retained during power OFF.
Precautions
• Counter numbers are shared by the CNT, CNTX(546), CNTR(012) and CNTRX(548) instructions. If
two counters share the same counter number but are not used simultaneously, a duplication error will
be generated when the program is checked but the counters will operate normally. Counters which
share the same counter number will not operate properly if they are used simultaneously.
• A counter’s PV is refreshed when the count input goes from OFF to ON and the Completion Flag is
refreshed each time that CNT/CNTX(546) is executed. The Completion Flag is turned ON if the PV is
0 and it is turned OFF if the PV is not 0.
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2 Instructions
• When a CNT/CNTX(546) counter is forced set, its Completion Flag will be turned ON and its PV will
be reset to 0000. When a CNT/CNTX(546) counter is forced reset, its Completion Flag will be turned
OFF and its PV will be set to the SV.
• Be sure to reset the counter by turning the reset input from OFF → ON → OFF before beginning
counting with the count input, as shown in the following diagram. The count input will not be received
if the reset input is ON.
ON
Reset input
OFF
ON
Count input
OFF
SV
Counter PV
0
ON
Completion
Flag
OFF
Ready to start
counting
• The reset input will take precedence and the counter will be reset if the reset input and count input
are both ON at the same time. (The PV will be reset to the SV and the Completion Flag will be turned
OFF.)
ON
Reset input
OFF
ON
Count input
OFF
SV
Counter PV
0
ON
Completion
Flag
OFF
Count input Reset input Count input
can be
takes
can be
received.
precedence. received.
• If online editing is used to add a counter, the counter must be reset before it will work properly. If the
counter is not reset, the previous value will be used as the counter’s present value (PV), and the
counter may not operate properly after it is written.
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2 Instructions
CNTR/CNTRX
Function
code
Instruction
Mnemonic
Variations
Function
CNTR
CNTRX
---
---
012
548
REVERSIBLE COUNTER
---
CNTR
CNTRX
BCD
Binary
Increment input
Decrement input
Increment input
Decrement input
CNTR(012)
N
CNTRX(548)
N
Symbol
2
N: Counter number
S: Set value
N: Counter number
S: Set value
Reset input
Reset input
S
S
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Data type
Operand
Description
Size
CNTR
CNTRX
COUNTER
UINT
N
S
Counter Number
Set Value
COUNTER
WORD
1
1
N: Counter Number
The counter number must be between 0000 and 0255(decimal).
S: Set Value
CNTR (BCD):#0000 to #9999
CNTRX (Binary): &0 to &65535 (decimal) or #0000 to #FFFF (hex)
ꢀ Operand Specifications
Word addresses
Indirect DM addresses
Area
Constants
CF
Pulse bits
TR bits
CIO
---
WR
---
HR
---
AR
---
T
C
DM
---
@DM
---
*DM
---
N
S
---
---
OK
---
---
---
OK
OK
OK
OK
OK
OK
OK
OK
OK
Flags
Name
Label
Operation
Error Flag
P_ER
• ON if in BCD mode and S does not contain BCD data.
• OFF in all other cases.
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2 Instructions
Function
The counter PV is incremented by 1 every
time that the increment input goes from OFF
to ON and it is decremented by 1 every time
that the decrement input goes from OFF to
ON. The PV can fluctuate between 0 and the
SV.
Increment input
Decrement input
When incrementing, the Completion Flag will
be turned ON when the PV is incremented
from the SV back to 0 and it will be turned
OFF again when the PV is incremented from
0 to 1.
Counter PV
Counter PV
0
0
SV
When decrementing, the Completion Flag will
be turned ON when the PV is decremented
from 0 up to the SV and it will be turned OFF
again when the PV is decremented from the
SV to SV-1.
+1
ON
Completion Flag
OFF
SV
-1
Counter PV
0
ON
Completion Flag
OFF
Precautions
• Counter numbers are shared by the CNT, CNTX(546), CNTR(012) and CNTRX(548) instructions. If
two counters share the same counter number but are not used simultaneously, a duplication error will
be generated when the program is checked but the counters will operate normally. Counters which
share the same counter number will not operate properly if they are used simultaneously.
• The PV will not be changed if the increment and decrement inputs both go from OFF to ON at the
same time. When the reset input is ON, the PV will be reset to 0 and both count inputs will be
ignored.
• The Completion Flag will be ON only when the PV has been incremented from the SV to 0 or decre-
mented from 0 to the SV; it will be OFF in all other cases.
• When inputting the CNTR(012)/CNTRX(548) instruction with mnemonics, first enter the increment
input (II), then the decrement input (DI), the reset input (R), and finally the CNTR(012)/CNTRX(548)
instruction. When entering with the ladder diagrams, first input the increment input (II), then the
CNTR(012)/CNTRX(548) instruction, the decrement input (DI), and finally the reset input (R).
Sample program
The counter PV is reset to 0 by turning the reset input (CIO 0.02) ON and OFF. The PV is incremented
by 1 each time that the increment input (CIO 0.00) goes from OFF to ON. When the PV is incremented
from the SV (3), it is automatically reset to 0 and the Completion Flag is turned ON.
Likewise, the PV is decremented by 1 each time that the decrement input (CIO 0.01) goes from OFF to
ON. When the PV is decremented from 0, it is automatically set to the SV (3) and the Completion Flag
is turned ON.
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2 Instructions
0.00
0.01
0.02
Increment input
CNTR
0001
Decrement
input
#0003
ON
Increment input
0.00
OFF
Reset input
ON
Decrement input
0.01
OFF
or
ON
Reset input
0.02
0.00
0.01
0.02
Increment input
CNTRX
0001
&3
OFF
Decrement
input
SV
3
2
Counter PV
C0001
0
Reset input
ON
Completion Flag
C0001
OFF
The add and subtract count inputs increase/decrease the count once when the signal rises (OFF to
ON). When both inputs turn ON at the same time, neither increases/decreases the count. When the
reset input turns ON, the PV changes to 0 and count input is not accepted.
In the following example, the SV for CNTR(012) 0007 is determined by the content of CIO 0001. When
the content of CIO 0001 is controlled by an external switch, the set value can be changed manually
from the switch.
0.00
0.01
0.02
Instruction
Operands
CNTR
0006
LD
LD
0.00
0.01
Fixed SV:
5000
#5000
LD
0.02
CNTR (012)
0006
#5000
200.07
0.03
LD
OUT
200.07
C0006
LD
0.04
0.05
LD
0.03
0.04
0.05
LD
0007
1
CNTR
0007
1
CNTR (012)
LD NOT
OUT
SV:
CIO 0001
C0007
200.08
200.08
C0007
4999 5000
0
1
2
Increment input
1
0
5000 4999
Decrement input
Completion Flag
Roll-over
Roll-over
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2 Instructions
CNR/CNRX
Function
code
Instruction
Mnemonic
Variations
@CNR
Function
CNR
545
547
Resets the timers or counters within the specified
range of timer or counter numbers.
RESET TIMER/COUNTER
CNRX
@CNRX
CNR
CNRX
BCD
Binary
CNR(545)
CNRX(547)
Symbol
N1: First number in range
N2: Last number in range
N1
N2
N1: First number in range
N2: Last number in range
N1
N2
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Data type
Operand
Description
Size
CNT
CNTX
*1
First number in range
Last number in range
N1
N2
Variable
Variable
TIMER/COUNTER
TIMER/COUNTER
*1
N1: First Number in Range
N1 must be a timer number between T000 and T255 or a counter number between C000 and C255.
N2: Last Number in Range
N2 must be a timer number between T000 and T255 or a counter number between C000 and C255.
ꢀ Operand Specifications
Word addresses
Indirect DM addresses
Area
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
N1,N2
---
---
---
---
OK
OK
---
---
---
---
---
---
---
Flags
Name
Label
Operation
Error Flag
P_ER
• ON if N1 and N2 are not in the same data area.
• OFF in all other cases.
Function
CNR(545)/CNRX(547) resets the Completion Flags of all timers or counters from N1 to N2. At the same
time, the PVs will all be set to the maximum value (9999 for BCD and FFFF for binary). (The PV will be
set to the SV the next time that the timer or counter instruction is executed.)
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2 Instructions
Precautions
• The timer/counter that is reset is as follows.
Instructions reset
HUNDRED-MS TIMER
Operation of CNR(545)
BCD
TIM:
The PV is set to its maximum value (9,999 BCD) and
the Completion Flag is turned OFF.
TIMH(015):
TMHH(540):
TTIM(087):
CNT:
TEN-MS TIMER
ONE-MS TIMER
ACCUMULATIVE TIMER
COUNTER
CNTR(012):
REVERSIBLE COUNTER
Instructions reset
Operation of CNRX(547)
Binary TIMX(550):
TIMHX(551):
HUNDRED-MS TIMER
TEN-MS TIMER
The PV is set to its maximum value (FFFF hex) and
the Completion Flag is turned OFF.
2
TMHHX(552):
TTIMX(555):
CNTX(546):
ONE-MS TIMER
ACCUMULATIVE TIMER
COUNTER
CNTRX(548):
REVERSIBLE COUNTER
• The CNR(545)/CNRX(547) instructions do not reset TIML(542) and TIMLX(553), because these tim-
ers do not use timer numbers.
• The CNR(545)/CNRX(547) instructions do not reset the timer/counter instructions themselves, they
reset the PVs and Completion Flags allocated to those instructions. In most cases, the effect of
CNR(545)/CNRX(547) is different from directly resetting the instructions. For example, when a
TIM/TIMX(550) instruction is reset directly its PV is set to the SV, but when that timer is reset by
CNR(545)/CNRX(547) its PV is set to the maximum value (9999 for BCD and FFFF for binary).
• When N1 and N2 are specified with N1>N2, only the Completion Flag for the timer/counter number
will be reset.
Sample program
0.00
CNR
T0002
T0005
When CIO 0.00 is ON in the following example,
the Completion Flags for timers T0002 to T0005
are turned OFF and the timers’ PVs are set to the
maximum value (9999 for BCD).
0.01
0.00
CNR
When CIO 0.01 is ON, the Completion Flags for
counters C0003 to C0007 are turned OFF and the
counters’ PVs are set to the maximum value
(9999 for BCD).
C0003
C0007
CNRX
T0002
T0005
When CIO 0.00 is ON in the following example,
the Completion Flags for timers T0002 to T0005
are turned OFF and the timers’ PVs are set to the
maximum value (FFFF for binary).
0.01
When CIO 0.01 is ON, the Completion Flags for
counters C0003 to C0007 are turned OFF and the
counters’ PVs are set to the maximum value
(FFFF for binary).
CNRX
C0003
C0007
T
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2 Instructions
Comparison Instructions
=, <>, <, <=, >, >=
Function
code
Instruction
Mnemonic
Variations
Function
Input comparison instructions compare two values
(constants and/or the contents of specified words)
and create an ON execution condition when the
=, <>, <, <=, >,
>=
Input Comparison Instructions
---
300 to 328 comparison condition is true.
Input comparison instructions are available to
compare signed or unsigned data of one-word or
double length data.
=, <>, <, <=, >, >=
AND connection
LD connection
OR connection
Symbol
S1: Comparison data 1
S2: Comparison data 2
S1: Comparison data 1
S2: Comparison data 2
S1: Comparison data 1
S2: Comparison data 2
Mnemonic
Mnemonic
Mnemonic
S1
S1
S1
S2
S2
S2
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Data type
Size
One-word Double length
Operand
Description
Unsigned
double length
Signed
double length
Unsigned
Signed
S1
S2
Comparison data 1
Comparison data 2
UINT
UINT
UDINT
UDINT
INT
INT
DINT
1
1
2
2
DINT
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
TR
bits
Constants
CF
Pulse bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
S1,S2
OK
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
Flags
Operation
Name
Label
Data length: one-word
OFF or unchanged
• ON if S > S with one-word data.
Data length: double length
OFF or unchanged
• ON if S +1, S > S +1, S with double-length data.
Error Flag
Greater Than Flag
P_ER
P_GT
1
2
1
1
2
2
• OFF in all other cases.
• ON if S ≥ S with one-word data.
• OFF in all other cases.
• ON if S +1, S ≥ S +1, S with double-length data.
Greater Than or Equal Flag
Equal Flag
P_GE
P_EQ
P_NE
1
2
1
1
2
2
• OFF in all other cases.
• ON if S = S with one-word data.
• OFF in all other cases.
• ON if S +1, S = S +1, S with double-length data.
1
2
1
1
2
2
• OFF in all other cases.
• ON if S ≠ S with one-word data.
• OFF in all other cases.
• ON if S +1, S ≠ S +1, S with double-length data.
Not Equal Flag
1
2
1
1
2
2
• OFF in all other cases.
• OFF in all other cases.
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2 Instructions
Operation
Name
Less Than Flag
Label
P_LT
Data length: one-word
• ON if S < S with one-word data.
Data length: double length
• ON if S +1, S < S +1, S with double-length data.
1
2
1
1
2
2
• OFF in all other cases.
• ON if S ≤ S with one-word data.
• OFF in all other cases.
• ON if S +1, S ≤ S +1, S with double-length data.
Less Than or Equal Flag
Negative Flag
P_LE
P_N
1
2
1
1
2
2
• OFF in all other cases.
• OFF in all other cases.
OFF or unchanged
OFF or unchanged
Function
i
The input comparison instruction compares S1
and S2 as signed or unsigned values and creates
an ON execution condition when the comparison
condition is true.
LD connection
ON execution condition when
comparison result is true.
<
2
S1
S2
The input comparison instructions are treated just
like the LD, AND, and OR instructions to control
the execution of subsequent instructions.
ON execution condition when
comparison result is true.
AND connection
Input type
Operation
<
LD
The instruction can be connected directly to the
left bus bar.
S1
S2
AND
OR
The instruction cannot be connected directly to the
left bus bar.
OR connection
The instruction can be connected directly to the
left bus bar.
<
S1
ON execution condition when
comparison result is true.
S2
ꢀ Options
The input comparison instructions can compare signed or unsigned data and they can compare one-
word or double values. If no options are specified, the comparison will be for one-word unsigned data.
With the three input types and two options, there are 72 different input comparison instructions.
Symbol
Option (data format)
None: Unsigned data
S: Signed data
Option (data length)
None: One-word data
L: Double-length data
=
(Equal)
< > (Not equal)
(Less than)
<= (Less than or equal)
(Greater than)
<
>
>= (Greater than or equal)
Function
Mnemonic
LD/AND/OR =
Name
Code
300
301
302
303
305
306
307
308
310
311
312
313
True if C1 = C2
True if C1 ≠ C2
True if C1 < C2
EQUAL
LD/AND/OR =L
LD/AND/OR =S
LD/AND/OR =SL
LD/AND/OR <>
LD/AND/OR <>L
LD/AND/OR <>S
LD/AND/OR <>SL
LD/AND/OR <
DOUBLE EQUAL
SIGNED EQUAL
DOUBLE SIGNED EQUAL
NOT EQUAL
DOUBLE NOT EQUAL
SIGNED NOT EQUAL
DOUBLE SIGNED NOT EQUAL
LESS THAN
LD/AND/OR <L
LD/AND/OR<S
LD/AND/OR <SL
DOUBLE LESS THAN
SIGNED LESS THAN
DOUBLE SIGNED LESS THAN
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2 Instructions
Function
Mnemonic
LD/AND/OR <=
LD/AND/OR<=L
LD/AND/OR <=S
LD/AND/OR <=SL
LD/AND/OR >
Name
Code
315
316
317
318
320
321
322
323
325
326
327
328
True if C1 ≤ C2
True if C1 > C2
True if C1 ≥ C2
LESS THAN OR EQUAL
DOUBLE LESS THAN OR EQUAL
SIGNED LESS THAN OR EQUAL
DOUBLE SIGNED LESS THAN OR EQUAL
GREATER THAN
LD/AND/OR >L
LD/AND/OR >S
LD/AND/OR >SL
LD/AND/OR >=
LD/AND/OR >=L
LD/AND/OR >=S
LD/AND/OR>=SL
DOUBLE GREATER THAN
SIGNED GREATER THAN
DOUBLE SIGNED GREATER THAN
GREATER THAN OR EQUAL
DOUBLE GREATER THAN OR EQUAL
SIGNED GREATER THAN OR EQUAL
DBL SIGNED GREATER THAN OR EQUAL
Unsigned input comparison instructions (i.e., instructions without the S option) can handle unsigned
binary or BCD data. Signed input comparison instructions (i.e., instructions with the S option) handle
signed binary data.
Hint
• Unlike instructions such as CMP(020) and CMPL(060), the result of an input comparison instruction
is reflected directly as an execution condition, so it is not necessary to access the result of the com-
parison through an Arithmetic Flag and the program is simpler and faster.
Precautions
• Input comparison instructions cannot be used as right-hand instructions, i.e., another instruction
must be used between them and the right bus bar.
Sample program
AND LESS THAN: AND<(310)
When CIO 0.00 is ON in the following example, the contents of D100 and D200 are compared in as
unsigned binary data. If the content of D100 is less than that of D200, CIO 100.00 is turned ON and
execution proceeds to the next line. If the content of D100 is not less than that of D200, the remainder
of the instruction line is skipped and execution moves to the next instruction line.
i
100.00
0.00
<
D100
D200
S1: D100
8714
S2: D200
3A1C
Decimal: 14,876
Unsigned
LESS THAN
Comparison
100.01
Decimal: 34,580
0.01
<S
34,580 > 14,876
(Will not proceed to next line.)
D110
D210
AND SIGNED LESS THAN: AND<S(312)
When CIO 0.01 is ON in the following example, the contents of D110 and D210 are compared as
signed binary data. If the content of D110 is less than that of D210, CIO 100.01 is turned ON and exe-
cution proceeds to the next line. If the content of D110 is not less than that of D210, the remainder of
the instruction line is skipped and execution moves to the next instruction line.
100.00
0.00
<
D100
D200
S1: D110
8714
S2: D210
3A1C
Decimal: 14,876
Signed
LESS THAN
Comparison
100.01
Decimal: −30,956
0.01
<S
−30,956 < 14,876
(Will proceed to next line.)
D110
D210
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2 Instructions
=DT, <>DT, <DT, <=DT, >DT, >=DT
Function
code
Instruction
Mnemonic
Variations
Function
=DT
<>DT
<DT
<=DT
>DT
>=DT
341
342
343
344
345
346
Time comparison instructions compare two BCD
time values and create an ON execution condition
when the comparison condition is true.
Time Comparison Instructions
---
=DT, <>DT, <DT, <=DT, >DT, >=DT
2
LD
AND
OR
Symbol
C
Symbol
Symbol
C
Symbol
C
C: Control word
C: Control word
C: Control word
S1: First word of present time
S1: First word of present time
S1: First word of present time
S1
S1
S1
S2: First word of comparison time
S2: First word of comparison time
S2: First word of comparison time
S2
S2
S2
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Operand
Description
Data type
WORD
Size
C
Control word
First word of present time
First word of comparison time
1
3
3
S1
S2
WORD
WORD
C: Control Word
Bits 00 to 05 of C specify whether or not the time data will be masked for the comparison. Bits 00 to 05
mask the seconds, minutes, hours, day, month, and year, respectively. If all 6 values are masked, the
instruction will not be executed, the execution condition will be OFF, and the Error Flag will be turned
ON.
i
15
0
8
7
0
6
0
5
4
3
2
1
0
0
0
0
0
0
0
0
C
Masks seconds data when ON.
Masks minutes data when ON.
Masks hours data when ON.
Masks day data when ON.
Masks month data when ON.
Masks year data when ON.
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2 Instructions
i
S through S +2: Present Time Data
S through S +2: Comparison Time Data
1
1
2
2
S
through S +2 contain the present time
S
through S +2 contain the comparison
1
1
2
2
data. S through S +2 must be in the same
time data. S through S +2 must be in the
1
1
2
2
data area.
same data area.
15
S1
8
7
0
15
S2
8
7
0
Seconds: 00 to 59 (BCD)
Seconds: 00 to 59 (BCD)
Minutes: 00 to 59 (BCD)
Minutes: 00 to 59 (BCD)
15
8
7
0
15
8
7
0
S1+1
S2+1
Hour: 00 to 23 (BCD)
Hour: 00 to 23 (BCD)
Day: 01 to 31 (BCD)
Day: 01 to 31 (BCD)
15
8
7
0
15
8
7
0
S1+2
S2+2
Month: 01 to 12 (BCD)
Month: 01 to 12 (BCD)
Year: 00 to 99 (BCD)
Year: 00 to 99 (BCD)
Note When using the CPU Unit’s internal clock
data for the comparison, set S1 to A351 to
specify the CPU Unit’s internal clock data
(A351 to A353).
Note The year value indicates the last two digits
of the year. Values 00 to 97 are interpreted
as 2000 to 2097. Values 98 and 99 are
interpreted as 1998 and 1999.
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
---
*DM
---
C
OK
---
OK
OK
OK
OK
OK
OK
OK
---
---
---
S1, S2
OK
OK
Flags
Name
Label
Operation
Error Flag
P_ER
• ON if all 6 of the mask bits (C bits 00 to 05) are ON.
• OFF in all other cases.
Greater Than Flag
P_GT
P_GE
P_EQ
P_NE
P_LT
• ON if S > S .
1
2
• OFF in all other cases.
• ON if S ≥ S .
Greater Than or Equal Flag
Equal Flag
1
2
• OFF in all other cases.
• ON if S = S .
1
2
• OFF in all other cases.
• ON if S ≠ S .
Not Equal Flag
1
2
• OFF in all other cases.
• ON if S < S .
Less Than Flag
1
2
• OFF in all other cases.
• ON if S ≤ S .
Less Than or Equal Flag
P_LE
1
2
• OFF in all other cases.
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2 Instructions
Function
The time comparison instruction compares the unmasked values (corresponding bit of C set to 0) of the
present time data in S to S +2 with the comparison time data in S to S +2 and creates an ON execu-
1
1
2
2
tion condition when the comparison condition is true. At the same time, the result of a time comparison
instruction is reflected in the arithmetic flags (=, <>, <, <=, >, >=).
The time comparison instructions are treated just like the LD, AND, and OR instructions to control the
execution of subsequent instructions.
There are 18 possible combinations of time comparison instructions.
Any time values that are masked in the control word (C) are not included in the comparison.
The following table shows the ON/OFF status of each flag for each comparison result.
Flag status
2
Result
=
<>
<
<=
>
>=
S
1
S
1
S
1
= S
> S
< S
ON
OFF
ON
OFF
OFF
ON
ON
OFF
ON
ON
2
2
2
OFF
OFF
OFF
ON
ON
ON
OFF
OFF
Comparison
S1
S2
Conditions Flags
(=, <>, <, <=, >, >=)
Result
ꢀ Masking Time Values
Time values can be masked individually and excluded from the comparison operation. To mask a time
value, set the corresponding bit in the control word (C) to 1. Bits 00 to 05 of C mask the seconds, min-
utes, hours, day, month, and year, respectively.
Example:
When C = 39 hex, the rightmost 6 bits are 111001 (year=1, month=1, day=1, hours=0, minutes=0, and
seconds=1) so only the hours and minutes are compared. This mask setting can be used to perform a
particular operation at a given time (hour and minute) each day.
Present time data
Comparison time data
15 08 07
15
08 07
00
Second (00 to
59, BCD)
00
Second (00 to
Minute (00 to
59, BCD)
Minute (00 to
59, BCD)
S1
S2
59, BCD)
Day of month Hour (00 to
(01 to 31, BCD) 23, BCD)
Day of month
(01 to 31, BCD) 23, BCD)
Hour (00 to
S1+1
S2+1
Year (00 to
99, BCD)
Month (01 to
12, BCD)
Year (00 to
99, BCD)
Month (01 to
12, BCD)
S1+2
S2+2
Compares only hours and
minutes data.
Year, month, day, and seconds
data is masked.
Hint
• Previous data comparison instructions compared data in 16-bit units. The time comparison instruc-
tions are limited to comparing 8-bit time values.
The following table shows the structure of the CPU Unit’s internal Calendar/Clock Area.
Addresses
A351.00 to A351.07
Contents
Second (00 to 59, BCD)
Minute (00 to 59, BCD)
Hour (00 to 23, BCD)
A351.08 to A351.15
A352.00 to A352.07
A352.08 to A352.15
A353.00 to A353.07
A353.08 to A353.15
Day of month (01 to 31, BCD)
Month (01 to 12, BCD)
Year (00 to 99, BCD)
• The Calendar/Clock Area can be set with a Programming Device (including a Programming Con-
sole), DATE(735) instruction, or “CLOCK WRITE” FINS command (0702 hex).
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2 Instructions
Precautions
• Time comparison instructions cannot be used as right-hand instructions, i.e., another instruction must
be used between them and the right bus bar.
• E-type CP1E CPU Unit (CP1E-Eꢀꢀꢀꢀ-ꢀ) does not have the clock function.
The clock data inside the CPU Unit is always 01-01-01 01:01:01.
Sample program
When CIO 0.00 is ON and the time is 13:00:00, CIO 100.00 is turned ON. The contents of A351 to
A353 (the CPU Unit’s internal calendar/clock data) are used as the present time data and the contents
of D100 to D102 are used as the comparison time data. The year, month, and day values are masked,
so only the hour, minute, and second data are compared.
100.00
0.00
=DT
D0
C
S1
S2
A352
D100
7
-
6
-
5
1
4
1
3
1
2
0
1
0
0
0
D0
D0 set to 0038 hex
Seconds compared.
Minutes compared.
Hours compared.
Day masked.
Month masked.
Year masked.
Shaded data is compared.
0
15
8
7
15
8
7
0
Minute
Day of month
Year
Second
Hour
00
-
00
13
-
A351
A352
A353
S2: D100
S2+1:D101
S2+2:D102
Month
-
Conditions Flags set as soon as
execution condition is turned ON.
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2 Instructions
CMP/CMPL
Function
code
Instruction
Mnemonic
Variations
Function
Compares two unsigned binary values (constants
and/or the contents of specified words) and out-
puts the result to the Arithmetic Flags in the Auxil-
iary Area.
COMPARE
CMP
!CMP
020
060
Compares two double unsigned binary values
(constants and/or the contents of specified words)
and outputs the result to the Arithmetic Flags in
the Auxiliary Area.
DOUBLE COMPARE
CMPL
---
2
CMP
CMPL
CMP(020)
CMPL(060)
Symbol
S1
S2
S1
S1: Comparison data 1
S2: Comparison data 2
S1: Comparison data 1
S2
S2: Comparison data 2
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Data type
Size
Operand
Description
CMP
CMPL
CMP
CMPL
CMP: Comparison data 1
CMPL: Comparison data 1, rightmost word address
S1
S2
UINT
UDINT
1
2
CMP: Comparison data 2
CMPL: Comparison data 2, rightmost word address
UINT
UDINT
1
2
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
S1, S2
OK
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
Flags
Operation
CX-Programmer
label
Name
CMP
CMPL
Error Flag
P_ER
P_GT
Unchanged
• ON if S > S .
Unchanged
• ON if S +1, S > S +1, S .
Greater Than Flag
1
2
1
1
2
2
• OFF in all other cases.
• ON if S ≥ S .
• OFF in all other cases.
• ON if S +1, S ≥ S +1, S .
Greater Than or Equal Flag
Equal Flag
P_GE
P_EQ
P_NE
P_LT
P_LE
P_N
1
2
1
1
2
2
• OFF in all other cases.
• ON if S = S .
• OFF in all other cases.
• ON if S +1, S = S +1, S .
1
2
1
1
2
2
• OFF in all other cases.
• ON if S ≠ S .
• OFF in all other cases.
• ON if S +1, S ≠ S +1, S .
Not Equal Flag
1
2
1
1
2
2
• OFF in all other cases.
• ON if S < S .
• OFF in all other cases.
• ON if S +1, S < S +1, S .
Less Than Flag
1
2
1
1
2
2
• OFF in all other cases.
• ON if S ≤ S .
• OFF in all other cases.
• ON if S +1, S ≤ S +1, S .
Less Than or Equal Flag
Negative Flag
1
2
1
1
2
2
• OFF in all other cases.
• OFF in all other cases.
Unchanged
Unchanged
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2 Instructions
ꢀ
The following table shows the status of the Arithmetic Flags after execution of CMP(020).
Flag status
CMP(020) Result
>
> =
=
< =
<
< >
S
S
S
> S
= S
< S
ON
ON
OFF
ON
OFF
ON
OFF
OFF
ON
ON
1
1
1
2
2
2
OFF
OFF
ON
OFF
ON
OFF
OFF
ON
*
A status of “---” indicates that the Flag may be ON or OFF.
Unsigned binary
comparison
S1
S2
Arithmetic Flags
(>, >=, =, <=, <, <>)
ꢀ
The following table shows the status of the Arithmetic Flags after execution of CMPL(060).
Flag status
CMPL(060) Result
>
> =
=
< =
<
< >
S
+1, S > S +1, S
2
ON
ON
OFF
ON
OFF
ON
OFF
OFF
ON
ON
1
1
2
S +1, S = S +1, S
2
OFF
OFF
ON
OFF
ON
1
1
2
S +1, S < S +1, S
2
OFF
OFF
ON
1
1
2
*
A status of “---” indicates that the Flag may be ON or OFF.
Unsigned binary
comparison
S1+1
S1
S2+1
S2
Arithmetic Flags
(>, >=, =, <=, <, <>)
Function
ꢀ CMP
CMP(020) compares the unsigned binary data in S and S and outputs the result to Arithmetic Flags
1
2
(the Greater Than, Greater Than or Equal, Equal, Less Than or Equal, Less Than, and Not Equal
Flags) in the Auxiliary Area.
ꢀ CMPL
CMPL(060) compares the unsigned binary data in S +1, S and S +1, S and outputs the result to
1
1
2
2
Arithmetic Flags (the Greater Than, Greater Than or Equal, Equal, Less Than or Equal, Less Than, and
Not Equal Flags) in the Auxiliary Area.
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2 Instructions
Precautions
• Using CMP(020)Results in the Program
When CMP(020)/CMPL(060) is executed, the result is reflected in the Arithmetic Flags. Control the
desired output or right-hand instruction with a branch from the same input condition that controls
CMP(020)/CMPL(060), as shown in the following diagram. In this case, the Equals Flag and output A
will be turned ON when S = S or S + 1, S = S + 1, S .
1
2
1
1
2
2
CMP
S1
S2
Arithmetic Flag
(Example: Equal Flag)
2
A
• Using CMP(020) Results in the Program
Do not program another instruction between CMP(020)/CMPL(060) and the instruction controlled by
the Arithmetic Flag because the other instruction might change the status of the Arithmetic Flag.
CMPL
S1
S2
Instruction B
A
Arithmetic Flag
(Example: Equal Flag)
In this case, the results of instruction B might
change the results of CMP(020).
• The immediate-refreshing variation (!CMP(020)) can be used with words allocated to CPU Unit built-
in inputs specified in S and/or S . When !CMP(020) is executed, input refreshing will be performed
1
2
for the external input word specified in S and/or S and that refreshed value will be compared.
1
2
Sample program
• When CIO 0.00 is ON in the following example, the eight-digit unsigned binary data in CIO 0011 and
CIO 0010 is compared to the eight-digit unsigned binary data in CIO 0009 and CIO 0008 and the
result is output to the Arithmetic Flags. The results recorded in the Greater Than, Equals, and Less
Than Flags are immediately saved to CIO 20.00 (Greater Than), CIO 20.01 (Equals), and CIO 20.02
(Less Than).
i
0.00
CMPL
10
S1+1=11CH
1 2 3 4
S1=10CH
5 6 7 8
Flag status
>
OFF (0)
OFF (0)
ON (1)
8
Comparison
Result
=
<
20.00
S2+1=9CH
A B C D
S2=8CH
E F 1 2
>
=
<
20.01
20.02
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2 Instructions
CPS/CPSL
Function
code
Instruction
Mnemonic
Variations
Function
Compares two signed binary values (constants
and/or the contents of specified words) and out-
puts the result to the Arithmetic Flags in the Auxil-
iary Area.
SIGNED BINARY COMPARE
CPS
!CPS
114
115
Compares two double signed binary values (con-
stants and/or the contents of specified words) and
outputs the result to the Arithmetic Flags in the
Auxiliary Area.
DOUBLE SIGNED BINARY
COMPARE
CPSL
---
CPS
CPSL
CPS(114)
CPSL(115)
Symbol
S1: Comparison data 1
S2: Comparison data 2
S1: Comparison data 1
S1
S1
S2
S2: Comparison data 2
S2
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Data type
Size
Operand
Description
CPS
CPSL
CPS
CPSL
CMP: Comparison data 1
CMPL: Comparison data 1, rightmost word address
S1
S2
INT
DINT
1
2
CMP: Comparison data 2
CMPL: Comparison data 2, rightmost word address
INT
DINT
1
2
ꢀ Operand Specifications
Word addresses
Indirect DM addresses
Pulse
bits
TR
bits
Area
Constants
OK
CF
CIO
WR
HR
AR
T
C
DM
@DM
*DM
S1, S2
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
Flags
Operation
Name
Label
CPS
CPSL
Error Flag
P_ER
P_GT
Unchanged
• ON if S > S .
OFF or unchanged
• ON if S +1, S > S +1, S .
Greater Than Flag
1
2
1
1
2
2
• OFF in all other cases.
• ON if S ≥ S .
• OFF in all other cases.
• ON if S +1, S ≥ S +1, S .
Greater Than or Equal Flag
Equal Flag
P_GE
P_EQ
P_NE
P_LT
P_LE
P_N
1
2
1
1
2
2
• OFF in all other cases.
• ON if S = S .
• OFF in all other cases.
• ON if S +1, S = S +1, S .
1
2
1
1
2
2
• OFF in all other cases.
• ON if S ≠ S .
• OFF in all other cases.
• ON if S +1, S ≠ S +1, S .
Not Equal Flag
1
2
1
1
2
2
• OFF in all other cases.
• ON if S < S .
• OFF in all other cases.
• ON if S +1, S < S +1, S .
Less Than Flag
1
2
1
1
2
2
• OFF in all other cases.
• ON if S ≤ S .
• OFF in all other cases.
• ON if S +1, S ≤ S +1, S .
Less Than or Equal Flag
Negative Flag
1
2
1
1
2
2
• OFF in all other cases.
• OFF in all other cases.
Unchanged
OFF or unchanged
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2 Instructions
ꢀ
The following table shows the status of the Arithmetic Flags after execution of CPS(114).
Flag status
Result
>
> =
=
< =
<
< >
S
1
S
1
S
1
> S
= S
< S
ON
ON
OFF
ON
OFF
ON
OFF
OFF
ON
ON
2
2
2
OFF
OFF
ON
OFF
ON
OFF
OFF
ON
*
A status of “---” indicates that the Flag may be ON or OFF.
Signed binary
comparison
S1
S2
Arithmetic Flags
(>, >=, =, <=, <, <>)
2
ꢀ
The following table shows the status of the Arithmetic Flags after execution of CPSL(115).
Flag status
Result
+1, S > S +1, S
>
> =
=
< =
<
< >
S
ON
ON
OFF
ON
OFF
ON
OFF
OFF
ON
ON
1
1
2
2
S +1, S = S +1, S
2
OFF
OFF
ON
OFF
ON
1
1
2
S +1, S < S +1, S
2
OFF
OFF
ON
1
1
2
*
A status of “---” indicates that the Flag may be ON or OFF.
Signed binary
comparison
S1+1
S1
S2+1
S2
Arithmetic Flags
(>, >=, =, <=, <, <>)
Function
ꢀ CPS
CPS(114) compares the signed binary data in S and S and outputs the result to Arithmetic Flags (the
1
2
Greater Than, Greater Than or Equal, Equal, Less Than or Equal, Less Than, and Not Equal Flags) in
the Auxiliary Area.
ꢀ CPSL
CPSL(115) compares the double signed binary data in S +1, S and S +1, S and outputs the result to
1
1
2
2
Arithmetic Flags (the Greater Than, Greater Than or Equal, Equal, Less Than or Equal, Less Than, and
Not Equal Flags) in the Auxiliary Area.
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2 Instructions
Precautions
• When CPS(114)/CPSL(115) is executed, the result is reflected in the Arithmetic Flags. Control the
desired output or right-hand instruction with a branch from the same input condition that controls
CPS(114)/CPSL(115), as shown in the following diagram.
CPS/CPSL
S1
S2
A
Arithmetic Flag
(Example: Equal Flag)
In this case, the Equals Flag and output A will be turned
ON when S = S or S +1, S = S +1, S .
1
2
1
1
2
2
• Do not program another instruction between CPS(114)/CPSL(115) and the instruction controlled by
the Arithmetic Flag because the other instruction might change the status of the Arithmetic Flag.
CPS/CPSL
S1
S2
Instruction B
A
Arithmetic Flag
(Example: Equal Flag)
In this case, the results of instruction B might
change the results of CPS(114)/CPSL(115).
• The immediate-refreshing variation (!CPS(114)/!CPSL(115)) can be used with words allocated to
CPU Unit built-in inputs specified in S and/or S . When !CPS(114)/!CPSL(115) is executed, input
1
2
refreshing will be performed for the external input word specified in S and/or S and that refreshed
1
2
value will be compared.
Sample program
When CIO 0.00 is ON in the following example, the eight-digit signed binary data in D2 and D1 is com-
pared to the eight-digit signed binary data in D6 and D5 and the result is output to the Arithmetic Flags.
• If the content of D2 and D1 is greater than that of D6 and D5, the Greater Than Flag will be turned
ON, causing CIO 20.00 to be turned ON.
• If the content of D2 and D1 is equal to that of D6 and D5, the Equals Flag will be turned ON, causing
CIO 20.01 to be turned ON.
• If the content of D2 and D1 is less than that of D6 and D5, the Less Than Flag will be turned ON,
causing CIO 20.02 to be turned ON.
i
D2
D1
Flag status
>
0.00
CPSL
D1
1234
5678
ON (1)
=
<
OFF (0)
OFF (0)
Comparison
Result
D5
D6
D5
20.00
ABCD
EF12
>
=
<
20.01
20.02
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2 Instructions
TCMP
Instruction
Function
code
Mnemonic
Variations
Function
Compares the source data to the contents of 16
consecutive words and turns ON the correspond-
ing bit in the result word when the contents of the
words are equal.
TABLE COMPARE
TCMP
@TCMP
085
TCMP
TCMP(085)
2
Symbol
S
T
S: Source data
T: First word of table
R: Result word
R
Applicable Program Areas
Area
Step program areas
Subroutines
Interrupt tasks
OK
Usage
OK
OK
Operands
Operand
Description
Data type
WORD
WORD
UINT
Size
1
S
T
Source data
First word of table
Result word
16
1
R
T: First word of table
R: Result word
15 14
1
0
T
T+1
to
Comparison data 0
Comparison data 1
to
R
Comparison result for S and T
Comparison result for S and T+1
Comparison data 15
T+15
Comparison result for S and T+14
Comparison result for S and T+15
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
S
OK
---
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
T, R
Flags
Name
Label
Operation
Error Flag
P_ER
P_EQ
OFF
• ON if the result word is 0000.
Equals Flag
(The two 16-word sets contain the same data.)
• OFF in all other cases.
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2 Instructions
Function
i
1: Data are equal.
0: Data aren’t equal.
R
TCMP(085) compares the source data (S) to each of
the 16 words T through T+15 and turns ON the corre-
sponding bit in word R when the data are equal. Bit n
of R is turned ON if the content of T+n is equal to S
and it is turned OFF if they are not equal.
Comparison
S
T
0
1
T+1
S is compared to the content of T and bit 00 of R is
turned ON if they are equal or OFF if they are not
equal, S is compared to the content of T+1 and bit 01
of R is turned ON if they are equal or OFF if they are
not equal, ..., and S is compared to the content of
T+14
T+15
14
15
T+15 and bit 15 of R is turned ON if they are equal or OFF if they are not equal.
Sample program
When CIO 0.00 is ON in the following example, TCMP(085) compares the content of D100 with the
contents of words D200 through D215 and turns ON the corresponding bits in D300 when the contents
are equal or OFF when the contents are not equal.
R: D300
Comparison
0.00
S: D100
0
3
A
1
T: D200
D201
D202
D203
D204
D205
D206
D207
D208
D209
D210
D211
D212
D213
D214
D215
0
0
0
0
0
0
1
5
9
D
0
1
5
9
D
0
2
0
1
3
0
2
2
6
A
E
3
2
6
A
E
3
A
0
1
0
0
1
0
1
4
8
C
0
1
4
8
C
0
1
0
0
0
1
0
0
0
0
0
0
1
0
0
0
0
1
0
TCMP
D100
D200
D300
1
S
T
2
2
A
0
3
D
4
A
3
5
6
7
7
B
F
A
3
8
9
10
11
12
13
14
15
7
B
F
A
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2 Instructions
BCMP
Instruction
Function
code
Mnemonic
Variations
Function
Compares the source data to 16 ranges (defined
by 16 lower limits and 16 upper limits) and turns
ON the corresponding bit in the result word when
the source data is within a range.
BLOCK COMPARE
BCMP
@BCMP
068
BCMP
BCMP(068)
2
Symbol
S
B
R
S: Source data
B: First word of block
R: Result word
Applicable Program Areas
Area
Step program areas
Subroutines
Interrupt tasks
OK
Usage
OK
OK
Operands
Operand
Description
Data type
WORD
WORD
UINT
Size
1
S
B
R
Source data
First word of block
Result word
32
1
B: First word of block
R: Result word
15 14
1
0
B
B+1
B+2
B+3
Lower limit value 0
Upper limit value 0
Lower limit value 1
Upper limit value 1
R
Comparison result for S and
range B ↔ B+1
Comparison result for S and
range B+2 ↔ B+3
Comparison result for S and
range B+28 ↔ B+29
B+30
B+31
Lower limit value 15
Upper limit value 15
Comparison result for S and
range B+30 ↔ B+31
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
S
B
D
OK
---
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
Flags
Name
Label
Operation
Error Flag
P_ER
P_EQ
OFF
• ON if the result word is 0000.
Equals Flag
(S is not within any of the 16 ranges.)
• OFF in all other cases.
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2 Instructions
Function
BCMP(068) compares the source data (S) to the 16 ranges defined by pairs of lower and upper limit
values in B through B+31. The first word in each pair (B+2n) provides the lower limit and the second
word (B+2n+1) provides the upper limit of range n (n = 0 to 15). If S is within any of these ranges (inclu-
sive of the upper and lower limits), the corresponding bit in R is turned ON. If S is out of any these
ranges, the corresponding bit in R is turned OFF.
For example, bit 00 of R is turned ON if S is
1 when inside the range
0 when outside of range
R
Inside the range?
within the first range (B ≤ S ≤ B+1), bit 01 of R is
turned ON if S is within the second range (B+2
≤ S ≤ B+3), ..., and bit 15 of R is turned ON if S
is within the fifteenth range (B+30 ≤ S ≤ B+31).
All other bits in R are turned OFF.
Lower limit value Upper limit value
B
B+1
B+3
0
1
Comparison
data
B+2
S
Note An error will not occur if the lower limit is
greater than the upper limit, but 0 (not
within the range) will be output to the cor-
responding bit of R.
B+28
B+30
B+29
B+31
14
15
Sample program
When CIO 0.00 is ON in the following example, BCMP(068) compares the content of D100 with the 16
ranges defined in D200 through D231 and turns ON the corresponding bits in D300 when S is within the
range or OFF when S is not within the range.
0.00
BCMP
D100
D200
D300
R: D300
to
to
to
to
to
to
to
to
to
to
to
to
to
to
to
to
S:D100
03A0
D200
D202
D204
D206
D208
D210
D212
D214
D216
D218
D220
D222
D224
D226
D228
D230
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
3
0
0
3
3
0
0
3
0
0
0
3
0
0
3
0
A
0
0
A
A
0
0
A
0
0
0
A
0
0
A
0
1
0
0
1
0
0
0
1
0
0
0
1
0
0
1
0
D201
D203
D205
D207
D209
D211
D213
D215
D217
D219
D221
D223
D225
D227
D229
D231
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
4
3
4
4
4
4
3
4
5
3
3
4
4
0
0
0
0
9
0
0
0
0
9
0
0
A
9
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
1
1
0
0
1
1
0
0
1
0
0
0
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
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2-104
2 Instructions
ZCP/ZCPL
Function
code
Instruction
Mnemonic
Variations
Function
Compares a 16-bit unsigned binary value (CD)
with the range defined by lower limit LL and upper
limit UL. The results are output to the Arithmetic
Flags.
AREA RANGE COMPARE
ZCP
---
088
116
Compares a 32-bit unsigned binary value (CD+1,
CD) with the range defined by lower limit (LL+1,
LL) and upper limit (UL+1, UL). The results are
output to the Arithmetic Flags.
DOUBLE AREA RANGE
COMPARE
ZCPL
---
2
ZCP
ZCPL
ZCP(088)
ZCPL(116)
Symbol
CD
LL
CD
CD: First word of Comparison Data
LL: First word of Lower Limit
UL: First word of Upper Limit
CD: Comparison Data
LL: Lower limit of range
UL: Upper limit of range
LL
UL
UL
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Data type
Size
Operand
Description
CMP
CMPL
CMP
CMPL
ZCP: Comparison data (one word of data)
ZCPL: Comparison data (two words of data)
ZCP: Low limit
CD
LL
UINT
UINT
UINT
UDINT
1
2
2
2
UDINT
UDINT
1
1
ZCPL: Low limit leftmost word number
ZCP: High limit
UL
ZCPL: High limit rightmost word number
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
---
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
CD, LL, UL
OK
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
Flags
Operation
Name
Label
ZCP
ZCPL
Error Flag
P_ER
ON if LL > UL.
ON if LL+1, LL > UL+1, UL.
Greater Than Flag
P_GT
• ON if CD > UL.
• ON if CD > UL+1, UL.
• OFF in all other cases.
• OFF in all other cases.
Greater Than or Equal Flag
Equal Flag
P_GE
P_EQ
Left unchanged.
Left unchanged.
• ON if LL ≤ CD ≤ UL.
• ON if LL+1, LL ≤ CD+1, CD ≤ UL+1, UL.
• OFF in all other cases.
• OFF in all other cases.
Not Equal Flag
Less Than Flag
P_NE
P_LT
Left unchanged.
Left unchanged.
• ON if CD < LL.
• ON if CD+1, CD < LL+1, LL.
• OFF in all other cases.
• OFF in all other cases.
Less Than or Equal Flag
Negative Flag
P_LE
P_N
Left unchanged.
Left unchanged.
Left unchanged.
Left unchanged.
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2 Instructions
Function
ꢀ ZCP
ZCP(088) compares the 16-bit signed binary data in CD with the range defined by LL and UL and out-
puts the result to the Greater Than, Equals, and Less Than Flags in the Auxiliary Area. (The Less Than
or Equal, Greater Than or Equal, and Not Equal Flags are left unchanged.)
When CD > UL as shown below, the > flag turns ON.
When LL ≤ CD ≤ UL, the = flag turns ON. When CD < LL, the < flag turns ON.
Flag status
ZCP(088)Result
>
=
<
CD > UL
ON
OFF
ON
OFF
ON
CD = UL
OFF
LL < CD < UL
CD = LL
CD < LL
OFF
ꢀ ZCPL
ZCPL(116) compares the 32-bit signed binary data in CD+1, CD with the range defined by LL+1, LL
and UL+1, UL and outputs the result to the Greater Than, Equals, and Less Than Flags in the Auxiliary
Area. (The Less Than or Equal, Greater Than or Equal, and Not Equal Flags are left unchanged.)
When CD+1,CD > UL+1,UL as shown below, the > flag turns ON.
When LL+1,LL ≤ CD+1, CD ≤ UL+1, UL, the = flag turns ON.
When CD+1, CD < LL+1, LL, the < flag turns ON.
Flag status
ZCPL(116)Result
>
=
<
CD+1, CD > UL+1, UL
CD+1, CD = UL+1, UL
ON
OFF
ON
OFF
OFF
LL+1, LL < CD+1, CD <
UL+1, UL
CD+1, CD = LL+1, LL
CD+1, CD < LL+1, LL
OFF
ON
Precautions
• When ZCP(088)/ZCPL(116) is executed, the result is reflected in the Arithmetic Flags. Control the
desired output or right-hand instruction with a branch from the same input condition that controls
ZCP(088)/ZCPL(116), as shown in the following diagram.
ZCP
CD
LL
UL
A
Arithmetic Flag
(Example: Equal Flag)
In this case, the Equals Flag and output A will be
turned ON when LL ≤ CD ≤ UL.
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2 Instructions
• Do not program another instruction between ZCP(088)/ZCPL(116) and the instruction controlled by
the Arithmetic Flag because the other instruction might change the status of the Arithmetic Flag.
ZCPL
CD
LL
UL
Instruction B
A
Arithmetic Flag
(Example: Equal Flag)
2
In this case, the results of instruction B
might change the results of ZCP(088)/ZCPL(116).
Sample program
• When CIO 0.00 is ON in the following example, the 16-bit unsigned binary data in D0 is compared to
the range 0005 to 001F hex (5 to 31 decimal) and the result is output to the Arithmetic Flags.
CIO 20.00 is turned ON if 0005 hex ≤ content of D0 ≤ 001F hex.
CIO 20.01 is turned ON if the content of D0 > 001F hex.
CIO 20.02 is turned ON if the content of D0 < 0005 hex.
0.00
ZCP
LL
CD
D0
UL
D0
CD
LL
Arithmetic Flags
#0005
#001F
=
>
<
ON(1)
ON(1)
ON(1)
0005Hex
≤
≤ 001FHex
UL
D0
D0
> 001FHex
20.00
=
0005Hex
>
20.01
20.02
>
<
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2-107
2 Instructions
Data Movement Instructions
MOV/MOVL/MVN
Function
code
Instruction
Mnemonic
Variations
Function
@MOV, !MOV,
!@MOV
MOVE
MOV
021
Transfers a word of data to the specified word.
Transfers two words of data to the specified words.
DOUBLE MOVE
MOVE NOT
MOVL
MVN
@MOVL
498
Transfers the complement of a word of data to the
specified word.
@MVN
022
MOV
MOVL
MOVL(498)
MOV(021)
S: First source word
S: Source
S
D
S
D
D: First destination
word
D: Destination
Symbol
MVN
MVN(022)
S: Source
S
D
D: Destination
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Data type
MOV / MVN
Size
Operand
Description
MOVL
MOV / MVN
MOVL
MOV / MVN: Source
MOVL: First source word
MOV / MVN: Destination
MOVL: First destination word
S
D
WORD
WORD
DWORD
1
1
2
DWORD
2
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
S
D
OK
---
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
Flags
Name
Label
Operation
Error Flag
Equal Flag
P_ER
OFF
P_EQ
• ON if the data being transferred (D) is 0.
• OFF in all other cases.
Negative Flag
P_N
• ON if the leftmost bit of the data being transferred (D) is 1.
• OFF in all other cases.
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2-108
2 Instructions
Function
ꢀ MOV
S
D
Transfers S to D. If S is a constant, the value
can be used for a data setting.
ꢀ MOVL
S+1
D+1
S
D
MOVL(498) transfers S+1 and S to D+1 and
D. If S+1 and S are constants, the value can
be used for a data setting.
2
ꢀ MVN
S
D
MVN(022) inverts the bits in S and transfers
the result to D. The content of S is left
unchanged.
Bit status
inverted.
1
0
0
1
Precautions
MOV(021) has an immediate refreshing variation (!MOV(021)). A CPU Unit Built-in input bits can be
specified for S and external output bits can be specified for D. Input bits used for S will refreshed just
before, and output bits used for D will be refreshed just after execution.
When CPU Unit Built-in input is specified for S, the value of S will be in-refreshed when the instruction
is executed and transferred to D. When external output is specified for D, the value of S will be trans-
ferred to D and immediately out-refreshed when the instruction is executed. It is also possible to in-
refresh S and out-refresh D at the same time.
Sample program
When CIO 0.00 is ON in the following example, the content of CIO 100 is copied to D100.
0.00
MOV
100
D100
100CH
D100
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2-109
2 Instructions
When CIO 0.00 is ON in the following example, the content of D101 and D100 are copied to D201 and
D200.
0.00
MOVL
D100
D200
D100
D101
D200
D201
0.01
0.02
0.03
MOV
#1234
D10
15
12 11
8 7
8 7
8 7
4 3
4 3
4 3
0
0
0
D10
D11
D12
1
0
F
2
4
3
D
2
4
2
E
(Hexadecimal 1234)
(Decimal 1234)
MOV
+1234
D11
15
15
12 11
12 11
MOV
-1234
D12
(Decimal -1234)
B
When CIO 0.00 is ON in the following example, the status of the bits in CIO 100 is inverted and the
result is copied to D100.
0.00
MVN
100
D100
1001
9
0010
2
0000
0
1101
D
100CH
D100
0110
6
1101
D
1111
F
0010
2
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2-110
2 Instructions
MOVB
Function
code
Instruction
Mnemonic
MOVB
Variations
@MOVB
Function
Transfers the specified bit.
MOVE BIT
082
MOVB
MOVB(082)
Symbol
S: Source word or data
C: Control word
S
C
D
2
D: Destination word
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Operand
Description
Data type
WORD
UINT
Size
S
C
D
Source word or data
Control word
Destination word
1
1
1
WORD
C: Control Word
15
8
7
0
C
m
n
Source bit: 00 to 0F
(0 to 15 decimal)
Destination bit: 00 to 0F
(0 to 15 decimal)
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
S, C
D
OK
---
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
Flags
Name
Label
Operation
Error Flag
P_ER
• ON if the rightmost and leftmost two digits of C are not within the specified range of 00 to 0F.
• OFF in all other cases.
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2-111
2 Instructions
Function
MOVB(082) copies the specified bit (n) from S
to the specified bit (m) in D.
C
m
n
n
S
D
m
Hint
The same word can be specified for both S and D to copy a bit within a word.
Precautions
The other bits in the destination word are left unchanged.
Sample program
th
th
When CIO 0.00 is ON in the following example, the 5 bit of the source word (W0) is copied to the 12
bit of the destination word (W100) in accordance with the control word’s value of 0C05.
0.00
MOVB
S
C
D
W0
D200
W100
15
8
7
0
C:D200
8
0C
05
1514
7
5
1
1
0
S:W0
1514 12
8
7
0
D:W100
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2-112
2 Instructions
MOVD
Function
code
Instruction
Mnemonic
MOVD
Variations
@MOVD
Function
Transfers the specified digit or digits.
(Each digit is made up of 4 bits.)
MOVE DIGIT
083
MOVB
MOVD(083)
Symbol
S: Source word or data
C: Control word
S
C
D
2
D: Destination word
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Operand
Description
Data type
WORD
UINT
Size
S
C
D
Source word or data
Control word
Destination word
1
1
1
UINT
S: Source Word
D: Destination Word
15
Digit 3
12 11
Digit 2
8
7
4 3
0
15
Digit 3
12 11
Digit 2
8
7
4 3
0
D
Digit 1
Digit 0
S
Digit 1
Digit 0
The destination digits are written from right to
left, wrapping back to the rightmost digit (digit
0) if necessary.
The source digits are read from right to left,
wrapping back to the rightmost digit (digit 0) if
necessary.
C: Control Word
15
12 11
8
7
4
3
0
C
0
n
m
First digit in S (m): 0 to 3
Number of digits (n): 0 to 3
0: 1 digit
First digit in D ( ): 0 to 3
1: 2 digits
2: 3 digits
3: 4 digits
Always 0.
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
S, C
D
OK
---
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
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2-113
2 Instructions
Flags
Name
Label
P_ER
Operation
Error Flag
• ON if one of the first three digits of C is not within the specified range of 0 to 3.
• OFF in all other cases.
Function
MOVB(082) copies the specified bit (n) from S
to the specified bit (m) in D. The other bits in
the destination word are left unchanged.
15
12 11
8 7
4 3
0
C
0
R
n
m
n
m
S
D
R
Precautions
If the number of digits being read or written exceeds the leftmost digit of S or D, MOVD(083) will wrap to
the rightmost digit of the same word.
Sample program
When CIO 0.00 is ON in the following example, four digits of data are copied from W0 to W100. The trans-
fer begins with the digit 1 of W0 and digit 0 of W100, in accordance with the control word’s value of 31.
0.00
MOVD
S
C
D
W0
D300
W100
15
12 11
8 7
4 3
0
C:D300
0
0
3
1
First digit in S: Digit 1
Digit no.
S: W0
3
1
2
2
1
3
0
15
12 11
12 11
8 7
4 3
0
4
Number of digits: 3 (4 digits)
First digit in D: Digit 0
Digit no.
15
3
4
2
1
1
2
0
3
8 7
4 3
0
D: W100
Note After reading the leftmost digit of S (digit 3), MOVD(083) wraps to the rightmost digit (digit 0).
ꢀ Example of transferring multiple digits
The following diagram shows examples of data transfers for various values of C.
C㧦211
C㧦30
C㧦312
C㧦230
S
D
S
D
S
D
S
D
Digit 0
Digit 1
Digit 2
Digit 3
Digit 0
Digit 1
Digit 2
Digit 3
Digit 0
Digit 1
Digit 2
Digit 3
Digit 0
Digit 1
Digit 2
Digit 3
Digit 0
Digit 1
Digit 2
Digit 3
Digit 0
Digit 1
Digit 2
Digit 3
Digit 0
Digit 1
Digit 2
Digit 3
Digit 0
Digit 1
Digit 2
Digit 3
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2-114
2 Instructions
XFRB
Function
code
Instruction
Mnemonic
XFRB
Variations
@XFRB
Function
Transfers the specified number of consecutive
bits.
MULTIPLE BIT TRANSFER
062
XFRB
XFRB(062)
Symbol
C
S
D
C: Control word
2
S: First source word
D: First destination word
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Operand
Description
Data type
UINT
Size
1
C
S
D
Control word
First source word
First destination word
WORD
WORD
Variable
Variable
C: Control Word
D: First destination Word
15
8
7
4
3
0
15
D
0
C
n
m
to
First bit in S ( ): 0 to F
(0 to 15)
First bit in D (m): 0 to F
(0 to 15)
D+16 max.
Number of bits (n):
00 to FF (0 to 255)
Note The source words and the destination words must be in the same data area respectively.
S: First Source Word
15
0
S
to
S+16 max.
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
C
OK
---
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
S, D
Flags
Name
Label
Operation
Error Flag
P_ER
OFF
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2-115
2 Instructions
Function
XFRB(062) transfers up to 255 consecutive
15
8 7
4 3
0
C
n
m
l
bits from the source words (beginning with bit
l of S) to the destination words (beginning with
bit m of D).
n
l
The beginning bits and number of bits are
specified in C, as shown in the following dia-
gram.
S
D
m
Hint
• Up to 255 bits of data can be transferred per execution of XFRB(062).
• It is possible for the source words and destination words to overlap. By transferring data overlapping
several words, the data can be packed more efficiently in the data area. (This is particularly useful
when handling position data for position control.)
• Since the source words and destination words can overlap, XFRB(062) can be combined with
ANDW(034) to shift m bits by n spaces.
Precautions
• Be sure that the source words and destination words do not exceed the end of the data area.
• When the number of transfer bits (n of C) is 0, transfer does not take place.
• Bits in the destination words that are not overwritten by the source bits are left unchanged.
Sample program
When CIO 0.00 is ON in the following example, the 20 bits beginning with W0.06 are copied to the 20
bits beginning with W100.
0.00
XFRB
C
S
D
D100
W0
15
8 7
4 3
0
C:D100
1
4
0
6
W100
20 bits
8 7 6 5 4 3 2 1 0
1514
15
S:W0
W1
0
D:W100
W101
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2-116
2 Instructions
XFER
Function
code
Instruction
Mnemonic
XFER
Variations
@XFER
Function
Transfers the specified number of consecutive
words.
BLOCK TRANSFER
070
XFER
XFER(070)
Symbol
N: Number of words
S: First source word
D: First destination word
N
S
D
2
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Operand
Description
Data type
UINT
Size
1
N
S
D
Number of words
First source word
First destination word
WORD
WORD
Variable
Variable
N: Number of Words
Specifies the number of words to be transferred. The possible range for N is 0000 to FFFF (0 to
65,535 decimal).
15
0
S
to
S+(N-1)
15
0
D
to
D+(N-1)
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
N
OK
---
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
S, D
Flags
Name
Label
Operation
Error Flag
P_ER
OFF
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2-117
2 Instructions
Function
XFER(070) copies N words beginning with S
(S to S+(N-1)) to the N words beginning with
D (D to D+(N-1)).
S
D
N words
S+(N-1)
D+(N-1)
Hint
• It is possible for the source words and desti-
nation words to overlap, so XFER(070) can
perform word-shift operations.
XFER
&10
D100
D109
D102
D100
D102
• The specified source and destination data
areas can overlap (word shift).
D111
Precautions
• Be sure that the source words (S to S+N-1) and destination words (D to D+N-1) do not exceed the
end of the data area.
• Some time will be required to complete XFER(070) when a large number of words is being trans-
ferred. Even if an interrupt occurs, execution of this instruction will not be interrupted and execution of
the interrupt task will be started after execution of XFER(070) has been completed. If power is inter-
rupted during execution of XFER(070), execution may not be completed, i.e., all of the specified data
may not be transferred.
XFER
&1000
D0
D1000
Sample Program
When CIO 0.00 is ON in the following example, the 10 words D100 through D109 are copied to D200
through D209.
0.00
XFER
&10
D100
D101
D102
D200
D201
D202
D100
D200
10
words
D109
D209
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2 Instructions
BSET
Function
code
Instruction
Mnemonic
BSET
Variations
@BSET
Function
Copies the same word to a range of consecutive
words.
BLOCK SET
071
BSET
BSET(071)
Symbol
S: Source word
St: Starting word
E: End word
S
St
E
2
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Operand
Description
Data type
WORD
Size
1
S
St
E
Source word
Starting word
End word
WORD
Variable
Variable
WORD
St: Starting Word
Specifies the first word in the destination range.
E: End Word
Specifies the last word in the destination range.
15
0
St
to
E
Note St and E must be in the same data area.
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
S
OK
---
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
St, E
Flags
Name
Label
Operation
Error Flag
P_ER
• ON if St is greater than E.
• OFF in all other cases.
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2-119
2 Instructions
Function
BSET(071) copies the same source word (S)
to all of the destination words in the range St
to E.
Destination words
St
Source word
S
E
Precautions
• Some time will be required to complete BSET(071) when a large number of words is being set. Even
if an interrupt occurs, execution of this instruction will not be interrupted and execution of the interrupt
task will be started after execution of BSET(071) has been completed. If power is interrupted during
execution of BSET(071), execution may not be completed, i.e., all of the specified words may not be
set. One BSET(071) instruction can be replaced with two BSET(071) instructions to help avoid this
problem.
BSET
#0000
D1000
D1499
BSET
#0000
D1000
D1999
BSET
#0000
D1500
D1999
Sample program
When CIO 0.00 is ON in the following example, the source data in D100 is copied to D200 through
D209.
0.00
BSET
S
St
E
D100
D200
D209
S：D100
1
2
3
4
St:D200
D201
D202
D203
D204
D205
D206
D207
D208
E:D209
1
1
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
2
2
3
3
3
3
3
3
3
3
3
3
4
4
4
4
4
4
4
4
4
4
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2-120
2 Instructions
XCHG
Function
code
Instruction
Mnemonic
XCHG
Variations
@XCHG
Function
Exchanges the contents of the two specified
words.
DATA EXCHANGE
073
XCHG
XCHG(073)
Symbol
E1: First exchange word
E1
E2
2
E2: Second exchange word
Applicable Program Areas
Area
Step program areas
Subroutines
Interrupt tasks
OK
Usage
OK
OK
Operands
Operand
Description
Data type
WORD
Size
E1
First exchange word
Second exchange word
1
1
E2
WORD
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
E1,E2
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
---
Flags
Name
Label
Operation
Error Flag
P_ER
Unchanged
Unchanged
Unchanged
Equals Flag
Negative Flag
P_EQ
P_N
Function
XCHG(073) exchanges the contents of E1 and E2.
E1
E2
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2 Instructions
Hint
To exchange
XFER(070) to transfer the words to a third set
of words (a buffer) as shown in this diagram.
3
or more words, use
E1
E2
1st XFER(070)
operation
Buffer
2nd XFER(070)
operation
3rd XFER(070)
operation
Sample program
When CIO 0.00 is ON in this example, the con-
tent of D100 is exchanged with the content of
D200.
0.00
XCHG
D100
D200
1
2
3
4
A
1
B
2
C
3
D
4
D100
D200
D200
A
B
C
D
D100
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2-122
2 Instructions
DIST
Function
code
Instruction
Mnemonic
Variations
Function
Transfers the source word to a destination word
calculated by adding an offset value to the base
address.
SINGLE WORD DISTRIBUTE
DIST
@DIST
080
DIST
DIST(080)
Symbol
S: Source word
S
2
Bs
Of
Bs: Destination base address
Of: Offset
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Operand
Description
Data type
WORD
WORD
UINT
Size
S
Source word
Destination base address
Offset
1
1
1
Bs
Of
Bs: Destination Base Address
15
0
Bs
Bs+Of
Of: Offset
The offset can be any value from 0000 to FFFF (0 to 65,535 decimal).
Note Bs and Bs+Of must be in the same data area.
ꢀ Operand Specifications
Word addresses
Indirect DM addresses
Area
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
S
OK
---
Bs
Of
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
OK
Flags
Name
Label
Operation
Error Flag
P_ER
OFF
Equals Flag
P_EQ
• ON if the source data is 0000.
• OFF in all other cases.
Negative Flag
P_N
• ON if the leftmost bit of the source data is 1.
• OFF in all other cases
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2-123
2 Instructions
Function
DIST(080) copies S to the destination word
calculated by adding Of to Bs.
n
S
Bs
Of
n
Bs+n
Hint
The same DIST(080) instruction can be used to distribute the source word to various words in the data
area by changing the value of Of.
Precautions
Be sure that the offset does not exceed the end of the data area, i.e., Bs and Bs+Of are in the same
data area.
Sample program
When CIO 0.00 is ON in this example, the contents of D100 will be copied to D210 (D200 + 10) if the
contents of D300 is 10 (0A hexadecimal). The contents of D100 can be copied to other words by chang-
ing the offset in D300.
0.00
S:D100
DIST
Copied by DIST(080).
D100
D200
D300
S
Bs
Of
Of:
D300
0 0 0 A
Bs:D200
D201
4-digit hexadecimal
Offset +10 words
D210
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2 Instructions
COLL
Function
code
Instruction
Mnemonic
Variations
Function
Transfers the source word (calculated by adding
an offset value to the base address) to the desti-
nation word.
DATA COLLECT
COLL
@COLL
081
COLL
COLL(081)
Symbol
Bs: Source base address
Of: Offset
Bs
Of
D
2
D: Destination word
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Operand
Description
Data type
WORD
Size
Bs
Of
D
Source base address
Offset
Destination word
1
1
1
WORD
WORD
Bs: Source Base Address
15
0
Bs
Bs+Of
Of: Offset
The offset can be any value from 0000 to FFFF (0 to 65,535 decimal).
Note Bs and Bs+Of must be in the same data area.
ꢀ Operand Specifications
Word addresses
Indirect DM addresses
Area
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
Bs
Of
D
---
OK
---
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
Flags
Name
Label
Operation
Error Flag
P_ER
OFF
Equals Flag
P_EQ
• ON if the source data is 0000.
• OFF in all other cases.
Negative Flag
P_N
• ON if the leftmost bit of the source data is 1.
• OFF in all other cases
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2 Instructions
Function
COLL(081) copies the source word (calculated
by adding Of to Bs) to the destination word.
Bs
Of
n
n
Bs+n
D
Hint
The same COLL(081) instruction can be used to collect data from various source words in the data
area by changing the value of Of.
Precautions
Be sure that the offset does not exceed the end of the data area, i.e., Bs and Bs+Of are in the same
data area.
Sample program
When CIO 0.00 is ON in the following example, the contents of D110 (D100 + 10) will be copied to
D300 if the content of D200 is 10 (0A hexadecimal). The contents of other words can be copied to D300
by changing the offset in D200.
D200
0
0
0
A
0.00
Bs:D100
D101
COLL
D100
D200
D300
4-digit hexadecimal
Bs
Of
D
Offset +10 words
D110
Copied by COLL(081).
D300
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2 Instructions
Data Shift Instructions
SFT
Function
code
Instruction
Mnemonic
SFT
Variations
Function
Operates a shift register.
SHIFT REGISTER
---
010
2
SFT
Data input
Shift input
Reset input
SFT(010)
Symbol
St
E
St: Starting word
E: End word
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Operand
Description
Data type
UINT
Size
St
E
Starting word
End word
Variable
Variable
UINT
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
St,E
OK
OK
OK
---
---
---
---
---
---
---
---
---
---
Flags
Name
Label
Operation
Error Flag
P_ER
OFF
Function
• When the execution condition on the shift input changes from OFF to ON, all the data from St to E is
shifted to the left by one bit (from the rightmost bit to the leftmost bit), and the ON/OFF status of the
data input is placed in the rightmost bit.
E
St+1, St+2, ...
St
Lost
Status of data input
for each shift input
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2 Instructions
Precautions
• Do not use more than one SFT(010) instructions with overlapping shift words. The results will not be
dependable.
• St and E must be in the same data area.
• The bit data shifted out of the shift register is discarded.
• When the reset input turns ON, all bits in the shift register from the rightmost designated word (St) to
the leftmost designated word (E) will be reset (i.e., set to 0). The reset input takes priority over other
inputs.
• St must be less than or equal to E, but even when St is set to greater than E an error will not occur
and one word of data in St will be shifted.
Sample program
ꢀ Shift Register Exceeding 16 Bits
The following example shows a 48-bit shift register using words CIO 128 to CIO 130. A 1-s clock pulse
is used so that the execution condition produced by CIO 0.05 is shifted into a 3-word register between
CIO 128.00 and CIO 130.15 every second.
0.05
Data input
SFT
E: 130CH
St+1: 129CH
St: 128CH
Contents of
0.05
1s (1-s clock)
0.06
128
130
Lost
1514
1 0 1514
1 0 1514
1 0
Shift input
Reset
i
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2 Instructions
SFTR
Function
code
Instruction
Mnemonic
SFTR
Variations
@SFTR
Function
REVERSIBLE SHIFT REGIS-
TER
Creates a shift register that shifts data to either the
right or the left.
084
SFTR
SFTR(084)
Symbol
C
St
E
C: Control word
2
St: Starting word
E: End word
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Operand
Description
Data type
UINT
Size
1
C
St
E
Control word
Starting word
End word
UINT
Variable
Variable
UINT
C: Control Word
15
14
13
12
Shift direction
1 (ON): Left
0 (OFF): Right
Data input
Shift input
Reset
Note St and E must be in the same data area.
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
C,St,E
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
---
Flags
Name
Label
Operation
Error Flag
Carry Flag
P_ER
• ON when St is greater than E.
• OFF in all other cases.
P_CY
• ON when 1 is shifted into it.
• OFF when 0 is shifted into it.
• OFF when reset is set to 1.
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2 Instructions
Function
When the execution condition of
the shift input bit (bit 14 of C)
changes to ON, all the data from
St to E is moved in the designated
shift direction (designated by bit
12 of C) by 1 bit, and the ON/OFF
status of the data input is placed
in the rightmost or leftmost bit.
The bit data shifted out of the shift
register is placed in the Carry
Flag (CY)
15141312
C
E
E
St
St
CY 15
0
0
15
15
0
0
15
15
0
Data input
Data input
Shift direction
15
0 CY
Note • The above shift operations are applicable when the reset bit (bit 15 of C) is set to OFF.
• When reset (bit 15 of C) turns ON all bits in the shift register, from St to E will be reset (i.e., set to 0).
Sample program
• Shifting Data
If shift input W0.14 goes ON when CIO 0.00 is ON, and the reset bit W0.15 is OFF, words CIO 100
through CIO 102 will shift one bit in the direction designated by W0.12 (e.g., 1: Right) and the contents
of input bit W0.13 will be shifted into the rightmost bit, CIO 100.00. The contents of CIO 102.15 will be
shifted to the Carry Flag (CY).
0.00
SFTR
C
St
E
W0
100
102
15 141312
C㧦W0 0 1
0
1
Shift direction
Shift input bit:
Reset input bit:
1
0
CY
15
0
Data input:
W0.13
102
101
100
• Resetting Data
If W0.14 is ON when CIO 0.00 is ON, and the reset bit, W0.15, is ON, words CIO 100 through CIO 102
and the Carry Flag will be reset to OFF.
ꢀ Controlling Data
Resetting Data
All bits from St to E and the Carry Flag are set to 0 and
no other data can be received when the reset input bit
(bit 15 of C) is ON.
15
0
0
CY
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
When the shift input bit (bit 14 of C) is ON, the contents
of the input bit (bit 13 of C) is shifted to bit 00 of the start-
ing word, and each bit thereafter is shifted one bit to the
left. The status of bit 15 of the end word is shifted to the
Carry Flag.
Shifting Data Left (from Rightmost to Leftmost Bit)
Data
input
CY 15
0
1/0
When the shift input bit (bit 14 of C) is ON, the contents
of the input bit (bit 13 of C) (I/O) is shifted to bit 15 on the
end word, and each bit thereafter is shifted one bit to the
right. The status of bit 00 of the starting word is shifted to
the Carry Flag.
Shifting Data Right (from Leftmost to Rightmost Bit)
Data
input
15
0
CY
1/0
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2 Instructions
WSFT
Function
code
Instruction
Mnemonic
WSFT
Variations
@WSFT
Function
WORD SHIFT
016
Shifts data between St and E in word units.
WSFT
WSFT(016)
S
St
E
S: Source word
St: Starting word
E: End word
Symbol
2
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Operand
Description
Data type
WORD
UINT
Size
1
S
St
E
Control word
Starting word
End word
Variable
Variable
UINT
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
S
OK
---
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
St,E
Flags
Name
Label
Operation
Error Flag
P_ER
• ON when St is greater than E.
• OFF in all other cases.
Function
WSFT(016) shifts data from St to
E in word units and the data from
the source word S is places into
St. The contents of E is lost.
E
St
15
S
0
0
15
0
15
0
15
Lost
Precautions
• St and E must be in the same data area.
• When large amounts of data are shifted, the instruction execution time is quite long. Be sure that the
power is not cut while WSFT(016) is being executed, causing the shift operation to stop halfway
through.
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2 Instructions
Sample program
When CIO 0.00 is ON, data from CIO 100 through CIO 102 will be shifted one word toward E. The con-
tents of W0 will be stored in CIO 100 and the contents of CIO 102 will be lost.
i
0.00
WSFT
S
St
E
W0
100
102
St: W0
E: CIO 100
St: CIO 101
St: CIO 102
Lost
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2 Instructions
ASL
Function
code
Instruction
Mnemonic
ASL
Variations
@ASL
Function
Shifts the contents of Wd one bit to the left.
ARITHMETIC SHIFT LEFT
025
ASL
Symbol
ASL(025)
Wd
Wd: Word
2
Applicable Program Areas
Area
Step program areas
Subroutines
Interrupt tasks
OK
Usage
OK
OK
Operands
Operand
Description
Data type
UINT
Size
Wd
Word
1
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
Wd
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
---
Flags
Name
Label
Operation
Error Flag
P_ER
OFF
Equals Flag
P_EQ
P_CY
P_N
• ON when the shift result is 0.
• OFF in all other cases.
Carry Flag
• ON when 1 is shifted into the Carry Flag (CY).
• OFF in all other cases.
Negative Flag
• ON when the leftmost bit is 1 as a result of the shift.
• OFF in all other cases.
Function
ASL(025) shifts the contents of Wd one bit to
the left (from rightmost bit to leftmost bit). “0”
is placed in the rightmost bit and the data
from the leftmost bit is shifted into the Carry
Flag (CY).
15
15
0
0
0
CY
Sample program
When CIO 0.00 is ON, CIO 100 will be
shifted one bit to the left. “0” will be placed in
CIO 100.00 and the contents of CIO 100.15
will be shifted to the Carry Flag (CY).
0.00
ASL
100
Wd
Wd: 100CH
15
0
1
0
0
1
1
0
0
0
0
0
0
1
0
0
0
1
1
0
0
0
0
0
0
1
1
0
CY
1
0
0
1
0
0
0
0
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2 Instructions
ASR
Function
code
Instruction
Mnemonic
ASR
Variations
@ASL
Function
ARITHMETIC SHIFT RIGHT
026
Shifts the contents of Wd one bit to the right.
ASR
Symbol
ASR(026)
Wd
Wd: Word
Applicable Program Areas
Area
Step program areas
Subroutines
Interrupt tasks
OK
Usage
OK
OK
Operands
Operand
Description
Data type
UINT
Size
Wd
Word
1
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
Wd
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
---
Flags
Name
Label
Operation
Error Flag
P_ER
OFF
Equals Flag
P_EQ
P_CY
P_N
• ON when the shift result is 0.
• OFF in all other cases.
Carry Flag
• ON when 1 is shifted into the Carry Flag (CY).
• OFF in all other cases.
Negative Flag
OFF
Function
ASR(026) shifts the contents of Wd
one bit to the right (from leftmost bit to
rightmost bit). “0” will be placed in the
leftmost bit and the contents of the
rightmost bit will be shifted into the
Carry Flag (CY).
15
0
0
CY
Sample program
When CIO 0.00 is ON, word CIO 100 will
shift one bit to the right. “0” will be placed in
CIO 100.15 and the contents of CIO 100.00
will be shifted to the Carry Flag (CY).
0.00
ASR
100
Wd
Wd: 100CH
15
0
1
0
0
0
1
0
0
1
0
0
0
1
0
0
0
0
1
0
0
1
0
0
0
0
1
0
CY
1
0
1
0
0
1
0
0
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2 Instructions
ROL
Function
code
Instruction
Mnemonic
Variations
Function
Shifts all Wd bits one bit to the left
including the Carry Flag (CY).
ROTATE LEFT
ROL
@ROL
027
ROL
Symbol
ROL(027)
Wd
Wd: Word
2
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Operand
Description
Data type
UINT
Size
Wd
Word
1
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
Wd
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
---
Flags
Name
Label
Operation
Error Flag
P_ER
OFF
Equals Flag
P_EQ
P_CY
P_N
• ON when the shift result is 0.
• OFF in all other cases.
Carry Flag
• ON when 1 is shifted into the Carry Flag (CY).
• OFF in all other cases.
Negative Flag
• ON when the leftmost bit is 1 as a result of the shift.
• OFF in all other cases.
Function
ROL(027) shifts all bits of Wd including the
Carry Flag (CY) to the left (from rightmost bit
to leftmost bit).
CY 1514
1
0
Hint
It is possible to set the Carry Flag contents to 1 or 0 immediately before executing this instruction, by
using the Set Carry (STC(040)) or Clear Carry (CLC(041)) instructions.
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2 Instructions
Sample program
When CIO 0.00 is ON, word CIO 100 and the
0.00
Carry Flag (CY) will shift one bit to the left.
The contents of CIO 100.15 will be shifted to
the Carry Flag (CY) and the Carry Flag con-
tents will be shifted to CIO 100.00.
ROL
100
Wd
Wd: CIO 100
CY 1514
1
0
0
1
0
1
0
0
1
1
0
0
0
0
0
1
0
0
0
1
0
0
Instruction executed once
0
CY 15
1
0
0
0
1
0
0
0
1
0
0
0
1
0
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2 Instructions
ROR
Function
code
Instruction
Mnemonic
ROR
Variations
@ROR
Function
Shifts all Wd bits one bit to the right
including the Carry Flag (CY).
ROTATE RIGHT
028
ROR
Symbol
ROR(028)
Wd
Wd: Word
2
Applicable Program Areas
Area
Step program areas
Subroutines
Interrupt tasks
OK
Usage
OK
OK
Operands
Operand
Description
Data type
UINT
Size
Wd
Word
1
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
Wd
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
---
Flags
Name
Label
Operation
Error Flag
P_ER
OFF
Equals Flag
P_EQ
P_CY
P_N
• ON when the shift result is 0.
• OFF in all other cases.
Carry Flag
• ON when 1 is shifted into the Carry Flag (CY).
• OFF in all other cases.
Negative Flag
• ON when the leftmost bit is 1 as a result of the shift.
• OFF in all other cases.
Function
ROR(028) shifts all bits of Wd including the
Carry Flag (CY) to the right (from leftmost bit
to rightmost bit).
1514
1
0
CY
Wd
Hint
It is possible to set the Carry Flag contents to 1 or 0 immediately before executing this instruction, by
using the Set Carry (STC(040)) or Clear Carry (CLC(041)) instructions.
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2 Instructions
Sample program
When CIO 0.00 is ON, word CIO 100
0.00
and the Carry Flag (CY) will shift one bit
to the right. The contents of CIO 100.00
will be shifted to the Carry Flag (CY) and
the Carry Flag contents will be shifted to
CIO 100.15.
ROR
100
Wd
Wd: CIO 100
1514
1
0
0
1
CY
0
1
0
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
Instruction executed once
15
0
0
CY
1
0
1
0
0
1
0
0
1
0
0
1
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2 Instructions
SLD/SRD
Function
code
Instruction
Mnemonic
Variations
Function
ONE DIGIT SHIFT LEFT
ONE DIGIT SHIFT RIGHT
SLD
SRD
@SLD
@SRD
074
075
Shifts data by one digit (4 bits) to the left.
Shifts data by one digit (4 bits) to the right.
SLD
SRD
SRD(075)
SLD(074)
Symbol
St
E
St
E
St: Starting Word
St: Starting Word
E: End word
2
E: End word
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Operand
Description
Data type
UINT
Size
St
E
Starting Word
End Word
Variable
Variable
UINT
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
---
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
St,E
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
Flags
Name
Label
Operation
Error Flag
P_ER
• ON when St is greater than E.
• OFF in all other cases.
Function
ꢀ SLD
SLD(074) shifts data between St and E by one digit (4 bits) to the left. “0” is placed in the rightmost digit
(bits 3 to 0 of St), and the content of the leftmost digit (bits 15 to 12 of E) is lost.
ꢀ SRD
SRD(075) shifts data between St and E by one digit (4 bits) to the right. “0” is placed in the leftmost digit
(bits 15 to 12 of E), and the content of the rightmost digit (bits 3 to 0 of St) is lost.
Precautions
• St and E must be in the same data
ꢀSLD
area.
E
S
t
0Hex
• When large amounts of data are
shifted, the instruction execution
time is quite long. Be sure that the
power is not cut while SLD(074) and
SRD(075) is being executed, caus-
ing the shift operation to stop half-
way through.
Lost
ꢀSRD
0Hex
E
S
t
Lost
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2 Instructions
Sample program
ꢀ SLD
When CIO 0.00 is ON, words CIO 100 through CIO 102 will shift by one digit (4 bits) to the left. A zero
will be placed in bits 0 to 3 of word CIO 100 and the contents of bits 12 to 15 of CIO 102 will be lost.
0.00
SLD
St
E
100
102
E: CIO 102
St+1: CIO 101
St: CIO 100
0Hex
15 12 11 8 7 4 3 0 15 12 11 8 7 4 3 0
15 12 11 8 7 4 3 0
Lost
ꢀ SRD
When CIO 0.00 is ON, words CIO 100 through CIO 102 will shift by one digit (4 bits) to the right. A zero
will be placed in bits 12 to 15 of CIO 102 and the contents of bits 0 to 3 of word CIO 100 will be lost.
0.00
SRD
St
E
100
102
E: CIO 102
St+1: CIO 101
St: CIO 100
0Hex
15 12 11 8 7 4 3 0 15 12 11 8 7 4 3 0
15 12 11 8 7 4 3 0
Lost
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2 Instructions
NASL/NSLL
Function
code
Instruction
Mnemonic
Variations
@NASL
Function
Shifts the specified 16 bits of word data to the left by the
specified number of bits.
SHIFT N-BITS LEFT
NASL
580
582
Shifts the specified 32 bits of word data to the left by the
specified number of bits.
DOUBLE SHIFT N-BITS LEFT NSLL
@NSLL
NASL
NSLL
NASL(580)
NSLL(582)
2
Symbol
D
C
D
C
D: Shift word
D: Shift word
C: Control word
C: Control word
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Data type
Size
Operand
Description
NASL
UINT
UINT
NSLL
UDINT
UDINT
NASL
NSLL
D
C
Shift Word
Control word
1
1
2
1
C: Control word
ꢀ NASL
ꢀ NSLL
15 12 11
15
12 11
8
7
0
8 7
0
C
C
0
0
No. of bits to shift: 00 to 10 Hex
No. of bits to shift: 00 to 20 Hex
Always 0.
Always 0.
Data shifted into register
0 Hex: 0 shifted in
8 Hex: Contents of rightmost bit shifted in
Data shifted into register
0 Hex: 0 shifted in
8 Hex: Contents of rightmost bit shifted in
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
OK
OK
WR
OK
OK
HR
OK
OK
AR
OK
OK
T
C
DM
OK
OK
@DM
OK
*DM
OK
D
C
OK
OK
OK
OK
---
---
---
---
---
---
---
OK
OK
OK
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2-141
2 Instructions
Flags
Name
Label
P_ER
Operation
Error Flag
• ON when the control word C (the number of bits to shift) is not within range.
• OFF in all other cases.
Equals Flag
Carry Flag
P_EQ
P_CY
P_N
• ON when the shift result is 0.
• OFF in all other cases.
• ON when 1 is shifted into the Carry Flag (CY).
• OFF in all other cases.
Negative Flag
• ON when the leftmost bit is 1 as a result of the shift.
• OFF in all other cases.
Function
ꢀ NASL
NASL(580) shifts D (the shift word) by the specified number of binary bits (specified in C) to the left
(from the rightmost bit to the leftmost bit). Either zeros or the value of the rightmost bit will be placed
into the specified number of bits of the shift word starting from the rightmost bit.
15
12 11
8 7
4 3
0
C
0
Shift n-bits
a
D
D
Contents of “a” or “0” shifted in
a
CY
Lost
N bits
ꢀ NSLL
NSLL(582) shifts D and D+1 (the shift words) by the specified number of binary bits (specified in C) to
the left (from the rightmost bit to the leftmost bit). Either zeros or the value of the rightmost bit will be
placed into the specified number of bits of the shift word starting from the rightmost bit.
15
C
11 8 7 4 3
0
0
12
Shift n-bits
D+1
D
a
Contents of “a”
or “0” shifted in
a
CY
Lost
N bits
Precautions
• For any bits which are shifted outside the specified word, the contents of the last bit is shifted to the
Carry Flag (CY), and all other data is lost.
• When the number of bits to shift (specified in C) is “0,” the data will not be shifted. The appropriate
flags will turn ON and OFF, however, according to data in the specified word.
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2 Instructions
Sample program
When CIO 0.00 is ON, The contents of CIO 100 is shifted 10 bits to the left (from the rightmost bit to the
leftmost bit). The number of bits to shift is specified in bits 0 to 7 of word W0 (control data). The con-
tents of bit 0 of CIO 100 is copied into bits from which data was shifted and the contents of the right-
most bit which was shifted out of range is shifted into the Carry Flag (CY). All other data is lost.
0.00
NASL
100
W0
D
C
15
12 11
8
7
4
3
0
2
C
8
0
0
A
No. of bits to shift: 10 bits (0A Hex)
Always 0.
Data shifted into register
8 Hex: Contents of right-most bit shifted in
Lost
Rightmost bit
15
8
7
1
6
1
5
0
0
1
100
0
1
0
0
1
CY
1
1514131211 10 9
8
1
4
1
3
1
2
1
0
100 0
0
1
0
0
1
1
1
1
1 1
No. of bits to shift: 10 bits
(Contents of the rightmost
bit is inserted.)
When CIO 0.00 is ON, CIO 100 and CIO 101 will be shifted to the left (from the rightmost bit to the left-
most bit) by 10 bits. The number of bits to shift is specified in bits 0 to 7 of W0 (control data). The con-
tents of bit 0 of CIO 100 is copied into bits from which data was shifted and the contents of the
rightmost bit which was shifted out of range is shifted into the Carry Flag (CY). All other data is lost.
0.00
NSLL
D
C
100
W0
15
12 11
8
7
4
3
0
C
8
0
0
A
No. of bits to shift: 10 bits (0A Hex)
Always 0.
Data shifted into register
8 Hex: Contents of right-most bit shifted in
Lost
Rightmost bit a
15
15
8
7
1
0
1
15
8
0
7
0
6
1
5
0
0
1
101
1
1
0
0
0
0
1
1
0
0
0
100 1
0
0
0
1
1
0
0
0
0
1
0
1
1
1
0
1
0
9
1
8 7
CY
1
0
15
10 9 8 7
0
101 0
0
1
0
0
1
0
0
0 1
100 0
1
1
1
1
1
1
1 1
No. of bits to shift: 10 bits
(Contents of the rightmost
bit is shifted in)
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2 Instructions
NASR/NSRL
Function
code
Instruction
Mnemonic
NASR
NSRL
Variations
@NASR
Function
Shifts the specified 16 bits of word data to the right by
the specified number of bits.
SHIFT N-BITS RIGHT
581
583
DOUBLE SHIFT N-BITS
RIGHT
Shifts the specified 32 bits of word data to the right by
the specified number of bits.
@NSRL
NASR
NSRL
NSRL(583)
NASR(581)
Symbol
D
C
D: Shift word
D
C
D: Shift word
C: Control word
C: Control word
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Data type
Size
Operand
Description
NASR
UINT
UINT
NSRL
UDINT
UDINT
NASR
NSRL
D
C
Shift Word
Control word
1
1
2
1
C: Control word
ꢀ NASR
ꢀ NSRL
15
12 11
8
7
0
15
12 11
8
7
0
C
C
0
0
No. of bits to shift: 00 to 10 Hex
No. of bits to shift: 00 to 20 Hex
Always 0.
Always 0.
Data shifted into register
0 Hex: 0 shifted in
8 Hex: Contents of rightmost bit shifted in
Data shifted into register
0 Hex: 0 shifted in
8 Hex: Contents of rightmost bit shifted in
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
D
C
---
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
OK
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2 Instructions
Flags
Name
Label
P_ER
Operation
Error Flag
• ON when the control word C (the number of bits to shift) is not within range.
• OFF in all other cases.
Equals Flag
Carry Flag
Negative Flag
P_EQ
P_CY
P_N
• ON when the shift result is 0.
• OFF in all other cases.
• ON when 1 is shifted into the Carry Flag (CY).
• OFF in all other cases.
• ON when the leftmost bit is 1 as a result of the shift.
• OFF in all other cases.
Function
ꢀ NASR
2
NASR(581) shifts D (the shift word) by the specified number of binary bits (specified in C) to the right
(from the rightmost bit to the leftmost bit). Either zeros or the value of the rightmost bit will be placed
into the specified number of bits of the shift word starting from the rightmost bit.
a
D
Contents of “a” or
“0” shifted in
a
CY
Lost
D
N bits
ꢀ NSRL
NSRL(583) shifts D and D+1 (the shift words) by the specified number of binary bits (specified in C) to
the right (from the leftmost bit to the rightmost bit). Either zeros or the value of the rightmost bit will be
placed into the specified number of bits of the shift word starting from the rightmost bit.
15 12 11 8 7 4 3
0
C
0
Shift n-bits
D+1
D
a
Contents of “a” or
“0” shifted in
a
CY
Lost
Precautions
• For any bits which are shifted outside the specified word, the contents of the last bit is shifted to the
Carry Flag (CY), and all other data is discarded.
• When the number of bits to shift (specified in C) is “0,” the data will not be shifted. The appropriate
flags will turn ON and OFF, however, according to data in the specified word.
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2 Instructions
Sample program
• When CIO 0.00 is ON, CIO 100 will be shifted 10 bits to the right (from the leftmost bit to the right-
most bit). The number of bits to shift is specified in bits 0 to 7 of W0. The contents of bit 15 of CIO 100
is copied into the bits from which data was shifted and the contents of the leftmost bit of data which
was shifted out of range, is shifted into the Carry Flag (CY). All other data is lost.
.
0.00
NASR
D
C
100
W0
15
12 11
8
7
4
3
0
C
8
0
0
A
No. of bits to shift: 10 bits (0A Hex)
Always 0.
Data shifted into register
8 Hex: Contents of leftmost bit shifted in
Leftmost bit
9
Lost
15
8
7
0
100 1
0
0
1
0
0 1
15 14 13 12 11 10
9
1
8
1
4
3
0
2
1
1
0
0
0
CY
1
100 1
1
1
1
1
1
1 1
1
0
No. of bits to shift: 10 bits
(Contents of the leftmost
bit is inserted.)
When CIO 0.00 is ON, CIO 100 and CIO 101 will be shifted 10 bits to the right (from the leftmost bit to
the rightmost bit). The number of bits to shift is specified in bits 0 to 7 of W0 (control data). The contents
of bit 15 of CIO will be copied into the bits from which data was shifted and the contents of the leftmost
bit of data which was shifted out of range will be shifted into the Carry Flag (CY). All other data is lost.
0.00
NSRL
D
C
100
W0
15
12 11
8
7
4
3
0
C
8
0
0
A
No. of bits to shift: 10 bits (0A Hex)
Always 0.
Data shifted into register
8 Hex: Contents of leftmost bit shifted in
Lost
Leftmost bit
15
8
1
7
0
0
1
15
9
8
0
7
0
101 1
0
1
0
1
1
0
0
0
0
6
0
1
1
0
0
0
0
1
0
0
100 0
0
1
0
0
1
0
0
0
0 1
15
8 7
0
0
15
6
0
0
1
1
1
1
1
1
1 1
100 0
1
0
0 1
0
0
0
1
0
1
101
CY
No. of bits to shift: 10 bits
(Contents of the leftmost
bit is inserted.)
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2 Instructions
Increment/Decrement Instructions
++/++L
Function
code
Instruction
Mnemonic
Variations
@++
@++L
Function
Increments the 4-digit hexadecimal content of the
specified word by 1.
INCREMENT BINARY
++
++L
590
DOUBLE INCREMENT
BINARY
Increments the 8-digit hexadecimal content of the
specified words by 1.
591
2
++
+ +L
Symbol
++L(591)
++(590)
Wd
Wd: First word
Wd
Wd: Word
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Data type
Size
Operand
Description
++
++L
++
++L
++: Word
++L: First word
Wd
UINT
UDINT
1
2
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
Wd
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
---
Flags
Name
Label
Operation
Error Flag
P_ER
OFF
Equals Flag
P_EQ
P_CY
P_N
• ON if the result is 0000/0000 0000 after execution.
• OFF in all other cases.
Carry Flag
• ON if a digit in Wd/Wd+1 or Wd went from F to 0 during execution.
• OFF in all other cases.
Negative Flag
• ON if bit 15 of Wd/Wd+1 is ON after execution.
• OFF in all other cases.
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2 Instructions
Function
ꢀ ++
Wd
+1
Wd
The ++(590) instruction adds 1 to the binary content
of Wd. The specified word will be incremented by 1
every cycle as long as the execution condition of
++(590) is ON. When the up-differentiated variation
of this instruction (@++(590)) is used, the specified
word is incremented only when the execution condi-
tion has gone from OFF to ON.
ꢀ ++L
The ++L(591) instruction adds 1 to the 8-digit hexa-
decimal content of Wd+1 and Wd. The content of the
specified words will be incremented by 1 every cycle
as long as the execution condition of ++L(591) is
ON. When the up-differentiated variation of this
instruction (@++L(591)) is used, the content of the
specified words is incremented only when the execu-
tion condition has gone from OFF to ON.
Wd+1
Wd
+1
Wd+1
Wd
Sample program
ꢀ Operation of ++(590)/++L(591)
In the following example, the content of D100 will be incremented by 1 every cycle as long as CIO 0.00
is ON.
0.00
++
Incremented every cycle
while CIO 0.00 is ON.
D100
Wd: D100
0 0 1 9 +1
Wd: D100
0 0 1 A
In the following example, the content of D100 will be incremented by 1 every cycle as long as CIO 0.00
is ON.
Incremented every cycle
while CIO 0.00 is ON.
0.00
++L
D100
Wd+1: D101
0 0 0 0
Wd: D100
F F F F
Wd+1: D101
0 0 0 1
Wd: D100
0 0 0 0
+1
: Execution of ++(590) or ++L(591)
0.00
Increment
Increment
Increment Increment
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2 Instructions
ꢀ Operation of @++(590)/@++L(591)
The up-differentiated variation is used in the following example, so the content of D100 will be incre-
mented by 1 only when CIO 0.00 has gone from OFF to ON.
0.00
++
@
Incremented every cycle
while CIO 0.00 is ON.
D100
Wd: D100
Wd: D100
0 0 1 A
+
0 0 1 9
1
The up-differentiated variation is used in the following example, so the content of D101 and D100 will be
incremented by 1 only when CIO 0.00 has gone from OFF to ON.
Incremented only for
up-differentiation.
2
0.00
@++L
D100
Wd+1: D101
0 0 0 0
Wd: D100
F F F F
Wd+1: D101
0 0 0 1
Wd: D100
0 0 0 0
+1
: Execution of @++(590) or @++L(591)
0.00
Increment
Increment
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2 Instructions
--/--L
Function
code
Instruction
Mnemonic
Variations
@--
@--L
Function
Decrements the 4-digit hexadecimal content of the
specified word by 1.
DECREMENT BINARY
--
592
593
DOUBLE DECREMENT
BINARY
Decrements the 8-digit hexadecimal content of the
specified words by 1.
--L
--
--L
Symbol
--(592)
Wd
--L(593)
Wd: Word
Wd: First word
Wd
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Data type
Size
Operand
Description
--
--L
--
--L
--: Word
--L: First word
Wd
UINT
UDINT
1
2
ꢀ Operand Specifications
Word addresses
Indirect DM addresses
Pulse
bits
TR
bits
Area
Constants
---
CF
CIO
WR
HR
AR
T
C
DM
@DM
*DM
Wd
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
Flags
Name
Label
Operation
Error Flag
P_ER
P_EQ
OFF
Equals Flag
• ON if the result is 0000/0000 0000 after execution.
• OFF in all other cases.
Carry Flag
P_CY
P_N
• ON if a digit in Wd/Wd+1 or Wd went from 0 to F during execution.
• OFF in all other cases.
Negative Flag
• ON if bit 15 of Wd/Wd+1 is ON after execution.
• OFF in all other cases.
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2 Instructions
Function
ꢀ --
Wd
-1
Wd
The --(592) instruction subtracts 1 from the binary
content of Wd. The specified word will be decre-
mented by 1 every cycle as long as the execution
condition of --(592) is ON. When the up-differenti-
ated variation of this instruction (@ --(592)) is used,
the specified word is decremented only when the
execution condition has gone from OFF to ON.
ꢀ --L
Wd+1
Wd
-1
Wd+1
Wd
The --L(593) instruction subtracts 1 from the 8-digit
hexadecimal content of Wd+1 and Wd. The content
of the specified words will be decremented by 1
every cycle as long as the execution condition of --
L(593) is ON. When the up-differentiated variation of
this instruction (@--L(593)) is used, the content of
the specified words is decremented only when the
execution condition has gone from OFF to ON.
2
Sample program
ꢀ Operation of --(592)/--L(593)
The up-differentiated variation is used in the following example, so the content of D100 will be decre-
mented by 1 only when CIO 0.00 has gone from OFF to ON.
0.00
--
Decremented every cycle
while CIO 0.00 is ON.
D100
Wd: D100
0 0 2 0 -1
Wd: D100
0 0 1 F
In the following example, the 8-digit hexadecimal content of D101 and D100 will be decremented by 1
every cycle as long as CIO 0.00 is ON.
Decremented every cycle
while CIO 0.00 is ON.
0.00
--L
D100
Wd+1: D101
0 0 0 1
Wd: D100
0 0 0 0
Wd+1: D101
0 0 0 0
Wd: D100
F F F F
-1
: Execution of --L(593)
0.00
Decrement
Decrement
Decrement Decrement
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2 Instructions
ꢀ Operation of @--(592)/@--L(593)
In the following example, the content of D100 will be decremented by 1 every cycle as long as CIO 0.00
is ON.
0.00
@−−
Decremented every cycle
while CIO 0.00 is ON.
D100
Wd: D100
0 0 2 0 −1
Wd: D100
0 0 1 F
The up-differentiated variation is used in the following example, so the content of D101 and D100 will be
decremented by 1 only when CIO 0.00 has gone from OFF to ON.
Decremented only for
up-differentiation.
0.00
@− −L
D100
Wd+1: D101
0 0 0 1
Wd: D100
0 0 0 0
Wd+1: D101
0 0 0 0
Wd: D100
F F F F
−1
: Execution of @--L(593)
0.00
Decrement
Decrement
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2 Instructions
++B/++BL
Function
code
Instruction
Mnemonic
Variations
@++B
@++BL
Function
Increments the 4-digit BCD content of the speci-
fied word by 1.
INCREMENT BCD
++B
594
595
Increments the 8-digit BCD content of the speci-
fied words by 1.
DOUBLE INCREMENT BCD
++BL
++B
+ +BL
Symbol
++B(594)
Wd
++BL(595)
2
Wd: Word
Wd: First word
Wd
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Data type
Size
Operand
Description
++
WORD
++L
++
++L
++B: Word
++BL: First word
Wd
DWORD
1
2
ꢀ Operand Specifications
Word addresses
Indirect DM addresses
Pulse
bits
TR
bits
Area
Constants
---
CF
CIO
WR
HR
AR
T
C
DM
@DM
*DM
Wd
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
Flags
Name
Label
Operation
Error Flag
Equals Flag
Carry Flag
P_ER
P_EQ
P_CY
• ON if the content of Wd/Wd+1 and Wd is not BCD.
• OFF in all other cases.
• ON if the result is 0000/0000 0000 after execution.
• OFF in all other cases.
• ON if a digit in Wd/Wd+1 or Wd went from 9 to 0 during execution.
• OFF in all other cases.
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2 Instructions
Function
ꢀ ++B
Wd
Wd
+1
The ++B(594) instruction adds 1 to the BCD content
of Wd. The specified word will be incremented by 1
every cycle as long as the execution condition of
++B(594) is ON. When the up-differentiated variation
of this instruction (@++B(594)) is used, the specified
word is incremented only when the execution condi-
tion has gone from OFF to ON.
ꢀ ++BL
Wd+1
Wd
+1
Wd+1
Wd
The ++BL(595) instruction adds 1 to the 8-digit BCD
content of Wd+1 and Wd. The content of the speci-
fied words will be incremented by 1 every cycle as
long as the execution condition of ++BL(595) is ON.
When the up-differentiated variation of this instruc-
tion (@++BL(595)) is used, the content of the speci-
fied words is incremented only when the execution
condition has gone from OFF to ON.
Sample program
ꢀ Operation of ++B(594)/++BL(595)
In the following example, the BCD content of D100 will be incremented by 1 every cycle as long as CIO
0.00 is ON.
0.00
++B
Incremented every cycle
while CIO 0.00 is ON.
D100
Wd: D100
0 0 1 9 +1
Wd: D100
0 0 2 0
In the following example, the 8-digit BCD content of D101 and D100 will be incremented by 1 every
cycle as long as CIO 0.00 is ON.
Incremented every cycle
while CIO 0.00 is ON.
0.00
++BL
D100
Wd+1: D101
0 0 0 0
Wd: D100
9 9 9 9
Wd+1: D101
0 0 0 1
Wd: D100
0 0 0 0
+1
: Execution of ++B(594) / ++BL(595)
0.00
Increment
Increment
Increment Increment
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2 Instructions
ꢀ Operation of @++B(594)/@++BL(595)
The up-differentiated variation is used in the following example, so the content of D100 will be incre-
mented by 1 only when CIO 0.00 has gone from OFF to ON.
0.00
++B
@
Incremented only for
up-differentiation.
D100
Wd: D100
0 0 1 9 +1
Wd: D100
0 0 2 0
The up-differentiated variation is used in the following example, so the BCD content of D101 and D100
will be incremented by 1 only when CIO 0.00 has gone from OFF to ON.
2
Incremented only for
up-differentiation.
0.00
@++BL
D100
Wd+1: D101
0 0 0 0
Wd: D100
9 9 9 9
Wd+1: D101
0 0 0 1
Wd: D100
0 0 0 0
+1
: Execution of @++B(594) or @++BL(595)
0.00
Increment
Increment
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2 Instructions
--B/--BL
Function
code
Instruction
Mnemonic
Variations
@--B
@--BL
Function
Decrements the 4-digit BCD content of the speci-
fied word by 1.
DECREMENT BCD
--B
--BL
596
597
Decrements the 8-digit BCD content of the speci-
fied words by 1.
DOUBLE DECREMENT BCD
--B
--BL
Symbol
--B(596)
Wd
--BL(597)
Wd: Word
Wd: First word
Wd
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Data type
Size
Operand
Description
--
--L
--
--L
--B: Word
--BL: First word
Wd
WORD
DWORD
1
2
ꢀ Operand Specifications
Word addresses
Indirect DM addresses
Pulse
bits
TR
bits
Area
Constants
---
CF
CIO
WR
HR
AR
T
C
DM
@DM
*DM
Wd
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
Flags
Name
Label
Operation
Error Flag
Equals Flag
Carry Flag
P_ER
P_EQ
P_CY
• ON if the content of Wd/Wd+1 and Wd is not BCD.
• OFF in all other cases.
• ON if the result is 0000/0000 0000 after execution.
• OFF in all other cases.
• ON if a digit in Wd/Wd+1 or Wd went from 0 to 9 during execution.
• OFF in all other cases.
Function
ꢀ --B
The --B(596) instruction subtracts 1 from the BCD
content of Wd. The specified word will be decre-
mented by 1 every cycle as long as the execution
condition of --B(596) is ON. When the up-differenti-
ated variation of this instruction (@--B(596)) is used,
the specified word is decremented only when the exe-
cution condition has gone from OFF to ON.
Wd
Wd
-1
ꢀ --BL
The --BL(597) instruction subtracts 1 from the 8-digit
BCD content of Wd+1 and Wd. The content of the
specified words will be decremented by 1 every cycle
as long as the execution condition of --BL(597) is ON.
When the up-differentiated variation of this instruction
(@--BL(597)) is used, the content of the specified
words is decremented only when the execution condi-
tion has gone from OFF to ON.
Wd+1
Wd
-1
Wd+1
Wd
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2 Instructions
Sample program
ꢀ Operation of --B(596)/--BL(597)
In the following example, the BCD content of D100 will be decremented by 1 every cycle as long as CIO
0.00 is ON.
0.00
--B
Decremented every cycle
while CIO 0.00 is ON.
D100
Wd: D100
0 0 2 0 -1
Wd: D100
0 0 1 9
In the following example, the 8-digit BCD content of D101 and D100 will be decremented by 1 every
cycle as long as CIO 0.00 is ON.
2
Decremented every cycle
0.00
while CIO 0.00 is ON.
--BL
D100
Wd+1: D101
0 0 0 1
Wd: D100
0 0 0 0
Wd+1: D101
0 0 0 0
Wd: D100
9 9 9 9
-1
: Execution of --B(596) / --BL(597)
0.00
Decrement
Decrement
Decrement Decrement
ꢀ Operation of @--B(596)/@--BL(597)
The up-differentiated variation is used in the following example, so the BCD content of D100 will be dec-
remented by 1 only when CIO 0.00 has gone from OFF to ON.
0.00
@--B
Decremented only for
up-differentiation.
Wd: D100
0 0 2 0 -1
D100
Wd: D100
0 0 1 9
The up-differentiated variation is used in the following example, so the BCD content of D101 and D100
will be decremented by 1 only when CIO 0.00 has gone from OFF to ON.
Decremented only for
up-differentiation.
0.00
@--BL
D100
Wd+1: D101
0 0 0 1
Wd: D100
0 0 0 0
Wd+1: D101
0 0 0 0
Wd: D100
9 9 9 9
-1
: Execution of @--B(596) /@ --BL(597)
0.00
Decrement
Decrement
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2 Instructions
Symbol Math Instructions
+/+L
Function
code
Instruction
Mnemonic
Variations
@+
@+L
Function
SIGNED BINARY ADD
WITHOUT CARRY
Adds 4-digit (single-word) hexadecimal data
and/or constants.
+
400
DOUBLE SIGNED BINARY
ADD WITHOUT CARRY
Adds 8-digit (double-word) hexadecimal data
and/or constants.
+L
401
+
+L
+(400)
Au
+L(401)
Au: Augend word
Au
Ad
R
Au: 1st augend word
Ad: 1st addend word
R: 1st result word
Symbol
Ad
Ad: Addend word
R: Result word
R
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Data type
Size
Operand
Description
+
+L
+
+L
+: Augend word
+L: First augend word
Au
Ad
R
INT
DINT
1
2
+: Addend word
+L: First addend word
+: Result word
INT
INT
DINT
DINT
1
1
2
2
+L: First result word
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
Au, Ad
R
OK
---
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
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2 Instructions
Flags
Operation
Name
Label
P_ER
+
+L
Error Flag
OFF
OFF
Equals Flag
P_EQ
P_CY
P_OF
• ON when the result is 0.
• ON when the result is 0.
• OFF in all other cases.
• OFF in all other cases.
Carry Flag
• ON when the addition results in a carry.
• ON when the addition results in a carry.
• OFF in all other cases.
• OFF in all other cases.
Overflow Flag
• ON when the result of adding two positive num-
• ON when the result of adding two positive num-
bers is in the range 8000 to FFFF hex.
bers is in the range 80000000 to FFFFFFFF hex.
• OFF in all other cases.
• OFF in all other cases.
Underflow Flag
Negative Flag
P_UF
P_N
• ON when the result of adding two negative num-
bers is in the range 0000 to 7FFF hex.
• ON when the result of adding two negative num-
bers is in the range 00000000 to 7FFFFFFF hex.
2
• OFF in all other cases.
• OFF in all other cases.
• ON when the leftmost bit of the result is 1.
• ON when the leftmost bit of the result is 1.
• OFF in all other cases.
• OFF in all other cases.
Function
ꢀ +
+(400) adds the binary values in Au and Ad and outputs the result to R.
(Signed binary)
(Signed binary)
Au
Ad
+
CY will turn ON
when there is a
carry.
(Signed binary)
R
CY
ꢀ +L
+L(401) adds the binary values in Au and Au+1 and Ad and Ad+1 and outputs the result to R.
(Signed binary)
(Signed binary)
(Signed binary)
Au+1
Ad+1
Au
Ad
+
CY will turn ON
when there is a
carry.
CY
R+1
R
Sample program
0.00
+
When CIO 0.00 is ON in this example, D100 and D110 will be
added as 4-digit signed binary values and the result will be output
to D120.
D100
D110
D120
0.00
+L
When CIO 0.00 is ON, D101 and D100 and D111 and D110 will
be added as 8-digit signed binary values and the result will be
output to D121 and D120.
D100
D110
D120
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2 Instructions
+C/+CL
Function
code
Instruction
Mnemonic
Variations
@+C
@+CL
Function
SIGNED BINARY ADD WITH
CARRY
Adds 4-digit (single-word) hexadecimal data
and/or constants with the Carry Flag (CY).
+C
+CL
402
403
DOUBLE SIGNED BINARY
ADD WITH CARRY
Adds 8-digit (double-word) hexadecimal data
and/or constants with the Carry Flag (CY).
+C
+CL
+C(402)
Au
+CL(403)
Symbol
Au: Augend word
Au
Ad
R
Au: 1st augend word
Ad: 1st addend word
R: 1st result word
Ad
Ad: Addend word
R: Result word
R
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Data type
Size
Operand
Description
+C
+CL
+C
+CL
+C: Augend word
+CL: First augend word
Au
Ad
R
INT
DINT
1
2
+C: Addend word
+CL: First addend word
+C: Result word
INT
INT
DINT
DINT
1
1
2
2
+CL: First result word
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
Au, Ad
R
OK
---
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
Flags
Operation
Name
Label
+C
+CL
Error Flag
P_ER
P_EQ
OFF
OFF
Equals Flag
• ON when the addition result is 0.
• ON when the result is 0.
• OFF in all other cases.
• OFF in all other cases.
Carry Flag
P_CY
P_OF
• ON when the addition results in a carry.
• ON when the results in a carry.
• OFF in all other cases.
• OFF in all other cases.
Overflow Flag
• ON when the addition result of adding two positive • ON when the result of adding two positive num-
numbers and CY is in the range 8000 to FFFF
hex.
bers and CY is in the range 80000000 to
FFFFFFFF hex.
• OFF in all other cases.
• OFF in all other cases.
Underflow Flag
Negative Flag
P_UF
P_N
• ON when the addition result of adding two nega-
tive numbers and CY is in the range 0000 to 7FFF
hex.
• ON when the result of adding two negative num-
bers and CY is in the range 00000000 to
7FFFFFFF hex.
• OFF in all other cases.
• OFF in all other cases.
• ON when the leftmost bit of the result is 1.
• ON when the leftmost bit of the result is 1.
• OFF in all other cases.
• OFF in all other cases.
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2 Instructions
Function
ꢀ +C
+C(402) adds the binary values in Au, Ad, and CY and outputs the result to R.
Au
Ad
(Signed binary)
(Signed binary)
CY
+
CY will turn ON
when there is a
carry.
(Signed binary)
CY
R
2
ꢀ +CL
+CL(403) adds the binary values in Au and Au+1, Ad and Ad+1, and CY and outputs the result to R.
Au+1
Ad+1
Au
Ad
(Signed binary)
(Signed binary)
+
CY
CY will turn ON
when there is a
carry.
(Signed binary)
CY
R+1
R
Hint
• To clear the Carry Flag (CY), execute the Clear Carry (CLC(041)) instruction.
Sample program
0.00
+C
When CIO 0.00 is ON, D200, D210, and CY will be added as
4-digit signed binary values and the result will be output to
D220.
D200
D210
D220
0.00
+CL
D200
D210
D220
When CIO 0.00 is ON, D201, D200, D211, D210, and CY will
be added as 8-digit signed binary values, and the result will
be output to D221 and D220.
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2 Instructions
+B/+BL
Function
code
Instruction
Mnemonic
Variations
@+B
@+BL
Function
Adds 4-digit (single-word) BCD data and/or con-
stants.
BCD ADD WITHOUT CARRY
+B
+BL
404
405
DOUBLE BCD ADD WITHOUT
CARRY
Adds 8-digit (double-word) BCD data and/or con-
stants.
+B
+BL
+B(404)
+BL(405)
Symbol
Au
Ad
R
Au: Augend word
Au
Ad
R
Au: 1st augend word
Ad: 1st addend word
R: 1st result word
Ad: Addend word
R: Result word
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Data type
Size
Operand
Description
+B
+BL
+B
+BL
+B: Augend word
+BL: First augend word
Au
Ad
R
WORD
DWORD
1
2
+B: Addend word
+BL: First addend word
+B: Result word
WORD
WORD
DWORD
DWORD
1
1
2
2
+BL: First result word
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
Au, Ad
R
OK
---
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
Flags
Operation
Name
Label
+B
+BL
Error Flag
P_ER
• ON when Au is not BCD.
• ON when Ad is not BCD.
• OFF in all other cases.
• ON when Au, Au +1 is not BCD.
• ON when Ad, Ad +1 is not BCD.
• OFF in all other cases.
Equals Flag
Carry Flag
P_EQ
P_CY
• ON when the result is 0.
• ON when the result is 0.
• OFF in all other cases.
• OFF in all other cases.
• ON when the addition results in a carry.
• ON when the addition results in a carry.
• OFF in all other cases.
• OFF in all other cases.
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2 Instructions
Function
ꢀ +B
+B(404) adds the BCD values in Au and Ad and outputs the result to R.
Au
Ad
(BCD)
(BCD)
+
CY will turn ON
when there is a
carry.
CY
R
(BCD)
ꢀ +BL
2
+BL(405) adds the BCD values in Au and Au+1 and Ad and Ad+1 and outputs the result to R, R+1.
Au+1
Ad+1
Au
Ad
(BCD)
(BCD)
+
CY will turn ON
when there is a
carry.
CY
R+1
R
(BCD)
Sample program
0.00
When CIO 0.00 is ON in the following example, D100 and
D110 will be added as 4-digit BCD values, and the result will
be output to D120.
+B
D100
D110
D120
0.00
When CIO 0.00 is ON in the following example, D101 and
D100 and D111 and D110 will be added as 8-digit BCD
values, and the result will be output to D121 and D120.
+BL
D100
D110
D120
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2 Instructions
+BC/+BCL
Function
code
Instruction
Mnemonic
Variations
@+BC
@+BCL
Function
Adds 4-digit (single-word) BCD data and/or con-
stants with the Carry Flag (CY).
BCD ADD WITH CARRY
+BC
406
407
DOUBLE BCD ADD WITH
CARRY
Adds 8-digit (double-word) BCD data and/or con-
stants with the Carry Flag (CY).
+BCL
+BC
+BCL
+BCL(407)
+BC(406)
Symbol
Au
Ad
R
Au: 1st augend word
Ad: 1st addend word
R: 1st result word
Au
Ad
R
Au: Augend word
Ad: Addend word
R: Result word
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Data type
Size
Operand
Description
+BC
+BCL
+BC
+BCL
+BC: Augend word
+BCL: First augend word
Au
Ad
R
WORD
DWORD
1
2
+BC: Addend word
+BCL: First addend word
+BC: Result word
WORD
WORD
DWORD
DWORD
1
1
2
2
+BCL: First result word
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
Au, Ad
R
OK
---
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
Flags
Operation
Name
Label
+BC
+BCL
Error Flag
P_ER
• ON when Au is not BCD.
• ON when Ad is not BCD.
• OFF in all other cases.
• ON when Au, Au +1 is not BCD.
• ON when Ad, Ad +1 is not BCD.
• OFF in all other cases.
Equals Flag
Carry Flag
P_EQ
P_CY
• ON when the result is 0.
• ON when the result is 0.
• OFF in all other cases.
• OFF in all other cases.
• ON when the addition results in a carry.
• ON when the addition results in a carry.
• OFF in all other cases.
• OFF in all other cases.
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2 Instructions
Function
ꢀ +BC
+BC(406) adds BCD values in Au, Ad, and CY and outputs the result to R.
Au
Ad
(BCD)
(BCD)
CY
+
CY will turn ON
when there is a
carry.
(BCD)
CY
R
ꢀ +BCL
2
+BCL(407) adds the BCD values in Au and Au+1, Ad and Ad+1, and CY and outputs the result to R,
R+1.
Au+1
Ad+1
Au
Ad
(BCD)
(BCD)
+
CY
CY will turn ON
when there is a
carry.
CY
R+1
R
(BCD)
Hint
• To clear the Carry Flay (CY), execute the Clear Carry (CLC(041)) instruction.
Sample program
0.00
+BC
D100
D110
D120
When CIO 0.00 is ON in the following example, D100, D110,
and CY will be added as 4-digit BCD values, and the result will
be output to D120.
0.00
+BCL
D100
D110
D120
When CIO 0.00 is ON in the following example, D101, D100,
D111, D110, and CY will be added as 8-digit BCD values, and
the result will be output to D121 and D120.
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2 Instructions
–/–L
Function
code
Instruction
Mnemonic
Variations
@–
Function
SIGNED BINARY SUBTRACT
WITHOUT CARRY
Subtracts 4-digit (single-word) hexadecimal data
and/or constants.
–
410
DOUBLE SIGNED BINARY
SUBTRACT WITHOUT
CARRY
Subtracts 8-digit (double-word) hexadecimal data
and/or constants.
–L
@–L
411
–
–L
-L(410)
-(410)
Symbol
Mi
Su
R
Mi: Minuend word
Mi: Minuend word
Su: Subtrahend word
R: Result word
Mi
Su
Su: Subtrahend word
R: Result word
R
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Data type
Size
Operand
Description
–
–L
–
–L
–: Minuend word
–L: First minuend word
–: Subtrahend word
Mi
Su
R
INT
DINT
1
2
INT
INT
DINT
DINT
1
1
2
2
–L: First subtrahend word
–: Result word
–L: First result word
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
Mi, Su
R
OK
---
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
Flags
Operation
Name
Label
–
–L
Error Flag
P_ER
P_EQ
OFF
OFF
Equals Flag
• ON when the result is 0.
• ON when the result is 0.
• OFF in all other cases.
• OFF in all other cases.
Carry Flag
P_CY
P_OF
• ON when the subtraction results in a borrow.
• ON when the subtraction results in a borrow.
• OFF in all other cases.
• OFF in all other cases.
Overflow Flag
• ON when the result of subtracting a negative num- • ON when the result of subtracting a negative num-
ber from a positive number is in the range 8000 to
FFFF hex.
ber from a positive number is in the range
80000000 to FFFFFFFF hex.
• OFF in all other cases.
• OFF in all other cases.
Underflow Flag
Negative Flag
P_UF
P_N
• ON when the result of subtracting a negative num- • ON when the result of subtracting a positive num-
ber from a positive number is in the range 0000 to
7FFF hex.
ber from a negative number is in the range
00000000 to 7FFFFFFF hex.
• OFF in all other cases.
• OFF in all other cases.
• ON when the leftmost bit of the result is 1.
• ON when the leftmost bit of the result is 1.
• OFF in all other cases.
• OFF in all other cases.
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2 Instructions
Function
ꢀ –
–(400) subtracts the binary values in Su from Mi and outputs the result to R. When the result is nega-
tive, it is output to R as a 2’s complement.
Mi
(Signed binary)
(Signed binary)
Su
CY will turn ON
when there is a
borrow.
(Signed binary)
CY
R
ꢀ –L
2
–L(411) subtracts the binary values in Su and Su+1 from Mi and Mi+1 and outputs the result to R, R+1.
When the result is negative, it is output to R and R+1 as a 2’s complement.
(Signed binary)
(Signed binary)
Mi+1
Su+1
Mi
Su
CY will turn ON
when there is a
borrow.
CY
R+1
R
(Signed binary)
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2 Instructions
Hint
• 2’s Complement
A 2’s complement is the value obtained by subtracting each binary digit from 1 and adding one to the
result. For example, the 2’s complement for 1101 is calculated as follows: 1111 (F hexadecimal) –
1101 (D hexadecimal) + 1 (1 hexadecimal) = 0011 (3 hexadecimal). The 2’s complement for 3039
(hexadecimal) is calculated as follows: FFFF (hexadecimal) – 3039 (hexadecimal) + 0001 (hexadeci-
mal) – CFC7 (hexadecimal). Therefore, in case of 4-digit hexadecimal value, the 2’s complement can
be calculated as follows: FFFF (hexadecimal) – a (hexadecimal) + 0001 (hexadecimal) = b (hexadec-
imal). To obtain the true number from the 2’s complement b (hexadecimal): a (hexadecimal) = 10000
(hexadecimal) – b (hexadecimal). For example, to obtain the true number from the 2’s complement
CFC7 (hexadecimal): 10000 (hexadecimal) – CFC7 = 3039.
Signed data
Unsigned data
Example 1
FFFF Hex
0001 Hex
1
+1
65535
1
Note 1. Since the Negative Flag is ON, the result (FFFE hex) is
a negative value (2’s complement) and is thus -2.
FFFE Hex
2 Note 1
65534 Note 2
2. Since the Carry Flag is OFF, the result (FFFE hex) is
an unsigned positive value of 65534.
Negative Flag ON
Carry Flag OFF
Signed data
Unsigned data
Example 2
FFFD Hex
FFFF Hex
3
1
65533
65535
3. Since the Negative Flag is ON, the result (FFFE hex) is
a negative value (2’s complement) and is thus -2.
FFFE Hex
2 Note 3
65534 Note 4
4. Since the Carry Flag is ON, the result (FFFE hex) is a
negative value (2’s complement) and becomes -2 when
converted to a true value.
Negative Flag ON
Carry Flag OFF
20F55A10
-
B8A360E3 = -97AE06D3. (Hexadecimal)
0.00
RSET
21.00
−L
200
(1)
120
D100
P_CY
−L
#00000000
D100
(2)
D100
P_CY
“−”display
SET
21.00
In this example, the eight-digit binary value in CIO 121 and CIO 120 is subtracted from the value in CIO
201 and CIO 200, and the result is output in eight-digit binary to D101 and D100. If the result is nega-
tive, the instruction at (2) will be executed, and the actual result will then be output to D101 and D100.
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2 Instructions
Subtraction at (1)
Mi+1: CIO 201
Mi: CIO 200
2
0
F
5
5
A
1
0
Su+1: CIO 121 Su: CIO 120
B
8
A
3
6
0
E
3
The Carry Flag (CY) is ON, so the result is subtracted from 0000 0000 to
CY
R+1: D101
R+1: D100
obtain the actual number.
1
6
8
5
1
F
9
2
D
Subtraction at (2)
0
0
0
0
0
F
0
0
0
Su+1: D101
Su: D100
2
6
8
5
1
9
2
D
CY
1
R+1: D101
R+1: D100
9
7
A
E
0
6
D
3
Final Subtraction Result
Mi+1: CIO 201
Mi: CIO 200
2
0
F
5
5
A
1
0
Su+1: D101
Su: D100
6
8
5
1
F
9
2
D
The Carry Flag (CY) is turned ON, so the actual number is –97AE06D3.
Because the content of D101 and D100 is negative, CY is used to turn
ON CIO 21.00 to indicate this.
CY
1
R+1: D101
R+1: D100
9
7
A
E
0
6
D
3
Sample program
0.00
When CIO 0.00 is ON in the following example, D110 will be
subtracted from D100 as 4-digit signed binary values and the
result will be output to D120.
−
D100
D110
D120
0.00
−L
When CIO 0.00 is ON in the following example, D111 and D110
will be subtracted from D101 and D100 as 8-digit signed binary
values and the result will be output to D121 and D120.
D100
D110
D120
If the result of the subtraction is a negative number (Mi<Su or Mi+1, Mi <Su+1, Su), the result is output
as the 2’s complement and the Carry Flag (CY) will turn ON to indicate that the result of the subtraction
is negative. To convert the 2’s complement to the true number, an instruction which subtracts the result
from 0 is necessary using the Carry Flag (CY) as an execution condition.
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2 Instructions
–C/–CL
Function
code
Instruction
Mnemonic
Variations
@–C
@–CL
Function
SIGNED BINARY SUBTRACT
WITH CARRY
Subtracts 4-digit (single-word) hexadecimal data
and/or constants with the Carry Flag (CY).
–C
–CL
412
413
DOUBLE SIGNED BINARY
SUBTRACT WITH CARRY
Subtracts 8-digit (double-word) hexadecimal data
and/or constants with the Carry Flag (CY).
–C
–CL
–C(412)
–CL(413)
Symbol
Mi
Su
R
Mi: Minuend word
Su: Subtrahend word
R: Result word
Mi
Su
R
Mi: Minuend word
Su: Subtrahend word
R: Result word
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Data type
Size
Operand
Description
–C
–CL
–C
–CL
–C: Minuend word
–CL: First minuend word
–C: Subtrahend word
Mi
Su
R
INT
DINT
1
2
INT
INT
DINT
DINT
1
1
2
2
–CL: First subtrahend word
–C: Result word
–CL: First result word
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
Mi, Su
R
OK
---
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
Flags
Operation
Name
Label
–C
–CL
Error Flag
P_ER
P_EQ
OFF
OFF
Equals Flag
• ON when the subtraction result is 0.
• ON when the result is 0.
• OFF in all other cases.
• OFF in all other cases.
Carry Flag
P_CY
P_OF
• ON when the subtraction results in a borrow.
• ON when the results in a borrow.
• OFF in all other cases.
• OFF in all other cases.
Overflow Flag
• ON when the result of subtracting a negative num- • ON when the result of subtracting a negative num-
ber and CY from a positive number is in the range
8000 to FFFF hex.
ber and CY from a positive number is in the range
80000000 to FFFFFFFF hex.
• OFF in all other cases.
• OFF in all other cases.
Underflow Flag
Negative Flag
P_UF
P_N
• ON when the result of subtracting a positive num- • ON when the result of subtracting a positive num-
ber and CY from a negative number is in the
range 0000 to 7FFF hex.
ber and CY from a negative number is in the
range 00000000 to 7FFFFFFF hex.
• OFF in all other cases.
• OFF in all other cases.
• ON when the leftmost bit of the result is 1.
• ON when the leftmost bit of the result is 1.
• OFF in all other cases.
• OFF in all other cases.
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2-170
2 Instructions
Function
ꢀ –C
–C(412) subtracts the binary values in Su and CY from Mi, and outputs the result to R. When the result
is negative, it is output to R as a 2’s complement.
(Signed binary)
(Signed binary)
Mi
Su
CY
–
CY will turn ON
when there is a
borrow.
CY
(Signed binary)
R
2
ꢀ –CL
–CL(413) subtracts the binary values in Su and Su+1 and CY from Mi and Mi+1, and outputs the result
to R, R+1. When the result is negative, it is output to R, R+1 as a 2’s complement.
(Signed binary)
(Signed binary)
Mi+1
Su+1
Mi
Su
CY
–
CY will turn ON
when there is a
borrow.
CY
R+1
R
(Signed binary)
Hint
• To clear the Carry Flag (CY), execute the Clear Carry (CLC(041)) instruction.
• 2’s Complement
A 2’s complement is the value obtained by subtracting each binary digit from 1 and adding one to the
result.
Example: The 2’s complement for the binary number 1101 is as follows:
1111 (F hex) – 1101 (D hex) + 1 (1 hex) = 0011 (3 hex).
Example: The 2’s complement for the 4-digit hexadecimal number 3039 is as follows:
FFFF hex - 3039 hex + 0001 hex = CFC7 hex.
Accordingly, the 2’s complement for the 4-digit hexadecimal value “a” is as follows:
FFFF hex – a hex + 0001 hex = b hex.
And to obtain the true number “a” hex from the 2’s complement “b” hex:
a hex + 10000 hex – b hex.
Example: To obtain the true number from the 2’s complement CFC& hex:
10000 hex – CFC7 hex = 3039 hex.
Sample program
0.00
When CIO 0.00 is ON in the following example, D110 and CY will be
subtracted from D100 as 4-digit signed binary values and the result will
be output to D120.
−C
D100
D110
D120
0.00
When CIO 0.00 is ON in the following example, D111, D110 and CY will be
subtracted from D101 and D100 as 8-digit signed binary values, and the
result will be output to D121 and D120.
−CL
D100
D110
D120
If the result of the subtraction is a negative number (Mi<Su or Mi+1, Mi <Su+1, Su), the result is output
as a 2’s complement. The Carry Flag (CY) will turn ON. To convert the 2’s complement to the true num-
ber, a program which subtracts the result from 0 is necessary, as an input condition of the Carry Flag
(CY). The Carry Flag turning ON thus indicates that the result of the subtraction is negative.
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2 Instructions
–B/–BL
Function
code
Instruction
Mnemonic
Variations
@–B
@–BL
Function
BCD SUBTRACT WITHOUT
CARRY
Subtracts 4-digit (single-word) BCD data and/or
constants.
–B
–BL
414
415
DOUBLE BCD SUBTRACT
WITHOUT CARRY
Subtracts 8-digit (double-word) BCD data and/or
constants.
–B
–BL
–BL(415)
–B(414)
Symbol
Mi
Su
R
Mi: 1st minuend word
Su: 1st subtrahend word
R: 1st result word
Mi
Su
R
Mi: Minuend word
Su: Subtrahend word
R: Result word
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Data type
Size
Operand
Description
–B
–BL
–B
–BL
–B: Minuend word
–BL: First minuend word
–B: Subtrahend word
Mi
Su
R
WORD
DWORD
1
2
WORD
WORD
DWORD
DWORD
1
1
2
2
–BL: First subtrahend word
–B: Result word
–BL: First result word
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
Mi, Su
R
OK
---
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
Flags
Operation
Name
Label
–B
–BL
Error Flag
P_ER
• ON when Mi is not BCD.
• ON when Su is not BCD.
• OFF in all other cases.
• ON when Mi and/or Mi +1 are not BCD.
• ON when Su and/or Su +1 are not BCD.
• OFF in all other cases.
Equals Flag
Carry Flag
P_EQ
P_CY
• ON when the result is 0.
• ON when the result is 0.
• OFF in all other cases.
• OFF in all other cases.
• ON when the subtraction results in a borrow.
• ON when the subtraction results in a borrow.
• OFF in all other cases.
• OFF in all other cases.
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2 Instructions
Function
ꢀ –B
–B(414) subtracts the BCD values in Su from Mi and outputs the result to R. If the result of the subtrac-
tion is negative, the result is output as a 10’s complement.
Mi
(BCD)
(BCD)
Su
CY will turn ON
when there is a
borrow.
CY
R
(BCD)
ꢀ –BL
2
–BL(415) subtracts the BCD values in Su and Su+1 from Mi and Mi+1 and outputs the result to R, R+1.
If the result is negative, it is output to R, R+1 as a 10’s complement.
(BCD)
(BCD)
Mi +1
Su+1
Mi
Su
–
CY will turn ON
when there is a
borrow.
R+1
R
CY
(BCD)
Hint
• 10’s Complement
A 10’s complement is the value obtained by subtracting each digit from 9 and adding one to the
result. For example, the 10’s complement for 7556 is calculated as follows: 9999 - 7556 + 1 = 2444.
For a four digit number, the 10's complement of A is 9999 – A + 1 = B. To obtain the true number from
the 10’s complement B: A = 10000 – B. For example, to obtain the true number from the 10’s comple-
ment 2444: 10000 – 2444 = 7556.
Example: 9,583,960 – 17,072,641 = -7,488,681. (BCD)
0.00
RSET
21.00
−BL
200
(1)
120
D100
P_CY
−BL
#00000000
D100
(2)
D100
P_CY
SET
“−”display
21.00
In this example, the eight-digit BCD content of CIO 121 and CIO 120 is subtracted from the content of
CIO 201 and CIO 200, and the result is output in eight-digit BCD to D101 and D100. The result is nega-
tive, so the instruction at (2) will be executed, and the true value will then be output to D101 and D100.
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2 Instructions
Subtraction at (1)
Mi+1: CIO 201
S1: CIO 200
0
9
5
8
3
9
6
0
Su+1: CIO 121 S2: CIO 120
–
1
7
0
7
2
6
4
1
09583960+(100000000-17072641)
CY
1
R+1: D101
R+1: D100
The Carry Flag (CY) is ON, so the result is subtracted from 0000 0000.
9
2
5
1
1
3
1
9
Subtraction at (2)
0
0
0
0
0
1
0
0
0
9
Su+1: D101
Su: D100
–
9
2
5
1
3
1
00000000+(100000000-92511319)
CY
1
R+1: D101
R+1: D100
0
7
4
8
8
6
8
1
Final Subtraction Result
Mi+1: CIO 201
Mi: CIO 200
0
9
5
8
3
9
6
0
Su+1: D101
Su: D100
–
1
7
0
7
2
6
4
1
The Carry Flag (CY) will be turned ON, so the actual number is
– 7,488,681. Because the content of D101 and D100 is negative, CY is
used to turn ON CIO 21.00 to indicate this.
CY
R+1: D101
R+1: D100
1
0
7
4
8
8
6
8
1
Sample program
0.00
−B
When CIO 0.00 is ON in the following example, D110 is subtracted from
D100 as 4-digit BCD values, and the result will be output to D120.
D100
D110
D120
0.00
−BL
When CIO 0.00 is ON in the following example, D111 and D110 will be
subtracted from D101 and D100 as 8-digit BCD values, and the result will
be output to D121 and D120.
D100
D110
D120
If the result of the subtraction is a negative number (Mi<Su or Mi+1, Mi <Su+1, Su), the result is output
as a 10’s complement. The Carry Flag (CY) will turn ON. To convert the 10’s complement to the true
number, a program which subtracts the result from 0 is necessary, as an input condition of the Carry
Flag (CY). The Carry Flag turning ON thus indicates that the result of the subtraction is negative.
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2 Instructions
–BC/–BCL
Function
code
Instruction
Mnemonic
Variations
@–BC
@–BCL
Function
BCD SUBTRACT WITH
CARRY
Subtracts 4-digit (single-word) BCD data and/or
constants with the Carry Flag (CY).
–BC
416
417
DOUBLE BCD SUBTRACT
WITH CARRY
Subtracts 8-digit (double-word) BCD data and/or
constants with the Carry Flag (CY).
–BCL
–BC
–BCL
–BC(416)
–BCL(417)
2
Symbol
Mi
Su
R
Mi: Minuend word
Mi: 1st minuend word
Su: 1st subtrahend word
R: 1st result word
Mi
Su
R
Su: Subtrahend word
R: Result word
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Data type
Size
Operand
Description
–BC
–BCL
–BC
–BCL
–BC: Minuend word
–BCL: First minuend word
–BC: Subtrahend word
Mi
Su
R
WORD
DWORD
1
2
WORD
WORD
DWORD
DWORD
1
1
2
2
–BCL: First subtrahend word
–BC: Result word
–BCL: First result word
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
Mi, Su
R
OK
---
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
Flags
Operation
Name
Label
–BC
–BCL
Error Flag
P_ER
• ON when Mi is not BCD.
• ON when Su is not BCD.
• OFF in all other cases.
• ON when Mi and/or Mi +1 are not BCD.
• ON when Su and/or Su +1 are not BCD.
• OFF in all other cases.
Equals Flag
Carry Flag
P_EQ
P_CY
• ON when the result is 0.
• ON when the result is 0.
• OFF in all other cases.
• OFF in all other cases.
• ON when the subtraction results in a borrow.
• ON when the subtraction results in a borrow.
• OFF in all other cases.
• OFF in all other cases.
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2 Instructions
Function
ꢀ –BC
–BC(416) subtracts BCD values in Su and CY from Mi and outputs the result to R. If the result is nega-
tive, it is output to R as a 10’s complement.
Mi
(BCD)
(BCD)
Su
CY
–
CY will turn ON
when there is a
borrow.
CY
R
(BCD)
ꢀ –BCL
–BCL(417)subtracts the BCD values in Su, Su+1, and CY from Mi and Mi+1 and outputs the result to R,
R+1. If the result is negative, it is output to R, R+1 as a 10’s complement.
Mi+1
Su+1
Mi
(BCD)
(BCD)
Su
CY
–
CY will turn ON
when there is a
borrow.
CY
R+1
R
(BCD)
Hint
• To clear the Carry Flay (CY), execute the Clear Carry (CLC(041)) instruction.
• 10’s Complement
A 10’s complement is the value obtained by subtracting each digit from 9 and adding one to the
result. For example, the 10’s complement for 7556 is calculated as follows: 9999 - 7556 + 1 = 2444.
For a four digit number, the 10’s complement of A is 9999 – A + 1 = B. To obtain the true number from
the 10’s complement B: A = 10000 – B. For example, to obtain the true number from the 10’s comple-
ment 2444: 10000 – 2444 = 7556.
Sample program
0.00
−BC
D100
D110
D120
When CIO 0.00 is ON in the following example, D110 and CY
will be subtracted from D100 as 4-digit BCD values, and the
result will be output to D120.
0.00
−BCL
D100
D110
D120
When CIO 0.00 is ON in thefollowing example, D111, D110,
and CY will be subtracted from D101 and D100 as 8-digit
BCD values, and the result will be output to D121 and D120.
If the result of the subtraction is a negative number (Mi<Su or Mi+1, Mi <Su+1, Su), the result is output
as a 10’s complement. The Carry Flag (CY) will turn ON. To convert the 10’s complement to the true
number, a program which subtracts the result from 0 is necessary, as an input condition of the Carry
Flag (CY). The Carry Flag turning ON thus indicates that the result of the subtraction is negative.
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2 Instructions
*/*L
Function
code
Instruction
Mnemonic
Variations
Function
Multiplies 4-digit signed hexadecimal data and/or
constants.
SIGNED BINARY MULTIPLY
*
@*
@*L
420
421
DOUBLE SIGNED BINARY
MULTIPLY
Multiplies 8-digit signed hexadecimal data and/or
constants.
*L
*
*L
*L(421)
*(420)
Md
2
Symbol
Md
Mr
R
Md: 1st multiplicand word
Mr: 1st multiplier word
R: 1st result word
Md: Multiplicand word
Mr
Mr: Multiplier word
R: Result word
R
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Data type
Size
Operand
Description
*
*L
*
*L
*: Multiplicand word
*L: First multiplicand word
Md
INT
DINT
1
2
*: Multiplier word
*L: First multiplier word
First result word
Mr
R
INT
DINT
LINT
1
2
2
4
DINT
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
Md, Mr
R
OK
---
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
Flags
Operation
Name
Label
*
*L
Error Flag
P_ER
P_EQ
OFF
OFF
Equals Flag
• ON when the result is 0.
• ON when the result is 0.
• OFF in all other cases.
• OFF in all other cases.
Negative Flag
P_N
• ON when the leftmost bit of the result is 1.
• ON when the leftmost bit of the result is 1.
• OFF in all other cases.
• OFF in all other cases.
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2-177
2 Instructions
Function
ꢀ *
*(420) multiplies the signed binary values in Md and Mr and outputs the result to R, R+1.
Md
Mr
(Signed binary)
(Signed binary)
×
(Signed binary)
R + 1
R
ꢀ *L
*L(421) multiplies the signed binary values in Md and Md+1 and Mr and Mr+1 and outputs the result to
R, R+1, R+2, and R+3.
(Signed binary)
(Signed binary)
Md + 1
Mr + 1
Md
Mr
×
(Signed binary)
R + 3
R + 2
R + 1
R
Sample program
0.00
*
When CIO 0.00 is ON in the following example, D100 and
D110 will be multiplied as 4-digit signed hexadecimal
values and the result will be output to D120 and D121.
D100
D110
D120
0.00
*L
When CIO 0.00 is ON in the following example, D101,
D100, D111, and D110 will be multiplied as 8-digit signed
hexadecimal values and the result will be output to D123,
D122, D121 and D120.
D100
D110
D120
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2 Instructions
*B/*BL
Function
code
Instruction
Mnemonic
Variations
@*B
@*BL
Function
Multiplies 4-digit (single-word) BCD data and/or
constants.
BCD MULTIPLY
*B
*BL
424
425
Multiplies 8-digit (double-word) BCD data and/or
constants.
DOUBLE BCD MULTIPLY
*B
*BL
*BL(425)
*B(424)
2
Symbol
Md
Mr
R
Md: 1st multiplicand word
Mr: 1st multiplier word
R: 1st result word
Md
Mr
R
Md: Multiplicand word
Mr: Multiplier word
R: Result word
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Data type
Size
Operand
Description
*B
*BL
*B
*BL
*B: Multiplicand word
*BL: First multiplicand word
Md
WORD
DWORD
1
2
*B: Multiplier word
*BL: First multiplier word
First result word
Mr
R
WORD
DWORD
LWORD
1
2
2
4
DWORD
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
Md, Mr
R
OK
---
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
Flags
Operation
Name
Label
*B
*BL
Error Flag
P_ER
• ON when Md is not BCD.
• ON when Mr is not BCD.
• OFF in all other cases.
• ON when Md and/or Md+1 are not BCD.
• ON when Mr and/or Mr +1 are not BCD.
• OFF in all other cases.
Equals Flag
P_EQ
• ON when the result is 0.
• ON when the result is 0.
• OFF in all other cases.
• OFF in all other cases.
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2 Instructions
Function
ꢀ *B
*B(424) multiplies the BCD content of Md and Mr and outputs the result to R, R+1.
Md
Mr
(BCD)
(BCD)
×
R + 1
R
(BCD)
ꢀ *BL
*BL(425) multiplies BCD values in Md and Md+1 and Mr and Mr+1 and outputs the result to R, R+1,
R+2, and R+3.
(BCD)
(BCD)
Md + 1
Mr + 1
Md
Mr
×
(BCD)
R + 3
R + 2
R + 1
R
Sample program
0.00
*B
When CIO 0.00 is ON in the following example, D100
and D110 will be multiplied as 4-digit BCD values and
the result will be output to D121 and D120.
D100
D110
D120
0.00
When CIO 0.00 is ON in the following example, D101,
D100, D111, and D110 will be multiplied as 8-digit
unsigned BCD values and the result will be output to
D123, D122, D121 and D120.
*BL
D100
D110
D120
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2 Instructions
/, /L
Function
code
Instruction
Mnemonic
Variations
Function
Divides 4-digit (single-word) signed hexadecimal
data and/or constants.
SIGNED BINARY DIVIDE
/
@/
@/L
430
431
DOUBLE SIGNED BINARY
DIVIDE
Divides 8-digit (double-word) signed hexadecimal
data and/or constants.
/L
/
/L
/L(431)
/(430)
Dd
2
Symbol
Dd
Dr
R
Dd: 1st dividend word
Dr: 1st divisor word
R: 1st result word
Dd: Dividend word
Dr
Dr: Divisor word
R: Result word
R
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Data type
Size
Operand
Description
/
/L
/
/L
/:
Dividend word
Dd
INT
DINT
1
2
/L: First dividend word
/: Divisor word
Dr
R
INT
DINT
1
2
2
4
/L: First divisor word
First result word
DWORD
LWORD
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
Dd, Dr
R
OK
---
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
Flags
Name
Label
Operation
Error Flag
P_ER
P_EQ
P_N
• ON when the divisor is 0.
• OFF in all other cases.
Equals Flag
Negative Flag
• ON when as a result of the division, R/R+1, R is 0.
• OFF in all other cases.
• ON when the leftmost bit of the R/R+1, R is 1.
• OFF in all other cases.
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2 Instructions
Function
ꢀ /
/(430) divides the signed binary (16 bit) values in Dd by those in Dr and outputs the result to R, R+1.
The quotient is placed in R and the remainder in R+1.
Dd
Dr
(Signed binary)
(Signed binary)
÷
R + 1
R
(Signed binary)
Remainder
Quotient
Note Division of hexadecimal #8000 by #FFFF is undefined.
ꢀ /L
/L(431) divides the signed binary values in Dd and Dd+1 by those in Dr and Dr+1 and outputs the result
to R, R+1, R+2, and R+3. The quotient is output to R and R+1 and the remainder is output to R+2 and
R+3.
Dd + 1 Dd (Signed binary)
÷
Dr + 1 Dr
(Signed binary)
(Signed binary)
R + 3 R + 2 R + 1
R
Remainder
Quotient
Note Division of hexadecimal #80000000 by #FFFFFFFF is undefined.
Sample program
0.00
/
When CIO 0.00 is ON in the following example, D100 will be
divided by D110 as 4-digit signed binary values and the
quotient will be output to D120 and the remainder to D121.
D100
D110
D120
0.00
/L
When CIO 0.00 is ON in the following example, D101 and
D100 are divided by D111 and D110 as 8-digit signed
hexadecimal values and the quotient will be output to D121
and D120 and the remainder to D123 and D122.
D100
D110
D120
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2 Instructions
/B, /BL
Function
code
Instruction
Mnemonic
Variations
@/B
@/BL
Function
Divides 4-digit (single-word) BCD data and/or con-
stants.
BCD DIVIDE
/B
434
435
Divides 8-digit (double-word) BCD data and/or
constants.
DOUBLE BCD DIVIDE
/BL
/B
/BL
/BL(435)
/B(434)
Dd
2
Symbol
Dd: Dividend word
Dd
Dd: 1st dividend word
Dr
Dr: Divisor word
R: Result word
Dr
Dr: 1st divisor word
R
R
R: 1st result word
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Data type
Size
Operand
Description
/B
/BL
/B
/BL
/B: Dividend word
/BL: First dividend word
Dd
WORD
DWORD
1
2
/B: Divisor word
/BL: First divisor word
First result word
Dr
R
WORD
DWORD
LWORD
1
2
2
4
DWORD
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
Dd, Dr
R
OK
---
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
Flags
Operation
Name
Label
/B
/BL
Error Flag
P_ER
• ON when Dd is not BCD.
• ON when Dr is not BCD.
• ON when the divisor is 0.
• OFF in all other cases.
• ON when Dd, Dd+1 is not BCD.
• ON when Dr, Dr +1 is not BCD.
• ON when the divisor is 0.
• OFF in all other cases.
Equals Flag
P_EQ
• ON when as a result of the division R is 0.
• ON when as a result of the division R+1, R is 0.
• OFF in all other cases.
• OFF in all other cases.
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2 Instructions
Function
ꢀ /B
/B(434) divides the BCD content of Dd by those of Dr and outputs the quotient to R and the remainder
to R+1.
(BCD)
(BCD)
Dd
Dr
÷
(BCD)
R +1
R
Remainder
Quotient
ꢀ /BL
/BL(435) divides BCD values in Dd and Dd+1 by those in Dr and Dr+1 and outputs the quotient to R,
R+1 and the remainder to R+2, R+3.
(BCD)
(BCD)
Dd + 1
Dr + 1
Dd
Dr
÷
R + 3
R + 2
R + 1
R
(BCD)
Remainder
Quotient
Sample program
0.00
When CIO 0.00 is ON in the following example, D100 will be
divided by D110 as 4-digit BCD values and the quotient will
be output to D120 and the remainder to D121.
/B
D100
D110
D120
0.00
When CIO 0.00 is ON in the following example, D101 and
D100 will be divided by D111 and D110 as 8-digit BCD values
and the quotient will be output to D121 and D120 and the
remainder to D123 and D122.
/BL
D100
D110
D120
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2 Instructions
Conversion Instructions
BIN/BINL
Function
code
Instruction
Mnemonic
BIN
BINL
Variations
@BIN
@BINL
Function
BCD TO BINARY
023
Converts BCD data to binary data.
DOUBLE BCD TO DOUBLE
BINARY
Converts 8-digit BCD data to 8-digit hexadecimal
(32-bit binary) data.
058
2
BIN
BINL
BIN(023)
BINL(058)
Symbol
S: Source word
R: Result word
S
R
S: First source word
R: First result word
S
R
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Data type
Size
Operand
Description
BIN
BINL
BIN
BINL
BIN: Source word
BINL: First source word
S
R
WORD
DWORD
1
1
2
BIN: Results word
BINL: First result word
UINT
UDINT
2
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
S,R
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
---
Flags
Operation
Name
Label
BIN
BINL
Error Flag
P_ER
• ON if the content of S is not BCD.
• ON if the contents of S+1, S are not BCD.
• OFF in all other cases.
• OFF in all other cases.
Equals Flag
Negative Flag
P_EQ
P_N
• ON if the result is 0000.
• ON if the result is 0.
• OFF in all other cases.
• OFF in all other cases.
OFF
OFF
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2 Instructions
Function
ꢀ BIN
BIN(023) converts the BCD data in S to binary data
and writes the result to R.
The following diagram shows an example BCD-to-binary conversion.
S
(BCD)
R
(BIN)
15 12 11 8 7 4 3
0
15 12 11 8 7 4 3
0
3
4
5
2
0
D
7
C
S
R
×103 ×102 ×101 ×100
×163 ×162 ×161 ×160
ꢀ BINL
BINL(058) converts the 8-digit BCD data in S and
S+1 to 8-digit hexadecimal (32-bit binary) data and
writes the result to R and R+1.
S+1
S
R+1
R
(BCD)
(BCD)
(BIN)
(BIN)
The following diagram shows an example of 8-digit BCD-to-binary conversion.
R+1
R
S+1
S
0
0
2
0
0
0
5
0
0
0
0
3
0
D
7
2
×107×106×105×104×103×102×101×100
×167×166×165×164×163×162×161×160
Sample program
When CIO 0.00 is ON in the following example, the 8-digit BCD value in CIO 0010 and CIO 0011 is con-
verted to hexadecimal and stored in D200 and D201.
0.00
BINL
10
D200
S+1 : CIO 11
S : CIO 10
0
0
2
0
0
0
5
0
200050=3×164+13×162+7×161+2×160
×107 ×106 ×105 ×104
×103 ×102 ×101 ×100
0
0
0
3
0
D
7
2
×167 ×166 ×165 ×16
×163 ×162 ×161 ×160
4
R+1 : D201
R : D200
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2 Instructions
BCD/BCDL
Function
code
Instruction
Mnemonic
Variations
@BCD
Function
Converts a word of binary data to a word of BCD
data.
BINARY TO BCD
BCD
024
059
DOUBLE BINARY TO
DOUBLE BCD
Converts 8-digit hexadecimal (32-bit binary) data
to 8-digit BCD data.
BCDL
@BCDL
BCD
BCDL
BCDL(059)
2
BCD(024)
Symbol
S: Source word
D: Result word
S
R
S: First source word
D: First result word
S
R
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Data type
Size
Operand
Description
BCD
BCDL
BCD
BCDL
BCD: Source word
BCDL: First source word
S
R
UINT
UDINT
1
1
2
BCD: Result word
BCDL: First result word
WORD
DWORD
2
S: Source Word (BCD)/First Source Word (BCDL)
• BCD
S must be between 0000 and 270F hexadecimal (0000 and 9999 decimal).
• BCDL
The content of S+1 and S must be between 0000 0000 and 05F5 E0FF hexadecimal (0000 0000
and 9999 9999 decimal).
ꢀ Operand Specifications
Word addresses
Indirect DM addresses
Area
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
S,R
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
---
Flags
Operation
Name
Label
BCD
BCDL
Error Flag
P_ER
• ON if the content of S exceeds 270F (9999 dec- • ON if the contents of S and S+1 exceed 05F5
imal).
E0FF (9999 9999 decimal).
• OFF in all other cases.
• OFF in all other cases.
Equals Flag
P_EQ
• ON if the result is 0000.
• ON if the result is 0.
• OFF in all other cases.
• OFF in all other cases.
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2 Instructions
Function
ꢀ BCD
BCD(024) converts the binary data in S to BCD data
and writes the result to R.
The following diagram shows an example BCD-to-binary conversion.
(BIN)
(BCD)
S
R
15 12 11 8 7 4 3
0
15 12 11 8 7 4 3
0
1
0
E
C
4
3
3
2
S
R
×163 ×162 ×161 ×160
×103 ×102 ×101 ×100
ꢀ BCDL
S+1
S
R+1
R
BCDL(059) converts the 8-digit hexadecimal (32-bit
binary) data in S and S+1 to 8-digit BCD data and
writes the result to R and R+1.
(BCD)
(BCD)
(BIN)
(BIN)
The following diagram shows an example of 8-digit BCD-to-binary conversion.
R+1
R
S+1
S
0
0
2
D
3
2
0
A
0
2
9
6
1
9
3
0
×167×166×165×164×163×162×161×160
×107×106×105×104×103×102×101×100
Sample program
When CIO 0.00 is ON in the following example, the hexadecimal value in CIO 11 and CIO 10 is con-
verted to a BCD value and stored in D100 and D101.
0.00
BCDL
10
D100
S+1 : CIO 11
S: CIO 10
MBS
MBS
0
×167
0
×166
2
×165
D
3
×163
2
×162
0
×161
A
×160
LSB
LSB
×164
2×165+13×164+3×163+2×162+10=2961930
R+1 : D101
2
R : D100
0
9
6
1
9
3
0
×107
×103
×106
×105
×104
×102
×101
×100
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2 Instructions
NEG
Function
code
Instruction
Mnemonic
NEG
Variations
@NEG
Function
Calculates the 2’s complement of a word of hexa-
decimal data.
2’S COMPLEMENT
160
NEG
NEG(160)
Symbol
S: Source word
R: Result word
S
R
2
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Operand
Description
Data type
WORD
UINT
Size
S
R
Source word
Result word
1
1
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
S
R
OK
---
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
Flags
Name
Label
Operation
Error Flag
P_ER
OFF
Equals Flag
P_EQ
• ON if the result is 0000/0000 0000.
• OFF in all other cases.
Negative Flag
P_N
• ON if bit 15 of the result is ON.
• OFF in all other cases.
Function
ꢀ NEG
NEG(160) calculates the 2’s complement of S and writes the result
to R. The 2’s complement calculation basically reverses the status of
the bits in S and adds 1.
2’s complement
(Complement + 1)
(S)
(R)
Note The result for 8000 hex will be 8000 hex.
Hint
• This operation (reversing the status of the bits and adding 1) is equivalent to subtracting the content
of S/S+1 and S from 0000/0000 0000.
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2 Instructions
Sample program
When CIO 0.00 is ON in the following example, NEG(160) calculates the 2’s complement of the content
of D100 and writes the result to D200.
0.00
NEG
D100
D200
Actual
calculation
Equivalent
subtraction
D100
D200
1
E
E
2
D
D
3
4
0
1
E
0
0
0
4
Reverse bit status
=
C
B
2
3
-)
Add 1
C
C
D
C
C
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2 Instructions
MLPX
Function
code
Instruction
Mnemonic
Variations
Function
Reads the numerical value in the specified digit (or
byte) in the source word with 4-to 16 conversion
(or 8-to-256 conversion), turns ON the corre-
sponding bit in the result word, and turns OFF all
other bits in the result word.
DATA DECODER
MLPX
@MLPX
076
MLPX
2
MLPX(076)
Symbol
S: Source word
C: Control word
R: First result word
S
C
R
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Operand
Description
Data type
UINT
Size
S
C
R
Source word
Control word
First result word
1
1
UINT
UINT
Variable
ꢀ 4-to-16 bit decoder
S: Source Word
R: First Result Word
15
12 11
8
7
4 3
0
D: Decoding result of 1st digit of decoded digits
D+1: Decoding result of 2nd digit of decoded digits
D+2: Decoding result of 3rd digit of decoded digits
D+3: Decoding result of 4th digit of decoded digits
S
Digit 3
Digit 2
Digit 1
Digit 0
Digits from the starting digit going left are
decoded
(Returns to digit 3 after digit 0)
Note The result words must be in the same data area.
C: Control Word
15
12 11
8
7
4 3
0
C
0
l
n
Specifies the first digit/byte to be converted
0 to 3 (digit 0 to 3)
Number of digits/bytes to be converted
0 to 3 (1 to 4 digits)
Always 0.
Conversion process
0: 4-to-16 bits (digit to word)
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2 Instructions
ꢀ 8-to-256 bit conversion
S: Source Word
R: First Result Word
15
8
7
0
D+15 to D: Decoding result of 1st digit of decoded digits
D+31 to D+16:
Digit 1
Digit 0
S
Digits from the starting digit going left are
decoded
(Returns to digit 0 after digit 1)
Decoding result of 2nd digit of decoded digits
Note The result words must be in the same data area.
C: Control Word
15
12 11
8
7
4 3
0
C
1
l
n
Specifies the first digit/byte to be converted
0 or 1 (byte 0 or 1)
Number of digits/bytes to be converted
0 or 1 (1 or 2 bytes)
Always 0.
Conversion process
1: 8-to-256 bits (byte to 16-word range)
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
S
C
R
---
OK
---
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
Flags
Name
Label
Operation
Error Flag
P_ER
• ON if C is not within the specified ranges.
• OFF in all other cases.
Function
MLPX(076) can perform 4-to-16 bit or 8-to-256 bit conversions. Set the leftmost digit of C to 0 to specify
4-to-16 bit conversion and set it to 1 to specify 8-to-256 bit conversion.
ꢀ 4-to-16 bit Conversion
C
0
l
n
When the leftmost digit of C is 0,
MLPX(076) takes the value of the speci-
fied digit in S (0 to F) and turns ON the
corresponding bit in the result word. All
other bits in the result word will be turned
OFF. Up to four digits can be converted.
R=1 (Convert 2 digits.)
l
n
m
n=2 (Start with third digit.)
S
R
p
4-to-16 bit decoding
(Bit m of R is turned ON.)
15
p
1
m
1
0
R+1
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2 Instructions
ꢀ 8-to-256 bit Conversion
C
1
l
n
R=1 (Convert 2 bytes.)
When the leftmost digit of C is 1,
MLPX(076) takes the value of the speci-
fied byte in S (00 to FF) and turns ON the
corresponding bit in the range of 16 result
words. All other bits in the result words
will be turned OFF. Up to two bytes can
be converted.
n=1 (Start with second byte.)
S
m
p
8-to-256 bit decoding
(Bit m of R to R+15 is turned ON.)
0
15
31
m
1
R+1
16
239
255
224
240
R+14
R+15
R+16
R+17
2
P
R+30
R+31
Hint
As shown at right, 4 to 16 decoding con-
sists of taking the 4-bit binary value as the
bit number and setting 1 in that bit num-
ber and 0 in the other bit numbers of the
16 bits.
4 bits
m
15
0
m
1
0
0
0
0
As shown at right, 8 to 256 decoding con-
sists of taking the 8-bit binary value as the
bit number and setting 1 in that bit num-
ber and 0 in the other bit numbers of the
256 bits.
8 bits
m
255
0
m
1
0
0
0
0
Precaution
ꢀ 4-to-16 bit conversion
When two or more digits are being converted, MLPX(076) will read the digits in S from right to left and
will wrap around to the rightmost digit after the leftmost digit, if necessary.
ꢀ 8-to-256 bit conversion
When two bytes are being converted, MLPX(076) will read the bytes in S from right to left and will wrap
around to the rightmost byte if the leftmost byte (byte 1) has been specified as the starting byte.
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2 Instructions
Sample program
ꢀ 4-to-16 bit Conversion
When CIO 0.00 is ON in the following example, MLPX(076) will convert 3 digits in S beginning with digit
1 (the second digit), as indicated by C (#0021). The corresponding bits in D100, D101, and D102 will be
turned ON.
0.00
MLPX
S
C
R
100
#0021
D100
15
12 11
8
7
4
3
0
Bits 0 to 3: Starting digit (Digit 1)
Bits 4 to 7: Number of digits (3 digits)
0
0
2
1
0
C: #
3
F
2
1
6
Digits
S: 100
A
15 14 13 12 11 10 9
8
7
6
1
5
4
3
2
1
0
R: D100
D101
Digit 1 contains 6, so bit 6 is turned ON.
Digit 2 contains A, so bit 10 is turned ON.
Digit 3 contains F, so bit 15 is turned ON.
1
D102
1
ꢀ 8-to-256 bit Conversion
When CIO 0.00 is ON in the following example, MLPX(076) will convert the 2 bytes in S beginning with
byte 1 (the leftmost byte), as indicated by C (#1011). The corresponding bits in D100 to D115 and D116
to D131 will be turned ON.
0.00
MLPX
S
C
R
100
#1011
D100
15
1211
8 7
4 3
0
Bits 0 to 3: Starting byte (Byte 1)
1
2
0
1
1
1
C: #
Bits 4 to 7: Number of bytes (2 bytes)
Byte 1
Byte 0
D
A
S: 100
151413121110 9 8 7 6 5 4 3 2 1 0
R: D100
D101
1
D102
Byte 1 contains 2D, so bit 13 (D)
of R+2 is turned ON.
D103
D115
D116
D117
D118
1
Byte 0 contains 1A, so bit 10 (A)
of R+1 is turned ON.
D131
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2 Instructions
ꢀ Example of multi-digit decoding
• Example of 4-to-16 bit decoding
C: #0010
C: #0030
8 7
C: #0031
8 7
Digit 3 Digit 2 Digit 1 Digit 0
15
12 11
8 7
4 3
0
15
12 11
4 3
0
0
15
12 11
4 3
0
0
Digit 3 Digit 2 Digit 1 Digit 0
Digit 3 Digit 2 Digit 1 Digit 0
S
S
S
15
0
15
15
R
R
R+1
R+2
R+3
R
R+1
R+2
R+3
R+1
2
• Example of 8-to-256 bit decoding
C: #1010
C: #1011
8 7
15
12 11
Digit 1
8 7
4 3
0
15
15
12 11
Digit 1
4 3
0
0
Digit 0
Digit 0
S
D
S
D
15
0
D+15
D+16
D+15
D+16
D+31
D+31
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2 Instructions
DMPX
Instruction
Function
code
Mnemonic
Variations
Function
FInds the location of the first or last ON bit within
the source word with 16-to-4 conversion (or 256-
to-8 conversion), and writes that value to the spec-
ified digit (or byte) in the result word.
DATA ENCODER
DMPX
@DMPX
077
DMPX
DMPX(077)
Symbol
S
R
C
S: First source word
R: Result word
C: Control word
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Operand
Description
Data type
UINT
Size
S
R
C
First source word
Result word
Control word
Variable
UINT
1
1
UINT
ꢀ 16-to-4 bit conversion
S: First Source Word
R: Result Word
15
12 11
8
7
4 3
0
S: 1st digit of digits to be encoded
R
Digit 3 Digit 2
Digit 1
Digit 0
S+1: 2nd digit of digits to be encoded
S+2: 3rd digit of digits to be encoded
S+3: 4th digit of digits to be encoded
The results of encoding of S to S+3 are
stored from the starting digit going left
(returns to digit 0 after digit 3).
Note The source words must be in the same data
area.
C: Control Word
15
12 11
8
7
4 3
0
C
0
l
n
Specifies the first digit/byte to receive converted data.
0 to 3 (digit 0 to 3)
Number of digits/bytes to be converted
0 to 3 (1 to 4 digits)
Bit to encode
0: Leftmost bit (highest bit address)
1: Rightmost bit (lowest bit address)
Conversion process
0: 16-to-4 bits (word to digit)
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2 Instructions
ꢀ 256-to-8 bit conversion
S: First Source Word
R: Result Word
15
8
7
0
S+15 to S: 1st digit of digits to be encoded
S+31 to S+16: 2nd digit of digits to be encoded
Digit 1
Digit 0
R
The results of encoding of S to S+15, S+16 to
S+31 are stored from the starting digit going
left (returns to digit 0 after digit 1).
Note The source words must be in the same
data area.
C: Control word
15
12 11
8
7
4 3
0
2
C
1
l
n
Specifies the first digit/byte to receive converted data.
0 or 1 (byte 0 or 1)
Number of digits/bytes to be converted
0 or 1 (1 or 2bytes)
Bit to encode
0: Leftmost bit (highest bit address)
1: Rightmost bit (lowest bit address)
Conversion process
1: 256-to-8 bits (16-word range to byte)
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
S,R
C
---
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
OK
Flags
Name
Label
Operation
Error Flag
P_ER
• ON if any of the source words contains 0000 hex (i.e., no bit to encode).
• ON if C is not within the specified ranges.
• OFF in all other cases.
Function
DMPX(077) can perform 16-to-4 bit or 256-to-8 bit conversions. Set the leftmost digit of C to 0 to specify
16-to-4 bit conversion and set it to 1 to specify 256-to-8 bit conversion.
ꢀ 16-to-4 bit Conversion
When the fourth (leftmost) digit of C is 0, DMPX(077) finds the locations of the leftmost or rightmost ON
bits in up to 4 source words and writes these locations to R beginning with the specified digit.
0
0
l
n
C
FInds leftmost bit
(Highest bit address)
R=1 (Convert
2 words.)
15
p
1
0
m
1
S
S+1
16-to-4 bit decoding
(Location of leftmost bit (m)
is written to R.)
Leftmost bit
n=2 (Start with digit 2.)
n
p
m
R
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2 Instructions
ꢀ 256-to-8 bit Conversion
When the fourth (leftmost) digit of C is 1, DMPX(077) finds the locations of the leftmost (highest bit
address) or rightmost (lowest bit address) ON bits in one or two 16-word ranges of source words. The
locations of these bits are written to R beginning with the specified byte.
0
I/0
l
n
C
R=0 (Convert one 16-word range.)
15
0
S
31
16
Leftmost Rightmost
bit bit
S+1
239
255
224
240
m
1
S+14
S+15
Finds leftmost bit
(Highest bit address)
256-to-8 bit decoding
(The location of the leftmost bit in the
16-word range (m) is written to R.)
n=1 (Start with byte 1.)
m
R
Hint
As shown at right, 16 to 4 encoding con-
sists of converting the bit number (m) of
the leftmost or rightmost bit that has 1 set
among the 16 bits to a 4-bit binary value.
15
0
m
1
0
0
0
0
Leftmost ON bit
Rightmost ON bit
m
4 bits
As shown at right, 256 to 8 encoding con-
sists of converting the bit number (m) of
the leftmost or rightmost bit that has 1 set
among the 256 bits to an 8-bit binary
value.
255
0
m
0
0
1
0
0
Rightmost ON bit
Leftmost ON bit
m
8 bits
Precaution
ꢀ 16-to-4 bit conversion
When two or more digits are being converted, DMPX(077) will write the values to the digits in R from
right to left and will wrap around to the rightmost digit after the leftmost digit, if necessary.
ꢀ 256-to-8 bit conversion
When two bytes are being converted, DMPX(077) will write the values to the bytes in R from right to left
and will wrap around to the rightmost byte if the leftmost byte (byte 1) has been specified as the starting
byte.
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2 Instructions
Sample program
ꢀ 16-to-4 bit Conversion
When CIO 0.00 is ON in the following example, DMPX(077) will find the leftmost ON bits in CIO 100,
CIO 101, and CIO 102 and write those locations to 3 digits in R beginning with digit 1 (the second digit),
as indicated by C (#0021).
0.00
DMPX
S
R
C
100
D100
#0021
15
12 11
8
8
7
7
4
4
3
3
0
0
0
0
2
1
C: #
DMPX(077) finds the
leftmost ON bits.
2
15 14 13 12 11 10
9
6
5
1
2
1
1
S: 100
101
Starting digit
(Digit 1)
1
102
3
2
2
1
5
0
Digits
15
12 11
8
7
4
3
0
A
R: D100
ꢀ Example of multi-digit decoding
• Example of 16-to-4 bit decoding
C: #0011
C: #0030
C: #0013
15
0
15
0
15
15
0
0
S
S
S+1
S+2
S+3
S
S+1
S+1
15
12 11
8 7
4 3
0
12 11
8 7
4 3
Digit 3 Digit 2 Digit 1 Digit 0
Digit 3 Digit 2 Digit 1 Digit 0
R
R
15
12 11
8 7
4 3
0
Digit 3 Digit 2 Digit 1 Digit 0
R
C: #0032
15
0
S
S+1
S+2
S+3
15
12 11
8 7
4 3
0
Digit 3 Digit 2 Digit 1 Digit 0
R
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2 Instructions
ꢀ 256-to-8 bit Conversion
C: #1010
C: #1011
15
0
15
0
S
S
S+15
S+16
S+15
S+16
S+31
S+31
15
8 7
0
15
8 7
0
Digit 1
Digit 0
Digit 1
Digit 0
S
S
If the conversion data contains 0000 hex, but other data is to be encoded, separate the conversion by
using more than one DMPX(077) instructions.
DMPX(077) D0 D100 #0300
⇓
DMPX(077) D0 D100 #0000
DMPX(077) D1 D100 #0001
DMPX(077) D2 D100 #0002
DMPX(077) D3 D100 #0003
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2 Instructions
ASC
Function
code
Instruction
Mnemonic
ASC
Variations
@ASC
Function
Converts 4-bit hexadecimal digits in the source
word into their 8-bit ASCII equivalents.
ASCII CONVERT
086
ASC
ASC(086)
Symbol
S
DI
D
S: Source word
2
DI: Digit designator
D: First destination word
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Operand
Description
Data type
UINT
Size
S
DI
D
Source word
Digit designator
First destination word
1
1
UINT
UINT
Variable
S: Source Word
D: First Destination Word
15
12 11
8
7
4 3
0
15
8
7
0
Digit 3 Digit 2
Digit 1
Digit 0
Leftmost byte
Leftmost byte
Leftmost byte
Rightmost byte
S
D
D+1
D+2
Digits from the starting digit of conversion going
left are treated as HEX data and converted to
ASCII code (returns to digit 0 after digit 3)
Rightmost byte
Rightmost byte
ASCII code is stored in the left word side. The
code is stored from the output starting byte of
D in the order rightmost byte, leftmost byte.
Note The destination words must be in the same
data area.
DI: Digit Designator
The digit designator specifies various parameters for the conversion, as shown in the following dia-
gram.
Digit number: 3 2 1 0
Specifies the first digit in S to be converted (0 to 3).
Number of digits to be converted (0 to 3)
0: 1 digit
1: 2 digits
2: 3 digits
3: 4 digits
First byte of D to be used.
0: Rightmost byte
1: Leftmost byte
Parity
0: None
1: Even
2: Odd
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2 Instructions
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
S
DI
D
---
OK
---
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
Flags
Name
Label
Operation
Error Flag
P_ER
• ON if the content of Di is not within the specified ranges.
• OFF in all other cases.
Function
ASC(086) treats the contents of S as 4 hexadec-
imal digits, converts the designated digit(s) of S
into their 8-bit ASCII equivalents, and writes this
data into the destination word(s) beginning with
the specified byte in D.
0
1/0
n
m
Di
First digit to convert
m
3
S
1
2
A parity specification (bits 12 to 15 of K) is pos-
sible in the leftmost bit of the ASCII code data,
and this can be converted to an odd or even par-
ity bit (the number of bits that are 1 of the eight
bits is adjusted to odd or even).
HEX
Number of
digits (n+1)
ASCII
Left (1)
Right (0)
D
33
31
32
Hint
• The parity bit is appended to the data to enable detection of errors when the data is transmitted. By
adding this bit, the number of bits that are 1 in the data can be indicated as odd or even, and if the
number of 1s in the received data is not similarly odd or even, it is assumed that an error has
occurred.
Precaution
• When multiple digits are specified in the number of digits to be converted (K), the digits are converted
in order from the starting conversion digit going left (returns to digit 0 after digit 3), and the conversion
results are stored in order from the output position of D going to the left word side (in units of 8 bits).
• Among the data in the conversion result output word, data in positions that are not to be output are
held.
• When converting multiple digits, take care that D+1 and D+2CH do not exceed the area.
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2 Instructions
Sample program
When CIO 0.00 is ON in the following example, ASC(086) converts three hexadecimal digits in D100
(beginning with digit 1) into their ASCII equivalents and writes this data to D200 and D201 beginning
with the leftmost byte in D200. In this case, a digit designator of #0121 specifies no parity, the starting
byte (when writing) = leftmost byte, the number of digits to read = 3, and the starting digit (when read-
ing) = digit 1.
0.00
ASC
S
Di
D
D100
#0121
D200
15
12 11
8
7
4
3
0
0
1
2
1
Di: #
2
Number of digits
Starting digit
3
1
2
2
1
0
Digits
15
15
12 11
8
8
7
7
4
3
0
0
3
S: D100
HEX
Starting byte
(leftmost byte)
ASCII
D: D200
D201
33
31
32
ꢀ Example of ASCII code conversion
Content of conversion data digits
Conversion output data
(MSB) bit content (LSB)
Value
Bit content
Code
#30
#31
#32
#33
#34
#35
#36
#37
#38
#39
#41
#42
#43
#44
#45
#46
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
0
1
1
1
0
0
1
1
0
0
1
1
0
0
0
1
1
0
0
1
0
1
0
1
0
1
0
1
0
1
1
0
1
0
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
* Parity bit - changes according to the parity specification.
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2 Instructions
ꢀ Parity
It is possible to specify the parity of the ASCII data for use in error control during data transmissions.
The leftmost bit of each ASCII character will be automatically adjusted for even, odd, or no parity.
• When no parity (0) is designated, the leftmost bit will always be zero. When even parity (1) is desig-
nated, the leftmost bit will be adjusted so that the total number of ON bits is even. When odd parity (2)
is designated, the leftmost bit of each ASCII character will be adjusted so that there is an odd number
of ON bits. The status of the parity bit does not affect the meaning of the ASCII code.
• Examples of even parity:
When adjusted for even parity, ASCII “31” (00110001) will be “B1” (10110001: parity bit turned ON to
create an even number of ON bits); ASCII “36” (00110110) will be “36” (00110110: parity bit remains
OFF because the number of ON bits is already even).
• Examples of odd parity:
When adjusted for odd parity, ASCII “36” (00110110) will be “B6” (10110110: parity bit turned ON to
create an odd number of ON bits); ASCII “46” (01000110) will be “46” (01000110: parity bit remains
OFF because the number of ON bits is already odd).
ꢀ Examples of Di
Di: #0011
8 7
Di: #0112
8 7
Di: #0030
8 7
15
12 11
4 3
0
0
15
12 11
4 3
0
0
15
12 11
4 3
0
0
Digit 3 Digit 2 Digit 1 Digit 0
Digit 3 Digit 2 Digit 1 Digit 0
Digit 3 Digit 2 Digit 1 Digit 0
S
D
S
S
15
8 7
15
8 7
15
8 7
Leftmost
Rightmost
Leftmost
Leftmost
Rightmost
Rightmost
D
Leftmost
D
Rightmost
D+1
D+1
Di: #0130
8 7
15
12 11
4 3
0
0
Digit 3 Digit 2 Digit 1 Digit 0
S
15
8 7
Leftmost
Leftmost
D
D+1
D+2
Rightmost
Rightmost
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2 Instructions
HEX
Function
code
Instruction
Mnemonic
Variations
Function
Converts up to 4 bytes of ASCII data in the source
word to their hexadecimal equivalents and writes
these digits in the specified destination word.
ASCII TO HEX
HEX
@HEX
162
HEX
HEX(162)
Symbol
S: First source word
DI: Digit designator
D: Destination word
S
DI
D
2
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Operand
Description
Data type
UINT
Size
S
DI
D
First source word
Digit designator
Destination word
Variable
UINT
1
1
UINT
S: First Source Word
D: Destination Word
15
8
7
0
15
12 11
8
7
4 3
0
Leftmost byte
Rightmost byte
Digit 3
Digit 2
Digit 1
Digit 0
S
D
The conversion start byte and bytes to the left are
treated as ASCII code and converted to hex (returns
to the rightmost byte after the leftmost byte.
The results of conversion to hex are stored
from the starting digit going left (returns to
digit 0 after digit 3)
DI: Digit Designator
The digit designator specifies various parameters for the conversion, as shown in the following dia-
gram.
Digit number: 3 2 1 0
Specifies the first digit in D to receive converted data (0 to 3).
Number of bytes to be converted (0 to 3)
0: 1 digit
1: 2 digits
2: 3 digits
3: 4 digits
First byte of S to be converted.
0: Rightmost byte
1: Leftmost byte
Parity
0: None
1: Even
2: Odd
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2 Instructions
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
S
DI
D
---
OK
---
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
Flags
Name
Label
Operation
• ON if there is a parity error in the ASCII data.
Error Flag
P_ER
• ON if the ASCII data in the source words is not equivalent to hexadecimal digits
• ON if the content of Di is not within the specified ranges.
• OFF in all other cases.
Function
HEX(162) treats the contents of the source
word(s) as ASCII data representing hexa-
decimal digits (0 to 9 and A to F), converts
the specified number of bytes to hexadeci-
mal, and writes the hexadecimal data to the
destination word beginning at the specified
digit.
When converting data, the leftmost bit of
the ASCII code data can be treated as an
odd or even parity bit according to the parity
specification.
Di
0
0/1
n
m
First byte to convert
Left (1)
33
Right (0)
32
34
S
S+1
Number of digits (n+1)
ASCII
First digit to write
n+1
3
HEX
m
2
D
4
Hint
• The parity bit is appended to the data to enable detection of errors when the data is transmitted. By
adding this bit, the number of bits that are 1 in the data can be indicated as odd or even, and if the
number of 1s in the received data is not similarly odd or even, it is assumed that an error has
occurred.
Precaution
• When multiple digits are specified in the number of digits to be converted (C), the digits are converted
in order from the starting conversion position (C) of S going to the left word side, and the conversion
results are stored in order from the output starting bit (C) of D going to the left (returns to digit 0 after
digit 3).
• Among the data in the conversion result output word, data of bits that are not to be output are held
(kept the same as before).
• The following table shows ASCII data which can be contained in the source word(s) (excluding parity
bits) and corresponding hexadecimal digits.
ASCII data (2 hexadecimal digits)
Hexadecimal digits
0 to 9
30 to 39
41 to 46
A to F
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2 Instructions
Sample program
When CIO 0.00 is ON in the following example, HEX(162) converts the ASCII data in D100 and D101
according to the settings of the digit designator. (Di=#0121 specifies no parity, the starting byte (when
reading) = leftmost byte, the number of bytes to read = 3, and the starting digit (when writing) = digit 1.)
HEX(162) converts three bytes of ASCII data (3 characters) beginning with the leftmost byte of D100
into their hexadecimal equivalents and writes this data to D200 beginning with digit 1.
0.00
HEX
S
Di
D
D100
#0121
D200
15
12 11
8
7
4
3
0
2
0
1
2
1
Di:#
Starting byte
(leftmost byte)
15
8
7
0
33
35
S:D100
D101
34
Number of digits
Starting digit (digit 1)
3 digits
2
3
5
1
3
0
15
12 11
8
7
4
3
0
4
Di:D200
ꢀ Parity
It is possible to specify the parity of the ASCII data for use in error control during data transmissions.
The leftmost bit in each byte is the parity bit. With no parity the parity bit should always be zero, with
even parity the status of the parity bit should result in an even number of ON bits, and with odd parity
the status of the parity bit should result in an odd number of ON bits.
The following table shows the operation of HEX(162) for each parity setting.
Parity setting
Operation of HEX(162)
(leftmost digit of Di)
No parity (0)
HEX(162) will be executed only when the parity bit in each byte is 0. An error will occur if a parity bit is non-zero.
Even parity (1)
HEX(162) will be executed only when there is an even number of ON bits in each byte. An error will occur if a byte has an
odd number of ON bits.
Odd parity (2)
HEX(162) will be executed only when there is an odd number of ON bits in each byte. An error will occur if a byte has an
even number of ON bits.
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2 Instructions
ꢀ Output example
Conversion data
Output result (hex data)
Bit content
ASCII
code
(MSB) bit content (LSB)
Value
#30
#31
#32
#33
#34
#35
#36
#37
#38
#39
#41
#42
#43
#44
#45
#46
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
0
1
1
1
0
0
1
1
0
0
1
1
0
0
0
1
1
0
0
1
0
1
0
1
0
1
0
1
0
1
1
0
1
0
1
0
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
* Parity bit - changes according to the parity specification.
When CIO 0.00 is ON in the following example, HEX(162) converts the ASCII data in D10 beginning
with the rightmost byte and writes the hexadecimal equivalents in D300 beginning with digit 1.
The digit designator setting of #1011 specifies even parity, the starting byte (when reading) = rightmost
byte, the number of bytes to read = 2, and the starting digit (when writing) = digit 1.)
0.00
HEX
15
0
D10
#1011
D300
1
0
1
1
Starting digit in D: Digit 1
Number of bytes: 2
Starting byte in S: Rightmost
Parity: Even
Parity bits: Result in even parity
0
15
1
1
0
0
0
0
1
1
1
0
1
1
1
0
0
0
S: D100
43
38
Starting byte: rightmost
Conversion
Starting digit (digit 1)
Not changed
15
12 11
8
7
4
3
0
C
8
D: D300
Number of bytes (2 bytes)
Not changed
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2 Instructions
ꢀ Example of converting multiple bytes of ASCII code to hex
Di: #0112
8 7
Di: #0030
8 7
Di: #0131
8 7
15
0
15
0
15
0
Leftmost
Leftmost
Leftmost
Rightmost
Leftmost
Leftmost
S
S
S
S+1
S+2
Rightmost
Rightmost
Rightmost
S+1
S+1
Rightmost
15
12 11
8 7
4 3
0
15
12 11
8 7
4 3
0
Digit 3 Digit 2 Digit 1 Digit 0
Digit 3 Digit 2 Digit 1 Digit 0
D
D
15
12 11
8 7
4 3
0
Digit 3 Digit 2 Digit 1 Digit 0
F
2
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2 Instructions
Logic Instructions
ANDW/ANDL
Function
code
Instruction
Mnemonic
ANDW
ANDL
Variations
@ANDW
@ANDL
Function
Takes the logical AND of corresponding bits in sin-
gle words of word data and/or constants.
LOGICAL AND
034
610
Takes the logical AND of corresponding bits in
double words of word data and/or constants.
DOUBLE LOGICAL AND
ANDW
ANDL
ANDW(034)
ANDL(610)
I1: Input 1
I1: Input 1
I1
I1
I2
R
Symbol
I2: Input 2
I2: Input 2
I2
R
R: Result word
R: Result word
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Data type
Size
Operand
Description
ANDW
WORD
WORD
WORD
ANDL
ANDW
ANDL
I
I
Input 1
Input 2
Result word
DWORD
DWORD
DWORD
1
1
1
2
2
2
1
2
R
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
I , I
1
OK
---
2
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
R
Flags
Name
Label
Operation
Error Flag
P_ER
OFF
Equals Flag
P_EQ
• ON when the result is 0.
• OFF in all other cases.
Negative Flag
P_N
• ON when the leftmost bit of R is 1.
• OFF in all other cases.
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2 Instructions
Function
ꢀ ANDW
I , I → R
1
2
ANDW(034) takes the logical AND of data spec-
ified in I and I and outputs the result to R.
I1
1
1
0
0
I2
1
0
1
0
R
1
0
0
0
1
2
ꢀ ANDL
(I I +1)
1, 1
•
(I I +1) → (R, R+1)
2, 2
ANDL(610) takes the logical AND of data speci-
fied in I , I +1 and I , I +1 and outputs the result
to R, R+1.
I1, I1+1
I2, I2+1
R, R+1
2
1
1
2
2
1
1
0
0
1
0
1
0
1
0
0
0
Sample program
When the execution condition CIO 0.00 is ON, the logical AND is taken of corresponding bits in CIO 11,
CIO 10 and CIO 21, CIO 20 and the results will be output to corresponding bits in D201 and D200.
S1: 10CH
S2: 20CH
D: D200
S1+1: 11CH
S2+1: 21CH
D+1: D201
0.00
ANDL
10
10.00
10.01
10.02
10.03
10.04
0
1
0
1
0
20.00
1
1
0
0
1
00
01
02
03
04
0
1
0
0
0
20.01
20.02
20.03
20.04
20
D200
11.13
11.14
11.15
1
1
0
21.13
21.14
21.15
1
0
0
13
14
15
1
0
0
Note The vertical arrow indicates logical AND.
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2 Instructions
ORW/ORWL
Function
code
Instruction
Mnemonic
ORW
ORWL
Variations
@ORW
@ORWL
Function
Takes the logical OR of corresponding bits in sin-
gle words of word data and/or constants.
LOGICAL OR
035
611
Takes the logical OR of corresponding bits in dou-
ble words of word data and/or constants.
DOUBLE LOGICAL OR
ORW
ORWL
ORW(035)
ORWL(611)
I1: Input 1
I1
I2
R
Symbol
I1: Input 1
I1
I2
R
I2: Input 2
I2: Input 2
R: Result word
R: Result word
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Data type
Size
Operand
Description
ORW
ORWL
DWORD
DWORD
DWORD
ORW
ORWL
I
I
Input 1
Input 2
Result word
WORD
WORD
WORD
1
1
1
2
2
2
1
2
R
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
I , I
1
OK
---
2
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
R
Flags
Name
Label
Operation
Error Flag
P_ER
OFF
Equals Flag
P_EQ
• ON when the result is 0.
• OFF in all other cases.
Negative Flag
P_N
• ON when the leftmost bit of R is 1.
• OFF in all other cases.
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2 Instructions
Function
ꢀ ORW
I , I → R
1
2
ORW(035) takes the logical OR of data speci-
fied in I and I and outputs the result to R.
I1
1
1
0
0
I2
1
0
1
0
R
1
1
1
0
1
2
ꢀ ORWL
(I I +1) + (I I +1) → (R, R+1)
1, 1
2, 2
ORWL(611) takes the logical OR of data
specified in I and I as double-word data and
outputs the result to R, R+1.
I1, I1+1
I2, I2+1
R, R+1
2
1
2
1
1
0
0
1
0
1
0
1
1
1
0
Sample program
When the execution condition CIO 0.00 is ON, the logical OR is taken of corresponding bits in CIO 21,
CIO 20 and CIO 31, CIO 30 and the results will be output to corresponding bits in D501 and D500.
S
1: 20CH
S
2: 30CH
D: D500
D+1: D501
0.00
S
1+1: 21CH
S
2+1: 31CH
ORWL
20
D500
20.00
20.01
20.02
20.03
1
1
0
0
30.00
30.01
30.02
30.03
1
0
1
0
00
01
02
03
1
1
1
0
30
D500
20.15
21.00
1
1
30.15
31.00
1
0
15
00
1
1
D501
21.15
0
31.15
1
15
1
Note The vertical arrow indicates logical OR.
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2 Instructions
XORW/XORL
Function
code
Instruction
Mnemonic
Variations
@XORW
Function
Takes the logical exclusive OR of corresponding
bits in single words of word data and/or constants.
EXCLUSIVE OR
XORW
036
Takes the logical exclusive OR of corresponding
bits in double words of word data and/or con-
stants.
DOUBLE EXCLUSIVE OR
XORL
@XORL
612
XORW
XORL
XORW(036)
XORL(612)
I1: Input 1
I1: Input 1
I1
I2
R
I1
I2
R
Symbol
I2: Input 2
I2: Input 2
R: Result word
R: Result word
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Data type
Size
Operand
Description
XORW
WORD
WORD
WORD
XORL
XORW
XORL
I
I
Input 1
Input 2
Result word
DWORD
DWORD
DWORD
1
1
1
2
2
2
1
2
R
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
I , I
1
OK
---
2
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
R
Flags
Name
Label
Operation
Error Flag
P_ER
OFF
Equals Flag
P_EQ
• ON when the result is 0.
• OFF in all other cases.
Negative Flag
P_N
• ON when the leftmost bit of R is 1.
• OFF in all other cases.
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2 Instructions
Function
ꢀ XORW
I
1
•
I + I
•
I
2
→
R
2
1
XORW(036) takes the logical exclusive OR of
data specified in I and I and outputs the
result to R.
I1
1
1
0
0
I2
1
0
1
0
R
0
1
1
0
1
2
ꢀ XORL
2
(I I +1)
•
(I , I +1) + (I , I +1)
•
(I , I +1)
→
(R, R+1)
1, 1
2
2
1
1
2
2
XORL(612) takes the logical exclusive OR of
data specified in I and I as double-word data
1
2
I1, I1+1
I2, I2+1
R, R+1
and outputs the result to R, R+1.
1
1
0
0
1
0
1
0
0
1
1
0
Sample program
When the execution condition CIO 0.00 is ON, the logical exclusive OR is taken of corresponding bits in
CIO 151, CIO 150 and D1001, D1000 and the results will be output to corresponding bits in D1201 and
D1200.
S1: 150CH
S
2: D1000
D: D1200
0.00
S1+1: 151CH
S2+1: D1001
D+1: D1201
XORL
150
150.00
150.01
150.02
150.03
1
1
0
0
D1000
00
01
02
03
1
0
1
0
D1200
00
01
02
03
0
1
1
0
D1000
D1200
150.15
151.00
1
1
15
00
1
0
15
00
0
1
D1001
D1201
151.15
0
15
1
15
1
Note The symbol indicates exclusive logical OR.
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2 Instructions
COM/COML
Function
code
Instruction
Mnemonic
COM
COML
Variations
@COM
@COML
Function
Turns OFF all ON bits and turns ON all OFF bits in
Wd.
COMPLEMENT
029
614
Turns OFF all ON bits and turns ON all OFF bits in
Wd and Wd+1.
DOUBLE COMPLEMENT
COM
COML
COM(029)
Wd
COML(614)
Symbol
Wd: Word
Wd: Word
Wd
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Data type
Size
Operand
Description
COM
COML
COM
COML
Wd
Word
WORD
DWORD
1
2
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
Wd
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
---
Flags
Name
Label
Operation
Error Flag
P_ER
OFF
Equals Flag
P_EQ
• ON when the result is 0.
• OFF in all other cases.
Negative Flag
P_N
• ON when the leftmost bit of R is 1.
• OFF in all other cases.
Function
ꢀ COM
COM(029) reverses the status of every specified bit in Wd.
Wd→Wd: 1 → 0 and 0 → 1
Note When using the COM instruction, be aware that the status of each bit will change each cycle in which the
execution condition is ON.
ꢀ COML
COML(614) reverses the status of every specified bit in Wd and Wd+1.
(Wd+1, Wd)→(Wd+1, Wd)
Note When using the COML instruction, be aware that the status of each bit will change each cycle in which the
execution condition is ON.
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2 Instructions
Sample program
When CIO 0.00 is ON in the following example, the status of each bit D100 will be reversed.
15 14 13 12 11 10 9
8
1
7
0
6
0
5
0
4
1
3
0
2
0
1
0
0
1
0.00
1
0
0
1
0
0
0
D100
COM
D100
15 14 13 12 11 10 9
8
0
7
1
6
1
5
1
4
0
3
1
2
1
1
1
0
0
0
1
1
0
1
1
1
D100
When CIO 0.00 is ON in the following example, the status of each bit in D100 and D101 will be
reversed.
2
15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
0
1
15 14 13 12 11 10 9
8
1
7
0
6
0
5
0
4
1
3
0
2
0
1
0
0
1
0.00
1
0
0
1
0
0
0
1 0
0
0
1
0
0
1
0
0
1
0
0
0
D100
D100
COML
D100
15 14 13 12 11 10 9
8
0
7
6
1
5
1
4
0
3
1
2
1
1
1
0
0
15 14 13 12 11 10 9
8
0
7
1
6
1
5
1
4
0
3
1
2
1
1
1
0
0
0
1
1
0
1
1
1
1
0
1
1
0
1
1
1
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2 Instructions
Special Math Instructions
APR
Function
code
Instruction
Mnemonic
APR
Variations
@APR
Function
Calculates the sine, cosine, or a linear extrapola-
tion of the source data.
ARITHMETIC PROCESS
069
APR
APR(069)
C: Control word
S: Source word
R: Result word
C
S
R
Symbol
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Operand
Description
Data type
UINT
Size
C
S
R
Control word
Source data
Result word
Variable
WORD
WORD
1
1
ꢀ Sine Function
• Sine Function (C=0000)
Operand
Value
Data range
When C is 0000, APR(069) calculates the SIN(S) and writes
the result to R. The range for S is 0000 to 0900 BCD (0.0° to
90.0°) and the range for R is 0000 to 9999 BCD (0.0000 to
0.9999). The remainder of the result beyond the fourth deci-
mal place is eliminated.
C
0000 hex
---
0000 to 0900 (BCD)
S
R
0° to 90°
0000 to 9999 (BCD)
9999 (BCD)
0.0000 to 0.9999
1.0000
ꢀ Cosine Function
• Cosine Function (C=0001)
Operand
Value
Data range
When C is 0001, APR(069) calculates the COS(S) and writes
the result to R. The range for S is 0000 to 0900 BCD (0.0° to
90.0°) and the range for R is 0000 to 9999 BCD (0.0000 to
0.9999). The remainder of the result beyond the fourth deci-
mal place is eliminated.
C
0001 hex
---
0000 to 0900 (BCD)
S
R
0° to 90°
0000 to 9999 (BCD)
9999 (BCD)
0.0000 to 0.9999
1.0000
Note The actual result for SIN(90°) and COS(0°) is 1, but 9999 (0.9999) will be output to R.
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2 Instructions
ꢀ Linear Extrapolation Function
• Linear Extrapolation (C = Data area address)
Operand
Value
Data range
APR(069) linear extrapolation is specified when C is a word
address.
The content of word C specifies the number of coordinates in
a data table starting at C+2, the form of the source data, and
whether data is BCD or binary.
C
Data area address
16-bit unsigned BCD data
---
0000 to 9999
16-bit unsigned binary
data
0 to 65,535
16-bit signed binary data
32-bit signed binary data
-32,768 to 32,767
-2,147,483,648 to
2,147,483,647
S
Floating-point data
-∞,
38
-3.402823 × 10 to
-38
-1.175494 × 10
,
to
,
-38
1.175494 × 10
3.402823 × 10
+∞
2
38
16-bit unsigned BCD data
0000 to 9999
16-bit unsigned binary
data
0 to 65,535
16-bit signed binary data
32-bit signed binary data
-32,768 to 32,767
-2,147,483,648 to
2,147,483,647
R
Floating-point data
-∞,
38
-3.402823 × 10 to
-38
-1.175494 × 10
,
to
,
-38
1.175494 × 10
3.402823 × 10
+∞
38
The following 5 kinds of I/O data can be used:
• 16-bit unsigned BCD data
• 16-bit unsigned binary data
• 16-bit signed binary data
• 32-bit signed binary data
• Single-precision floating-point data
· Unsigned Integer Data (Binary or BCD)
15 14 13 12 11 10
9
0
8
0
7
6
5
4
3
2
1
0
0
0
0
C
Number of coordinates minus one (m-1),
00 to FF hex (1 ≤ m ≤ 256)
Floating-point specification for S and D
0: Integer data
Signed data specification for S and D
0: Unsigned binary data
Source data form
0: f(x) = f(S)
1: f(x) = f(Xm - S)
Output (D) data format
0: Binary
1: BCD
Input (S) data format
0: Binary
1: BCD
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2 Instructions
· Signed Integer Data (Binary)
15 14 13 12 11 10
9
0
8
0
7
6
5
4
3
2
1
0
0
0
0
0
1
C
Number of coordinates minus one (m-1),
00 to FF hex (1 ≤ m ≤ 256)
Floating-point specification for S and D
0: Integer data
Data length specification for S and D (note 1)
0: 16-bit signed binary data
1: 32-bit signed binary data
Signed data specification for S and D
1: Signed binary data
· Single-precision Floating-point Data
15 14 13 12 11 10
9
1
8
0
7
6
5
4
3
2
1
0
0
0
0
0
0
0
C
Number of coordinates minus one (m-1),
00 to FF hex (1 ≤ m ≤ 256)
Floating-point specification for S and D
1: Single-precision floating-point data
16-bit BCD16-bit binary (signed or
unsigned) or 16-bit BCD data
32-bit signed binary data
Floating-point data
C+1
C+2
C+3
C+4
C+5
C+6
C+7
C+1
C+2
C+3
C+4
C+5
C+6
C+7
X0 (rightmost 16 bits)
X0 (leftmost 16 bits)
Y0 (rightmost 16 bits)
Y0 (leftmost 16 bits)
X1 (rightmost 16 bits)
X1 (leftmost 16 bits)
Y1 (rightmost 16 bits)
Y1 (leftmost 16 bits)
to
X0 (rightmost 16 bits)
X0 (leftmost 16 bits)
Y0 (rightmost 16 bits)
Y0 (leftmost 16 bits)
X1 (rightmost 16 bits)
X1 (leftmost 16 bits)
Y1 (rightmost 16 bits)
Y1 (leftmost 16 bits)
to
C+1
C+2
C+3
C+4
C+5
C+6
X0 (*1)
Y0
X1
Y1
X2
Y2
C+8
C+8
Xn
Yn
to
to
Xn (rightmost 16 bits)
Xn (leftmost 16 bits)
Yn (rightmost 16 bits)
Xn (rightmost 16 bits)
Xn (leftmost 16 bits)
Yn (rightmost 16 bits)
C+ (4n+1)
C+ (4n+2)
C+ (4n+3)
C+ (4n+1)
C+ (4n+2)
C+ (4n+3)
C+ (2m+1)
C+ (2m+2)
Xm
Ym
Yn (leftmost 16 bits)
to
Yn (leftmost 16 bits)
to
C+ (4n+4)
C+ (4n+4)
Note: Write Xm (max. X
value in the table) in word
C+1 when the I/O data in S
and D contain unsigned
data (bit 11 of C = 0).
to
to
Xm (rightmost 16 bits)
Xm (rightmost 16 bits)
C+ (4m+1)
C+ (4m+2)
C+ (4m+3)
C+ (4m+4)
C+ (4m+1)
C+ (4m+2)
C+ (4m+3)
C+ (4m+4)
Xm (leftmost 16 bits)
Ym (rightmost 16 bits)
Xm (leftmost 16 bits)
Ym (rightmost 16 bits)
Ym (leftmost 16 bits)
Ym (leftmost 16 bits)
Note: The X coordinates must be in ascending order: X1 < X2 < ... < Xm. Input
all values of (Xn, Yn) as binary data, regardless of the data format
specified in control word C.
ꢀ Operand Specifications
Word addresses
Indirect DM addresses
Area
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
C,S
R
OK
---
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
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2 Instructions
Flags
Name
Label
P_ER
Operation
Error Flag
• ON if C is a constant greater than 0001.
• ON if C is a word address but the X coordinates are not in ascending order (X ≤ X ≤ ... ≤ X ).
1
2
m
• ON if C is a word address and bits 9, 11, and 15 of C indicate BCD input, but S is not BCD.
• ON if C is a word address and bit 9 of C indicates floating-point data, but S is a one-word constant.
• ON if C is 0000 or 0001 but S is not BCD between 0000 and 0900.
• OFF in all other cases.
Equals Flag
P_EQ
P_N
• ON if the result is 0.
• OFF in all other cases.
Negative Flag
• ON if bit 15 of R is ON.
• OFF in all other cases.
2
Function
ꢀ Operation of the Linear Extrapolation Function
APR(069) processes the input data specified in S with the following equation and the line-segment data
(X , Y ) specified in the table beginning at C+1. The result is output to the destination word(s) specified
n
n
with D.
1. For S < X
0
Converted value = Y
0
2. For X ≤ S ≤ X
, if X < S < X
n+1
0
max
n
Converted value = Y +[{Y + 1 - Y }/{X + 1 - X }] × {Input data S - X }
n
n
n
n
n
n
3. X
< S
max
Converted value = Y
max
Y (Binary data)
Ymax
Y0
X0
Xmax
X (Binary data)
Up to 256 endpoints can be stored in the line-segment data table beginning at C+1.
Y (binary data)
Equation:
f(S)= Yn+
Yn+1
Calculation
result
D
Yn
Xn+1 Xn
Xn
S
Xn+1
X (binary data)
Input data
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2 Instructions
ꢀ 16-bit Unsigned BCD Data
Setting name
Bit in C
Setting
The input data and/or the output data can
be 16-bit unsigned BCD data. Also, the lin-
ear extrapolation function can be set to
operate on the value specified in S directly
Input data (S) format
0: Binary
1: BCD
15
Output data (D) format
Source data form
0: Binary
1: BCD
14
or on X -S. (X is the maximum value of X
m
m
0: Operate on S
in the line-segment data.)
13
11
1: Operate on X -S
m
Signed data specification for S
and D
0: Unsigned data
Invalid (fixed at 16 bits)
0: Integer data
Data length specification for S
and D
10
09
Floating-point specification
ꢀ 16-bit Unsigned Binary Data
Setting name
Bit in C
Setting
0: Binary
The input data and/or the output data can
be 16-bit unsigned binary data. Also, the
linear extrapolation function can be set to
operate on the value specified in S directly
Input data (S) format
15
1: BCD
Output data (D) format
Source data form
0: Binary
14
1: BCD
or on X -S. (X is the maximum value of X
m
m
0: Operate on S
in the line-segment data.)
13
11
1: Operate on X -S
m
Signed data specification for S
and D
0: Unsigned data
Invalid (fixed at 16 bits)
0: Integer data
Data length specification for S
and D
10
09
Floating-point specification
ꢀ 16-bit Signed Binary Data
Setting name
Input data (S) format
Output data (D) format
Source data form
Bit in C
15
Setting
0: Binary
14
0: Binary
13
0
Signed data specification for S
and D
1: Signed data
11
Data length specification for S
and D
0: 16-bit signed binary
data
10
09
Floating-point specification
0: Integer data
ꢀ 32-bit Signed Binary Data
Setting name
Input data (S) format
Output data (D) format
Source data form
Bit in C
15
Setting
0: Binary
14
0: Binary
13
0
Signed data specification for S
and D
1: Signed data
11
Data length specification for S
and D
1: 32-bit signed binary
data
10
09
Floating-point specification
0: Integer data
Note If the “Data length specification for S and D” in bit 10 of C is set to 1 and
a 16-bit constant is input for S, the input data will be converted to 32-bit
signed binary before the linear extrapolation calculation.
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2 Instructions
ꢀ Floating-point Data
Setting name
Input data (S) format
Output data (D) format
Source data form
Bit in C
15
Setting
0
0
0
0
14
13
Signed data specification for S
and D
11
Data length specification for S
and D
0
10
09
Floating-point specification
1: Floating-point data
Note If the “Floating-point specification” in bit 09 of C is set to 1, a constant
cannot be input for S.
2
Sample program
ꢀ Sine Function (C: #0000)
The following example shows APR(069) used to calculate the sine of 30°.
(SIN(30) = 0.5000)
Source data
S: D0
Result
0.00
R: D100
APR
#0000
D000
D100
0
0
×101
×100
×10–1
0
×10–1 ×10–2 ×10–3 ×10–4
3
0
5
0
0
0
Set the source data in ×10–1 degrees.
(0000 to 0900, BCD)
Result data has four significant digits,
fifth and higher digits are ignored.
(0000 to 9999, BCD)
ꢀ Cosine Function (C: #0001)
The following example shows APR(069) used to calculate the cosine of 30°.
(COS(30) = 0.8660)
Source data
S: D10
Result
R: D100
0.00
APR
#0001
D010
D200
0
0
×101
×100
×10–1
0
×10–1
8
×10–2
×10–3
×10–4
0
3
0
6
6
–1
Set the source data in ×10 degrees.
(0000 to 0900, BCD)
Result data has four significant digits,
fifth and higher digits are ignored.
(0000 to 9999, BCD)
ꢀ Linear Extrapolation (C: Word Address)
• Using 16-bit Unsigned BCD or Binary Data
APR(069) processes the input data speci-
fied in S based on the control data in C and
the line-segment data specified in the table
beginning at C+1. The result is output to D.
Y
Ym
Y4
Y3
Y1
Y2
Y0
X
X0 X1 X2
X3
X4
Xm
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2 Instructions
• Y = f(X ), Y = f(X )
n
n
0
0
Word
Coordinate
• Be sure that X < X in all cases.
n-1
n
C+1
C+2
C+3
C+4
C+5
C+6
↓
Xm (max. X value)
• Input all values of (X , Y ) as binary data.
n
n
Y
X
Y
X
Y
↓
X
Y
0
1
1
2
2
C+(2m+1)
C+(2m+2)
(max. X value)
m
m
This example shows how to construct a linear extrapolation with 12 coordinates. The block of data is
continuous, as it must be, from D0 to D26 (C to C + (2 × 12 + 2)). The input data is taken from CIO 10,
and the result is output to CIO 11.
0.00
Bit
15
Bit
00
Content
Coordinate
APR
D0
10
0
0
0
0
0
0
0
0
0
0
0
0
1
0
1
1
D0 000B Hex
D1 05F0 Hex
D2 0000 Hex
D3 0005 Hex
D4 0F00 Hex
D5 001A Hex
D6 0402 Hex
X12
Y0
X1
Y1
X2
Y2
11
(m–1 = 11: 12 line
segments)
x=S
Output and input
both binary
↓
↓
↓
D25 05F0 Hex
D26 1F20 Hex
X12
Y12
In this case, the source word, CIO 0010, contains 0014, and f(0014) = 0726 is output to R, CIO 0011.
Y
$1F20
$0F00
(x,y)
$0726
$0402
X
(0,0)
$0005
$0014
$001A
$05F0
The linear-extrapolation calculation is shown below.
0402 – 0F00
---------------------------------
Y = 0F00 +
× (0014 – 0015)
001A – 0005
= 0F00 – (0086 × 000F)
= 0726
Values are all hexadecimal (Hex).
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2 Instructions
• Using 32-bit Signed Binary Data
In this example, APR(069) is used to convert the fluid height in a tank to fluid volume based on the
shape of the holding tank.
Fluid height to volume conversion table
(32-bit signed binary data)
C+1
C+2
C+3
X0 (rightmost 16 bits)
X0 (leftmost 16 bits)
Y0 (rightmost 16 bits)
C+4 Y0 (leftmost 16 bits)
C+5 X1 (rightmost 16 bits)
Variation from
standard = X
C+6
C+7
C+8
X1 (leftmost 16 bits)
Y1 (rightmost 16 bits)
Y1 (leftmost 16 bits)
to
Fluid volume= Y
2
to
Xn (rightmost 16 bits)
Xn (leftmost 16 bits)
Yn (rightmost 16 bits)
C+ (4n+1)
C+ (4n+2)
C+ (4n+3)
Yn (leftmost 16 bits)
to
C+ (4n+4)
to
Xm (rightmost 16 bits)
Xm (leftmost 16 bits)
Ym (rightmost 16 bits)
Ym (leftmost 16 bits)
C+ (4m+1)
C+ (4m+2)
C+ (4m+3)
C+ (4m+4)
0.00
APR
C
Linear extrapolation of table
S
R
Y: Fluid volume
Ym
R
R+1
X: Variation from standard
Y data range:
−2,147,483,648 to
2,147,483,647
The linear extrapolation can use
signed source data if 32-bit signed
binary data is used.
Y0
0
X0
Xm
S
S+1
High-resolution 32-bit
signed binary data
X data range: −2,147,483,648 to 2,147,483,647
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2 Instructions
• Using Floating-point Data
In this example, APR(069) is used to convert the fluid height in a tank to fluid volume based on the
shape of the holding tank.
C+1
C+2
C+3
C+4
C+5
C+6
C+7
C+8
X0 (rightmost 16 bits)
X0 (leftmost 16 bits)
Y0 (rightmost 16 bits)
Fluid height to volume
conversion table
(Floating-point data)
Y0 (leftmost 16 bits)
X1 (rightmost 16 bits)
X1 (leftmost 16 bits)
Y1 (rightmost 16 bits)
Y1 (leftmost 16 bits)
to
Fluid volume
= Y
Fluid height = X
to
Xn (rightmost 16 bits)
C+ (4n+1)
C+ (4n+2)
C+ (4n+3)
Xn (leftmost 16 bits)
Yn (rightmost 16 bits)
Yn (leftmost 16 bits)
to
C+ (4n+4)
to
Xm (rightmost 16 bits)
C+ (4m+1)
C+ (4m+2)
C+ (4m+3)
C+ (4m+4)
Xm (leftmost 16 bits)
Ym (rightmost 16 bits)
Ym (leftmost 16 bits)
0.00
APR
C
Linear extrapolation of table
S
R
Y: Fluid volume
X: Fluid height
Ym
The linear extrapolation can
provide a smooth, high-resolution
curve floating-point data is used.
Y data range:
R
R+1
−∞, −3.402823 × 1038 to
−1.175494 × 10−38
,
1.175494 × 10−38 to
3.402823 × 1038, or +∞
Y0
0X0
Xm
S
S+1
High-resolution
floating point data
X data range:
−∞, −3.402823 × 1038 to −1.175494 × 10−38
,
1.175494 × 10−38 to 3.402823 × 1038, or +∞
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2 Instructions
BCNT
Function
code
Instruction
Mnemonic
BCNT
Variations
@BCNT
Function
Counts the total number of ON bits in the specified
word(s).
BIT COUNTER
067
BCNT
BCNT(067)
N
S
R
N: Number of words
Symbol
S: First source word
R: Result word
2
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Operand
Description
Data type
UINT
Size
N
S
R
Number of words
First source word
Result word
1
Variable
1
UINT
UINT
N: Number of words
The number of words must be 0001 to FFFF (1 to 65,535 words).
ꢀ Operand Specifications
Word addresses
Indirect DM addresses
Area
Constants
CF
Pulse bits
TR bits
CIO WR
OK OK
HR
AR
T
C
DM
@DM
*DM
N
OK
---
OK
OK
OK
OK
OK
OK
OK
---
---
---
S,R
Flags
Error Flag
Name
Label
Operation
P_ER
• ON if N is 0000.
• ON if result exceeds FFFF.
• OFF in all other cases.
Equals Flag
P_EQ
• ON if the result is 0000.
• OFF in all other cases.
Function
BCNT(067) counts the total number of bits
that are ON in all words between S and S+(N-
1) and places the result in R.
S
N words
Counts the number
of ON bits.
to
S+(N–1)
Binary result
R
T
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2 Instructions
Precautions
• Some time will be required to complete BCNT(067) if a large number of words is specified. Even if an
interrupt occurs, execution of this instruction will not be interrupted and execution of the interrupt task
will be started after execution of BCNT(067) has been completed. One BCNT(067) instruction can
be replaced with two BCNT(067) instructions to help avoid this problem.
BCNT
&500
D1000
W1
BCNT
&1000
D1000
W0
W1: Temporary storage
W2: Temporary storage
BCNT
&500
D1500
W2
+
W1
W2
W0
Sample Program
When CIO 0.00 is ON in the following example, BCNT(067) counts the total number of ON bits in the 10
words from CIO 100 through CIO 109 and writes the result to D100.
15
0
0.00
100
101
BCNT
&10
Counts the number
of ON bits (35).
10 words
N
S
R
to
to
100
D100
109
23 hexadecimal
(35 decimal)
0
0
2
3
R: D100
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2 Instructions
Floating-point Math Instructions
The Floating-point Math Instructions convert data and perform floating-point arithmetic operations.
ꢀ Data Format
Floating-point data expresses real numbers using a sign, exponent, and mantissa. When data is
expressed in floating-point format, the following formula applies.
s
e–
Real number = (–1) 2 127 (1.f)
s: Sign
e: Exponent
f: Mantissa
2
The floating-point data format conforms to the IEEE754 standards. Data is expressed in 32 bits, as follows:
Sign
Exponent
Mantissa
s
e
f
31 30
23 22
0
Data
No. of bits
Contents
s: sign
1
8
0: positive; 1: negative
e: exponent
The exponent (e) value ranges from 0 to 255. The actual exponent is the
value remaining after 127 is subtracted from e, resulting in a range of
–127 to 128. “e=0” and “e=255” express special numbers.
f: mantissa
23
The mantissa portion of binary floating-point data fits the formal 2.0 > 1.f ≥1.0.
ꢀ Number of Digits
The number of effective digits for floating-point data is seven digits for decimal.
ꢀ Floating-point Data
The following data can be expressed by floating-point data:
• –∞
–
38
• –3.402823 × 1038 ≤ value ≤ –1.175494 × 10
• 0
–
38
• 1.175494 × 10
≤ value ≤ 3.402823 × 1038
• +∞
• Not a number (NaN)
–1.175494 × 10–38
1.175494 × 10–38
– ∞ –3.402823 × 1038
–1
3.402823 × 1038
+ ∞
0
1
ꢀ Special Numbers
The formats for NaN, ∞, and 0 are as follows:
• NaN*:e = 255, f ≠ 0
• +∞:e = 255, f = 0, s= 0
• –∞:e = 255, f = 0, s= 1
• 0: e = 0, f = 0
* NaN (not a number) is not a valid floating-point number. Executing floating-point calculation instructions will not
result in NaN.
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2 Instructions
ꢀ Writing Floating-point Data
When floating-point is specified for the data format in the I/O memory edit display in the CX-Program-
mer, standard decimal numbers input in the display are automatically converted to the floating-point for-
mat shown above (IEEE754-format) and written to I/O Memory. Data written in the IEEE754-format is
automatically converted to standard decimal format when monitored on the display.
15
7
6
0
n
f
n+1
s
e
It is not necessary for the user to be aware of the IEEE754 data format when reading and writing float-
ing-point data. It is only necessary to remember that floating point values occupy two words each.
ꢀ Numbers Expressed as Floating-point Values
The following types of floating-point numbers can be used.
Exponent (e)
Mantissa (f)
0
Not 0 and not all 1’s
All 1’s (255)
Infinity
0
0
Normalized number
Not 0
Non-normalized number
NaN
Note A non-normalized number is one whose absolute value is too small to be expressed as a normalized num-
ber. Non-normalized numbers have fewer significant digits. If the result of calculations is a non-normalized
number (including intermediate results), the number of significant digits will be reduced.
(1) Normalized Numbers
Normalized numbers express real numbers. The sign bit will be 0 for a positive number and 1 for a neg-
ative number.
The exponent (e) will be expressed from 1 to 254, and the real exponent will be 127 less, i.e., –126 to
127.
The mantissa (f) will be expressed from 0 to 233 – 1, and it is assume that, in the real mantissa, bit 233
is 1 and the binary point follows immediately after it.
Normalized numbers are expressed as follows:
(–1)(sign s) × 2(exponent e)–127 × (1 + mantissa × 2–23
)
Example
31 30
23 22
0
1 1 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Sign:
–
Exponent:
Mantissa:
Value:
128 – 127 = 1
–
–
2
1 + (222 + 221) × 2–23 = 1 + (2 1 + 2 ) = 1 + 0.75 = 1.75
–1.75 × 21 = –3.5
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2 Instructions
(2) Non-normalized Numbers
Non-normalized numbers express real numbers with very small absolute values. The sign bit will be 0
for a positive number and 1 for a negative number.
The exponent (e) will be 0, and the real exponent will be –126.
33
33
The mantissa (f) will be expressed from 1 to 2 – 1, and it is assume that, in the real mantissa, bit 2
is 0 and the binary point follows immediately after it.
Non-normalized numbers are expressed as follows:
(sign s)
(–1)
–126
–23
× 2
× (mantissa x 2
)
Example
31 30
23 22
0
0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
2
Sign:
Exponent:
Mantissa:
Value:
–
–126
0 + (222 + 221) × 2 23 = 0 + (2 1 + 2 ) = 0 + 0.75 = 0.75
–
–
–
2
–
126
–0.75 × 2
(3) Zero
Values of +0.0 and –0.0 can be expressed by setting the sign to 0 for positive or 1 for negative. The
exponent and mantissa will both be 0. Both +0.0 and –0.0 are equivalent to 0.0. Refer to Floating-point
Arithmetic Results, below, for differences produced by the sign of 0.0.
(4) Infinity
Values of +∞ and –∞ can be expressed by setting the sign to 0 for positive or 1 for negative. The expo-
nent will be 255 (28 – 1) and the mantissa will be 0.
(5) NaN
NaN (not a number) is produced when the result of calculations, such as 0.0/0.0, ∞/∞, or ∞–∞, does not
correspond to a number or infinity. The exponent will be 255 (28 – 1) and the mantissa will be not 0.
Note There are no specifications for the sign of NaN or the value of the mantissa field (other than to be not 0).
ꢀ Floating-point Arithmetic Results
(1) Rounding Results
The following methods will be used to round results when the number of digits in the accurate result of
floating-point arithmetic exceeds the significant digits of internal processing expressions.
If the result is close to one of two internal floating-point expressions, the closer expression will be used.
If the result is midway between two internal floating-point expressions, the result will be rounded so that
the last digit of the mantissa is 0.
(2) Overflows, Underflows, and Illegal Calculations
Overflows will be output as either positive or negative infinity, depending on the sign of the result.
Underflows will be output as either positive or negative zero, depending on the sign of the result.
Illegal calculations will result in NaN. Illegal calculations include adding infinity to a number with the
opposite sign, subtracting infinity from a number with the opposite sign, multiplying zero and infinity,
dividing zero by zero, or dividing infinity by infinity.
The value of the result may not be correct if an overflow occurs when converting a floating-point number
to an integer.
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2 Instructions
(3) Precautions in Handling Special Values
The following precautions apply to handling zero, infinity, and NaN.
• The sum of positive zero and negative zero is positive zero.
• The difference between zeros of the same sign is positive zero.
• If any operand is a NaN, the Error Flag will be turned ON and the tests will not be executed.
• Positive zero and negative zero are treated as equivalent in comparisons.
• Comparison or equivalency tests on one or more NaN will not be executed and the Error Flag will be
turned ON.
ꢀ Floating-point Calculation Results
When the absolute value of the result is greater than the maximum value that can be expressed for
floating-point data, the Overflow Flag will turn ON and the result will be output as ∞. If the result is pos-
itive, it will be output as +∞; if negative, then –∞.
The Equals Flag will only turn ON when both the exponent (e) and the mantissa (f) are zero after a cal-
culation. A calculation result will also be output as zero when the absolute value of the result is less
than the minimum value that can be expressed for floating-point data. In that case the Underflow Flag
will turn ON.
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2 Instructions
FIX/FIXL
Function
code
Instruction
Mnemonic
Variations
Function
Converts a 32-bit floating-point value to 16-bit
signed binary data and places the result in the
specified result word.
FLOATING TO 16-BIT
FIX
@FIX
450
451
Converts a 32-bit floating-point value to 32-bit
signed binary data and places the result in the
specified result words.
FLOATING TO 32-BIT
FIXL
@FIXL
FIX
FIXL
2
FIX(450)
FIXL(451)
Symbol
S
R
S: First source word
S
S: First source word
R: Result word
R
R: First result word
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Data type
Size
Operand
Description
FIX
REAL
INT
FIXL
REAL
DINT
FIX
2
FIXL
S
R
First source word
First result word
2
2
1
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
S
R
OK
---
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
Flags
Name
Label
Operation
Error Flag
P_ER
• FIX
ON if the integer portion of S+1 and S is not within the range of -32,768 to 32,767.
• FIXL
ON if the integer portion of S+1 and S is not within the range of -2,147,483,648 to 2,147,483,647.
• ON if the data in S+1 and S is not a number (NaN).
• OFF in all other cases.
Equals Flag
P_EQ
P_N
• ON if the result is 0000.
• OFF in all other cases.
Negative Flag
• ON when the leftmost bit of the result is 1.
• OFF in all other cases.
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2 Instructions
Function
ꢀ FIX
FIX(450) converts the integer portion of the 32-bit floating-point number in S+1 and S (IEEE754-format)
to 16-bit signed binary data and places the result in R.
Floating-point data (32 bits)
S
S+1
R
Signed binary data (16 bits)
Only the integer portion of the floating-point data is converted, and the fraction portion is truncated.
Example conversions:
A floating-point value of 3.5 is converted to 3.
A floating-point value of –3.5 is converted to –3.
ꢀ FIXL
FIXL(451) converts the integer portion of the 32-bit floating-point number in S+1 and S (IEEE754-for-
mat) to 32-bit signed binary data and places the result in R+1 and R.
S+1
S
Floating-point data (32 bits)
R+1
R
Signed binary data (32 bits)
Only the integer portion of the floating-point data is converted, and the fraction portion is truncated.
Example conversions:
A floating-point value of 2,147,483,640.5 is converted to 2,147,483,640.
A floating-point value of –214,748,340.5 is converted to –214,748,340.
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2 Instructions
FLT/FLTL
Function
code
Instruction
Mnemonic
Variations
Function
Converts a 16-bit signed binary value to 32-bit
floating-point data and places the result in the
specified result words.
16-BIT TO FLOATING
32-BIT TO FLOATING
FLT
@FLT
452
453
Converts a 32-bit signed binary value to 32-bit
floating-point data and places the result in the
specified result words.
FLTL
@FLTL
FLT
FLTL
2
FLT(452)
FLTL(453)
Symbol
S: Source word
R: First result word
S: First source word
R: First result word
S
R
S
R
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Data type
Size
Operand
Description
FLT
INT
FLTL
DINT
REAL
FLT
FLTL
S
R
First source word
First result word
1
2
2
2
REAL
ꢀ Operand Specifications
Word addresses
Indirect DM addresses
Area
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
S
R
OK
---
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
Flags
Name
Label
Operation
Error Flag
P_ER
OFF
Equals Flag
P_EQ
P_N
• ON if both the exponent and mantissa of the result are 0.
• OFF in all other cases.
Negative Flag
• ON if the result is negative.
• OFF in all other cases.
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2 Instructions
Function
ꢀ FLT
FLT(452) converts the 16-bit signed binary value in S to 32-bit floating-point data (IEEE754-format) and
places the result in R+1 and R. A single 0 is added after the decimal point in the floating-point result.
S
Signed binary data (16 bits)
R+1
R
Floating-point data (32 bits)
Only values within the range of -32,768 to 32,767 can be specified for S. To convert signed binary data
outside of that range, use FLTL(453).
Example conversions:
A signed binary value of 3 is converted to 3.0.
A signed binary value of -3 is converted to -3.0.
ꢀ FLTL
FLTL(453) converts the 32-bit signed binary value in S+1 and S to 32-bit floating-point data (IEEE754-
format) and places the result in R+1 and R. A single 0 is added after the decimal point in the floating-
point result.
−
B 8 A 3
6 0 E 3
R+1: D00101 R+1: D00100
6 8 5 1 F 9 2 D
CY
1
Signed binary data within the range of –2,147,483,648 to 2,147,483,647 can be specified for S+1 and
S. The floating point value has 24 significant binary digits (bits). The result will not be exact if a number
greater than 16,777,215 (the maximum value that can be expressed in 24-bits) is converted by
FLTL(453).
Example Conversions:
A signed binary value of 16,777,215 is converted to 16,777,215.0.
A signed binary value of –16,777,215 is converted to –16,777,215.0.
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2 Instructions
+F, –F, *F, /F
Function
code
Instruction
Mnemonic
Variations
@+F
Function
Adds two 32-bit floating-point numbers and places
the result in the specified result words.
FLOATING-POINT ADD
+F
454
455
456
457
Subtracts one 32-bit floating-point number from
another and places the result in the specified
result words.
FLOATING-POINT SUBTRACT –F
@–F
@*F
@/F
Multiplies two 32-bit floating-point numbers and
places the result in the specified result words.
FLOATING-POINT MULTIPLY
FLOATING-POINT DIVIDE
*F
/F
Divides one 32-bit floating-point number by
another and places the result in the specified
result words.
2
+F
–F
+F(454)
Au
–F(455)
Au: First augend word
AD: First addend word
R: First result word
Mi: First Minuend word
Su: First Subtrahend word
R: First result word
Mi
Su
R
AD
R
Symbol
*F
/F
*F(456)
Md
/F(457)
Dd
Md: First Multiplicand word
Mr: First Multiplier word
R: First result word
Dd: First Dividend word
Dr: First Divisor word
R: First result word
Mr
Dr
R
R
Applicable Program Areas
Area
Step program areas
Subroutines
Interrupt tasks
OK
Usage
OK
OK
Operands
Operand
Description
Data type
Size
Au
AD
Mi
First augend word
First addend word
+F
-F
*F
/F
REAL
2
First Minuend word
First Subtrahend word
First Multiplicand word
First Multiplier word
First Dividend word
First Divisor word
REAL
REAL
2
2
Su
Md
Mr
Dd
Dr
REAL
REAL
2
2
R
First result word
ꢀ Operand Specifications
Word addresses
Indirect DM addresses
Area
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
Au, AD, Mi, Su,
Md, Mr, Dd, Dr
OK
---
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
R
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2 Instructions
Flags
Name
Label
Operation
Error Flag
P_ER
+F
• ON if the augend or addend data is not a number (NaN).
• ON if +∞ and –∞ are added.
-F
• ON if the minuend or subtrahend is not a number (NaN).
• ON if +∞ is subtracted from +∞.
• ON if –∞ is subtracted from –∞.
*F
• ON if the multiplicand or multiplier is not a number (NaN).
• ON if +∞ and 0 are multiplied.
• ON if –∞ and 0 are multiplied.
/F
• ON if the dividend or divisor is not a number (NaN).
• ON if the dividend and divisor are both 0.
• ON if the dividend and divisor are both +∞ or –∞.
OFF in all other cases.
Equals Flag
P_EQ
P_OF
P_UF
P_N
• ON if both the exponent and mantissa of the result are 0.
• OFF in all other cases.
Overflow Flag
Underflow Flag
Negative Flag
• ON if the absolute value of the result is too large to be expressed as a 32-bit floating-point value.
• OFF in all other cases.
• ON if the absolute value of the result is too small to be expressed as a 32-bit floating-point value.
• OFF in all other cases.
• ON if the result is negative.
• OFF in all other cases.
Function
The data specified in Au/Mi/Md/Dd and the data specified in AD/Su/Mr/Dr are added (+F), subtracted
(-F), multiplied (*F), or divided (/F) as single-precision floating-point data (32 bits: IEEE754) and output
to R+1, R.
ꢀ +F
Augend (floating-point data, 32 bits)
Addend (floating-point data, 32 bits)
Au+1
Ad+1
Au
Ad
+
R+1
R
Result (floating-point data, 32 bits)
ꢀ -F
Mi
Mi+1
Su+1
Minuend (floating-point data, 32 bits)
Subtrahend (floating-point data, 32 bits)
Su
–
R+1
R
Result (floating-point data, 32 bits)
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2 Instructions
ꢀ *F
Md
Mr
Multiplicand (floating-point data, 32 bits)
Multiplier (floating-point data, 32 bits)
Md+1
Mr+1
×
R+1
R
Result (floating-point data, 32 bits)
ꢀ /F
Dd+1
Dr+1
Dd
Dividend (floating-point data, 32 bits)
Divisor (floating-point data, 32 bits)
2
Dr
R
÷
R+1
Result (floating-point data, 32 bits)
• If the absolute value of the result is greater than the maximum value that can be expressed as float-
ing-point data, the Overflow Flag will turn ON and the result will be output as ∞.
• If the absolute value of the result is less than the minimum value that can be expressed as floating-
point data, the Underflow Flag will turn ON and the result will be output as 0.
ꢀ Operation rules
The result of an operation is output as shown below depending on the combination of floating-point
data.
ꢀ FLOATING-POINT ADD (+F)
Augend
Addend
0
0
0
Numeral
Numeral
See note 1.
+∞
+∞
+∞
+∞
+∞
ER
–∞
–∞
–∞
ER
–∞
NaN
Numeral
+∞
Numeral
+∞
–∞
–∞
–∞
NaN
ER
Note 1 The results could be zero (including underflows), a numeral, +∞, or –∞.
ER The Error Flag will be turned ON and the instruction will not be executed.
ꢀ FLOATING-POINT SUBTRACT (–F)
Minuend
Subtrahend
0
0
Numeral
Numeral
See note 1.
–∞
+∞
+∞
+∞
ER
+∞
–∞
–∞
–∞
NaN
0
Numeral
+∞
Numeral
–∞
–∞
–∞
+∞
+∞
ER
NaN
ER
Note 1 The results could be zero (including underflows), a numeral, +∞, or –∞.
ER The Error Flag will be turned ON and the instruction will not be executed.
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2 Instructions
ꢀ FLOATING-POINT MULTIPLY (*F)
Multiplicand
Multiplier
0
0
Numeral
0
+∞
ER
–∞
ER
NaN
0
Numeral
+∞
0
See note 1.
+/–∞
+/–∞
+∞
+/–∞
ER
–∞
–∞
ER
+/–∞
+∞
–∞
NaN
ER
Note 1 The results could be zero (including underflows), a numeral, +∞, or –∞.
ER The Error Flag will be turned ON and the instruction will not be executed.
ꢀ FLOATING-POINT DIVIDE (/F)
Dividend
Divisor
0
0
ER
0
Numeral
+/–∞
+∞
+∞
–∞
–∞
NaN
Numeral
+∞
See note 2.
0 (See note 1)
0 (See note 1)
+/–∞
ER
+/–∞
ER
0
–∞
0
ER
ER
NaN
ER
Note 1 The results will be zero for underflows.
2 The results could be zero (including underflows), a numeral, +∞, or –∞.
ER The Error Flag will be turned ON and the instruction will not be executed.
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2 Instructions
=F, <>F, <F, <=F, >F, >=F
Function
Instruction
Mnemonic
Variations
Function
code
=F
<>F
Single-precision Floating-point <F
329
330
331
332
333
334
These input comparison instructions compare two
single-precision floating point values (32-bit
IEEE754 constants and/or the contents of speci-
fied words) and create an ON execution condition
when the comparison condition is true.
---
Comparison
<=F
>F
>=F
Single-precision Floating-point Comparison
2
LD connection
Mnemonic
AND connection
Mnemonic
OR connection
Mnemonic
Symbol
S1: Comparison data 1
S2: Comparison data 2
S1
S2
S1
S2
S1
S2
S1: Comparison data 1
S2: Comparison data 2
S1: Comparison data 1
S2: Comparison data 2
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
Usage
OK
OK
Operands
Operand
Description
Data type
REAL
Size
S1
Comparison data 1
Comparison data 2
2
2
S2
REAL
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
S1, S2
OK
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
Flags
Name
Label
Operation
Error Flag
P_ER
• ON if S1+1, S1 or S2+1, S2 is not a number (NaN).
• ON if S1+1, S1 or S2+1, S2 is +∞.
• ON if S1+1, S1 or S2+1, S2 is –∞.
• OFF in all other cases.
Greater Than Flag
P_GT
P_GE
• ON if S1+1, S1 > S2+1, S2.
• OFF in all other cases.
Greater Than or Equal Flag
• ON if S1+1, S1 ≥ S2+1, S2.
• OFF in all other cases.
Equal Flag
P_EQ
P_NE
• ON if S1+1, S1 = S2+1, S2.
• OFF in all other cases.
Not Equal Flag
• ON if S1+1, S1 ≠ S2+1, S2.
• OFF in all other cases.
Less Than Flag
P_LT
P_LE
P_N
• ON if S1+1, S1 < S2+1, S2.
• OFF in all other cases.
Less Than or Equal Flag
Negative Flag
• ON if S1+1, S1 ≤ S2+1, S2.
• OFF in all other cases.
Unchanged
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2 Instructions
Function
The input comparison instruction
LD connection
ON execution condition when
comparison result is true.
compares the data specified in S1
and S2 as single-precision floating
point values (32-bit IEEE754 data)
and creates an ON execution condi-
tion when the comparison condition
is true.
When the data is stored in words, S1
and S2 specify the first of two words
containing the 32-bit data. It is also
possible to input the floating-point
data as an 8-digit hexadecimal con-
stant.
<F
S1
S2
ON execution condition when
comparison result is true.
AND connection
<F
S1
S2
OR connection
The input comparison instructions
are treated just like the LD, AND, and
OR instructions to control the execu-
tion of subsequent instructions.
LD: The instruction can be con-
nected directly to the left bus bar.
<F
S1
S2
AND: The instruction cannot be con-
nected directly to the left bus bar.
ON execution condition when
comparison result is true.
OR: The instruction can be con-
nected directly to the left bus bar.
ꢀ Options
With the three input types and six symbols, there are 18 different possible combinations.
Symbol
(LD, AND, and OR cannot be
used in a ladder program)
Option (data format)
LD=, AND=, OR=, LD<>, AND<>,
OR<>, LD<, AND<, OR<, LD<=,
AND<=, OR<=, LD>, AND>, OR>,
LD>=, AND>=, OR>=
+
F: Single-precision floating-point
data
Code
Mnemonic
LD=F
Name
Function
True if
329
330
331
332
333
LOAD FLOATING EQUAL
S1+1, S1 =
S2+1, S2
AND=F
OR=F
AND FLOATING EQUAL
OR FLOATING EQUAL
LD<>F
AND<>F
OR<>F
LD<F
LOAD FLOATING NOT EQUAL
AND FLOATING NOT EQUAL
OR FLOATING NOT EQUAL
True if
S1+1, S1≠
S2+1, S2
LOAD FLOATING LESS THAN
AND FLOATING LESS THAN
OR FLOATING LESS THAN
True if
S1+1, S1
<
AND<F
OR<F
S2+1, S2
LD<=F
AND<=F
OR<=F
LD>F
LOAD FLOATING LESS THAN OR EQUAL
AND FLOATING LESS THAN OR EQUAL
OR FLOATING LESS THAN OR EQUAL
LOAD FLOATING GREATER THAN
AND FLOATING GREATER THAN
OR FLOATING GREATER THAN
True if
S1+1, S1
≤
S2+1, S2
True if
S1+1, S1
>
AND>F
OR>F
S2+1, S2
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2 Instructions
Code
Mnemonic
LD>=F
Name
Function
334
LOAD FLOATING GREATER THAN OR EQUAL
AND FLOATING GREATER THAN OR EQUAL
OR FLOATING GREATER THAN OR EQUAL
True if
S1+1, S1
≥
AND>=F
OR>=F
S2+1, S2
Precautions
• Input comparison instructions cannot be used as right-hand instructions, i.e., another instruction
must be used between them and the right bus bar.
Sample program
When CIO 0.00 is ON in the following example, the floating point data in D101, D100 is compared to the
floating point data in D201, D200. If the content of D101, D100 is less than that of D201, D200, execu-
tion proceeds to the next line and CIO 50.00 is turned ON. If the content of D101, D100 is not less than
2
that of D201, D200, execution does not proceed to the next instruction line.
50.00
0.00
<F
D100
D200
SINGLE FLOATING LESS THAN Comparison (<F)
15
0
15
0
S1: D100 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1
S1+1:D101 0 1 0 0 0 0 0 0 0 0 0 1 0 0 1 1
S2: D200 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
S2+1:D201 1 1 0 0 0 0 0 0 0 1 1 0 0 0 0 0
Decimal value: 2.3
Decimal value: −3.5
2.3>−3.5
Does not yield an ON condition.
15
0
15
S1: D100 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
S1+1:D101 0 1 0 0 1 1 1 1 1 0 0 0 0 0 0 0
S2: D200 1 1 1 0 0 1 0 1 0 1 1 1 0 0 1 1
S2+1:D201 0 1 0 0 1 1 1 1 1 0 1 0 0 1 0 1
Decimal value: 4,294,967,296
Decimal value: 5,566,555,656
4294967296<5566555656
Yields an ON condition.
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2 Instructions
FSTR
Function
code
Instruction
Mnemonic
Variations
Function
Expresses a 32-bit floating-point value (IEEE754-
format) in standard decimal notation or scientific
notation and converts that value to ASCII text.
FLOATING-POINT TO ASCII
FSTR
@FSTR
448
FSTR
FSTR(448)
Symbol
S
C
D
S: First source word
C: First control word
D: First destination word
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Operand
Description
Data type
REAL
Size
S
C
D
First source word
First control word
First destination word
2
3
UINT
UINT
Variable
C: First Control Word
0 hex: Decimal format
1 hex: Scientific notation
Total characters
Data format
2 to 18 hex (2 to 24 characters, see note)
0 to 7 hex (see note)
Fractional digits
Note There are limits on the total number of characters
and the number of fractional digits.
ꢀ Operand Specifications
Word addresses
Indirect DM addresses
Area
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
S
OK
---
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
C, D
Flags
Name
Label
Operation
Error Flag
P_ER
• ON if the data in S+1 and S is not a valid floating-point number (NaN).
• ON if the data in S+1 and S is +o or -o.
• ON if the Data Format setting in C is not 0000 or 0001.
• ON if the Total Characters setting in C+1 is not within the allowed range. (See 1. Limits on the Total
Number of ASCII Characters above for details.)
• ON if the Fractional Digits setting in C+2 is not within the allowed range. (See 3. Limits on the Number
of Digits in the Fractional Part above for details.)
Equals Flag
P_EQ
• ON if the conversion result is 0.
• OFF in all other cases.
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2 Instructions
Function
FSTR(448) expresses the 32-bit floating-point number in S+1 and S (IEEE754-format) in decimal nota-
tion or scientific notation according to the control data in words C to C+2, converts the number to ASCII
text, and outputs the result to the destination words starting at D.
• The content of C (Data format) specifies whether to express the number in S+1, S in decimal notation
or scientific notation.
• Decimal notation
Expresses a real number as an integer and fractional part.
Example: 124.56
• Scientific notation
Expresses a real number as an integer part, fractional part, and exponent part.
Example: 1.2456E-2 (1.2456×10-2)
2
• The content of C+1 (Total characters) specifies the number of ASCII characters after conversion
including the sign symbol, numbers, decimal point and spaces.
• The content of C+2 (Fractional digits) specifies the number of digits (characters) below the decimal
point.
The ASCII text is stored in D and subsequent words in the following order: leftmost byte of D, rightmost
byte of D, leftmost byte of D+1, rightmost byte of D+1, etc.
Decimal notation (C=0 hex)
-1.23456
Conversion to
ASCII text
(SP represents a space.)
Rounded off
Stored in destination words beginning with D.
Total characters = 8 (C+1 = 8 hex)
Fractional digits = 3 (C+2 = 3 hex)
15
87
0
Example: -1.23456
D:
2D
20
2E
33
00
20
31
32
34
00
S
S+1
Floating-point
data
ASCII characters are stored in order.
(Leftmost byte → rightmost byte)
Scientific notation (C=0001 hex)
- 1.23E+00
Conversion to
ASCII text
(SP represents a space.)
Stored in destination words beginning with D.
Total characters = 10 (C+1 = A hex)
Fractional digits = 2 (C+2 = 2 hex)
15
87
0
2D
31
32
45
30
00
20
2E
33
2B
30
00
ASCII characters are stored in order.
(Leftmost byte → rightmost byte)
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2 Instructions
ꢀ Storage of ASCII Text
After the floating-point number is converted to ASCII text, the ASCII characters are stored in the desti-
nation words beginning with D, as shown in the following diagrams. Different storage methods are used
for decimal notation and scientific notation.
Decimal notation (C=0 hex)
Total number of characters
Integer part Fractional part
Sign
Decimal point
If there are more fractional digits in the source data than specified in C+1, the extra digits will be rounded
off. If there are fewer fractional digits, zeroes (ASCII: 30 hex) will added to the end of the source data.
A decimal point (ASCII: 2E hex) is added if the number fractional digits is greater than 0.
Spaces (ASCII: 20 hex) are added if the integer part of the floating-point data is shorter than the integer part of the result
(total number of characters - sign digit - decimal point - fractional digits).
Positive number: Space (20 hex)
Negative number: Minus sign (2D hex)
Scientific notation (C=1 hex)
Total number of characters
Integer part Fractional part Exponential part
Sign
Sign
Decimal point
E
0 to 9 are written as 00 to 09.
Positive: Plus sign (2B hex)
Negative: Minus sign (2D hex)
Letter E (ASCII: 45 hex) is written here.
If there are more fractional digits in the source data than specified in C+1, the extra digits will be rounded off.
If there are fewer fractional digits, zeroes (ASCII: 30 hex) will added to the end of the source data.
A decimal point (ASCII: 2E hex) is added if the number fractional digits is greater than 0.
Spaces (ASCII: 20 hex) are added if the integer part of the floating-point data is shorter than the integer part of the result (total
number of characters - sign digit - decimal point - fractional digits - E digit).
Positive number: Space (20 hex)
Negative number: Minus sign (2D hex)
Note Either one or two bytes of zeroes are added to the end of ASCII text as an end code.
• Total number of characters odd: 00 hex is stored after the ASCII text.
• Total number of characters even: 0000 hex is stored after the ASCII text.
ꢀ Limits on the Number of ASCII Characters
There are limits on the number of ASCII characters in the converted number. The Error Flag will be
turned ON if the number of characters exceeds the maximum allowed.
• Limits on the Total Number of ASCII Characters
1) Decimal Notation (C = 0 hex)
• When there is no fractional part (C+2 = 0 hex):
2 ≤ Total Characters ≤ 24
• When there is a fractional part (C+2 = 1 to 7 hex):
(Fractional digits + 3) ≤ Total Characters ≤ 24
2) Scientific Notation (C = 1 hex)
• When there is no fractional part (C+2 = 0 hex):
6 ≤ Total Characters ≤ 24
• When there is a fractional part (C+2 = 1 to 7 hex):
(Fractional digits + 7) ≤ Total Characters ≤ 24
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2 Instructions
• Limits on the Number of Digits in the Integer Part
1) Decimal Notation (C = 0 hex)
• When there is no fractional part (C+2 = 0 hex):
1 ≤ Number of Integer Digits ≤ 24-1
• When there is a fractional part (C+2 = 1 to 7 hex):
1 ≤ Number of Integer Digits ≤ (24 - Fractional digits - 2)
2) Scientific Notation (C = 1 hex)
1 digit (fixed)
• Limits on the Number of Digits in the Fractional Part
1) Decimal Notation (C = 0 hex)
• Fractional Digits ≤ 7
2
• Also: Fractional Digits ≤ (Total Number of ASCII Characters - 3)
2) Scientific Notation (C =1 hex)
• Fractional Digits ≤ 7
• Also: Fractional Digits ≤ (Total Number of ASCII Characters - 7)
Sample program
ꢀ Converting to ASCII Text in Decimal Notation
When CIO 0.00 is ON in the following example, FSTR(448) converts the floating-point data in D1 and
D0 to decimal-notation ASCII text and writes the ASCII text to the destination words beginning with
D100. The contents of the control words (D10 to D12) specify the details on the data format (decimal
notation, 7 characters total, 3 fractional digits).
0.00
FSTR
D0
D10
D100
15
0
Conversion
1 0 1 0 1 0 0 0 0 1 1 1 0 0 1 0
0 0 1 1 1 1 1 0 1 0 1 0 0 1 1 1
D0
D1
0.327457
0(Hex)
7(Hex)
3(Hex)
Storage
conditions
D10
D11
D12
Decimal notation
Total characters = 7 characters
Fractional digits = 3 digits (characters)
Rounded off
Total number of characters
0 . 3 2 7 4 5 7
Spaces
Fractional part
D100
D101
D102
D103
20(Space)
30(0)
33(3)
20(Space)
2E(.)
32(2)
00
37(7)
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2 Instructions
ꢀ Converting to ASCII Text in Scientific Notation
When CIO 0.00 is ON in the following example, FSTR(448) converts the floating-point data in D1 and
D0 to scientific-notation ASCII text and writes the ASCII text to the destination words beginning with
D100. The contents of the control words (D10 to D12) specify the details on the data format (scientific
notation, 11 characters total, 3 fractional digits).
0.00
FSTR
D0
D10
D100
15
0
Conversion
D0 1 0 1 0 1 0 0 0 0 1 1 1 0 0 1 0
D1 0 0 1 1 1 1 1 0 1 0 1 0 0 1 1 1
0.327457
Storage
conditions
D10 0001(Hex)
D11 000B(Hex)
D12 0003(Hex)
Scientific notation
Total characters = 11 characters
Fractional digits = 3 digits (characters)
Total number of characters
3 . 2 7 4 5 7 E - 0 1
Spaces Fractional part
Rounded off
D100
20(Space)
33(3)
32(2)
35(5)
2D(-)
20(Space)
D101
D102
D103
D104
D105
2E(.)
37(7)
45(E)
30(0)
00
31(1)
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2 Instructions
FVAL
Instruction
Function
code
Mnemonic
Variations
Function
Converts a number expressed in ASCII text (deci-
mal or scientific notation) to a 32-bit floating-point
value (IEEE754-format) and outputs the floating-
point value to the specified words.
ASCII TO FLOATING-POINT
FVAL
@FVAL
449
FVAL
FVAL(449)
Symbol
2
S
D
S: First source word
D: First destination word
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Operand
Description
Data type
UINT
Size
Variable
2
S
D
First source word
First destination word
REAL
ꢀ Operand Specifications
Word addresses
Indirect DM addresses
Pulse
bits
TR
bits
Area
Constants
CF
CIO
WR
HR
AR
T
C
DM
@DM
*DM
S, D
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
---
Flags
Name
Label
Operation
Error Flag
P_ER
• ON if the digits (integer and fractional parts) in the source data starting at S are not 30 to 39 hex (0 to
9).
• ON if the first two digits of the exponential part do not contain 45 and 2B hex (E+) or 45 and 2D hex
(E-). in the source data starting at S are not 30 to 39 hex (0 to 9).
• ON if there are two or more exponential parts in the source data.
• ON if the data is +∞ or -∞ after conversion.
• ON if there are 0 characters in the text data.
• ON if a byte containing 00 hex is not found within the first 25 characters.
• OFF in all other cases.
Equals Flag
P_EQ
• ON if the conversion result is 0.
• OFF in all other cases.
Function
FVAL(449) converts the specified ASCII text number (starting at word S) to a 32-bit floating-point num-
ber (IEEE754-format) and outputs the result to the destination words starting at D.
FVAL(449) can convert ASCII text in decimal or scientific notation if it meets the following conditions:
Up to 6 characters are valid, excluding the sign, decimal point, and exponent. Any characters beyond
the 6th character will be ignored.
• Decimal Notation
Real numbers expressed with an integer and fractional part.
Example: 124.56
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2 Instructions
• Scientific Notation
Real numbers expressed as an integer part, fractional part, and exponent part.
-
Example: 1.2456E-2 (1.2456×10 2)
The data format (decimal or scientific notation) is detected automatically.
The ASCII text must be stored in S and subsequent words in the following order: leftmost byte of S,
rightmost byte of S, leftmost byte of S+1, rightmost byte of S+1, etc.
Decimat notation
15
87
0
Conversion of ASCII text number
to 32-bit floating-point data
2D
20
32
2E
35
37
00
20
31
33
34
36
38
00
32-bit floating-point data
1 1 1 0 1 0 0 1 0 1 1 1 1 0 0 1
1 1 0 0 0 0 1 0 1 1 1 1 0 1 1 0
Sign Exponent
Stored in D and D+1.
15
0
D
D+1
1 1 1 0 1 0 0 1 0 1 1 1 1 0 0 1
1 1 0 0 0 0 1 0 1 1 1 1 0 1 1 0
Spaces are
ignored during
conversion
If there are more than 6 digits, the 7th
and higher digits are ignored.
(Digits do not include the sign, decimal
point, and exponent characters.)
Scientific notation
Conversion of ASCII text number
to 32-bit floating-point data
15
87
0
2D
20
2E
33
45
30
00
20
31
32
34
2B
32
00
32-bit floating-point data
2
-1.234×10
1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 1
1 1 0 0 0 0 1 0 1 1 1 1 0 1 1 0
Sign Exponent
Stored in D and D+1.
−
SP SP
1
.
2
3
4
E
+
0
2
15
0
D
1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 1
1 1 0 0 0 0 1 0 1 1 1 1 0 1 1 0
(2D)(20)(20)(31)(2E)(32)(33)(34)(45)(2B)(30)(32)
D+1
Spaces are
ignored during
conversion
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2 Instructions
ꢀ Storage of ASCII Text
The following diagrams show how the ASCII text number is converted to floating-point data. Different
conversion methods are used for numbers stored with decimal notation and scientific notation.
ASCII Character Storage
S
FVAL(449) converts the ASCII characters
starting with the leftmost byte of S and
continuing until a byte containing 00 hex is
reached. There must be a byte containing
00 hex within the first 25 bytes.
00
Up to 00 hex
(25 characters max.)
2
Decimal notation
15
8 7
0
25 characters max
Sign
(20)
(20)
Digit
Integer part
Fractional part
Sign
SP SP
00
.
Decimal
point
00
The 7th and higher digits are ignored. (The sign, decimal point,
and exponent characters are not counted as digits.)
Any spaces (20 hex) or zeroes (30 hex)
before the first digit are ignored.
Positive number: Space (20 hex) or Plus sign (2B hex)
Negative number: Minus sign (2D hex)
Scientific notation
15
8 7
0
25 characters max.
Sign
(20)
(20)
Digit
Digit
...
Integer part
Fractional part Exponential part
Sign
Sign
.(2E)
Digit
E(45)
Digit
00
SP
E
00
.
Positive: + (2B hex)
Negative: - (2D hex)
E (45)
Decimal
point
Sign
Digit
The 7th and higher digits are ignored.
(The sign, decimal point, and exponent
characters are not counted as digits.)
Any spaces (20 hex) or zeroes (30 hex)
before the first digit are ignored.
Positive number: Space (20 hex) or Plus sign (2B hex)
Negative number: Minus sign (2D hex)
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2 Instructions
Sample program
ꢀ Converting ASCII Text in Decimal Notation to Floating-point Data
When CIO 0.00 is ON in the following example, FVAL(449) converts the specified decimal-notation
ASCII text number in the source words starting at D0 to floating-point data and writes the result to des-
tination words D100 and D101.
0.00
FVAL
D0
D100
The 7th and higher digits are ignored.
(The sign, decimal point, and leading
zeroes/spaces are not counted.)
Ignored
Conversion
20 (Space)
31 (1)
32 (2)
34 (4)
32 (2)
00
D0
D1
D2
D3
D4
D5
15
0
0 0 0 0 0 1 0 0 1 1 0 0 0 0 0 0
1 0 1 1 1 1 1 1 1 0 0 1 1 1 1 0
Storage
15
0
D100 0 0 0 0 0 1 0 0 1 1 0 0 0 0 0 0
D101 1 0 1 1 1 1 1 1 1 0 0 1 1 1 1 0
ꢀ Converting ASCII Text in Scientific Notation
When CIO 0.00 is ON in the following example, FVAL(449) converts the specified scientific-notation
ASCII text number in the source words starting at D0 to floating-point data and writes the result to des-
tination words D100 and D101.
0.00
FVAL
D0
D100
Ignored
Ignored
1 . 2 3 4 5 E - 0 2
20 (Space)
Conversion
D0
D1
D2
D3
D4
D5
D6
15
0
0 1 0 0 0 0 1 0 1 0 1 0 1 1 1 1
1 0 1 1 1 1 0 0 0 1 0 0 1 0 1 0
Storage
15
0
D100 0 1 0 0 0 0 1 0 1 0 1 0 1 1 1 1
D101 1 0 1 1 1 1 0 0 0 1 0 0 1 0 1 0
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2 Instructions
Table Data Processing Instructions
SWAP
Function
code
Instruction
Mnemonic
SWAP
Variations
@SWAP
Function
Switches the leftmost and rightmost bytes in all of
the words in the range.
SWAP BYTES
637
2
SWAP
SWAP(637)
Symbol
N
N: Number of words
R1
R1: First word in range
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Operand
Description
Data type
UINT
Size
N
Number of words
First word in range
1
R1
UINT
Variable
N: Number of words
N specifies the number of words in the range and must be 0001 to FFFF hexadecimal (or &1 to
&65,535).
R1: First word in range
Leftmost byte Rightmost byte
15
8 7
0
R1
to
to
to
R1+(N–1)
Note R1 and R1+(N-1) must be in the same data area.
ꢀ Operand Specifications
Word addresses
Indirect DM addresses
Area
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
OK
AR
T
C
DM
@DM
*DM
N
OK
---
---
OK
OK
OK
OK
OK
OK
OK
OK
---
---
R1
Flags
Name
Label
Operation
Error Flag
P_ER
• ON if the N is 0.
• OFF in all other cases.
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2 Instructions
Function
SWAP(637) switches the position of the two
Byte position is swapped.
bytes in all of the words in the range of mem-
ory from R1 to R1+N-1.
R1
N
Hint
• This instruction can be used to reverse the order of ASCII-code characters in each word.
Sample program
When CIO 0.00 is ON in the following example, SWAP(637) switches the data in the leftmost bytes with
the data in the rightmost bytes in each word in the 10-word range from W0 to W9.
0.00
SWAP
N
&10
R1
W0
15
8 7
0
15
8
7
0
W0
W1
W2
to
4
4
4
1
3
5
4
4
4
2
4
6
W0
W1
W2
to
4
4
4
2
4
6
4
4
4
1
3
5
to
to
W9
3
0
3
1
W9
3
1
3
0
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2 Instructions
FCS
Function
code
Instruction
Mnemonic
FCS
Variations
@FCS
Function
Calculates the FCS value for the specified range
and outputs the result in ASCII.
FRAME CHECKSUM
180
FCS
FCS(180)
C: First control word
Symbol
C
R1
D
2
R1: First word in range
D: First destination word
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Operand
Description
Data type
UDINT
UINT
Size
C
R1
D
First control word
First word in range
First destination word
2
Variable
Variable
UINT
C: First control word
15
R1: First word in range
0
15
0
C
Calculation range
R1
to
to
W: Number of words/bytes in range
&1 to &65535 (decimal) or
#0001 to #FFFF (hex)
0
R1+(W–1)
15 14 13 12 11
00 0000
D: First destination word
C+1
0000
0000
When bytes are specified as the operation units:
15
0
D
0
Starting byte (Valid only when bit 13 is 1.)
When words are specified as the operation units:
15 15
0: Leftmost byte
1: Rightmost byte
0
0
D+1
D
Calculation units
The leftmost four digits are stored in D+1 and the rightmost
four digits are stored in D.
0: Words
1: Bytes
0
Note C and C+1, all of the words in the calculation range
must be in the same data area.
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
C
OK
---
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
R1, D
Flags
Name
Label
Operation
Error Flag
P_ER
• ON if the content of C is not within the specified range of 0001 through FFFF.
• OFF in all other cases.
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2 Instructions
Function
FCS(180) calculates the FCS value for W units
R1
of data beginning with the data in R1, converts
the value to ASCII code, and outputs the result
to D (for bytes) or D+1 and D (for words). The
settings in C+1 determine whether the units
are words or bytes, whether the data is binary
(signed or unsigned) or BCD, and whether to
start with the right or left byte of R1 if bytes are
being added.
W (Table length)
ASCII conversion
FCS value
Calculation
D
When bit 13 of C+1 has been set to 1,
FCS(180) operates on bytes of data. In this
case, bit 12 determines whether the calculation
starts with the rightmost byte of R1 (bit 12 = 1)
or the leftmost byte of R1 (bit 12 = 0).
Sample program
When CIO 0.00 is ON in the following example, FCS(180) calculates the FCS value for the 10 bytes of
data beginning with the rightmost byte of D100 and writes the result to D200.
0.00
FCS
C
R1
D
D300
D100
D200
15 1413121110 9
8
7
6
5
4
3
2
1 0
C+1: D301
Always 0.
Starting byte (Effective only if bit 13 is 1.)
1: Rightmost byte
Units
1: Bytes
Always 0.
15
0
8
0
7
7
0
0
0
A
C: D300
10 bytes
Table length
15
8
0
0
0
0
1
3
5
7
R1: D100
D101
0
0
0
2
4
6
D102
D103
The FCS value for the
shaded bytes is calculated
and converted to ASCII.
D104
0
0
0
0
8
0
D105
15
0
3
0
3
8
D: D200
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2 Instructions
Data Control Instructions
PIDAT
Function
code
Instruction
Mnemonic
PIDAT
Variations
Function
PID CONTROL WITH
AUTOTUNING
Executes PID control according to the specified
parameters. The PID constants can be autotuned.
---
191
2
PID
PIDAT(191)
S: Input word
Symbol
S
C
D
C: First parameter word
D: Output word
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
Not allowed
Usage
OK
Operands
Operand
Description
Data type
UINT
Size
1
S
C
D
Input word
First parameter word
Output word
WORD
UINT
41
1
C: First Parameter Word
15
0
15
0
C+7
C
C+1
C+2
C+3
C+4
Set value (SV)
Proportional band (P)
Integral constant (Tik)
Derivative constant (Tdk)
Sampling period(τ)
Manipulated variable output lower limit
Manipulated variable output upper limit
C+8
15141312
0 0
0
C+9
0
AT Calculation Gain
15
8
7
4
32
1
0
AT Command Bit
0
C+5
15
0
Forward/reverse designation
PID constant update timing designation
Manipulated variable output setting
C+10
C+11
C+40
Limit-cycle Hysteresis
2-PID parameter(α)
Work area
(30 words: Cannot be used by user.)
15 141312 11
0 0
8
7
4 3
0
C+6
0
Output range
Integral and derivative unit
Input range
Manipulated variable output limit control
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2 Instructions
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
S, C, D
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
---
Flags
Name
Label
Operation
Error Flag
P_ER
• ON if the C data is out of range.
• ON if the actual sampling period is more than twice the designated sampling period.
• ON if an error occurred during autotuning.
• OFF in all other cases.
Greater Than Flag
Less Than Flag
Carry Flag
P_GT
P_LT
P_CY
• ON if the manipulated variable after the PID action exceeds the upper limit.
• OFF in all other cases.
• ON if the manipulated variable after the PID action is below the lower limit.
• OFF in all other cases.
• ON while PID control is being executed.
• OFF in all other cases.
Function
When the execution condition is ON, PIDAT(191) carries out target value filtered PID control with two
degrees of freedom according to the parameters designated by C (set value, PID constant, etc.). It
takes the specified input range of binary data from the contents of input word S and carries out the PID
action according to the parameters that are set. The result is then stored as the manipulated variable in
output word D.
The parameter settings are read when the execution condition turns from OFF to ON, and the Error
Flag will turn ON if the settings are outside of the permissible range.
If the settings are within the permissible range, PID processing will be executed using the initial values.
Bumpless operation is not performed at this time. It will be used for manipulated variables in subse-
quent PID processing execution. (Bumpless operation is processing that gradually and continuously
changes the manipulated variable in order to avoid the adverse effects of sudden changes.)
When the execution condition turns ON, the PV for the specified sampling period is entered and pro-
cessing is performed.
Parameters (C to C+8)
PV input (S)
PID control
Manipulated variable (D)
Autotuning
The status of the AT Command Bit (bit 15 of C+9) is checked every cycle. If this control bit is turned ON
in a given cycle, PIDAT(191) will begin autotuning the PID constants. (The changes in the SV will not be
reflected while autotuning is being performed.)
The limit-cycle method is used for autotuning. PIDAT(191) forcibly changes the manipulated variable
(max. manipulated variable ↔ min. manipulated variable) and monitors the characteristics of the con-
trolled system. The PID constants are calculated based on the characteristics that were observed, and
the new P, I, and D constants are stored automatically in C+1, C+2, and C+3. At this point, the AT Com-
mand Bit (bit 15 of C+9) is turned OFF and PID control resumes with the new PID constants in C+1,
C+2, and C+3.
• If the AT Command Bit is ON when PIDAT(191) execution begins, autotuning will be performed first
and then PID control will start with the calculated PID constants.
• If the AT Command Bit is turned ON during PIDAT(191) execution, PIDAT(191) interrupts the PID
control being performed with the user-set PID constants, performs autotuning, and then resumes PID
control with the calculated PID constants.
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2 Instructions
The following flowchart shows the autotuning procedure:
The AT Command Bit (bit 15 of C+9) is ON at
the start of PIDAT(191) execution or it is
turned ON during execution.
PID control is interrupted, the PV is forcibly
changed, and the PID constants are
calculated automatically.
The calculated P, I, and D constants are set in
C+1, C+2, and C+3 respectively. The AT
Command Bit is turned OFF.
2
PID control starts (or restarts) with the new
PID constants.
Note 1 If autotuning is interrupted by turning OFF the AT Command Bit during autotuning, PID control will start
with the PID constants that were being used before autotuning began.
2 Also, if an AT execution error occurs, PID control will start with the PID constants that were being used
before autotuning began.
In both cases described in notes 1 and 2, the PID constants will be enabled if they were already calcu-
lated when autotuning was interrupted.
PID Control
• The number of valid input data bits within the 16 bits of the PV input (S) is designated by the input
range setting in C+6, bits 08 to 11. For example, if 12 bits (4 hex) is designated for the input range,
the range from 0000 hex to 0FFF hex will be enabled as the PV. (Values greater than 0FFF hex will
be regarded as 0FFF hex.)
• The set value range also depends on the input range.
• Measured values (PV) and set values (SV) are in binary without sign, from 0000 hex to the maximum
value of the input range.
• The number of valid output data bits within the 16 bits of the manipulated variable output is desig-
nated by the output range setting in C+6, bits 00 to 03. For example, if 12 bits (4 hex) is designated
for the output range, the range from 0000 hex to 0FFF hex will be output as the manipulated variable.
• For proportional operation only, the manipulated variable output when the PV equals the SV can be
designated as follows:
0: Output 0%
1: Output 50%.
• The direction of proportional operation can be designated as either forward or reverse.
• The upper and lower limits of the manipulated variable output can be designated.
• The sampling period can be designated in units of 10 ms (0.01 to 99.99 s), but the actual PID action
is determined by a combination of the sampling period and the time of PIDAT(191) instruction execu-
tion (with each cycle).
• The timing of enabling changes made to PID constants can be set to either 1) the beginning of
PIDAT(191) instruction execution or 2) the beginning of PID instruction execution and each sampling
period. Only the proportional band (P), integral constant (Tik), and derivative constant (Tdk) can be
changed each sampling cycle (i.e., during PID instruction execution). The timing is set in bit 1 of C+5.
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2 Instructions
Hint
• PIDAT(191) is executed as if the execution condition was a STOP-RUN signal. PID calculations are
executed when the execution condition remains ON for the next cycle after C+11 to C+40 are initial-
ized. Therefore, when using the Always ON Flag (ON) as an execution condition for PIDAT(191), pro-
vide a separate process where C+11 to C+40 are initialized when operation is started.
Precautions
• A PID parameter storage word cannot be shared by multiple PIDAT instructions. Even when the same
parameter is used in multiple PIDAT instructions, separate words must be specified.
• When changing the PID constants manually, set the PID constant change enable setting (bit 1 of
C+5) to 1 so that the values in C+1, C+2, and C+3 are refreshed each sampling period in the PID cal-
culation. This setting also allows the PID constants to be adjusted manually after autotuning.
• Of the PID parameters (C to C+40), only the following parameters can be changed when the execu-
tion condition is ON. When any other values have been changed, be sure to change the execution
condition from OFF to ON to enable the new settings.
• Set value (SV) in C
(Can be changed during PID control only. An SV change during autotuning will not be
reflected.)
• PID constant change enable setting (bit 1 of C+5)
• P, I, and D constants in C+1, C+2, and C+3
(Changes to these constants will be reflected each sampling period only if the PID constant
change enable setting (bit 1 of C+5) is set to 1.)
• AT Command Bit (bit 15 of C+9)
• AT Calculation Gain (bits 0 to 14 of C+9) and Limit-cycle Hysteresis (C+10) (These values are
read when autotuning starts.)
Performance Specifications
Item
Specifications
Target value filter-type two-degrees-of-freedom PID method (forward/reverse)
Unlimited (1 loop per instruction)
PID control method
---
Number of PID control loops
Sampling period
---
τ
0.01 to 99.99 s
PID constant
Proportional band
P
0.1 to 999.9%
Integral constant
Tik
Tdk
SV
PV
MV
1 to 8191, 9999 (No integral action for sampling period multiple, 9999.)
0 to 8191 (No derivative action for sampling period multiple, 0.)
0 to 65535 (Valid up to maximum value of input range.)
0 to 65535 (Valid up to maximum value of input range.)
0 to 65535 (Valid up to maximum value of output range.)
Derivative constant
Set value
Measured value
Manipulated variable
Calculation Method
Calculations in PID control are performed by the target value filtered control with two degrees of
freedom.
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2 Instructions
Block Diagram for Target Value PID with Two Degrees of Freedom
When overshooting is prevented with simple PID control, stabilization of disturbances is slowed (1). If
stabilization of disturbances is speeded up, on the other hand, overshooting occurs and response
toward the target value is slowed (2).
When target-value PID control with two degrees of freedom is used, on the other hand, there is no
overshooting, and response toward the target value and stabilization of disturbances can both be
speeded up (3).
Target value filter
Proportional + integral elements
1 + (1 – λ) Ti · s
+
+
Kp
Set value
(target value)
Kp +
SV
Manipulated variable
Ti · s
1 + Ti · s
–
–
2
Preceding
derivative-type elements
Kp:Proportional constant
Ti:Integral time
Td:Derivative time
s:Laplace operator
α:2-PID parameter
Kp
Td/s
Measured
value (PV)
PV
1 + λ · Td · s
λ:Incomplete derivative coefficient
Simple PID Control
Feed-forward PID Control
(3)
(1)
(2)
Disturbance response
As the target response is slowed,
the disturbance response worsens.
Target response
As the disturbance response is
slowed, the target response worsens.
Overshoot
PID Parameter Settings
Change with ON
input condition
Control data
Item
Contents
Setting range
C
Set value (SV)
The target value of the process being controlled.
Binary data (of the same number of bits as Allowed
specified for the input range)
C+1
C+2
Proportional band
The parameter for P action expressing the pro-
portional control range/total control range.
0001 to 270F hex (1 to 9999);
(0.1% to 999.9%, in units of 0.1%)
Can be changed
with input condi-
tion ON if bit 1 of
C+5 is 1.
Tik
A constant expressing the strength of the integral 0001 to 1FFF hex (1 to 8191);
action. As this value increases, the integral
strength decreases.
Integral Constant
(9999 = Integral operation not executed)
(See note 1.)
C+3
C+4
Tdk
A constant expressing the strength of the deriva-
tive action. As this value increases, the derivative (0000 = Derivative operation not executed)
strength decreases.
0001 to 1FFF hex (1 to 8191);
Derivative Constant
(See note 1.)
Sampling period (τ)
Sets the period for executing the PID action.
0001 to 270F hex (1 to 9999);
Not allowed
(0.01 to 99.99 s, in units of 10 ms)
Bits 04 to 15 2-PID parameter (α)
The input filter coefficient. Normally use 0.65 (i.e., 000 hex: α = 0.65
of C+5
a setting of 000). The filter efficiency decreases
as the coefficient approaches 0.
Setting from 100 to 163 hex means that the
value of the rightmost two digits is set from
α= 0.00 to α= 0.99. (See note 2.)
Bit 03 of C+5 Manipulated variable
output designation
Designates the manipulated variable output for
when the PV equals the SV.
0: Output 0%
1: Output 50%
Bit 01 of C+5 PID constant change
enable setting
The timing of enabling changes made to the pro-
portional band (P), integral constant (Tik), and
derivative constant (Tdk) for use in PID calcula-
tions.
0: At start of PID instruction execution
1: At start of PID instruction execution
and each sampling period
Allowed
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2 Instructions
Change with ON
input condition
Control data
Item
Contents
Setting range
0: Reverse action
Bit 00 of C+5 PID forward/reverse
designation
Determines the direction of the proportional
action.
Not allowed
1: Forward action
Bit 12 of C+6 Manipulated variable
output limit control
Determines whether or not limit control will apply
to the manipulated variable output.
0: Disabled (no limit control)
1: Enabled (limit control)
Bits 08 to 11 Input range
of C+6
The number of input data bits.
0: 8 bits
1: 9 bits
2: 10 bits
3: 11 bits
4: 12 bits
5: 13 bits
6: 14 bits
7: 15 bits
8: 16 bits
Bits 04 to 07 Integral and deriva-
Determines the unit for expressing the integral
and derivative constants.
1: Sampling period multiple
9: Time (unit: 100 ms)
of C+6
tive unit
Bits 00 to 03 Output range
of C+6
The number of output data bits. (The number of
output bits is automatically the same as the num- 1: 9 bits
ber of input bits.)
0: 8 bits
5: 13 bits
6: 14 bits
7: 15 bits
8: 16 bits
2: 10 bits
3: 11 bits
4: 12 bits
C+7
C+8
Manipulated variable
output lower limit
The lower limit for when the manipulated variable 0000 to FFFF (binary)
output limit is enabled. (See note 3.)
Manipulated variable
output upper limit
The upper limit for when the manipulated variable 0000 to FFFF (binary)
output limit is enabled.
(See note 3.)
Bit 15 of C+9 AT Command Bit
This control bit starts autotuning.
As a Control Bit:
Allowed
• Set the AT Command Bit to 1 to perform auto-
tuning. (Autotuning can be started while
PIDAT(191) is being executed.)
• 0 → 1:
Executes autotuning.
• 1 → 0:
Interrupts autotuning.
(PID(191) turns the bit OFF automatically
when autotuning is completed.
• This bit is turned OFF automatically when auto-
tuning is completed.
Autotuning will be interrupted if the AT Command
Bit is turned OFF manually. In this case, the PID
constants will be enabled if they were already cal-
culated when autotuning was interrupted.
As a Flag:
0: Autotuning is not being executed.
1: Autotuning is being executed.
Bits 00 to 11 AT Calculation Gain
of C+9
Set this parameter to adjust the contribution of the 0000 hex: 1.00 (Default)
Allowed
PID calculation results to the stored values.
Normally, leave this parameter set to its default
(0000).
0001 to 03E8 hex (1 to 1000);
(0.01 to 10.00, in units of 0.01)
(These parameters
are read when
autotuning starts.)
• Increase the value when emphasizing stability.
• Decrease the value when emphasizing respon-
siveness.
C+10
Limit-cycle Hysteresis Sets the hysteresis when the limit cycle is gener-
ated. The default setting for reverse operation
0000 hex: 0.20% (Default)
0001 to 03E8 hex:
turns ON the MV with a hysteresis of SV−20%.
0.01 to 10.00% in units of 0.01%
Increase this setting if a proper limit cycle cannot FFFF hex: 0.00%
be generated because the PV is unstable. How-
ever, the AT accuracy will decline if the Limit-cycle
Hysteresis is higher than necessary.
Note The percentage is with respect to the
input range.
Note 1 When the unit is designated as 1, the range is from 1 to 8,191 times the period. When the unit is designated as 9, the
range is from 0.1 to 819.1 s. When 9 is designated, set the integral and derivative times to within a range of 1 to 8,191
times the sampling period.
2 Setting the 2-PID parameter (α) to 000 yields 0.65, the normal value.
3 When the manipulated variable output limit control is enabled (i.e., set to “1”), set the values as follows:
0000 ≤ MV output lower limit ≤ MV output upper limit ≤ Max. value of output range
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Sampling Period and Cycle Time
The sampling period can be designated in units of 10 ms (0.01 to 99.99 s), but the actual PID action is
determined by a combination of the sampling period and the time of PID instruction execution (with
each cycle). The relationship between the sampling period and the cycle time is as follows:
• If the sampling period is less than the cycle time, PID control is executed with each cycle and not with
each sampling period.
• If the sampling period is greater than or equal to the cycle time, PID control is not executed with each
cycle, but PID(190) is executed when the cumulative value of the cycle time (the time between PID
instructions) is greater than or equal to the sampling period. The surplus portion of the cumulative
value (i.e., the cycle time’s cumulative value minus the sampling period) is carried forward to the next
cumulative value.
For example, suppose that the sampling period is 100 ms and that the cycle time is consistently 60
ms. For the first cycle after the initial execution, PID(190) will not be executed because 60 ms is less
than 100 ms. For the second cycle, 60 ms + 60 ms is greater than 100 ms, so PID(190) will be
executed. The surplus of 20 ms (i.e., 120 ms – 100 ms = 20 ms) will be carried forward.
2
For the third cycle, the surplus 20 ms is added to 60 ms. Because the sum of 80 ms is less than 100
ms, PID(190) will not be executed. For the fourth cycle, the 80 ms is added to 60 ms. Because the
sum of 140 ms is greater than 100 ms, PID(190) will be executed and the surplus of 40 ms (i.e.,
120 ms – 100 ms = 20 ms) will be carried forward. This procedure is repeated for subsequent cycles.
1 cycle
PID
1 cycle
PID
1 cycle
PID
1 cycle
PID
1 cycle
PID
60ms
60ms
60ms
60ms
(20 ms + 60 ms = 80 ms)
Not executed. Executed
Processing
(80 ms + 60 ms = 140 ms)
Initial processing
(PID processing
with initial values)
(60 ms)
(60 ms + 60 ms = 120 ms)
Executed
Not executed.
Reading of
measurement
time
Less than 100 ms, so
PID is not executed.
Greater than 100 ms,
so PID is executed
and 20 ms is carried
forward.
Less than 100 ms, so
PID is not executed.
Greater than 100 ms,
so PID is executed and
40 ms is carried forward.
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2 Instructions
PID control
ꢀ Proportional Action (P)
Proportional action is an operation in which a proportional band is established with respect to the set
value (SV), and within that band the manipulated variable (MV) is made proportional to the deviation.
An example for reverse operation is shown in the following illustration.
If the proportional action is used and the present value (PV) becomes smaller than the proportional
band, the manipulated variable (MV) is 100% (i.e., the maximum value). Within the proportional band,
the MV is made proportional to the deviation (the difference between from SV and PV) and gradually
decreased until the SV and PV match (i.e., until the deviation is 0), at which time the MV will be at the
minimum value of 0% (or 50%, depending on the setting of the manipulated variable output designation
parameter). The MV will also be 0% when the PV is larger than the SV.
The proportional band is expressed as a percentage of the total input range. The smaller the propor-
tional band, the larger the proportional constant and the stronger the corrective action will be. With pro-
portional action an offset (residual deviation) generally occurs, but the offset can be reduced by making
the proportional band smaller. If it is made too small, however, hunting will occur.
Proportional Action (Reverse Action)
Adjusting the Proportional Band
100%
50%
0%
Proportional band when
MV output designation is
0 (output 0%)
Proportional band too narrow (hunting occurring)
Proportional band when
MV output designation is
1 (output 50%)
Offset
SV
Proportional band just right
Set point
Proportional band too wide (large offset)
Proportional band when
MV output designation is
0 (output 0%)
Proportional band when
MV output designation is
1 (output 50%)
ꢀ Integral Action (I)
Combining integral action with proportional action reduces the offset according to the time that has
passed, so that the PV will match the SV. The strength of the integral action is indicated by the integral
time, which is the time required for the manipulated variable of the integral action to reach the same
level as the manipulated variable of the proportional action with respect to the step deviation, as shown
in the following illustration. The shorter the integral time, the stronger the correction by the integral
action will be. If the integral time is too short, the correction will be too strong and will cause hunting to
occur.
Integral Action
Step response
0
0
Deviation
Manipulated
variable
Pi Action and Integral Time
Step response
0
Deviation
PI action
I action
P action
Manipulated
variable
0
Ti: Integral time
Ti
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ꢀ Derivative Action (D)
Proportional action and integral action both make corrections with respect to the control results, so
there is inevitably a response delay. Derivative action compensates for that drawback. In response to a
sudden disturbance it delivers a large manipulated variable and rapidly restores the original status. A
correction is executed with the manipulated variable made proportional to the incline (derivative
coefficient) caused by the deviation.
The strength of the derivative action is indicated by the derivative time, which is the time required for the
manipulated variable of the derivative action to reach the same level as the manipulated variable of the
proportional action with respect to the step deviation, as shown in the following illustration. The longer
the derivative time, the stronger the correction by the derivative action will be.
Derivative Action
2
Step response
Deviation
0
Manipulated
variable
0
0
PD Action and Derivative Time
Ramp response
Deviation
PD action
P action
D action
Manipulated
variable
0
Td: Derivative time
PID Action
PID action combines proportional action (P), integral action (I), and derivative action (D). It produces
superior control results even for control objects with dead time. It employs proportional action to provide
smooth control without hunting, integral action to automatically correct any offset, and derivative action
to speed up the response to disturbances.
Step Response of PID Control Action Output
Step response
0
0
Deviation
PID action
I action
P action
D action
Manipulated
variable
Ramp Response of PID Control Action Output
Ramp response
0
Deviation
PID action
I action
P action
D action
Manipulated
variable
0
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Direction of Action
When using PID control, select either of the following two control directions. In either direction, the MV
increases as the difference between the SV and the PV increases.
• Forward action: MV is increased when the PV is larger than the SV.
• Reverse action: MV is increased when the PV is smaller than the SV.
Reverse Action
Forward Action
100%
50%
0%
100%
50%
0%
Output
Output
Low
temperature
SV
SV
High
temperature
High
temperature
Low
temperature
(MV output designation: 50%)
Adjusting PID Parameters
The general relationship between PID parameters and control status is shown below.
• When it is not a problem if a certain amount
of time is required for stabilization (settle-
ment time), but it is important not to cause
overshooting, then enlarge the proportional
band.
• When overshooting is not a problem but it is
desirable to quickly stabilize control, then
narrow the proportional band. If the propor-
tional band is narrowed too much, however,
then hunting may occur.
When P is narrowed
Control by measured PID
SV
SV
Control by measured PID
When P is enlarged
• When there is broad hunting, or when oper-
ation is tied up by overshooting and under-
shooting, it is probably because integral
action is too strong. The hunting will be
reduced if the integral time is increased or
the proportional band is enlarged.
• If the period is short and hunting occurs, it
may be that the control system response is
quick and the derivative action is too strong.
In that case, set the derivative action lower.
Control by measured PID
Control by measured PID
(when hunting occurs in a short period)
(when loose hunting occurs)
SV
SV
Enlarge I or P.
Lower D.
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2 Instructions
Sample program
ꢀ Interrupting PID Control to Perform Autotuning
• At the rising edge of CIO 0.00 (OFF to ON), the work area in D211 to
D240 is initialized according to the parameters (shown below) set in
D200 to D208. After the work area has been initialized, PID control is
executed and the manipulated variable is output to CIO 20.
0.00
PIDAT
10
S
C
D
D200
20
• While CIO 0.00 is ON, PID control is executed at the sampling period
intervals according to the parameters set in D200 to D210. The manip-
ulated variable is output to CIO 20.
W0.0
SETB
D209
• The PID constants used in PID calculations will not be changed even if
the proportional band (P), integral constant (Tik), or derivative con-
stant is changed after CIO 0.00 turns ON.
#000F
2
• At the rising edge of W 0.0 (OFF to ON), SETB(532) turns ON bit 15 of
D209 (C+9) and starts autotuning. When autotuning is completed, the
calculated P, I, and D constants are written to C+1, C+2, and C+3. PID
control is then restarted with the new PID constants.
C:D200
C+1:D201
C+2:D202
C+3:D203
C+4:D204
C+5:D205
C+6:D206
C+7:D207
C+8:D208
C+9:D209
C+10:D210
C+11:D211
to
0
0
0
0
0
0
0
0
0
0
0
1
0
4
1
0
0
4
0
0
0
0
2
6
B
9
3
0
9
0
0
0
0
C
4
0
0
2
0
4
0
0
0
0
Set value: 300
Proportional band: 10.0%
Integral time: 120.0 s
Derivative time: 40.0 s
Sampling period: 0.5 s
Reverse operation (bit 00: 0), PID constant change enable setting = OFF
(bit 01: 0), set value = manipulated variable output 50% (bit 03: 1), 2-PID
parameter = 0.65 (bits 04 to 15: 000 hex)
Manipulated variable output range: 12 bits (bits 00 to 03: 4 hex),
Integral/derivative constant: time designation (bits 04 to 07: 9 hex)
Input range: 12 bits (bits 08 to 11: 4 hex),
Parameters
PID
calculation
Manipulated variable output limit control disabled (bit 12: 0)
PV:
CIO 10
AT Command Bit OFF (bit 15: 0),
AT Calculation Gain = 1.00 (bits 00 to 11: 000 hex)
Limit-cycle Hysteresis = 0.20%
Work area
PID starting integral manipulated variable designation = start from same
integral manipulated value as manipulated variable output designation
(bit 14: 0 and bit 13: 0)
MV output: CIO 20
C+40:D240
Calculated PID
constants are set.
PID control starts
CIO 0.00
W0.00
PID control AT executing PID control
Bit 15 of D209
PV
SV
Time
MV
Time
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2 Instructions
ꢀ Starting PIDAT(191) with Autotuning
At the rising edge of CIO 0.00 (OFF to ON), autotuning will be performed first if bit
0.00
15 of D209 (C+9) is ON. When autotuning is completed, the calculated P, I, and D
constants are written to C+1, C+2, and C+3. PID control is then started with the
calculated PID constants.
PIDAT
10
S
C
D
D200
20
PID control and
autotuning start.
Calculated PID
constants are set.
CIO 0.00
AT executing
PID control
Bit 15 of D209
PV
SV
Time
MV
Time
ꢀ Interrupting Autotuning Before Completion
Autotuning can be interrupted by turning bit 15 of D209 (C+9) from ON to OFF. PID control will be
restarted with the P, I, and D constants that were in effect before autotuning was started.
PID control starts.
CIO 0.00
PID control AT executing
PID control
AT starts AT is interrupted.
Bit 15 of D209
PV
SV
PID control is restarted with the
existing PID constants.
Time
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2 Instructions
TPO
Function
code
Instruction
Mnemonic
Variations
Function
Inputs the duty ratio or manipulated variable from
the specified word, converts the duty ratio to a
time-proportional output based on the specified
parameters, and outputs the result from the speci-
fied output.
TIME-PROPORTIONAL
OUTPUT
TPO
---
685
TPO
2
TPO
S: Input word
Symbol
S
C
R
C: First parameter word
R: Pulse output bit
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Operand
Description
Data type
UINT
Size
1
S
C
R
Input word
First parameter word
Pulse output bit
WORD
BOOL
7
---
S: Input Word
Specifies the input word containing the input duty ratio or manipulated variable.
• Input duty ratio: 0000 to 2710 hex (0.00% to 100.00%)
• Input manipulated variable (See note.): 0000 to FFFF hex (0 to 65,535 max.) (Bits 00 to 03 of C spec-
ify the manipulated variable range, i.e., the number of valid bits in the manipulated variable. Specify
the same number of bits as specified for the output range setting in PIDAT(191).)
Note If S is a manipulated variable, specify the word containing the manipulated variable output from a
PIDAT(191) instruction.
C: First Parameter Word
Bits 04 to 07 of C specify the input type, i.e., whether the input word contains an input duty ratio or
manipulated variable. (Set these bits to 0 hex to specify a input duty ratio or to 1 hex to specify a manip-
ulated variable.)
The following diagram shows the locations of the parameter data.
15
0
15
12 11
8
7
4
3
0
Control period
Output lower limit
Output upper limit
C+1
C+2
C+3
C+4
C+5
C+6
C
Manipulated variable range
Input type
Input read timing
Output limit function
Work area
(3 words, cannot be used by user)
Note For details, see the description of each parameter.
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2 Instructions
R: Pulse Output Bit
Specifies the destination output bit for the pulse output.
Normally, specify an output bit allocated to a Transistor Output Unit and connect a solid state relay to
the Transistor Output Unit.
ꢀ Operand Specifications
Word addresses
Indirect DM addresses
Area
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
OK
---
DM
OK
---
@DM
*DM
OK
---
S
C
R
OK
---
OK
---
OK
OK
OK
OK
OK
---
---
---
---
Flags
Name
Label
Operation
Error Flag
ER
• ON if the input data in S is out of range. (The input data setting range depends on the input type set-
ting.)
• ON if the C data is out of range. (The manipulated variable range will cause an error only when the
input type is set to manipulated variable.)
• ON if the control period in C+1 is out of range.
• ON if the output limit function is enabled but the output lower limit (C+2) or output upper limit (C+3) is
out of range.
• ON if the output limit function is enabled but the output lower limit (C+2) is less than or equal to the
output upper limit (C+3).
• OFF in all other cases.
Function
Receives a duty ratio or manipulated variable input from the word address specified by S, converts the
duty ratio to a time-proportional output (see note) based on the parameters specified in words C to C+3,
and outputs a pulse output to the bit specified by R.
Note A time-proportional output is changed proportionally based on the ON/OFF ratio in input word S. The period
in which the ON and OFF status changes is known as the control period and is set in parameter word C+1.
Example: When the control period is 1 s and the input value is 50%, the bit is ON for 0.5 s and OFF for 0.5 s.
When the control period is 1 s and the input value is 80%, the bit is ON for 0.8 s and OFF for 0.2 s.
Generally, TPO(685) is used together with PIDAT(191) and the PID instruction’s manipulated variable
result word (D) is specified as the input word (S) for the TPO(685) instruction. Also, an output bit allo-
cated to a Transistor Output Unit is generally specified as R and a solid state relay is connected to the
Transistor Output Unit to perform time-proportional control of a heater (proportional control of the
ON/OFF ratio).
ꢀ Combining TPO(685) with a PID Control Instruction
When combining TPO(685) with a PID control instruction, the manipulated variable input is divided by
the manipulated variable range to calculate the duty ratio, that duty ratio is converted to a time-propor-
tional output, and pulses are output.
0.00
PIDAT
S
C
PV input
PID calculation
Manipulated variable (MV)
PID parameters
D0
Manipulated
variable
MV
Output range
D0
= MV range
TPO
D0
C
MV
Parameters
Pulse output
MV ÷ MV range
R
Duty ratio (0.00% to 100.00%)
Conversion to time-proportional
output
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2 Instructions
In this case, set the same value for the PID Control instruction’s output range and the TPO(685) instruc-
tion’s manipulated variable range. For example, when the PID Control instruction’s output range and the
TPO(685) instruction’s manipulated variable range are both set to 12 bits (0000 to 0FFF hex), the duty
ratio is calculated by dividing the manipulated variable from the PID Control instruction by 0FFF hex
and TPO(685) converts that duty ratio to a time-proportional output.
ꢀ External Wiring Example
Connect the Transistor Output Unit to a solid state relay (SSR) as shown in the following diagram.
Heater
Transistor Output Unit
SSR
12 to 24 VDC
COM
+
2
AC
Parameter Settings
Control data
Changewith
ON input
condition
Item
Contents
Setting range
5 hex: 13 bits
6 hex: 14 bits
7 hex: 15 bits
8 hex: 16 bits
Word
Bits
C
00 to 03
Manipulated
variable range
Specifies the number of input data bits.
0 hex: 8 bits
1 hex: 9 bits
2 hex: 10 bits
3 hex: 11 bits
4 hex: 12 bits
Allowed
04 to 07
Input type
Specifies whether S contains a duty ratio 0 hex: Duty ratio
Allowed
or manipulated variable.
Setting range for S: 0000 to 2710 hex (0.00 to
100.00%)
1 hex: Manipulated variable
Setting range for S: 0000 to FFFF hex (0 to
65,535)
(The maximum setting depends on the MV range
set with bits 00 to 03 of C.)
08 to 11
Input read tim- Specifies the input read timing.
ing
0 hex: Use the beginning value of the control period
1 hex: Use lower value
Allowed
2 hex: Use higher value
3 hex: Continuous adjustment
12 to 15
00 to 15
Output limit
control
Specifies whether the output limit function 0 hex: Disabled
Allowed
Allowed
is enabled or disabled.
1 hex: Enabled (See note.)
C+1
Control period Control period
(Time period in which the ON/OFF
0064 to 270F hex (1.00 to 99.99 s)
Note For example, 1.00 s is set as 0064 hex, and not
changes are made.)
0001 hex.
C +2
C +3
00 to 15
00 to 15
Output lower
limit
Specifies the lower limit when the output
limit is enabled.
0000 to 2710 hex (0 to 100.00%)
0000 to 2710 hex (0 to 100.00%)
Cannot be used.
Allowed
Allowed
---
Output upper
limit
Specifies the upper limit when the output
limit is enabled.
C+4
C+5
C+6
00 to 15
00 to 15
00 to 15
Work area
This work area is used by the system. It
cannot be used by the user.
Note When the output limit control function is enabled, set the lower and upper limits as follows:
0000 hex ≤ lower limit ≤ upper limit ≤ 2710 hex.
Execution
• The instruction is executed while the input condition is ON.
• When instruction execution starts, the output bit (R) is turned ON/OFF according to the duty ratio.
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2 Instructions
• The parameters (in C to C+3) are read in real time each time that the instruction is executed. When
changing the parameters, change all of them at the same time so that different sets of parameters are
not mixed.
• The output (R) is turned ON/OFF when the instruction is executed and the accuracy of the output’s
ON/OFF timing is 10 ms max.
• Execution of the instruction stops when the input condition goes OFF. At that time, the elapsed time
value will be reset and the control period will be initialized.
• The input type setting (bits 04 to 07 of C) determines whether the input word (S) contains a duty ratio
or manipulated variable. When S contains the manipulated variable, the duty ratio is calculated by
dividing the manipulated variable input by the manipulated variable range (bits 00 to 03 of C).
• The input read timing setting (bits 08 to 11 of C) specifies when the input word (S) is read, as shown
in the following table:
Input read timing
Description
0: Use the beginning value of
the control period
The duty ratio input is read at the beginning of the control period and the ratio cannot be
changed during the control period.
1: Use lower value
If the duty ratio input falls below the duty ratio at the beginning of the control period, the
lower value will take precedence and the output ON time will be reduced accordingly.
2: Use higher value
3: Continuous adjustment
If the duty ratio input rises above the duty ratio at the beginning of the control period, the
higher value will take precedence and the output ON time will be increased accordingly.
The duty ratio will be read in real time each time the instruction is executed and the
ON/OFF operation will be repeated within the control period.
The following diagrams show the operation of each input read timing setting.
• Input time setting = 0 (Use the beginning value of the control period.)
Read only at the beginning of the control period.
Control period (a)
Control period (a)
100%
Duty ratio
(MV/MV range)
70%
55%
0%
a × 0.55 s
a × 0.45 s
a × 0.70 s
a × 0.30 s
Output
Time
Each control period’s output is determined by the duty ratio at the beginning of that period.
Use this setting for general applications.
• Input time setting = 1 (Use lower value.)
Control period (a)
Control period (a)
100%
70%
55%
Duty ratio
(MV/MV range)
35%
55% target
cut to 35%.
70% target
is kept.
0%
a × 0.70 s
a × 0.30 s
a × 0.35 s
a × 0.65 s
Output
Time
If the duty ratio falls below the initial value early enough, the duty ratio will be adjusted and the
output will be turned OFF sooner.
Use this setting for applications such as avoiding overshooting when using time-proportional
control to control heating and using a relatively long control period.
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2 Instructions
• Input time setting = 2 (Use higher value.)
Control period (a)
70% target is kept.
Control period (a)
100%
80%
70%
55%
Duty ratio
(MV/MV range)
70% target
raised to 80%.
0%
a ×
0.20 s
a × 0.45 s
a × 0.55 s
a × 0.80 s
Output
Time
2
If the duty ratio rises above the initial value early enough, the duty ratio will be adjusted and the
output will be turned ON sooner. (With this setting the output’s ON/OFF order is reversed and
the output goes from OFF to ON.)
Use this setting for applications such as avoiding undershooting when using time-proportional
control to control cooling and using relatively long control period.
• Input time setting = 3 (Continuous adjustment)
100%
Control period (a)
100%
Control period (a)
: Output ON
: Output OFF
Duty ratio
(MV/MV range)
0%
a ×
0.20 s
a ×
0.20 s
a ×
0.20 s
a × 0.35 s
Output
Time
Changes in the duty ratio are monitored in real time. If the duty ratio falls below the
initial value early enough, the duty ratio will be adjusted and the output will be turned
OFF sooner. If the duty ratio rises again after that, the ratio will be adjusted again
and the output will be turned ON. This process is repeated continuously.Use this
setting to improve responsiveness when the control period is relatively long and the
duty ratio changes quickly. This setting is also appropriate for lighting or power
applications that require precise control.
• The output limiter function (bits 12 to 15 of C) can be enabled to restrict (saturate) output when it is
outside the range between the output limiter lower limit (C + 2) and output limiter upper limit (C + 3).
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2 Instructions
Precautions
When using TPO(685) in combination with PIDAT(191) in a cyclic task and also using an interrupt
task, temporarily disable interrupts by executing DI(693) (DISABLE INTERRUPTS) ahead PIDAT(191)
and TPO(685). If interrupts are not disabled and an interrupt occurs between the PIDAT(191) and
TPO(685), the control period may be shifted.
Cyclic task
DI
PIDAT
PV input
S
C
D
PID parameters
Reception prohibited
Interrupt task
Manipulated
variable
TPO
Manipulated
variable
S
C
R
Parameters
Pulse output
EI
Reception allowed
Interrupt task
Sample program
ꢀ Combining TPO(685) with PIDAT(191)
When CIO 0.00 is ON, TPO(685) takes the manipulated variable output from PIDAT(191) (contained in
D0), calculates the duty ratio from that manipulated variable value (Duty ratio = MV ÷ MV range), con-
verts the duty ratio to a time-proportional output, and outputs the pulses to bit 01 of CIO 100.
In this case, CIO 100 is allocated to a Transistor Output Unit and bit CIO 100.01 is connected to a solid
state relay for heater control.
0.00
PIDAT
When CIO 0.00 goes from OFF to ON, PID(190)
10
D200
D0
S
C
D
PV input
reads the parameters, performs the PID
calculation with the PV input in CIO 10, and
outputs the manipulated variable (MV) to D0.
PID parameters
Manipulated variable
TPO(685) calculates the duty ratio by dividing
the MV in D0 by the MV range (0FFF Hex since
the range is set to 12 bits), converts that duty
ratio to a time-proportional output, and outputs
the pulse output to bit 01 of CIO 100.
TPO
D0
Manipulated variable
Parameters
S
C
R
D500
100.01
Pulse output
D200
Set value (SV)
D201
Proportional band (P)
:
D206
4
:
Output range: 4 hex
:
(12 bits: 0000 to 0FFF hex)
D500
1
4
MV range: 4 hex
(12 bits: 0000 to 0FFF hex)
Input type: 1 hex (MV)
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2 Instructions
ꢀ Using TPO(685) Alone
When CIO 0.00 is ON, TPO(685) takes the duty ratio in D10, converts the duty ratio to a time-propor-
tional output, and outputs the pulses to bit 00 of CIO 100.
In this case, the control period is 1 s and the output limit function is enabled with a lower limit 20.00%
and an upper limit of 80.00%.
0.00
TPO
D10
TPO(685) takes the duty ratio in D10, converts that duty
ratio to a time-proportional output, and outputs the pulse
output to bit 00 of CIO 100.
S
C
R
Duty ratio
D0
Parameters
Pulse output
100.00
2
1
0
0
1
1
0
7
F
0
6
0
4
0
0
D0
D1
D2
D3
D4
D5
D6
:
Duty ratio input, read initial value, and enable output limit function.
Control period = 1.00 s
Output lower limit = 20.00%
D
4
Output upper limit = 80.00%
Do not set.
Do not set.
Do not set.
:
D10
0 to 100.00%
0 to 2710 hex
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2 Instructions
SCL
Function
code
Instruction
Mnemonic
SCL
Variations
@SCL
Function
Converts unsigned binary data into unsigned BCD
data according to the specified linear function.
SCALING
194
SCL
SCL(194)
S: Source word
Symbol
S
P1
R
P1: First parameter word
R: Result word
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Operand
Description
Data type
UINT
Size
S
P1
R
Source word
First parameter word
Result word
1
4
1
LWORD
WORD
P1: First Parameter Word
15
P1
0
Scaled value for point A (Ar)
0000 to 9999 (4-digit BCD)
15
15
0
P1+1
P1+2
Unscaled value for point A (As)
0000 to FFFF (binary)
0
Scaled value for point B (Br)
0000 to 9999 (4-digit BCD)
15
0
P1+3
Unscaled value for point B (Bs)
0000 to FFFF (binary)
Note P1 to P1+3 must be in the same area.
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
S, P1, R
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
---
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2 Instructions
Flags
Name
Label
P_ER
Operation
Error Flag
• ON if the contents of P1 (Ar) or P1+1 (Br) is not BCD.
• ON if the contents of P1+1 (As) and P1+3 (Bs) are equal.
• OFF in all other cases.
Equals Flag
P_EQ
• ON if the result is 0.
• OFF in all other cases.
Function
SCL(194) is used to convert the unsigned binary data contained in the source word S into unsigned
BCD data and place the result in the result word R according to the linear function defined by points
(As, Ar) and (Bs, Br). The address of the first word containing the coordinates of points (As, Ar) and (Bs,
Br) is specified for the first parameter word P1. These points define by 2 values (As and Bs) before scal-
ing and 2 values (Ar and Br) after scaling.
2
The following equations are used for the conversion.
(Br – Ar)
× BCD conversion of (Bs – S)
R = Bd –
BCD conversion of (Bs – As)
Points A and B can define a line with either a positive or negative slope. Using a negative slope enables
reverse scaling.
• The result will be rounded to the nearest integer. If the result is less than 0000, 0000 will be output as
the result.
• If the result is greater than 9999, 9999 will be output.
Scaling is performed according to
the linear function defined by points
A and B.
R (unsigned BCD)
P
Ar(BCD)
Point B
Converted value
Br
As(BIN)
Br(BCD)
Bs(BIN)
P1+1
P1+2
P1+3
Point A
Ar
Converted value
S (unsigned binary)
As
Bs
Hint
• SCL(194) can be used to scale the results of analog signal conversion values from Analog Input
Units according to user-defined scale parameters. For example, if a 1 to 5-V input to an Analog Input
Unit is input to memory as 0000 to 0FA0 hexadecimal, the value in memory can be scaled to 50 to
200°C using SCL(194).
• SCL(194) converts unsigned binary to unsigned BCD. To convert a negative value, it will be neces-
sary to first add the maximum negative value in the program before using SCL(194) (see example).
SCL(194) cannot output a negative value to the result word, R. If the result is a negative value, 0000
will be output to R.
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2 Instructions
Sample program
In the following example, it is assume that an analog signal from 1 to 5 V is converted and input to D0
as 0000 to 0FA0 hexadecimal. SCL(194) is used to convert (scale) the value in CIO 200 to a value
between 0 and 300 BCD.
When CIO 0.00 is ON, the contents of D0 is scaled using the linear function defined by point A (0000,
0000) and point B (0FA0, 0300). The coordinates of these points are contained in D100 to D103, and
the result is output to D200.
SCL
0.00
S
P1
R
D0
D100
D200
Contents of D200 (R)
P1: D100
P1+1:D101
P1+2:D102
P1+3:D103
0
0
0
0
0
0
3
F
0
0
0
A
0
0
0
0
Ar(BCD)
As(BIN)
Br(BCD)
Bs(BIN)
Point B
0300
Point A
0000
Contents of D0 (S)
0000Hex
0FA0Hex
5V
1V
Reference:
An Analog Input Unit actually inputs values from FF38 to 1068 hexadecimal for 0.8 to 5.2 V. SCL(194),
however, can handle only unsigned binary values between 0000 and FFFF hexadecimal, making it
impossible to use SCL(194) directly to handle signed binary values below 1 V (0000 hexadecimal), i.e.,
FF38 to FFFF hexadecimal. In an actual application, it is thus necessary to add 00C8 hexadecimal to
all values so that FF38 hexadecimal is represented as 0000 hexadecimal before using SCL(194), as
shown in the following example.
1130Hex
+
1068Hex
5.2V
5V
1068 Hex
0FA0 Hex
200
#000C8
D0
+00C8 Hex
SCL
D0
The value in CIO
0200 plus 00C8
hexadecimal
00C8Hex
0000Hex
D100
D200
1V
0000 Hex
FF38 Hex
0.8V
Contents of D 200 (R)
Point A (00C8 Hex → 0000 (BCD))
Point B (1068 Hex → 0300 (BCD))
0315
P1: D100
P1+1:D101
P1+2:D102
P1+3:D103
0
0
0
1
0
0
3
0
0
C
0
0
8
0
8
Ar(BCD)
As(BIN)
Br(BCD)
Bs(BIN)
Point B
0300
6
Point A
0000
Contents of D0 (S)
1130Hex
0000Hex
00C8Hex
0.8V
1068Hex
5.2V
1V
5V
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2 Instructions
In this example, values from 0000 to 00C8 hexadecimal will be converted to negative values. SCL(194),
however, can output only unsigned BCD values from 0000 to 9999, so 0000 BCD will be output when-
ever the contents of D0.00 is between 0000 and 00C8 hexadecimal.
Reverse Scaling
Reverse scaling can also be used by setting As < Bs and Ar > Br. The following relationship will result.
R (unsigned BCD)
Point A
Ar
Point B
Br
2
S (unsigned binary)
As
Bs
Reverse scaling can be used, for example, to convert (reverse scale) 1 to 5 V (0000 to 0FA0 hexadeci-
mal) to 0300 to 0000, respectively, as shown in the following diagram.
R
Point A
0300
0000
Point B
0FA0Hex
5V
S
0000Hex
1V
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2 Instructions
SCL2
Function
code
Instruction
Mnemonic
Variations
Function
Converts signed binary data into signed BCD data
according to the specified linear function. An offset
can be input in defining the linear function.
SCALING 2
SCL2
@SCL2
486
SCL2
SCL2(486)
Symbol
S: Source word
S
P1
R
P1: First parameter word
R: Result word
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Operand
Description
Data type
INT
Size
S
P1
R
Source word
First parameter word
Result word
1
3
1
WORD
WORD
P1: First Parameter Word
15
P1
0
Offset of linear function
8000 to 7FFF (signed binary)
15
15
0
P1+1
P1+2
8000 to 7FFF (signed binary)
0
Note P1 to P1+2 must be in the same area.
0000 to 9999 (BCD)
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
S, P1, R
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
---
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2 Instructions
Flags
Name
Label
P_ER
Operation
Error Flag
• ON if the contents of C+1 (∆X) is 0000.
• ON if the contents of C+2 (∆Y) is not BCD.
• OFF in all other cases.
Equals Flag
Carry Flag
P_EQ
P_CY
• ON if the result is 0.
• OFF in all other cases.
• ON if the result is negative.
• OFF if the result is zero or positive.
Function
SCL2(486) is used to convert the signed binary data contained in the source word S into signed BCD
data (the BCD data contains the absolute value and the Carry Flag shows the sign) and place the result
in the result word R according to the linear function defined by the slope (∆X, ∆Y) and an offset. The
address of the first word containing ∆X, ∆Y, and the offset is specified for the first parameter word P1.
The sign of the result is indicated by the status of the Carry Flag (ON: negative, OFF: positive).
2
The following equations are used for the conversion.
∆Y
× [(BCD conversion of S) – (BCD conversion of offset)]
R =
BCD conversion of ∆X
Note The slope of the line is ∆Y/∆X.
The offset and slope can be a positive value, 0, or a negative value. Using a negative slope enables
reverse scaling.
• The result will be rounded to the nearest integer.
• The result in R will be the absolute BCD conversion value and the sign will be indicated by the Carry
Flag. The result can thus be between –9999 and 9999.
• If the result is less than –9999, –9999 will be output as the result. If the result is greater than 9999,
9999 will be output.
Negative Offset
Positive Offset
R (signed BCD)
R (signed BCD)
∆Y
∆Y
∆X
Offset
∆X
S (signed binary)
S (signed binary)
Offset
Offset of 0000
(Signed binary)
(Signed binary)
(Signed BCD)
Offset
P1
R (signed BCD)
∆Y
P1+1
P1+2
∆X
∆Y
Offset = 0000 hex
∆X
S (signed binary)
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2 Instructions
Hint
• SCL2(486) can be used to scale the results of analog signal conversion values from Analog Input
Units according to user-defined scale parameters. For example, if a 1 to 5-V input to an Analog Input
Unit is input to memory as 0000 to 0FA0 hexadecimal, the value in memory can be scaled to –100 to
200°C using SCL2(486).
• SCL2(486) converts signed binary to signed BCD. Negative values can thus be handled directly for S.
The result of scaling in R and the Carry Flag can also be used to output negative values for the scal-
ing result.
Sample program
ꢀ Scaling 1 to 5-V Analog Input to 0 to 300
In the following example, it is assumed that an analog signal from 1 to 5 V is converted and input to CIO
3 as 0000 to 1770 hexadecimal. SCL2(486) is used to convert (scale) the value in CIO 3 to a value
between 0000 and 0300 BCD.
When CIO 0.00 is ON, the contents of CIO 3 is scaled using the linear function defined by ∆X (1770),
∆Y (0300), and the offset (0). These values are contained in D100 to D102, and the result is output to
D200.
0.00
SCL2
S
P1
R
3
D100
D200
Contents of R (D200)
0
1
0
0
7
3
0
7
0
0
0
0
P1: D100
P1+1:D101
P1+2:D102
Offset
∆X
0315
0300
∆Y
∆Y
0000
-0015
Contents of S (CIO 3)
FED4 0000
0.8V 1V
1770 189C
5V 5.2V
1770Hex
(∆X)
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2 Instructions
ꢀ Scaling 1 to 5-V Analog Input to –200 to 200
In the following example, it is assume that an analog signal from 1 to 5 V is converted and input to CIO
3 as 0000 to 1770 hexadecimal. SCL2(486) is used to convert (scale) the value in CIO 3 to a value
between –0200 and 0200 BCD.
When CIO 0.00 is ON, the contents of CIO 3 is scaled using the linear function defined by ∆X (1770),
∆Y (0400), and the offset (07D0). These values are contained in D100 to D102, and the result is output
to D200.
0.00
SCL2
S
P1
R
3
D100
D200
Contents of R(D200)
2
P1: D100
P1+1:D101
P1+2:D102
0
1
0
7
7
4
D
7
0
0
0
0
Offset
∆X
0220
0200
∆Y
Offset
07D0 Hex
0400(∆Y)
Contents of S (CIO 200)
0000
-0200
-0220
FED4 0000
1770 189C
5V 5.2V
0.8V
1V
1770 Hex
(∆X)
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2 Instructions
SCL3
Function
code
Instruction
Mnemonic
Variations
Function
Converts signed BCD data into signed binary data
according to the specified linear function. An offset
can be input in defining the linear function.
SCALING 3
SCL3
@SCL3
487
SCL3
SCL3(487)
S: Source word
S
P1
R
Symbol
P1: First parameter word
R: Result word
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Operand
Description
Data type
WORD
WORD
INT
Size
S
P1
R
Source word
First parameter word
Result word
1
5
1
P1: First Parameter Word
15
0
P1
Offset of linear function
8000 to 7FFF (signed binary)
15
15
0
P1+1
P1+2
∆X
0001 to 9999 (BCD)
0
∆Y
8000 to 7FFF (signed binary)
0
15
15
P1+3
P1+4
Maximum conversion
8000 to 7FFF (signed binary)
0
Minimum conversion
8000 to 7FFF (signed binary)
Note P1 to P1+4 must be in the same area.
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2 Instructions
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
S. P1,R
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
---
Flags
Name
Label
Operation
Error Flag
P_ER
• ON if the contents of S is not BCD.
• ON if the contents of C+1 (∆X) is not between 0001 and 9999 BCD.
• OFF in all other cases.
Equals Flag
P_EQ
P_N
• ON if the result is 0.
• OFF in all other cases.
2
Negative Flag
• ON when the MSB of the R (the result) is 1.
• OFF in all other cases.
Function
SCL3(487) is used to convert the signed BCD data (the BCD data contains the absolute value and the
Carry Flag shows the sign) contained in the source word S into signed binary data and place the result
in the result word R according to the linear function defined by the slope (∆X, ∆Y) and an offset. The
maximum and minimum conversion values are also specified. The address of the first word containing
∆X, ∆Y, the offset, the maximum conversion, and the minimum conversion is specified for the first
parameter word P1.
The sign of the result is indicated by the status of the Carry Flag (ON: negative, OFF: positive). Use
STC(040) and CLC(041) to turn the Carry Flag ON and OFF.
The following equations are used for the conversion.
∆Y
× ((Binary conversion of S) + (Offset))
R =
Binary conversion of ∆X
Note The slope of the line is ∆Y/∆X.
• The offset and slope can be a positive value, 0, or a negative value. Using a negative slope enables
reverse scaling.
• The result will be rounded to the nearest integer.
• The source value in S is treated as an absolute BCD value and the sign is indicated by the Carry
Flag. The source value can thus be between –9999 and 9999.
• If the result is less than the minimum conversion value, the minimum conversion value will be output
as the result. If the result is greater than the maximum conversion value, the maximum conversion
value will be output.
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2 Instructions
Positive Offset
Negative Offset
R (signed binary)
Max conversion
R (signed binary)
Max conversion
∆Y
∆Y
∆X
Offset
S (signed BCD)
∆X
S (signed BCD)
Min. conversion
Offset
Min. conversion
Offset of 0000
R (signed binary)
Max conversion
∆Y
∆X
S (signed BCD)
Min. conversion
Hint
SCL3(487) is used to convert data using a user-defined scale to signed binary for Analog Output Units.
For example, SCL3(487) can convert 0 to 200 °C to 0000 to 1770 (hex) and output an analog output
signal 1 to 5 V from the Analog Output Unit.
Sample program
When a value from 0 to 200 is scaled to an analog signal (1 to 5 V, for example), a signed BCD value of
0000 to 0200 is converted (scaled) to signed binary value of 0000 to 1770 for an Analog Output Unit.
When CIO 0.00 turns ON in the following example, the contents of D0 is scaled using the linear function
defined by ∆X (0200), ∆Y (1770), and the offset (0). These values are contained in D100 to D102. The
sign of the BCD value in D0 is indicated by the Carry Flag. The result is output to CIO 103.
0.00
SCL3
S
P1
R
D0
D100
103
0
0
1
1
F
0
2
7
8
E
0
0
7
9
D
0
0
P1 :D100
P1+1:D101
P1+2:D102
P1+3:D103
P1+4:D104
Offset
Contents of R (2011, signed binary)
∆X
0
∆Y
189C
1770
C
4
Max. conversion
Min. conversion
∆Y(1770 Hex)
Contents of S (D0, signed BCD)
∆X(0200)
-010
0200 2010
FED4
0000
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2 Instructions
AVG
Function
code
Instruction
Mnemonic
AVG
Variations
Function
Calculates the average value of an input word for
the specified number of cycles.
AVERAGE
---
195
AVG
AVG(195)
S: Source word
S
N
R
Symbol
2
N: Number of cycles
R: Result first word
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Operand
Description
Data type
UINT
Size
S
N
R
Source word
Number of cycles
Result first word
1
1
UINT
UINT
Variable
N: Number of Cycles
The number of cycles must be between 0001 and 0040 hexadecimal (0 to 64 cycles).
R: Result First Word and R+1: First Work Area Word
R: Average
R+1: Processing information
15 14
0
R+1
Used by system.
Average Valid Flag
OFF: Not valid (AVG(195) has not yet been executed the specified number of cycles.)
ON: Valid.
R+2:
Previous value #1
R+N+1:
Previous value #N
Note R to R+N+1 must be in the same area.
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
S, N
R
OK
---
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
Flags
Name
Label
Operation
Error Flag
P_ER
• ON if the contents of N is 0.
• OFF in all other cases.
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2 Instructions
Function
For the first N–1 cycles when the execution
S: Source word
condition is ON, AVG(195) writes the values of
S in order to words starting with R+2. The Pre-
vious Value Pointer (bits 00 to 07 of R+1) is
incremented each time a value is written. Until
the Nth value is written, the contents of S will
be output unchanged to R and the Average
Value Flag (bit 15 of R+1) will remain OFF.
N: Number of cycles
When the Nth value is written to R+N+1, the
average of all the values that have been stored
will be computed, the average will be output to
R as an unsigned binary value, and the Aver-
age Value Flag (bit 15 of R+1) will be turned
ON. For all further cycles, the value in R will be
updated for the most current N values of S.
R
R+1
Pointer
Average Valid Flag
Average
S
S
Cycle 1
Cycle 2
R+2
R+3
The maximum value of N is 64. If a value
greater than 64 is specified, operation will use
a value of 64.
N values
S
Cycle N
R+N+1
The Previous Value Pointer will be reset to 0
after N–1 values have been written.
The average value output to R will be rounded
to the nearest integer.
Precautions
The processing information (R+1) is cleared to 0000 each time the execution condition changes from
OFF to ON.
But the processing information (R+1) will not be cleared to 0000 the first time the program is executed
at the start of operation. If AVG(195) is to be executed in the first program scan, clear the First Work
Area Word from the program.
Sample program
When CIO 0.00 is ON in the following example, the contents of D100 will be stored one time each scan
for the number of scans specified in D200. The contents will be stored in order in the ten words from
D302 to D311. The average of the contents of these ten words will be placed in D300 and then bit 15 of
D301 will be turned ON.
S:D100
0.00
AVG
D100
D200
D300
S
N
R
N:D200
(10 times)
0
0
0
A
R:D300
15
8 7
0
R+1:D301
Pointer
Average
Average Valid Flag
S, scan 1
R+2:D302
R+3:D303
S, scan 2
R+11:D311
S, scan n
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2 Instructions
• In the following example, the content of CIO 40 is set to #0000 and then incremented by 1 each cycle.
• For the first two cycles, AVG(195) moves the content of CIO 40 to D1002 and D1003. The contents of
D1001 will also change (which can be used to confirm that the results of AVG(195) has changed).
• On the third and later cycles AVG(195) calculates the average value of the contents of D1002 to
D1004 and writes that average value to D1000.
0.00
@MOV
#0000
40
AVG
40
2
#0003
D1000
CLC(41)
+
40
#0001
40
1st cycle
0
2nd cycle
1
3rd cycle
2
4th cycle
3
CIO 40
1
2 Average
Average
Pointer
D1000
D1001
D1002
D1003
D1004
0
1
1
2
1
8000
0
2
8001
3
0
0
3 previous values of IR 40
---
---
1
1
1
---
2
2
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2 Instructions
Subroutines Instructions
SBS
Function
code
Instruction
Mnemonic
SBS
Variations
@SBS
Function
Calls the subroutine with the specified subroutine
number and executes that program.
SUBROUTINE CALL
091
SBS
Symbol
SBS(091)
N
N: Subroutine number
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Operand
Description
Data type
Size
N
Subroutine number
---
1
N: Subroutine number
Specifies the subroutine number between 0 and 127 decimal.
ꢀ Operand Specifications
Word addresses
Indirect DM addresses
Area
Constants
CF
Pulse bits
TR bits
---
CIO
WR
HR
AR
T
C
DM
@DM
*DM
N
---
---
---
---
---
---
---
---
---
OK
---
---
Combined-use instructions
SBN (subroutine entry) instructions and RET (subroutine return) instructions
Flags
Name
Label
P_ER
Operation
Error Flag
• ON if nesting exceeds 16 levels.
• ON if the specified subroutine number does not exist.
• ON if a subroutine calls itself.
• ON if a subroutine being executed is called.
• ON if the specified subroutine is not defined in the current task.
• OFF in all other cases.
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2 Instructions
Function
SBS(091) calls the subroutine with the
Execution condition ON
specified subroutine number. The subrou-
tine is the program section between
SBN(092) and RET(093). When the sub-
routine is completed, program execution
continues with the next instruction after
SBS(091).
SBS
n
Main program
B
B
A subroutine can be called more than
once in a program.
SBN
n
Subroutine
program
(SBN(092) to
RET(093))
A
2
A
RET
END
Program end
Subroutines can be nested up to 16 lev-
els. Nesting is when another subroutine is
called from within a subroutine program,
such as shown in the following example,
which is nested to 3 levels.
Execution condition ON
SBS
n
Main program
D
D
SBN 10
to
SBN 11
to
SBN 12
SBN
n
to
SBS 11
SBS 12
A
to
to
A
C
RET
RET
RET
Execution condition ON
Subroutine
program n
SBS
m
C
B
Two-level
nesting
RET
SBN
m
Subroutine
program m
B
RET
END
Program end
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2 Instructions
Precautions
• The subroutine number must be unique
for each subroutine. You cannot use the
same number for more than one sub-
routine.
0.00
0.01
SBS
1
1
3
• Each subroutine must have a unique
subroutine number. Do not use the
same subroutine number for more than
one subroutine.
SBS
1
5
4
SBN
1
• Observe the following precautions
when using differentiated instructions
(DIFU(013), DIFD(014), or up/down dif-
ferentiated instructions) in subroutines.
Subroutine
1
The subroutine
is executed
again.
0.01
DIFU
1.00
2
• The operation of differentiated
instructions in a subroutine is unpre-
dictable if a subroutine is executed
more than once in the same cycle.
In the following example, subroutine
1 is executed when CIO 0.00 is ON
and CIO 1.00 is turned ON by
DIFU(013) when CIO 0.01 has
gone from OFF to ON. If CIO 0.01
is ON in the same cycle, subroutine
1 will be executed again but this
time DIFU(013) will turn CIO 1.00
OFF without checking the status of
CIO 0.01.
RET
1
3
0.00
0.01
SBS
1
SBN
1
The subroutine is
not executed in
following cycles.
DIFU
1.00
2
• In contrast, a differentiated instruc-
tion (UP, DOWN, DIFU(013) or
DIFD(014)) would maintain the ON
status if the instruction was exe-
cuted and the output was turned ON
but the same subroutine was not
called a second time.
RET
• In the following example, subroutine
1 is executed if CIO 0.00 is ON.
Output CIO 1.00 is turned ON by
DIFU(013) when CIO 0.01 has
gone from OFF to ON. If CIO 0.00
is OFF in the following cycle, sub-
routine 1 will not be executed again
and output CIO 1.00 will remain ON
• SBS(091) will be treated as
NOP(000) when it is within a pro-
gram section interlocked by IL(002)
and ILC(003).
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2 Instructions
Sample program
ꢀ Sequential (Non-nested) Subroutines
A
1
3
CIO 0.00 ON
0.00
SBS
1
Main program
B
CIO 0.01 ON
0.01
2
SBS
2
C
5
SBN
1
Order of execution
0.00
ON
0.01
ON
→
→
→
→
→
→
→
→
→
→
C
1
A
A
A
A
S1
B
S2
2
S1
S1
B
C
ON
OFF
ON
→
S2
C
B
B
C
OFF
OFF
→
OFF
RET
Subroutines
SBN
2
4
2
S2
RET
END
Program end
When CIO 0.00 is ON in the following example, subroutine 1 is executed and program execution
returns to the next instruction after SBS(091) 1. When CIO 0.01 is ON, subroutine 2 is executed and
program execution returns to the next instruction after SBS(091) 2.
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2 Instructions
ꢀ Nested Subroutines
A
1
5
CIO 0.00 ON
0.00
SBS
1
B
SBN
1
2
S1-1
Order of execution
0.00
ON
0.01
ON
→
→
→
→
→
→
→
A
A
A
A
S1-1 S2 S1-2 B
0.01
CIO 0.00 ON
Subroutine 1
SBS
→
→
B
S1-1 S1-2
ON
OFF
ON
2
B
B
OFF
OFF
OFF
4
S1-2
RET
SBN
2
3
Subroutine 2
S2
RET
END
When CIO 0.00 is ON in the following example, subroutine 1 is executed. If CIO 0.01 is ON, subroutine
2 is executed from within subroutine 1 and program execution returns to the next instruction after
SBS(091) 2 when subroutine 2 is completed. Execution of subroutine 1 continues and program execu-
tion returns to the next instruction after SBS(091) 1 when subroutine 1 is completed.
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2 Instructions
SBN/RET
Function
code
Instruction
Mnemonic
Variations
Function
Indicates the beginning of the subroutine program with
the specified subroutine number.
SUBROUTINE ENTRY
SUBROUTINE RETURN
SBN
RET
---
---
092
093
Indicates the end of a subroutine program.
SBN
RET
Symbol
SBN(092)
RET(093)
2
N
N: Subroutine number
Applicable Program Areas
ꢀ SBN
Area
Step program areas
Not allowed
Subroutines
Interrupt tasks
OK
Usage
Not allowed
ꢀ RET
Area
Step program areas
Not allowed
Subroutines
OK
Interrupt tasks
OK
Usage
Operands
Data type
SBN
Operand
Description
Size
N
Subroutine number
---
1
ꢀ SBN
N: Subroutine number
Specifies the subroutine number between 0 and 127 decimal.
ꢀ Operand Specifications
Word addresses
Indirect DM addresses
Area
SBN
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
---
AR
T
C
DM
@DM
*DM
N
---
---
---
---
---
---
---
---
OK
---
---
---
Combined-use instructions
SBS (subroutine call) instruction
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2 Instructions
Flags
ꢀ SBN/RET
There are no flags affected by this instruction.
Function
ꢀ SBN
SBN(092) indicates the beginning of the sub-
routine with the specified subroutine number.
The end of the subroutine is indicated by
RET(093).
SBS
n
The region of the program beginning at the
first SBN(092) instruction is the subroutine
region. A subroutine is executed only when it
has been called by SBS(091) .
SBN
n
Subroutine
region
RET
ꢀ RET
When program execution reaches RET(093), it is automatically returned to the next instruction after the
SBS(091) instruction that called the subroutine.
Precautions
• Place the subroutine program area (SBN(092) to RET(093)) in the same task as the SBS(091)
instruction of the same number. Subroutines in other tasks cannot be called.
Not allowed
OK
Task 1
Task
SBS
n
SBS
n
SBN
n
RET
END
END
Task 2
SBN
n
RET
END
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2 Instructions
• The step instructions, STEP(008) and SNXT(009) cannot be used in subroutines.
SBN
SNXT
Not allowed
STEP
RET
2
• Place the subroutines after the main program and just before the END(001) instruction in the program
for each task. If part of the main program is placed after the subroutine region, that program section
will be ignored.
Note The input method for the subroutine number, N, is dif-
0.00
ferent for the CX-Programmer. Input #0 to #127 on
the CX-Programmer.
SBS
n
SBN
n
Subroutine region
RET
END
This part of the
program won’t
be executed.
Sample program
When CIO 0.00 is ON in the following exam-
ple, subroutine 10 is executed and program
execution returns to the next instruction after
the SBS(091) or MCRO(099) instruction that
called the subroutine.
0.00
SBS
#10
SBN
#10
Subroutine 10
RET
END
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2 Instructions
Interrupt Control Instructions
CP1E CPU Units support the following interrupts.
Type
Execution condition
Setting procedure
I/O Interrupts
Interrupt input from the built-in Input on the CPU
Rack turns ON/OFF.
Use the MSKS instruction to assign inputs from Interrupt Input on
the CPU Rack.
Scheduled Interrupts
Scheduled (fixed intervals)
Use the MSKS instruction to set the interrupt interval.
Outline of Interrupt Control Instructions
ꢀ SET INTERRUPT MASK: MSKS(690)
Both I/O interrupt tasks and scheduled interrupt tasks are masked (disabled) when the PLC enters RUN
mode. MSKS(690) can be used to unmask or mask I/O interrupts and set the time intervals for sched-
uled interrupts.
ꢀ CLEAR INTERRUPT: CLI(691)
CLI(691) clears or retains recorded interrupt inputs for I/O interrupts or sets the time to the first sched-
uled interrupt for scheduled interrupts. It also clears or retains recorded high-speed counter interrupts.
ꢀ DISABLE INTERRUPTS: DI(693)
DI(693) disables execution of all interrupt tasks.
ꢀ ENABLE INTERRUPTS: EI(694)
EI(694) enables execution of all interrupt tasks.
Precautions in Using Interrupt Tasks
ꢀ Precautions for All Interrupts
• When multiple interrupts occur at once, the order of execution of the interrupts is as follows:
I/O interrupt > scheduled interrupt
Note “A > B” indicates that A is given priority over B. On the same interrupt level, lower numbered tasks are given
priority over higher numbered tasks.
ꢀ Precautions for I/O Interrupts
• Only built-in inputs from CP1E CPU Units are supported for interrupt tasks.
• Use interrupt inputs on the CPU Rack from 0ch02 bit to 0ch07 bit. I/O interrupt tasks will not be exe-
cuted if using any other input.
• All interrupt inputs that have been detected will be cleared when the interrupt mask is cleared.
• There is no limit on the number of I/O interrupt inputs that can be recorded, but only one interrupt is
recorded for each I/O interrupt number. Furthermore, the recorded interrupt is not cleared until its
interrupt task has been completed, so a new interrupt input will be ignored if it is received while its
interrupt task is being executed.
ꢀ Precautions for Scheduled Interrupts
• Be sure that the time interval is longer than the time required to execute the scheduled interrupt task.
• To accurately control the time to the first interrupt and the interrupt interval, program CLI(691) to set
the time to the first schedule interrupt just before programming MSKS(690). If MSKS(690) is used to
restart a schedule interrupt, the time to the first scheduled interrupt will be accurate even if CLI(691)
is not used.
• The time unit for the scheduled interrupt is always 0.1ms.
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2 Instructions
Related Memory Area Words
Name
Address
Operation
Maximum Interrupt
Task Processing Time
A440
The maximum processing time for an interrupt task is stored in binary data in 0.1-ms units and is cleared
at the start of operation.
Interrupt Task with
Maximum Processing
Time
A441
The interrupt task number with maximum processing time is stored in binary data. Here, 8000 to 800F
Hex correspond to task numbers 00 to 0F Hex.
A441.15 will turn ON when the first interrupt occurs after the start of operation. The maximum process-
ing time for subsequent interrupt tasks will be stored in the rightmost two digits in hexadecimal and will
be cleared at the start of operation.
2
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2 Instructions
MSKS
Function
code
Instruction
Mnemonic
MSKS
Variations
@MSKS
Function
Controls whether I/O interrupt tasks and sched-
uled interrupt tasks are executed.
SET INTERRUPT MASK
690
MSKS
MSKS(690)
Symbol
N: Interrupt identifier
N
C: Control data
C
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Operand
Description
Data type
---
Size
N
C
Interrupt identifier
Control data
1
1
UINT
(1) I/O Interrupt Task
Contents
Operand
Disabling/Enabling Interrupt Input Setting
I/O Interrupt No.
Specifying Up/Down Differentiation of an Interrupt Input
I/O Interrupt No.
102: Interrupt input 2 (interrupt task 2)
112: Interrupt input 2 (interrupt task 2)
113: Interrupt input 3 (interrupt task 3)
114: Interrupt input 4 (interrupt task 4)
115: Interrupt input 5 (interrupt task 5)
116: Interrupt input 6 (interrupt task 6)
(Cannot be used in CP1E-E10Dꢀ-ꢀ)
117: Interrupt input 7 (interrupt task 7)
(Cannot be used in CP1E-E10Dꢀ-ꢀ)
Interrupt Mask
103: Interrupt input 3 (interrupt task 3)
104: Interrupt input 4 (interrupt task 4)
105: Interrupt input 5 (interrupt task 5)
106: Interrupt input 6 (interrupt task 6)
(Cannot be used in CP1E-E10Dꢀ-ꢀ)
107: Interrupt input 7 (interrupt task 7)
(Cannot be used in CP1E-E10Dꢀ-ꢀ)
Interrupt Mask
N
C
0000 hex: Enable (unmask) the interrupt (direct mode).
0001 hex: Disable (mask) the interrupt (direct mode).
0000 hex: Up-differentiation (Detect rising edge.)
0001 hex: Down-differentiation (Detect falling edge.)
Note When the up/down differentiation setting is changed, all detected interrupt inputs will be cleared.
(2) Resetting and Starting Scheduled Interrupts
Operand
Contents
Scheduled Interrupt No.
N
4 or 14: Scheduled interrupt 0 (interrupt task 1)
Scheduled interrupt time units
Scheduled interrupt set time
Any time unit setting
0 decimal (0000 hex):
Disable interrupt. (Stop internal timer.)
C
0.1 ms
10 to 9,999 decimal (000A to 270F hex):
Enable interrupt. (Reset internal timer value, and then start timer with interrupt interval between
1.0 and 999.9 ms.)
Note Settings 0001 to 000A cannot be used. An error will occur if one of these settings is used.
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2 Instructions
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
---
DM
---
@DM
---
*DM
---
N
C
---
---
---
---
---
OK
---
---
---
OK
OK
OK
OK
OK
OK
OK
OK
OK
Flags
Name
Label
Operation
Error Flag
P_ER
ON if N is not within the specified range.
Errors when specifying I/O Interrupts:
• The Error Flag will go ON if C is not within the specified range.
Errors when specifying Scheduled Interrupts:
2
• The Error Flag will go ON if C is not between 10 and 9,999 decimal (000A to 270F hex).
OFF in all other cases.
Function
When the program execution starts, the interrupt inputs that generate I/O interrupt tasks are masked
(disabled), and the internal timers creating the timer interrupts that generate scheduled interrupt tasks
are stopped.
Use MSKS(690) to enable the I/O interrupts and timer interrupts, so that the corresponding interrupt
tasks can be executed.
The value of N specifies the interrupt task and the kind of processing that will be performed.
(1) N = 102 to 107: Enabling/Disabling the Interrupt Inputs of I/O Interrupt Tasks
• Enables or disables the interrupt inputs specified by N, based on the status of the bits in C. With
this function, MSKS(690) can control whether or not each task is executed.
• When an interrupt input is enabled, any interrupts detected up to that point will be cleared.
(2) N = 112 to 117: Specifying the Differentiation of Interrupt Inputs
• Specifies whether the interrupt inputs specified by N are up-differentiated or down-differentiated,
based on the status of the bits in C.
• Use the differentiation specification together with the enabling/disabling function. If MSKS(690) is
not executed to specify up or down differentiation, the interrupt inputs are up-differentiated (the
default setting).
• When MSKS(690) is executed to specify an interrupt input’s up or down differentiation, any inter-
rupts detected up to that point will be cleared.
(3) N = 4 or 14: Resetting and Restarting Scheduled Interrupt Tasks
• Sets the time interval (specified by C) for the specified scheduled interrupt task (specified by N),
resets the internal timer’s PV, and starts the internal timer. Since the internal timer’s PV is reset,
this function maintains the proper interval from the execution of MSKS(690) until the start of the
first interrupt .
Hint
The longest interrupt task processing time is stored in A440 (Maximum Interrupt Task Processing
Time). At the same time, the task number of the interrupt task with the longest interrupt task processing
time is stored in A441 (Interrupt Task with Maximum Processing Time).
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2 Instructions
Precaution
• Be sure that the time interval is longer than the time required to execute the scheduled interrupt task.
• To accurately control the time to the first interrupt and the interrupt interval, program CLI(691) to set
the time to the first schedule interrupt just before programming MSKS(690). If MSKS(690) is used to
restart a schedule interrupt, however, the time to the first scheduled interrupt will be accurate even if
CLI(691) is not used.
• During the execution of a scheduled interrput, the scheduled interrupt set time cannot be changed.
Please change the scheduled interrupt set time after disable interrupt (stop internal timer) is set with
MSKS instruction.
Sample program
ꢀ Examples for Input Interrupts
When W0.00 turns ON in the following example, the first MSKS(690) (1) specifies generating input
interrupts for input interrupt 3 when the interrupt input turns ON and the second MSKS(690) (2)
unmasks the interrupt.
W0.00
MSKS
N
S
113
(1)
(2)
#0000
MSKS
103
N
S
#0000
ꢀ Example for Scheduled Interrupts
When W0.01 turns ON in the following example, MSKS(690) sets the schedule interrupt interval for
schedule interrupt 0 to 10.5 ms (assuming the unit is set to 0.1 ms in the PLC Setup), resets the internal
timer, and starts the internal timer.
W0.01
MSKS
N
S
14
&105
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2 Instructions
CLI
Function
code
Instruction
Mnemonic
Variations
Function
Clears/retains recorded interrupt inputs, sets the
time to the first scheduled interrupt for scheduled
interrupt tasks.
CLEAR INTERRUPT
CLI
@CLI
691
CLI
CLI(691)
Symbol
N: Interrupt number
N
2
C
C: Control data
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Operand
Description
Data type
---
Size
N
C
Interrupt number
Control data
1
1
UINT
(1) Clearing/Retaining an I/O Interrupt Task’s Recorded Interrupt Inputs
Operand
Contents
Interrupt Input No.
102: Interrupt input 2 (interrupt task 2)
103: Interrupt input 3 (interrupt task 3)
104: Interrupt input 4 (interrupt task 4)
105: Interrupt input 5 (interrupt task 5)
N
106: Interrupt input 6 (interrupt task 6) (Cannot be used in CP1E-E10Dꢀ-ꢀ)
107: Interrupt input 7 (interrupt task 7) (Cannot be used in CP1E-E10Dꢀ-ꢀ)
Recorded Interrupt
C
0000 hex: Retain the recorded interrupt.
0001 hex: Clear the recorded interrupt.
(2) Setting the Time to the First Scheduled Interrupts
Operand
Contents
Scheduled Interrupt No.
N
4: Interrupt task 0 (interrupt task 1)
Scheduled interrupt time units
(Set in the PLC Setup.)
Scheduled interrupt set time
C
0.1 ms
10 to 9,999 decimal (000A to 270F hex):
Sets time to first interrupt between 1.0 and 999.9 ms.
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2 Instructions
(3) Clearing/Retaining High-speed Counter Interrupts
Operand
Contents
High-speed Counter Input
10: High-speed counter input 0
11: High-speed counter input 1
12: High-speed counter input 2
13: High-speed counter input 3
14: High-speed counter input 4
N
15: High-speed counter input 5 (Cannot be used in CP1E-E10Dꢀ-ꢀ)
Recorded Interrupt
C
0000 hex: Retain the recorded interrupt.
0001 hex: Clear the recorded interrupt.
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
---
DM
---
@DM
---
*DM
---
N
C
---
---
---
---
---
OK
---
---
---
OK
OK
OK
OK
OK
OK
OK
OK
OK
Flags
Name
Label
Operation
Error Flag
P_ER
• ON if N is not within the specified range.
• ON if C is not 0000 or 0001 hex (for I/O interrupts or high-speed counter interrupts).
• ON if C is not within the specified range of 10 to 9,999 decimal (000A to 270F hex) for scheduled
interrupts.
• OFF in all other cases.
Function
Depending on the value of N, CLI(691) clears the specified recorded I/O interrupts, sets the time before
execution of the first scheduled interrupt, or clears the specified recorded high-speed counter inter-
rupts.
(1) N = 102 to 107: Clearing Interrupt Inputs
CLI(691) clears a recorded interrupt input specified by N, when the corresponding bit of C is ON
and retains the recorded interrupt input when the corresponding bit is OFF.
Interrupt
input n
Interrupt input n
Internal
status
Internal status
Recorded interrupt cleared
Recorded interrupt retained
If an I/O interrupt task is being executed and an interrupt input with a different interrupt number is
received, that interrupt number is recorded internally. The recorded I/O interrupts are executed
later in order of their priority (from the lowest number to the highest).
If you want to ignore interrupt inputs that are received while an interrupt task is being executed, use
CLI(691) to clear the recorded interrupts before they are executed.
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2 Instructions
(2) N = 4: Setting the Time to the First Scheduled Interrupt Task
When N is 4, the content of C specifies the time interval to the first scheduled interrupt task.
MSKS(690)
Execution of scheduled
interrupt task.
Time to first
scheduled interrupt
(3) N = 10 or 15: Clearing High-speed Counter Interrupts
When N is 10 or 15, CLI(691) clears or retains the recorded high-speed counter interrupt (target
comparison) specified by N.
Sample program
ꢀ Example for Input Interrupts
2
When W0.00 turns ON in the following example, CLI(691) clears all interrupts stored for input interrupt 2.
W0.00
CLI
N
S
102
#0001
ꢀ Example for First Scheduled Interrupts
When W0.01 turns ON in the following example, CLI(691) sets the time to the first schedule interrupt
10.5 ms (0069 hex = 105 decimal).
W0.01
CLI
N
S
4
15
0
D1100
0
0
6
9
D1100
ꢀ Example for High-speed Counter Interrupts
When W0.02 turns ON in the following example, CLI(691) clears all interrupts stored for high-speed
counter interrupt 0.
W0.02
CLI
10
N
S
#0001
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2 Instructions
DI
Function
code
Instruction
Mnemonic
Variations
@DI
Function
Disables execution of all interrupt tasks except the
power OFF interrupt.
DISABLE INTERRUPTS
DI
693
DI
Symbol
DI(693)
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
Not allowed
Usage
OK
Flags
Name
Label
P_ER
Operation
Error Flag
• ON if DI(693) is executed from an interrupt task.
• OFF in all other cases.
Function
DI(693) is executed from the main program to temporarily disable all interrupt tasks (I/O interrupts,
scheduled interrupts).
Precautions
All interrupt tasks will remain disabled until EI(694) is executed.
DI(693) cannot be executed from an interrupt task.
Sample program
When CIO 0.00 is ON in the following example,
DI(693) disables all interrupt tasks.
0.00
DI
Disables execution of
all interrupt tasks
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2 Instructions
EI
Function
code
Instruction
Mnemonic
Variations
Function
Enables execution of all interrupt tasks that were
disabled with DI(693).
ENABLE INTERRUPTS
EI
---
694
EI
Symbol
EI(694)
2
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
Not allowed
Usage
OK
Flags
Name
Label
P_ER
Operation
Error Flag
• ON if EI(694) is executed from an interrupt task.
• OFF in all other cases.
Function
• EI(694) is executed from the main program to temporarily enable all interrupt tasks that were disabled
by DI(693). DI(693) disables all interrupts (I/O interrupts, scheduled interrupts).
Precautions
• EI(694) does not require an execution condition. It is always executed with an ON execution condi-
tion.
• EI(694) enables the interrupt tasks that were disabled by DI(693). It cannot unmask I/O interrupts that
have not been unmasked by MSKS(690) or set scheduled interrupts that have not been set by
MSKS(690).
• EI(694) cannot be executed in an interrupt task.
Sample program
DI
Disables execution of all interrupt tasks.
EI
0.00
Enables execution of all disabled interrupt
tasks.
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2 Instructions
High-speed Counter/Pulse Output
Instructions
INI
Mne-
monic
Varia-
tions
Function
code
Instruction
Function
INI(880) can be used to execute the following operations
• To start comparison with the high-speed counter comparison table
• To stop comparison with the high-speed counter comparison table
• To change the PV of the high-speed counter.
MODE CONTROL
INI
@INI
880
• To change the PV of interrupt inputs in counter mode.
• To change the PV of the pulse output (origin fixed at 0).
• To stop pulse output.
INI
INI(880)
Symbol
P
C
P: Port specifier
C: Control data
NV
NV:First word with new PV
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Operand
Description
Data type
WORD
UINT
Size
P
C
Port specifier
1
1
2
Control data
NV
First word with new PV
DWORD
P: Port Specifier
P
Port
0000 hex
0001 hex
0010 hex
0011 hex
0012 hex
0013 hex
0014 hex
0015 hex
1000 hex
Pulse output 0
Pulse output 1
High-speed counter 0
High-speed counter 1
High-speed counter 2
High-speed counter 3
High-speed counter 4
High-speed counter 5 (Cannot be used in CP1E-E10Dꢀ-ꢀ)
PWM(891) output 0
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2 Instructions
C: Control Data
C
INI(880) function
0000 hex
0001 hex
0002 hex
0003 hex
Starts comparison.
Stops comparison.
Changes the PV.
Stops pulse output.
NV: First Word with New PV
If C is 0002 hex (i.e., when changing a PV),
NV and NV+1 contain the new PV. Any val-
ues in NV and NV+1 are ignored when C is
not 0002 hex.
15
0
Lower word of new PV
Upper word of new PV
NV
NV+1
2
For Pulse Output or High-speed Counter Input:
0000 0000 to FFFF FFFF hex
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
---
DM
---
@DM
---
*DM
---
P, C
NV
---
---
---
---
---
OK
---
---
---
---
OK
OK
OK
OK
OK
OK
OK
OK
OK
Flags
Name
Label
P_ER
Operation
Error Flag
• ON if the specified range for P, C, or NV is exceeded.
• ON if the combination of P and C is not allowed.
• ON if a comparison table has not been registered but starting comparison is specified.
• ON if a new PV is specified for a port that is currently outputting pulses.
• ON if changing the PV of a high-speed counter is specified for a port that is not specified for a high-speed counter.
• ON if INI(880) is executed in an interrupt task for a high-speed counter and an interrupt occurs when CTBL(882) is
executed.
• OFF in all other cases.
Function
INI(880) performs the operation specified in C for the port specified in P. The possible combinations of
operations and ports are shown in the following table.
C: Control data
P: Port specifier
0000 hex: Start
comparison
0001 hex: Stop
comparison
0002 hex:
Change PV
0003 hex: Stop
pulse output
0000 or 0001 hex: Pulse output
0010 to 0015 hex: High-speed counter input
1000 hex: PWM (891) output
Not allowed.
OK
Not allowed.
OK
OK
OK
OK
Not allowed.
OK
Not allowed.
Not allowed.
Not allowed.
ꢀ Starting Comparison (C = 0000 hex)
If C is 0000 hex, INI(880) starts comparison of a high-speed counter’s PV to the comparison table reg-
istered with CTBL(882).
Note A target value comparison table must be registered in advance with CTBL(882). If INI(880) is executed with-
out registering a table, the Error Flag will turn ON.
ꢀ Stopping Comparison (C = 0001 hex)
If C is 0001 hex, INI(880) stops comparison of a high-speed counter’s PV to the comparison table regis-
tered with CTBL(882).
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2 Instructions
ꢀ Changing a PV (C = 0002 hex)
Port and mode
Operation
Setting range
The present value of the pulse output is
changed. The new value is specified in NV and
NV+1.
8000 0000 to 7FFF FFFF hex
Pulse output (P = 0000 or 0001 hex)
Note This instruction can be executed only
when pulse output is stopped. An error
will occur if it is executed during pulse
output.
(-2,147,483,648 to 2,147,483,647)
Differential inputs,
increment/decre-
8000 0000 to 7FFF FFFF hex
(-2,147,483,648 to 2,147,483,647)
The present value of the high-speed counter is
changed. The new value is specified in NV and
NV+1.
ment pulses, or pulse
Linear Mode
High-speed
+ direction inputs
counter input (P =
0010 to 0015 hex)
0000 0000 to FFFF FFFF hex
(0 to 4,294,967,295)
Note An error will occur for the instruction if the
specified port is not set for a high-speed
counter.
Increment pulse input
0000 0000 to FFFF FFFF hex
(0 to 4,294,967,295)
Ring Mode
ꢀ Stopping Pulse Output (P = 0000, 0001 or 1000 hex and C = 0003 hex)
If C is 0003 hex, INI(880) immediately stops pulse output for the specified port. If this instruction is exe-
cuted when pulse output is already stopped, then the pulse amount setting will be cleared.
Sample program
When CIO 0.00 turns ON in the following example, SPED(885) starts outputting pulses from pulse out-
put 0 in Continuous Mode at 500 Hz. When CIO 0.01 turns ON, pulse output is stopped by INI(880).
i
0.00
01F4
0
D100
D101
@SPED
#0000
#0100
D100
Target frequency: 500 Hz
Pulse output 0
Pulse + Direction output, CW, Continuous Mode
0.01
@INI
#0000
#0003
0
Pulse output 0
Stop pulse output
(Not used.)
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2 Instructions
PRV
Function
code
Instruction
Mnemonic
Variations
Function
HIGH-SPEED
PRV(881) reads the High-speed counter PV and pulse output PV
and interrupt input PV in counter mode.
PRV
@PRV
881
COUNTER PV READ
PRV
PRV(881)
Symbol
P
C
D
P: Port specifier
2
C: Control data
D: First destination word
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Operand
Description
Data type
---
Size
P
C
D
Port specifier
1
1
Control data
---
First destination word
WORD
Variable
P: Port Specifier
P
Port
0000 hex
0001 hex
0010 hex
0011 hex
0012 hex
0013 hex
0014 hex
0015 hex
1000 hex
Pulse output 0
Pulse output 1
High-speed counter 0
High-speed counter 1
High-speed counter 2
High-speed counter 3
High-speed counter 4
High-speed counter 5 (Cannot be used in CP1E-E10Dꢀ-ꢀ)
PWM(891) output 0
C: Control Data
C
PRV(881) function
0000 hex
0001 hex
0002 hex
Reads the PV.
Reads status.
Reads range comparison results.
P = 0000 or 0001: Reads the output frequency of pulse output 0 or pulse output 1.
C = 0003 hex
P = 0010: Reads the frequency of high-speed counter input 0.
C = 0013 hex: 10-ms sampling method
00 3 hex
C = 0023 hex: 100-ms sampling method
C = 0033 hex: 1-s sampling method
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2 Instructions
D: First Destination Word
15
0
Lower word of PV
Upper word of PV
D
D+1
2-word PV
Pulse output PV, high-speed counter input PV,
high-speed counter input frequency for high-speed counter input 0
15
0
D
PV
1-word PV
Status, range comparison results
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
TR
bits
Constants
CF
Pulse bits
CIO
WR
HR
AR
T
C
DM
---
@DM
---
*DM
---
P, C
D
---
---
---
---
---
---
OK
---
---
---
---
OK
OK
OK
OK
OK
OK
OK
OK
OK
Flags
Name
Label
P_ER
Operation
Error Flag
• ON if the specified range for P or C is exceeded.
• ON if the combination of P and C is not allowed.
• ON if reading range comparison results is specified even though range comparison is not being executed.
• ON if reading the output frequency is specified for anything except for high-speed counter 0.
• ON if specified for a port not set for a high-speed counter.
• OFF in all other cases.
Function
PRV(881) reads the data specified in C for the port specified in P. The possible combinations of data
and ports are shown in the following table.
C: Control data
P: Port specifier
0002 hex: Read range
comparison results
0000 hex: Read PV
0001 hex: Read status
0000 or 0001 hex:
Pulse output
OK
OK
OK
OK
OK
Not allowed.
OK
0010 to 0015 hex:
High-speed counter input
1000 hex:
PWM (891) output
Not allowed.
Not allowed.
00 3 hex: Read frequency
0003 hex: Pulse output
read high-speed counter
frequency
P: Port specifier
0013 hex: 10-ms
sampling method
0023 hex: 100-ms
sampling method
0033 hex:
1-s sampling method
0000 or 0001 hex:
Pulse output
OK
Not allowed.
Not allowed.
Not allowed.
OK
(high-speed counter 0
only)
OK
(high-speed counter 0
only)
OK
(high-speed counter 0
only)
0010 or 0015 hex:
High-speed counter input
Not allowed.
Not allowed.
1000 hex:
PWM (891) output
Not allowed.
Not allowed.
Not allowed.
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2 Instructions
ꢀ Reading a PV (C = 0000 hex)
Port and mode
Operation
Setting range
Pulse output (P = 0000 or 0001 hex)
The present value of the pulse output is stored in 8000 0000 to 7FFF FFFF hex
D and D+1.
(−2,147,483,648 to 2,147,483,647)
High-speed counter
input (P = 0010 to 0015
hex)
Linear Mode
Ring Mode
The present value of the high-speed counter is
stored in D and D+1.
8000 0000 to 7FFF FFFF hex
(−2,147,483,648 to 2,147,483,647)
0000 0000 to FFFF FFFF hex
(0 to 4,294,967,295)
ꢀ Reading Status (C = 0001 hex)
Port and mode
Operation
Results of reading
Pulse output
The pulse output status is stored in D.
15
0
0
D
0
0
0
0
0
0
0
2
Pulse Output Status Flag
OFF: Constant speed
ON: Accelerating/decelerating
PV Overflow/Underflow Flag
OFF: Normal
ON: Error
Pulse Output Amount Set Flag
OFF: Not set
ON: Set
Pulse Output Completed Flag
OFF: Output not completed
ON: Output completed
Pulse Output In-progress Flag
OFF: Stopped
ON: Outputting
No-origin Flag
OFF: Origin established
ON: Origin not established
At-origin Flag
OFF: Not stopped at origin
ON: Stopped at origin
Pulse Output Stopped Error Flag
OFF: No error
ON: Pulse output stopped due to error
High-speed counter input
The high-speed counter status is
stored in D.
15
0
D
0
0
0
0
0
0
0
0
0
0
0
0
0
Comparison In-progress Flag
OFF: Stopped
ON: Comparing
PV Overflow/Underflow Flag
OFF: Normal
ON: Error
Count Direction
OFF: Decrementing
ON: Incrementing
PWM(891) output
The PWM(891) output is stored in D.
15
0
0
D
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Pulse Output In-progress Flag
OFF: Stopped
ON: Outputting
ꢀ Reading the Results of Range Comparison
15
0
0
D
0
0
0
0
0
0
0
0
0
(C = 0002 hex)
Comparison Result 1
OFF: Not in range ON: In range
If C is 0002 hex, PRV(881) reads the results of
range comparison and stores it in D as shown in
the following diagram.
Comparison Result 2
OFF: Not in range ON: In range
Comparison Result 3
OFF: Not in range ON: In range
Comparison Result 4
OFF: Not in range ON: In range
Comparison Result 5
OFF: Not in range ON: In range
Comparison Result 6
OFF: Not in range ON: In range
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2 Instructions
ꢀ Reading Pulse Output or High-speed Counter Frequency (C = 00@3 hex)
If C is 00@3 hex, PRV(881) reads the frequency being output from pulse output 0 or 1 or the frequency
being input to high-speed counter 0 and stores it in D and D+1.
0000 or 0001 hex (Reading the frequency of pulse output 0 or 1)
0000 0000 to 0001 86A0 hex (0 to 100,000)
0010 hex (Reading the frequency of high-speed counter 0)
Counter input method: Any input method other than 4× differential phase mode:
Result = 00000000 to 000186A0 hex (0 to 100,000)
Note If a frequency higher than 100 kHz has been input, the output will remain at the maximum value of 000186A0
hex.
Counter input method: 4× differential phase mode:
Result = 00000000 to 00030D40 hex (0 to 200,000)
Note If a frequency higher than 200 kHz has been input, the output will remain at the maximum value of
00030D40 hex.
ꢀ Pulse Frequency Calculation Methods
The function counts the number of pulses within a fixed interval (the sampling time) and calculates the
frequency from that count. One of the following three sampling times can be selected by setting the
rightmost two digits of C.
Sampling time
Value of C
0013 hex
Description
10 ms
100 ms
1 s
Counts the number of pulses every 10 ms. The error is 10% max. at 1 kHz.
Counts the number of pulses every 100 ms. The error is 1% max. at 1 kHz.
Counts the number of pulses every 1 s. The error is 0.1% max. at 1 kHz.
0023 hex
0033 hex
Precautions
If the counter is reset when P is 0010 hex (high-speed counter 0) and C is 0013, 0023, or 0033 hex
(sampling method), the data read during the sampling time when the counter was reset will not be
dependable.
Sample program
When CIO 0.00 turns ON in the following
programming example, CTBL(882) registers
a range comparison table for high-speed
counter 0 and starts comparison. When CIO
0.01 turns ON, PRV(881) reads the range
comparison results at that time and stores
them in CIO 0100.
0.00
@CTBL
#0000
#0001
D100
High-speed counter input 0
Range comparison table
registration and comparison start
0.01
@PRV
#0010
#0002
100
High-speed counter input 0
Read range comparison results
When CIO 1.00 turns ON in the following
programming example, PRV(881) reads the
frequency of the pulse being input to high-
speed counter 0 at that time and stores it as
a hexadecimal value in D200 and D201.
1.00
PRV
#0010
#0013
D200
High-speed counter input 0
Read input frequency
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2 Instructions
CTBL
Function
code
Instruction
Mnemonic
Variations
Function
REGISTER
COMPARISON TABLE
CTBL(882) is used to register a comparison table and perform
comparisons for a high-speed counter PV.
CTBL
@CTBL
882
CTBL
CTBL(882)
Symbol
P: Port specifier
P
C
2
C: Control data
TB
TB: First comparison table word
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Operand
Description
Data type
---
Size
P
C
Port specifier
1
1
Control data
---
TB
First comparison table word
LWORD
Variable
P: Port specifier
P
Port
0000 hex
0001 hex
0002 hex
0003 hex
0004 hex
0005 hex
High-speed counter 0
High-speed counter 1
High-speed counter 2
High-speed counter 3
High-speed counter 4
High-speed counter 5 (Cannot be used in CP1E-E10Dꢀ-ꢀ)
C: Control data
C
CTBL(882) function
Registers a target value comparison table and starts comparison.
Registers a range comparison table and performs one comparison.
0000 hex
0001 hex
0002 hex
0003 hex
Registers a target value comparison table. Comparison is started with INI(880).
Registers a range comparison table. Comparison is started with INI(880).
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2 Instructions
TB: First comparison table word
• TB is the first word of the comparison table. The structure of the comparison table depends on the
type of comparison being performed.
For target value comparison, the length of the comparison table is determined by the number of tar-
get values specified in TB. The table can be between 4 and 19 words long, as shown below.
15
0
0001 to 6 hex (1 to 6 target values)
00000000 to FFFFFFFF hex
TB
Number of target values
Lower word of target value 1
Upper word of target value 1
TB+1
TB+2
TB+3
Interrupt task number for target value 1
Lower word of target value 6
Upper word of target value 6
Interrupt task number for target value 6
TB+16
TB+17
TB+18
00000000 to FFFFFFFF hex
Interrupt Task Number
1514 1211
0 0 0
8 7
4 3
0
0
Interrupt task number
00 to 0F hex (0 to 15)
Direction
OFF: Incrementing,
ON: Decrementing
• For range comparison, the comparison table always contains six ranges. The table is 30 words long,
as shown below. If it is not necessary to set six ranges, set the interrupt task number to FFFF hex for
all unused ranges.
15
0
Lower word of range 1 lower limit
TB
TB+1 Upper word of range 1 lower limit
0000 0000 to FFFF FFFF hex (See note.)
0000 0000 to FFFF FFFF hex (See note.)
Lower word of range 1 upper limit
Upper word of range 1 upper limit
Range 1 interrupt task number
TB+2
TB+3
Lower word of range 6 lower limit
Upper word of range 6 lower limit
Lower word of range 6 upper limit
Upper word of range 6 upper limit
Range 6 interrupt task number
TB+25
TB+26
TB+27
TB+28
TB+29
0000 0000 to FFFF FFFF hex (See note.)
0000 0000 to FFFF FFFF hex (See note.)
Interrupt task number
0000 to 000F hex: Interrupt task number 0 to 15
AAAA hex:
FFFF hex:
Do not execute interrupt task.
Ignore the settings for this range.
Note Always set the upper limit greater than or equal to the lower limit for any one range.
ꢀ Operand Specifications
Word addresses
Indirect DM addresses
Area
Constants
CF
Pulse bits
TR bits
CIO
---
WR
---
HR
AR
---
T
C
---
DM
---
@DM
---
*DM
---
P, C
TB
---
---
OK
---
---
---
---
OK
OK
OK
OK
OK
OK
OK
OK
OK
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2 Instructions
Flags
Name
Label
P_ER
Operation
Error Flag
• ON if the specified range for P or C is exceeded.
• ON if the number of target values specified for target value comparison is set to 0.
• ON if the number of target values specified for target value comparison exceeds 6.
• ON if the upper value is less than the lower value for any range.
• ON if the set values for all ranges are disabled during a range comparison.
• ON if the high-speed counter is set for incremental pulse mode and decrementing is set in the table as the direction
for comparison.
• ON if the same target value is specified more than once in the same comparison direction for target comparison
when the high-speed counter is set to incremental pulse mode and linear mode.
• ON if an instruction is executed when the high-speed counter is set to Ring Mode and the specified value exceeds
the maximum ring value.
• ON if specified for a port not set for a high-speed counter.
• ON if executed for a different comparison method while comparison is already in progress.
• OFF in all other cases.
2
Function
CTBL(882) registers a comparison table and starts comparison for the port specified in P and the
method specified in C. Once a comparison table is registered, it is valid until a different table is regis-
tered or until the CPU Unit is switched to PROGRAM mode.
Each time CTBL(882) is executed, comparison is started under the specified conditions. When using
CTBL(882) to start comparison, it is normally sufficient to use the differentiated version (@CTBL(882))
of the instruction or an execution condition that is turned ON only for one scan.
Note If an interrupt task that has not been registered is specified, a fatal program error will occur the first time an
interrupt is generated.
ꢀ Registering a Comparison Table (C = 0002 or 0003 hex)
If C is set to 0002 or 0003 hex, a comparison table will be registered, but comparison will not be started.
Comparison is started with INI(880).
ꢀ Registering a Comparison Table and Starting Comparison (C = 0000 or 0001 hex)
If C is set to 0000 or 0001 hex, a comparison table will be registered, and comparison will be started.
ꢀ Stopping Comparison
Comparison is stopped with INI(880). It makes no difference what instruction was used to start compar-
ison.
ꢀ Target Value Comparison
The corresponding interrupt task is called and executed when the PV matches a target value.
• The same interrupt task number can be specified for more than one target value.
• The direction can be set to specify whether the target value is valid when the PV is being incre-
mented or decremented. If bit 15 in the word used to specify the interrupt task number for the range is
OFF, the PV will be compared to the target value only when the PV is being incremented, and if bit 00
is ON, only when the PV is being decremented.
• The comparison table can contain up to 6 target values, and the number of target values is specified
in TB (i.e., the length of the table depends on the number of target values that is specified).
• Comparisons are performed for all target values registered in the table.
Note 1 An error will occur if the same target value with the same comparison direction is registered more than
once in the same table.
2 If the high-speed counter is set for incremental pulse mode, an error will occur if decrementing is set in the
table as the direction for comparison.
3 If the count direction changes while the PV equals a target value that was reached in the direction opposite
to that set as the comparison direction, the comparison condition for that target value will not be met. Do
not set target values at peak and bottom values of the count value.
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2 Instructions
ꢀ Range Comparison
The corresponding interrupt task is called and executed when the PV enters a set range.
• The same interrupt task number can be specified for more than one target value.
• The range comparison table contains 6 ranges, each of which is defined by a lower limit and an upper
limit. If a range is not to be used, set the interrupt task number to FFFF hex to disable the range.
• The interrupt task is executed only once when the PV enters the range.
If the PV is within more than one range when the comparison is made, the interrupt task for the range
closest to the beginning of the table will be given priority and other interrupt tasks will be executed in
following cycles.
• If there is no reason to execute an interrupt task, specify AAAA hex as the interrupt task number. The
range comparison results can be read with PRV(881) or using the Range Comparison In-progress
Flags.
Note An error will occur if the upper limit is less than the lower limit for any one range.
Sample program
When CIO 0.00 turns ON in the following programming example, CTBL(882) registers a target value
comparison table and starts comparison for high-speed counter 0. The PV of the high-speed counter is
counted incrementally and when it reaches 500, it equals target value 1 and interrupt task 1 is exe-
cuted. When the PV is incremented to 1000, it equals target value 2 and interrupt task 2 is executed.
0.00
@CTBL
#0000
#0000
D100
D100
D101
D102
D103
D104
D105
D106
Two target values
0002
01F4
0000
0001
03E8
0000
0002
Target value 1: 0000 01F4 hex (500)
Incrementing, Interrupt task number 1
Target value 2: 0000 03E8 hex (1000)
High-speed counter input 0
Register target comparison table
and start comparison
Incrementing, Interrupt task number 2
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2 Instructions
SPED
Function
code
Instruction
Mnemonic
Variations
Function
SPED(885) is used to set the output pulse frequency for a specific
port and start pulse output without acceleration or deceleration.
SPEED OUTPUT
SPED
@SPED
885
SPED
SPED(855)
Symbol
P
M
F
P: Port specifier
2
M: Output mode
F: First pulse frequency word
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Operand
Description
Data type
UINT
Size
P
M
F
Port specifier
1
1
2
Output mode
WORD
UDINT
First pulse frequency word
P: Port specifier
P
Port
0000 hex
0001 hex
Pulse output 0
Pulse output 1
M: Output mode
F: First pulse frequency word
15
1211
8 7
4 3
0
15
0
M
Lower word of target frequency
F
0 to 100,000 Hz
(0000 0000 to 0001 86A0 hex)
Upper word of target frequency
Specify the pulse frequency in Hz.
F+1
Mode
0 hex: Continuous
1 hex: Independent
Direction
0 hex: CW
1 hex: CCW
Pulse output method
1 hex: Pulse + direction
Always 0 hex.
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
---
DM
---
@DM
---
*DM
---
P, M
F
---
---
---
---
---
OK
---
---
---
---
OK
OK
OK
OK
OK
OK
OK
OK
OK
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2 Instructions
Flags
Name
Label
P_ER
Operation
• ON if the specified range for P, M, or F is exceeded.
Error Flag
• ON if PLS2(887) or ORG(889) is already being executed to control pulse output for the specified port.
• ON if SPED(885) or INI(880) is used to change the mode between continuous and independent output during pulse
output.
• ON if SPED(885) is executed in an interrupt task when an instruction controlling pulse output is being executed in a
cyclic task.
• ON if SPEC(885) is executed in independent mode with an absolute number of pulses and the origin has not been
established.
• OFF in all other cases.
Function
SPED(885) starts pulse output on the port
specified in P using the method specified in
M at the frequency specified in F. Pulse out-
put will be started each time SPED(885) is
executed. It is thus normally sufficient to use
the differentiated version (@SPED(885)) of
the instruction or an execution condition
that is turned ON only for one scan.
Pulse frequency
Target frequency
Time
SPED(885) executed.
In independent mode, pulse output will stop automatically when the number of pulses set with
PULS(886) in advance have been output. In continuous mode, pulse output will continue until stopped
from the program.
An error will occur if the mode is changed between independent and continuous mode while pulses are
being output.
Note SPED instruction can be used only with transistor output type of CP1E N/NA-type CPU Unit.
In case of transistor output type of CP1E E-type CPU Unit or relay output type, NOP processing is applied.
ꢀ Continuous Mode Speed Control
When continuous mode operation is started, pulse output will be continued until it is stopped from the
program.
Note Pulse output will stop immediately if the CPU Unit is changed to PROGRAM mode.
Procedure/
instruction
Operation
Purpose
Application
Frequency changes
Description
Starting
pulse output
To output
with speci- speed (fre-
Changing the
Outputs pulses at a
specified frequency.
SPED(885) (Continu-
ous)
Pulse frequency
fied speed
quency) in one
step
Target frequency
Time
Execution of SPED(885)
Changing
settings
To change
speed in
one step
Changing the
speed during
operation
Changes the fre-
quency (higher or
lower) of the pulse out-
put in one step.
SPED(885) (Continu-
ous)
Pulse frequency
Target frequency
↓
SPED(885) (Continu-
ous)
Present frequency
Time
Execution of SPED(885)
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2 Instructions
Procedure/
instruction
Operation
Purpose
Application
Frequency changes
Description
Stopping
pulse output
Stop pulse Immediate stop
output
Stops the pulse output SPED(885) (Continu-
Pulse frequency
immediately.
ous)
↓
Present frequency
INI(880)
Time
Execution of INI(880)
Stop pulse Immediate stop
output
Stops the pulse output SPED(885) (Continu-
Pulse frequency
Present frequency
immediately.
ous)
↓
SPED(885) (Continu-
ous, Target frequency
of 0 Hz)
2
Time
Execution of SPED(885)
ꢀ Independent Mode Positioning
When independent mode operation is started, pulse output will be continued until the specified number
of pulses has been output.
Note • Pulse output will stop immediately if the CPU Unit is changed to PROGRAM mode.
• The number of output pulses must be set each time output is restarted.
• The number of output pulses must be set in advance with PULS(881). Pulses will not be output for
SPED(885) if PULS(881) is not executed first.
• The direction set in the SPED(885) operand will be ignored if the number of pulses is set with PULS(881)
as an absolute value.
Procedure/
instruction
Operation
Purpose
Application
Frequency changes
Description
Starting
pulse output
To output with Positioning
Starts outputting pulses PULS(886)
Specified number of
pulses (Specified with
PULS(886).)
specified
speed
without accel-
eration or
at the specified fre-
Pulse frequency
↓
quency and stops
SPED(885)
deceleration
immediately when the
(Independent)
Target
frequency
specified number of
pulses has been out-
put.
Time
Note The target posi-
tion (number of
pulses) cannot be
changed during
positioning (pulse
output).
Execution of
SPED(885)
Outputs the specified
number of pulses
and then stops.
Changing
settings
To change
speed in one
step
Changing the
speed in one
step during
operation
SPED(885) can be exe- PULS(886)
Specified number
cuted during position-
of pulses
↓
Pulse
frequency
New target
frequency
Original target
frequency
ing to change (raise or
SPED(885)
(Specified with
PULS(886).)
Number of pulses
specified with
lower) the pulse output
(Independent)
frequency in one step.
PULS(886) does
not change.
↓
The target position
SPED(885)
(Independent)
(specified number of
pulses) is not changed.
Time
Execution of SPED(885)
(independent mode)
SPED(885) (independent
mode) executed again to
change the target
frequency. (The target
position is not changed.)
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2 Instructions
Procedure/
instruction
Operation
Purpose
Application
Frequency changes
Description
Stopping
pulse output
To stop pulse Immediate stop
output (Num-
ber of pulses
setting is not
preserved.)
Stops the pulse output
immediately and clears
the number of output
pulses setting.
PULS(886)
Pulse frequency
↓
Present
frequency
SPED(885)
(Independent)
↓
INI(880)
Time
Execution of
SPED(885)
Execution
of INI(880)
Stop pulse
Immediate stop
Stops the pulse output
immediately and clears
the number of output
pulses setting.
PULS(886)
Pulse frequency
Present frequency
output (Num-
ber of pulses
setting is not
preserved.)
↓
SPED(885)
(Independent)
↓
SPED(885),
(Independent,
Target fre-
Time
Execution of
SPED(885)
Execution of
SPED(885)
quency of 0 Hz)
Sample program
When CIO 0.00 turns ON in the following programming example, PULS(886) sets the number of output
pulses for pulse output 0. An absolute value of 5,000 pulses is set. SPED(885) is executed next to start
pulse output using the pulse + direction method in the clockwise direction in independent mode at a tar-
get frequency of 500 Hz. .
0.00
D100
D101
1388
0000
@PULS
#0000
#0000
D100
Number of output pulses: 5,000
Target frequency: 500 Hz
Pulse output: 0
Pulse type: Relative
D110
D111
01F4
0000
@SPED
#0000
#0101
D110
Pulse output: 0
Pulse + direction output
Direction:
CW in independent mode
Pulse frequency
Target frequency:
500 Hz
5,000 pulses
Time
PULS(881) and the
SPED(885) executed.
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2 Instructions
PULS
Function
code
Instruction
Mnemonic
Variations
Function
PULS(886) is used to set the pulse output amount (number of out-
put pulses).
SET PULSES
PULS
@PULS
886
PULS
PULS(886)
Symbol
P
T
P: Port specifier
T: Pulse type
2
N
N: Number of pulses
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Operand
Description
Data type
Size
P
T
Port specifier
---
---
1
1
2
Pulse type
N
Number of pulses
DINT
P: Port specifier
P
Port
0000 hex
0001 hex
Pulse output 0
Pulse output 1
T: Pulse type
T
Pulse type
0000 hex
0001 hex
Relative
Absolute
N and N+1: Number of pulses
15
0
Lower word with number of pulses
Upper word with number of pulses
N
N+1
• The actual number of movement pulses that will be output are as follows:
For relative pulse output, the number of movement pulses = the set number of pulses.
For absolute pulse output, the number of movement pulses = the set number of pulses - the PV.
ꢀ Operand Specifications
Word addresses
Indirect DM addresses
Area
Constants
CF
Pulse bits
TR bits
CIO
---
WR
---
HR
---
AR
---
T
C
---
DM
---
@DM
---
*DM
---
P, T
N
---
OK
---
---
---
OK
OK
OK
OK
OK
OK
OK
OK
OK
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2 Instructions
Flags
Name
Label
P_ER
Operation
• ON if the specified range for P, T, or N is exceeded.
Error Flag
• ON if PULS(886) is executed for a port that is already outputting pulses.
• ON if PULS(886) is executed in an interrupt task when an instruction controlling pulse output is being executed in a
cyclic task.
• OFF in all other cases.
Function
PULS(886) sets the pulse type and number of pulses specified in T and N for the port specified in P.
Actual output of the pulses is started later in the program using SPED(885) or ACC(888) in independent
mode.
Note • An error will occur if PULS(886) is executed when pulses are already being output. Use the differentiated
version (@PULS(886)) of the instruction or an execution condition that is turned ON only for one scan to
prevent this.
• The calculated number of pulses output for PULS(886) will not change even if INI(880) is used to change
the PV of the pulse output.
• The direction set for SPED(885) or ACC(888) will be ignored if the number of pulses is set with
PULS(881) as an absolute value.
• It is possible to move outside of the range of the PV of the pulse output amount (-2,147,483,648 to
2,147,483,647).
• PULS instruction can be used only with transistor output type of CP1E N/NA-type CPU Unit.
In case of transistor output type of CP1E E-type CPU Unit or relay output type, NOP processing is
applied.
Sample program
When CIO 0.00 turns ON in the following programming example, PULS(886) sets the number of output
pulses for pulse output 0. An absolute value of 5,000 pulses is set. SPED(885) is executed next to start
pulse output using the pulse + direction method in the clockwise direction in independent mode at a tar-
get frequency of 500 Hz.
0.00
D100
D101
1388
0000
@PULS
#0000
#0000
D100
Number of output pulses: 5,000
Target frequency: 500 Hz
Pulse output: 0
Pulse type: Relative
D110
D111
01F4
0000
@SPED
#0000
#0101
D110
Pulse output: 0
Pulse + direction output
Direction:
CW in independent mode
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2 Instructions
PLS2
Function
code
Instruction
Mnemonic
Variations
Function
PLS2(887) outputs a specified number of pulses
to the specified port. Pulse output starts at a spec-
ified startup frequency, accelerates to the target
frequency at a specified acceleration rate, decel-
erates at the specified deceleration rate, and stops
at approximately the same frequency as the star-
tup frequency.
PULSE OUTPUT
PLS2
@PLS2
887
PLS2
2
PLS2(887)
P
M
S
F
P: Port specifier
Symbol
M: Output mode
S: First word of settings table
F: First word of starting frequency
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Operand
Description
Data type
---
Size
P
M
S
F
Port specifier
1
1
6
2
Output mode
---
First word of settings table
First word of starting frequency
WORD
UDINT
P: Port Specifier
P
Port
0000 hex
0001 hex
Pulse output 0
Pulse output 1
M: Output Mode
15
1211
8 7
4 3
0
M
Relative/absolute specifier
0 hex: Relative pulses
1 hex: Absolute pulses
Direction
0 hex: CW
1 hex: CCW
Pulse output method
1 hex: Pulse + direction
Always 0 hex.
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2 Instructions
S: First Word of Settings Table
15
0
Acceleration rate
S1
1 to 65535 Hz (#0001 to FFFF)
S1+1
Deceleration rate
Specify the increase or decrease in the frequency per pulse control period (4 ms).
Lower word with target frequency
0 to 100,000 Hz
S1+2
S1+3
(0000 0000 to 0001 86A0 hex)
Upperword with target frequency
Specify the frequency after acceleration/deceleration in Hz.
Lower word with number of output pulses
Upper word with number of output pulses
S1+4
S1+5
The actual number of movement pulses that will be output are as follows:
• For relative pulse output, the number of movement pulses = the set number of pulses.
• For absolute pulse output, the number of movement pulses = the set number of pulses − the PV.
F: First Word of Starting Frequency
The starting frequency is given in F and F+1.
15
0
Lower word with starting frequency
F
0 to 100,000 Hz
(0000 0000 to 0001 86A0 hex)
Upper word with starting frequency
F+1
Specify the starting frequency in Hz.
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
P, M
S
---
---
---
---
---
---
---
---
---
OK
---
---
---
---
OK
OK
OK
OK
OK
OK
OK
OK
OK
F
OK
Flags
Name
Label
P_ER
Operation
Error Flag
• ON if the specified range for P, M, S, or F is exceeded.
• ON if PLS2(887) is executed for a port that is already outputting pulses for SPED(885) or ORG(889).
• ON if PLS2(887) is executed in an interrupt task when an instruction controlling pulse output is being executed in a
cyclic task.
• ON if PLS2(887) is executed for an absolute pulse output but the origin has not been established.
• OFF in all other cases.
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2 Instructions
Function
PLS2(887) starts pulse output on the port specified in P using the mode specified in M at the start fre-
quency specified in F (1 in diagram).
The frequency is increased every pulse control period (4 ms) at the acceleration rate specified in S until
the target frequency specified in S is reached (2 in diagram).
When the target frequency has been reached, acceleration is stopped and pulse output continues at a
constant speed (3 in diagram).
The deceleration point is calculated from the number of output pulses and deceleration rate set in S and
when that point is reached, the frequency is decreased every pulse control period (4 ms) at the deceler-
ation rate specified in S until the starting frequency specified in S is reached, at which point pulse out-
put is stopped (4 in diagram).
2
Pulse output is started each time PLS2(887) is executed. It is thus normally sufficient to use the differ-
entiated version (@PLS2(887)) of the instruction or an execution condition that is turned ON only for
one scan.
Pulse frequency
Target frequency
Starting frequency
Time
PLS2(887) executed.
PLS2(887) can be used only for positioning.
With the CJ1M CPU Units, PLS2(887) can be executed during pulse output for ACC(888) in either inde-
pendent or continuous mode, and during acceleration, constant speed, or deceleration. (See notes 1
and 2.) ACC(888) can also be executed during pulse output for PLS2(887) during acceleration, con-
stant speed, or deceleration.
Note 1 Executing PLS2(887) during speed control with ACC(888) (continuous mode) with the same target fre-
quency as ACC(888) can be used to achieve interrupt feeding of a fixed distance. Acceleration will not be
performed by PLS2(887) for this application, but if the acceleration rate is set to 0, the Error Flag will turn
ON and PLS2(887) will not be executed. Always set the acceleration rate to a value other than 0.
2 If PLS2 (887) is executed during the period from pulse output stop to one cycle after the stop (when pulse
output in-progress flag is ON), pulse output will start again in the next cycle after stopping.
However, if pulse output is stopped by INI (880), the pulse output instruction will become invalid within one
cycle after the stop. Execute the instruction till the pulse output in-progress flag is OFF.
3 PLS2 instruction can be used only with transistor output type of CP1E N/NA-type CPU Unit.
In case of transistor output type of CP1E E-type CPU Unit or relay output type, NOP processing is applied.
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2 Instructions
ꢀ Independent Mode Positioning
Note Pulse output will stop immediately if the CPU Unit is changed to PROGRAM mode.
Opera-
tion
Procedure/
instruction
Purpose
Application
Frequency changes
Description
Starting
pulse out- trapezoidal
put
Complex
Positioning with
trapezoidal accel-
eration and decel-
eration (Separate
rates used for
acceleration and
deceleration; start-
ing speed)
The number of
pulses can be
changed during
positioning.
Accelerates and deceler- PLS2(887)
ates at a fixed rates. The
pulse output is stopped
when the specified num-
ber of pulses has been
Specified number
of pulses
Pulse frequency
control
Target
frequency
Accel-
eration
rate
Deceleration
rate
output. (See note.)
Stop
frequency
Time
Starting
frequency
Note The target position
(specified number
of pulses) can be
changed during
Execution of
PLS2(887)
Output stops.
Deceleration point
Target
positioning.
frequency
reached.
Chang-
ing set-
tings
To change
speed
smoothly
(with
unequal
accelera-
tion and
decelera-
tion rates)
Changing the tar-
get speed (fre-
quency) during
positioning
(different accelera-
tion and decelera-
tion rates)
PLS2(887) can be exe-
cuted during positioning
to change the accelera-
tion rate, deceleration
rate, and target fre-
quency.
PLS2(887)
Specified number of
pulses (Specified with
PULS(886).)
↓
Pulse
frequency
Changed target
PLS2(887)
PULS(886)
↓
frequency
Target frequency
Acceleration/
Note To prevent the tar-
get position from
being changed
deceleration
rate
ACC(888)
(Independent)
Time
↓
intentionally, the
original target posi-
tion must be speci-
fied in absolute
Execution of
ACC(888)
(independent
mode)
PLS2(887)
PLS2(887) executed to change
the target frequency and
acceleration/deceleration rates.
(The original target position is
specified again.)
coordinates.
To change
target posi-
tion
Changing the tar-
get position during
positioning (multi-
ple start function)
PLS2(887) can be exe-
cuted during positioning
to change the target
position (number of
pulses), acceleration
rate, deceleration rate,
and target frequency.
PLS2(887)
Number of pulses
changed with
PLS2(887).
↓
Specified
number of
pulses
Pulse
frequency
PLS2(887)
PULS(886)
↓
Target
frequency
Acceleration/
deceleration
rate
ACC(888)
(Independent)
Note If a constant speed
cannot be main-
Time
↓
tained after chang-
ing the settings, an
error will occur and
the original opera-
tion will continue to
the original target
position.
Execution of
PLS2(887)
PLS2(887) executed to
change the target position.
(The target frequency and
acceleration/deceleration
rates are not changed.)
PLS2(887)
To change
target posi-
tion and
speed
smoothly
Changing the tar-
get position and
target speed (fre-
quency) during
positioning (multi-
ple start function)
PLS2(887) can be exe-
cuted during positioning
to change the target
position (number of
pulses), acceleration
rate, deceleration rate,
and target frequency.
PULS(886)
Number of pulses
↓
Number of
changed with
PLS2(887).
Pulse
pulses specified
with PLS2(887).
frequency
ACC(888)
(Independent)
Changed target
frequency
↓
Target frequency
Acceleration/
deceleration
rate
PLS2(887)
PLS2(887)
↓
Note If a constant speed
cannot be main-
Time
Execution of
PLS2(887)
tained after chang-
ing the settings, an
error will occur and
the original opera-
tion will continue to
the original target
position.
PLS2(887) executed to
PLS2(887)
change the target frequency,
acceleration rate and
deceleration rate.
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2 Instructions
Opera-
tion
Procedure/
Purpose
Application
Frequency changes
Description
instruction
PULS(886)
↓
Changing To change
Changing the
acceleration and
deceleration rates
during positioning
(multiple start
function)
PLS2(887) can be exe-
cuted during positioning
(acceleration or deceler-
ation) to change the
acceleration rate or
target posi-
settings,
Number of pulses
tion and
continued
Pulse
specified by
PLS2(887) #N.
speed
smoothly,
continued
frequency
Acceleration rate n
ACC(888)
(Independent)
New target
Acceleration
rate 3
frequency
deceleration rate.
↓
Original target
Acceleration
rate 2
frequency
Acceleration
rate 1
PLS2(887)
PLS2(887)
↓
Time
Execution of
PLS2(887) #1
Execution of PLS2(887) #N
Execution of PLS2(887) #3
Execution of
PLS2(887)
PLS2(887) #2
To change
direction
Changing the
direction during
positioning
PLS2(887) can be exe-
cuted during positioning
with absolute pulse spec-
ification to change to
absolute pulses and
reverse direction.
PLS2(887)
Specified
number of
pulses
2
↓
Pulse
frequency
PLS2(887)
PULS(886)
↓
Change of direction at the
specified deceleration rate
Number of pulses
Target
frequency
(position) changed
by PLS2(887)
ACC(888)
(Independent)
Time
Execution
of PLS2
(887)
↓
Execution of
PLS2(887)
PLS2(887)
Stopping
pulse out- output
put (Number of
Stop pulse
Immediate stop
Stops the pulse output
immediately and clears
the number of output
pulses.
PLS2(887)
↓
Pulse frequency
Present
frequency
INI(880)
pulses set-
ting is not
preserved.)
Time
Execution of
SPED(885)
Execution
of INI(880)
Stop pulse
output
Decelerate to a
stop
Decelerates the pulse
output to a stop.
PLS2(887)
Pulse frequency
↓
smoothly.
(Number of
pulses set-
ting is not
preserved.)
ACC(888)
(Independent,
target fre-
quency of
0 Hz)
Present
frequency
Deceleration rate
Target
frequency = 0
Time
Execution of
PLS2(887)
Execution of
ACC(888)
Note Triangular Control
If the specified number of pulses is less than the number required to reach the target frequency and return to zero, the
function will automatically reduce the acceleration/deceleration time and perform triangular control (acceleration and
deceleration only.) An error will not occur.
Specified number
of pulses
(Specified with
PLS2(887).)
Pulse frequency
Target
frequency
Time
Execution of
PLS2(887)
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2 Instructions
ꢀ Switching from Continuous Mode Speed Control to Independent Mode Positioning
Procedure/
instruction
Example application
Frequency changes
Description
Change from speed control to fixed
distance positioning during operation
PLS2(887) can be executed during a
speed control operation started with
ACC(888) to change to positioning oper-
ation.
ACC(888)
(Continuous)
Outputs the number of
pulses specified in
PLS2(887) (Both relative
and absolute pulse
specification can be used.)
↓
PLS2(887)
Pulse frequency
Target
frequency
Time
Execution of
ACC(888)
(continuous
mode)
Execution of
PLS2(887)
Fixed distance feed interrupt
Pulse
frequency
Present
frequency
Time
Execution of
Execution of PLS2(887)
with the following settings
ACC(888)
(continuous
mode)
Number of pulses =
number of pulses until stop
Relative pulse specification
Target frequency = present
frequency
Acceleration rate = 0001 to
07D0 hex
Deceleration rate = target
deceleration rate
Sample program
When CIO 0.00 turns ON in the following programming example, PLS2(887) starts pulse output from
pulse output 0 with an absolute pulse specification of 100,000 pulses. Pulse output is accelerated at a
rate of 500 Hz every 4 ms starting at 200 Hz until the target speed of 50 kHz is reached. From the
deceleration point, the pulse output is decelerated at a rate of 250 Hz every 4 ms starting until the start-
ing speed of at 200 Hz is reached, at which point pulse output is stopped.
0.00
Acceleration rate: 500 Hz/4 ms
Deceleration rate: 250 Hz/4 ms
@PLS2
#0000
#0100
D100
D100
D101
D102
D103
D104
D105
01F4
00FA
C350
0000
86A0
0001
Pulse output: 0
Pulse output method:
Pulse + direction output
Target frequency: 50 kHz
Direction: CW
D110
Pulse type: Relative
Pulse output amount: 100,000 pulses
00C8
0000
Pulse frequency
Target frequency
D110
D111
Start frequency: 200 Hz
50 kHz
100,000 pulses
Start frequency
200 Hz
Time
PLS2(887) executed.
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2 Instructions
ACC
Function
code
Instruction
Mnemonic
Variations
Function
ACC(888) outputs pulses to the specified output
port at the specified frequency using the specified
acceleration and deceleration rate.
ACCELERATION CONTROL
ACC
@ACC
888
ACC
ACC(888)
Symbol
P
M
S
P: Port specifier
2
M: Output mode
S: First word of settings table
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Operand
Description
Data type
---
Size
P
M
S
Port specifier
1
1
3
Output mode
---
First word of settings table
WORD
P: Port Specifier
P
Port
0000 hex
0001 hex
Pulse output 0
Pulse output 1
M: Output Mode
15
1211
8 7
4 3
0
M
Mode
0 hex: Continuous mode
1 hex: Independent mode
Direction
0 hex: CW
1 hex: CCW
Pulse output method
1 hex: Pulse + direction
Always 0 hex.
Note Use the same pulse output method when using both pulse outputs 0 and 1.
S: First Word of Settings Table
15
0
Acceleration/deceleration rate
1 to 65535 Hz (#0001 to FFFF)
S
Specify the increase or decrease in the frequency per pulse control period (4 ms).
Lower word with target frequency
0 to 100,000 Hz
S+1
S+2
(0000 0000 to 0001 86A0 hex)
Upper word with target frequency
Specify the frequency after acceleration or deceleration in Hz.
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2 Instructions
ꢀ Operand Specifications
Word addresses
Indirect DM addresses
Pulse
bits
TR
bits
Area
Constants
CF
CIO
---
WR
---
HR
---
AR
---
T
C
---
DM
---
@DM
---
*DM
---
P, M
S
---
OK
---
---
---
---
OK
OK
OK
OK
OK
OK
OK
OK
OK
Flags
Name
Label
Operation
• ON if the specified range for P, M, or S is exceeded.
• ON if pulses are being output using ORG(889) for the specified port.
Error Flag
P_ER
• ON if ACC(888) is executed to switch between independent and continuous mode for a port that is outputting
pulses for SPED(885), ACC(888), or PLS2(887).
• ON if ACC(888) is executed in an interrupt task when an instruction controlling pulse output is being executed in a
cyclic task.
• ON if ACC(888) is executed for an absolute pulse output in independent mode but the origin has not been estab-
lished.
• OFF in all other cases.
Function
ACC(888) starts pulse output on the port specified in P using the mode specified in M using the target
frequency and acceleration/deceleration rate specified in S. The frequency is increased every pulse
control period (4 ms) at the acceleration rate specified in S until the target frequency specified in S is
reached.
Pulse output is started each time ACC(888) is executed. It is thus normally sufficient to use the differen-
tiated version (@ACC(888)) of the instruction or an execution condition that is turned ON only for one
scan.
Pulse frequency
Acceleration/deceleration rate
Target frequency
Time
ACC(888) executed.
ACC(888) executed.
In independent mode, pulse output stops automatically when the specified number of pulses has been
output. In continuous mode, pulse output continues until it is stopped from the program.
An error will occur if an attempt is made to switch between independent and continuous mode during
pulse output.
PLS2(887) can be executed during pulse output for ACC(888) in either independent or continuous
mode, and during acceleration, constant speed, or deceleration. (See note.) ACC(888) can also be exe-
cuted during pulse output for PLS2(887) during acceleration, constant speed, or deceleration.
If ACC(888) is executed in independent or continuous mode with a target frequency of 0 Hz and then
ACC(888) or PLS2(887) is executed before pulse output stops, the target frequency will not change and
pulse output will stop. Execute ACC(888) or PLS2(887) after pulse output stops.
Note 1 Executing PLS2(887) during speed control with ACC(888) (continuous mode) with the same target fre-
quency as ACC(888) can be used to achieved interrupt feeding of a fixed distance. Acceleration will not be
performed by PLS2(887) for this application, but if the acceleration rate is set to 0, the Error Flag will turn
ON and PLS2(887) will not be executed. Always set the acceleration rate to a value other than 0.
2 If ACC (888) or PLS2 (887) is executed during the period from pulse output stop to one cycle after the stop
(when pulse output in-progress flag is ON), pulse output will start again in the next cycle after stopping.
However, if pulse output is stopped by INI (880), the pulse output instruction will become invalid within one
cycle after the stop. Execute the instruction till the pulse output in-progress flag is OFF.
3 ACC instruction can be used only with transistor output type of CP1E N/NA-type CPU Unit.
In case of transistor output type of CP1E E-type CPU Unit or relay output type, NOP processing is applied.
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2 Instructions
ꢀ Continuous Mode Speed Control
Pulse output will continue until it is stopped from the program.
Note Pulse output will stop immediately if the CPU Unit is changed to PROGRAM mode.
Opera-
tion
Procedure/
instruction
Purpose
Application
Frequency changes
Description
Starting
pulse out- with speci-
put
To output
Accelerating the
speed (frequency)
Outputs pulses and
changes the frequency at (Continuous)
a fixed rate.
ACC(888)
Pulse frequency
fied acceler- at a fixed rate
ation and
speed
Target frequency
Acceleration/
deceleration
rate
Present frequency
Time
Time
Time
Execution of
ACC(888)
2
Chang-
ing set-
tings
To change
speed
smoothly
Changing the
speed smoothly
during operation
Changes the frequency
from the present fre-
quency at a fixed rate.
The frequency can be
accelerated or deceler-
ated.
ACC(888) or
SPED(885)
(Continuous)
Pulse frequency
Target frequency
Present frequency
↓
Acceleration/
deceleration
rate
ACC(888)
(Continuous)
Execution of
ACC(888)
Changing the
speed in a polyline
curve during oper-
ation
Changes the accelera-
tion or deceleration rate
during acceleration or
deceleration.
ACC(888)
(Continuous)
Pulse frequency
Acceleration rate n
Target frequency
↓
Acceleration
rate 2
Acceleration
rate 1
ACC(888)
(Continuous)
Present frequency
Execution of ACC(888)
Execution of ACC(888)
Execution of ACC(888)
Decelerating to a
stop
The deceleration rate is
changed while decelerat- (Continuous)
ing.
ACC(888)
Pulse frequency
Acceleration/deceleration rate 1
Present
↓
frequency
Acceleration/
Note If the target fre-
quency is set to 0
Hz, the current
ACC(888)
(Continuous)
deceleration rate 2
Target
frequency = 0
Time
↓
deceleration rate
Execution of ACC(888)
Execution of ACC(888)
Execution of ACC(888)
will be used.
ACC(888)
(Continuous,
target fre-
quency of
0 Hz)
(target frequency = 0)
Stopping
pulse out- pulse output
put
To stop
Immediate stop
Immediately stops pulse
output.
ACC(888)
(Continuous)
Pulse frequency
Present frequency
↓
INI(880) (Con-
tinuous)
Time
Execution of ACC(888)
Execution of INI(880)
To stop
pulse
output
Decelerating to a
stop
Decelerated pulse out-
put to a stop.
ACC(888)
(Continuous)
Pulse frequency
Present frequency
Acceleration/deceleration
↓
Note If the target fre-
quency of the sec-
ond ACC(888)
rate (value set when starting)
smoothly
ACC(888)
(Continuous,
target fre-
instruction is 0 Hz,
the deceleration
rate from the first
ACC(888) instruc-
tion will be used.
Target frequency = 0
Execution of ACC(888)
Time
quency of 0)
Execution of ACC(888)
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2 Instructions
ꢀ Independent Mode Positioning
When independent mode operation is started, pulse output will be continued until the specified number
of pulses has been output.
The deceleration point is calculated from the number of output pulses and deceleration rate set in S and
when that point is reached, the frequency is decreased every pulse control period (4 ms) at the deceler-
ation rate specified in S until the specified number of points has been output, at which point pulse out-
put is stopped.
Note 1 Pulse output will stop immediately if the CPU Unit is changed to PROGRAM mode.
2 The number of output pulses must be set each time output is restarted.
3 The number of output pulses must be set in advance with PULS(881). Pulses will not be output for
ACC(888) if PULS(881) is not executed first.
4 The direction set in the ACC(888) operand will be ignored if the number of pulses is set with PULS(881) as
an absolute value.
Opera-
tion
Procedure/
instruction
Purpose
Application
Frequency changes
Description
Starting
Simple trap- Positioning with
Accelerates and deceler- PULS(886)
Specified number of
pulses (Specified
with PULS(886).)
pulse out- ezoidal con- trapezoidal accel-
put
ates at the same fixed
rate and stops immedi-
↓
Pulse frequency
Target
trol
eration and decel-
eration (Same rate
used for accelera-
tion and decelera-
tion; no starting
speed)
ACC(888)
(Independent)
ately when the specified
number of pulses has
Acceleration/
deceleration
rate
frequency
been output. (See note.)
Note The target position
(specified number
of pulses) cannot
be changed during
positioning.
Time
The number of
pulses cannot be
changed during
positioning.
Execution of
ACC(888)
Outputs the specified
number of pulses and
then stops.
Chang-
ing set-
tings
To change
speed
smoothly
(with the
Changing the tar-
get speed (fre-
quency) during
positioning
ACC(888) can be exe-
cuted during positioning
to change the accelera-
tion/deceleration rate
and target frequency.
The target position
PULS(886)
Specified
number of
pulses
(Specified with
PULS(886).)
↓
Pulse
frequency
ACC(888) or
SPED(885)
(Independent)
Number of pulses
specified with
PULS(886) does
not change.
same accel- (acceleration rate
Changed target
frequency
Target frequency
eration and
decelera-
tion rates)
= deceleration
rate)
(specified number of
pulses) is not changed.
↓
Acceleration/
ACC(888)
(Independent)
deceleration
rate
Time
PLS2(887)
Execution of
ACC(888)
(independent
mode)
↓
ACC(888) (independent
mode) executed again to
change the target frequency.
(The target position is not
changed, but the
ACC(888)
(Independent)
acceleration/deceleration rate
is changed.)
Stopping
pulse out- pulse out-
put
To stop
Immediate stop
Pulse output is stopped
immediately and the
remaining number of out-
put pulses is cleared.
PULS(886)
Pulse frequency
↓
put. (Num-
ber of
pulses set-
ting is not
preserved.)
Present
frequency
ACC(888)
(Independent)
↓
Time
INI(880)
Execution of
ACC(888)
Execution of
INI(880)
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2 Instructions
Opera-
tion
Procedure/
Purpose
To stop
Application
Frequency changes
Description
instruction
PULS(886)
↓
Stopping
pulse out- pulse out-
put, con-
tinued
Decelerating to a
stop
Decelerates the pulse
output to a stop.
Pulse frequency
put
Note If ACC(888) started
the operation, the
original accelera-
tion/deceleration
rate will remain in
effect.
ACC(888) or
SPED(885)
(Independent)
Present
frequency
smoothly.
(Number of
pulses set-
ting is not
preserved.)
Deceleration rate
Time
Target
frequency = 0
↓
ACC(888)
If SPED(885)
Execution of
ACC(888)
Execution of
PLS2(887)
(Independent,
independent,
target fre-
started the opera-
tion, the accelera-
tion / deceleration
rate will be invalid
and the pulse out-
put will stop imme-
diately.
quency of 0)
PLS2(887)
↓
2
ACC(888)
(Independent,
target fre-
quency of 0)
Note Triangular Control
If the specified number of pulses is less than the number required to reach the target frequency and return to zero, the
function will automatically reduce the acceleration/deceleration time and perform triangular control (acceleration and
deceleration only.) An error will not occur.
Specified number
of pulses
(Specified with
PULS(886).)
Pulse frequency
Target
frequency
Time
Execution of
ACC(888)
Sample program
When CIO 0.00 turns ON in the following programming example, ACC(888) starts pulse output from
pulse output 0 in continuous mode in the clockwise direction using the pulse + direction method. Pulse
output is accelerated at a rate of 20 Hz every 4 ms until the target frequency of 500 Hz is reached.
When CIO 0.01 turns ON, ACC(888) changes to an acceleration rate of 10 Hz every 4 ms until the tar-
get frequency of 1,000 Hz is reached.
0.00
@ACC
#0000
#0100
D100
D100
D101
D102
0014
01F4
0000
Acceleration/deceleration rate: 20 Hz
Target frequency: 500 Hz
Pulse output: 0
Pulse output method:
Pulse + direction output
Direction: CW in continuous mode
D105
D106
D107
000A
03E8
0000
Acceleration/deceleration rate: 10 Hz
Target frequency: 1,000 Hz
0.01
@ACC
#0000
#0100
D105
Pulse output: 0
Pulse output method:
Pulse + direction output
Direction: CW in continuous mode
Pulse frequency
Target frequency
1000 Hz
10 Hz/4 ms
500 Hz
20 Hz/4 ms
Time
ACC(888) executed.
ACC(888) executed.
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2 Instructions
ORG
Function
code
Instruction
Mnemonic
ORG
Variations
Function
ORG(889) performs an origin search or origin
return operation.
ORIGIN SEARCH
@ORG
889
ORG
ORG(889)
Symbol
P: Port specifier
C: Control data
P
C
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Operand
Description
Data type
Size
P
C
Port specifier
Control data
---
---
1
1
P: Port Specifier
P
Port
0000 hex
0001 hex
Pulse output 0
Pulse output 1
C: Control Data
15
1211
8 7
4 3
0
C
Always 0 hex.
Always 0 hex.
Pulse output method
1 hex: Pulse + direction
Mode
0 hex: Origin search
1 hex: Origin return
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
---
CIO
WR
HR
AR
T
C
DM
@DM
*DM
P,C
---
---
---
---
---
---
---
---
---
OK
---
---
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2 Instructions
Flags
Name
Label
P_ER
Operation
Error Flag
• ON if the specified range for P or C is exceeded.
• ON if ORG(889) is specified for a port during pulse output for SPED(885), ACC(888), or PLS2(887).
• ON if ORG(889) is executed in an interrupt task when an instruction controlling pulse output is being executed in a
cyclic task.
• ON if the origin search or origin return parameters set in the PLC Setup are not within range.
• ON if the Origin Search High Speed is less than or equal to the Origin Search Proximity Speed or the Origin Search
Proximity Speed is less than or equal to the Origin Search Initial Speed.
• ON if an origin return operation is attempted when the origin has not been established.
• OFF in all other cases.
Function
2
ORG(889) performs an origin search or origin return operation for the port specified in P using the
method specified in C.
The following parameters must be set in the PLC Setup before ORG(889) can be executed.
Origin search
Origin return
• Origin Search/Return Initial Speed
• Origin Search Function Enable/Disable
• Origin Search Operating Mode
• Origin Search Operation Setting
• Origin Detection Method
• Origin Return Target Speed
• Origin Return Acceleration Rate
• Origin Return Deceleration Rate
• Origin Search Direction Setting
• Origin Search/Return Initial Speed
• Origin Search High Speed
• Origin Search Proximity Speed
• Origin Compensation
• Origin Search Acceleration Rate
• Origin Search Deceleration Rate
• Limit Input Signal Type
• Origin Proximity Input Signal Type
• Origin Input Signal Type
• Positioning Monitor Time
An origin search or origin return is started each time ORG(889) is executed. It is thus normally sufficient
to use the differentiated version (@ORG(889)) of the instruction or an execution condition that is turned
ON only for one scan.
Note ORG instruction can be used only with transistor output type of CP1E N/NA-type CPU Unit.
In case of transistor output type of CP1E E-type CPU Unit or relay output type, NOP processing is applied.
ꢀ Origin Search (Bits 12 to 15 of C = 0 hex)
ORG(889) starts outputting pulses using the
Origin Proximity Input Signal
specified method at the Origin Search Initial
Speed (1 in diagram).
Origin Input Signal
Pulse output is accelerated to the Origin Search
Pulse frequency
High Speed using the Origin Search Accelera-
tion Rate (2 in diagram).
Origin search
high speed
Origin search
deceleration rate
Pulse output is then continued at constant speed
Origin search
until the Origin Proximity Input Signal turns ON acceleration rate
Origin search
proximity speed
(3 in diagram), from which point pulse output is
decelerated to the Origin Search Proximity
Speed using the Origin Search Deceleration
Rate (4 in diagram).
Origin search
initial speed
Time
ORG(889) executed.
Stop
Pulses are then output at constant speed until
the Origin Input Signal turns ON (5 in diagram).
Pulse output is stopped when the Origin Input
Signal turns ON (6 in diagram).
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2 Instructions
When the origin search operation has been completed, the Error Counter Reset Output will be
turned ON.
The above operation, however, depends on the operating mode, origin detection method, and other
parameters.
ꢀ Origin Return (Bits 12 to 15 of C = 1 hex)
ORG(889) starts outputting pulses using the
specified method at the Origin Return Initial
Speed (1 in diagram).
Pulse frequency
Origin return
target speed
Origin return
deceleration rate
Origin return
acceleration
rate
Pulse output is accelerated to the Origin Return
Target Speed using the Origin Return Accelera-
tion Rate (2 in diagram) and pulse output is con-
tinued at constant speed (3 in diagram).
Origin return
initial speed
Time
The deceleration point is calculated from the
number of pulses remaining to the origin and the
deceleration rate and when that point is
reached, the pulse output is decelerated (4 in
diagram) at the Origin Return Deceleration Rate
until the Origin Return Start Speed is reached,
at which point pulse output is stopped at the ori-
gin (5 in diagram).
Stop
ORG(889) executed.
Sample program
When CIO 0.00 turns ON in the following programming example, ORG(889) starts an origin return oper-
ation for pulse output 0 by outputting pulses using the pulse + direction method. According to the PLC
Setup, the initial speed is 100 pps, the target speed is 200 pps, and the acceleration and deceleration
rates are 50 Hz/4 ms.
0.00
Speed
@ORG
#0000
#1100
Pulse output 0
200 pps
100 pps
Origin return, pulse + direction
output method
Time
ORG(889) executed.
Output stopped.
The PLC Setup parameters are as follows:
Parameter
Pulse Output 0 Starting Speed for Origin Search and Origin Return
Pulse Output 0 Origin Return Target Speed
Setting
0000 0064 hex: 100 pps
0000 00C8 hex: 200 pps
0032 hex: 50 hex/4 ms
0032 hex: 50 hex/4 ms
Pulse Output 0 Origin Return Acceleration Rate
Pulse Output 0 Origin Return Deceleration Rate
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2 Instructions
PWM
Function
code
Instruction
Mnemonic
PWM
Variations
@PWM
Function
PULSE WITH VARIABLE
DUTY FACTOR
PWM(891) is used to output pulses with the speci-
fied duty factor from the specified port.
891
PWM
PWM
Symbol
P: Port specifier
F: Frequency
D: Duty factor
P
F
2
D
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Operand
Description
Data type
Size
P
F
Port specifier
---
---
---
1
1
1
Frequency
Duty factor
D
P: Port Specifier
P
Port
1000 hex
1100 hex
PWM output 0 (duty factor: in increments of 1%, frequency 0.1 Hz)
PWM output 0 (duty factor: in increments of 1%, frequency 1 Hz)
F: Frequency
F specifies the frequency of the PWM output between 2.0 and 6,553.5 Hz (0.1 Hz units, 0014 to FFFF
hex), or between 2 and 32,000 Hz (2 Hz units, 0002 to 7D00 hex).
D: Duty Factor
• 0.0% to 100.0% (0.1% units, 0000 to 03E8 hex)
D specifies the duty factor of the PWM output, i.e., the percentage of time that the output is ON.
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2 Instructions
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
---
DM
---
@DM
---
*DM
---
P
---
---
---
---
---
OK
---
---
---
F, D
OK
OK
OK
OK
OK
OK
OK
OK
OK
Flags
Name
Label
P_ER
Operation
Error Flag
• ON if the specified range for P, F, or D is exceeded.
• ON if PWM are being output using ORG(889) for the specified port.
• ON if PWM(891) is executed in an interrupt task when an instruction controlling PWM output is being executed in a
cyclic task.
• OFF in all other cases.
Function
PWM(891) outputs the frequency specified in F at the duty factor specified in D from the port specified
in P. PWM(891) can be executed during duty-factor PWM output to change the duty factor without stop-
ping PWM output. Any attempts to change the frequency will be ignored.
PWM output is started each time PWM(891) is executed. It is thus normally sufficient to use the differ-
entiated version (@PWM(891)) of the instruction or an execution condition that is turned ON only for
one scan.
The PWM output will continue either until INI(880) is executed to stop it (C = 0003 hex: stop PWM out-
put) or until the CPU Unit is switched to PROGRAM mode.
Note PWM instruction can be used only with transistor output type of CP1E N/NA-type CPU Unit.
In case of transistor output type of CP1E E-type CPU Unit or relay output type, NOP processing is applied.
Sample program
When CIO 0.00 turns ON in the following programming example, PWM(891) starts PWM output from
PWM output 0 at 200 Hz with a duty factor of 50%. When CIO 0.01 turns ON, the duty factor is changed
to 25%.
0.00
Duty factor: 50%
Duty factor: 25%
@PWM
#1000
#07D0
&500
PWM output 0
Frequency: 200.0 Hz
Duty factor: 50%
CIO 0.00 ON
CIO 0.01 ON
0.01
@PWM
#1000
#07D0
&250
PWM output 0
Frequency: 200.0 Hz
Duty factor: 25%
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2 Instructions
Step Instructions
In CP1E series PLCs, STEP(008)/SNXT(009) can be used together to create step programs.
Instruction
Operation
Diagram
SNXT(009): STEP
START
Controls progression to the next step of the program.
Step Ladder section start instruction
Equivalent to
STEP(008): STEP
DEFINE
Indicates the start of a step. Repeats the same step pro-
gram until the conditions for progression to the next step
are established.
Step Ladder section start instruction
2
Equivalent to
Step
Corresponds
SNXT
a
Starts the step programming area
Proceeds to the next step
a
A
a turns ON
STEP
A
Process A
Process A repeated until b turns ON.
Process A
Process B
Process C
b
SNXT
B
b turns ON
b
c
d
STEP
B
Process B
Process B repeated until c turns ON.
c
SNXT
C
c turns ON
STEP
C
Process C
Process C repeated until d turns ON.
d
SNXT
D
Proceeds to the end of the ladder
step programming area
d turns ON
End
STEP
Step programming area completed
Note Work bits are used as the control bits for A, B, C and D.
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2 Instructions
SNXT/STEP
Function
code
Instruction
Mnemonic
SNXT
STEP
Variations
Function
SNXT(009) is used to control progression of step
execution in the step program area.
STEP START
---
---
009
008
STEP(008) is used to define the beginning and
the end of the step program area.
STEP DEFINE
SNXT
STEP
When defining the beginning of a step, a control bit is specified as
follows:
SNXT(009)
B
STEP(008)
B: Bit
Symbol
B: Bit
B
When defining the end of a step, a control bit is not specified as
follows:
STEP(008)
Applicable Program Areas
Area
Step program areas
Subroutines
Not allowed
Interrupt tasks
Not allowed
Usage
OK
Operands
Operand
Description
Data type
Size
B
Bit
---
1
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
B
---
OK
---
---
---
---
---
---
---
---
---
---
---
Flags
Operation
Name
Label
SNXT
STEP
Error Flag
P_ER
• ON when the specified bit B is not in the WR
• ON when the specified bit B is not in the WR
area.
area.
• ON when SNXT(009) is used in an interrupt pro- • ON when STEP(008) is used in an interrupt pro-
gram.
gram.
• OFF in all other cases.
• OFF in all other cases.
Function
ꢀ SNXT(009)
SNXT(009) is used in the following three ways:
1.To start step programming execution.
2. To proceed to the next step control bit.
3. To end step programming execution.
The step program area is from the first STEP(008) instruction (which always takes a control bit) to the
last STEP(008) instruction (which never takes a control bit).
Starting Step Execution
SNXT(009) is placed at the beginning of the step program area to start step execution. It turns ON
the control bit specified for B for the next STEP(008) and proceeds to step B (all instructions after
STEP(008) B). A differentiated execution condition must be used for the SNXT(009) instruction that
starts step programming area execution, or step execution will last for only one cycle.
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2 Instructions
Proceeding to the Next Step
When SNXT(009) occurs in the middle of the step program area, it is used to proceed to the next
step. It turns OFF the previous control bit and turns ON the next control bit B, for the next step,
thereby starting step B (all instructions after STEP(008) B).
Ending the Step Programming Area
When SNXT(009) is placed at the very end of the step program area, it ends step execution and
turns OFF the previous control bit. The control bit specified for B is a dummy bit. This bit will however
be turned ON, so be sure to select a bit that will not cause problems.
ꢀ STEP(008)
STEP(008) functions in following 2 ways, depending on its position and whether or not a control bit has
been specified.
1. Starts a specific step.
2
2. Ends the step program area (i.e., step execution).
Starting a Step
STEP(008) is placed at the beginning of each step with an operand, B, that serves as the control bit
for the step.
The control bit B will be turned ON by SNXT(009) and the instruction in the step will be executed
from the one immediately following STEP(008). A200.12 (Step Flag) will also turn ON when execu-
tion of a step begins.
After the first cycle, step execution will continue until the conditions for changing the step are estab-
lished, i.e., until the SNXT(009) instruction turns ON the control bit in the next STEP(008).
When SNXT (009) turns ON the control bit for a step, the control bit B of the current instruction will
be reset (turned OFF) and the step controlled by bit B will become interlocked.
Handling of outputs and instructions in a step will change according to the ON/OFF status of the
control bit B. (The status of the control bit is controlled by SNXT(009)). When control bit B is turned
OFF, the instructions in the step are reset and are interlocked. Refer to the following tables.
Control bit status
Handling
ON
Instructions in the step are executed normally.
ON→OFF
Bits and instructions in the step are interlocked as shown in the next table.
All instructions in the step are processed as NOPs.
OFF
Interlock Status (IL)
Instruction output
Status
Bits specified for OUT, OUT NOT
All OFF
TIM, TIMX(551), TIMH(015), TIMHX(551), TMHH(540),
TIMHHX(552), TIML(542), and TIMLX(553)
PV
0000 hex (reset)
OFF (reset)
Completion Flag
Bits or words specified for other instructions (see note)
Holds the previous status (but the instructions are not
executed)
Note Indicates all other instructions, such as TTIM(087), TTIMX(555), SET, REST, CNT, CNTX(546),
CNTR(012), CNTRX(548), SFT(010), and KEEP(011).
The STEP(008) instruction must be placed at the beginning of each step. STEP(008) is placed at
the beginning of a step area to define the start of the step.
Ending the Step Program Area
STEP(008) is placed at the end of the step program area without an operand to define the end of
step programming.
When the control bit preceding a SNXT(009) instruction is turned OFF, step execute is stopped by
SNXT(009).
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2 Instructions
Hint
A200.12 (Step Flag) is turned ON for one cycle
0.00
Start
SNXT
W0.00
when STEP(008) is executed. This flag can be
used to conduct initialization once the step exe-
cution has started.
W0.00
STEP
A200.12
W0.00
1 cycle
0.01
CNT
0001
A200.12
#0003
Related Bits
Name
Address
A200.12
Details
Step Flag
ON for one cycle when a step program is started using STEP(008). Can be used to reset timers and
perform other processing when starting a new step.
c
d
e
SNXT
a
Step a starts when C turns ON
STEP
a
A executed
A
When d turns ON, b starts (A is interlocked)
SNXT
b
STEP
b
B executed
B
e turns ON (B is interlocked)
End of step programming area
SNXT
(Dummy)
STEP
Normal ladder
program
Returns to normal ladder program
Precaution
• The control bit, B, must be in the Work Area for STEP(008)/SNXT(009).
• A control bit for STEP(008)/SNXT(009) cannot be use anywhere else in the ladder diagram. If the
same bit is used twice, as duplication bit error will occur.
• If SBS(091) is used to call a subroutine from within a step, the subroutine outputs and instructions will
not be interlocked when the control bit turns OFF.
• SNXT(009) will be executed only once, i.e., on the rising edge of the execution condition.
• Input SNXT(009) at the end of the step program area and make sure that the control bit is a dummy
bit in the Work Area. If a control bit for a step is used in the last SNXT(009) in the step program area,
the corresponding step will be started when SNXT(009) is executed.
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2 Instructions
• STEP(008) and SNXT(009) cannot be used inside of subroutines, interrupt programs, or block pro-
grams.
• Be sure that two steps are not executed during the same cycle.
• The instructions that cannot be used within step programs are listed in the following table.
Function
Mnemonic
Name
Sequence Control Instructions
END(001)
IL(002)
END
INTERLOCK
ILC(003)
JMP(004)
JME(005)
CJP(510)
SBN(092)
RET(093)
INTERLOCK CLEAR
JUMP
JUMP END
CONDITIONAL JUMP
SUBROUTINE ENTRY
SUBROUTINE RETURN
Subroutine Instructions
2
Sample program
0.00
0.01
0.02
SNXT
W0.00
CIO 0.00 turns ON, step W0.00 starts
STEP
Step W0.00 starts from the next instruction
W0.00
Step W0.00
Step (A) ladder program
SNXT
W0.01
W0.00 turns OFF, W0.01 turns ON and step W0.01 starts
Step W0.01 starts from the next instruction
STEP
W0.01
Step (B) ladder program
Step W0.01
W0.01 turns OFF and dummy bit W30.0 turns ON
SNXT
W30.0
STEP
End of step programming area
Normal ladder program
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2 Instructions
(1) Sequential Control
0.01
0.02
0.03
0.04
SNXT
W0.00
0.01 (Step (A) starting condition)
STEP
Step (A) W0.00
W0.00
Step W0.00 (A)
0.02 (Step (A) → Step (B) transition condition)
Step (A) ladder program
Step (B) W0.01
SNXT
W0.01
0.03 (Step (B) → Step (C) transition condition)
STEP
Step (C) W0.02
W0.01
0.04 (Step (C) reset conditions)
Step W0.01 (B)
Step (B) ladder program
End
SNXT
W0.02
STEP
W0.02
Step W0.02 (C)
Step (C) ladder program
SNXT
W30.0
STEP
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2 Instructions
(2) Branching Control
0.01
0.02
0.02
0.01
SNXT
W0.00
0.02 (Step (B) starting condition)
0.01 (Step (A)
starting condition)
Step (A) W0.00
Step (B) W0.01
SNXT
W0.01
0.03 (Step (A) →
Step (C) transition
condition)
0.04 (Step (B) → Step (C)
transition condition)
STEP
W0.00
Step (C) W0.02
Step W0.00
(A)
Step (A) ladder program
0.05 (Step (C) reset conditions)
2
0.03
0.04
0.05
End
SNXT
W0.02
STEP
W0.01
Step W0.01
(B)
Step (B) ladder program
SNXT
W0.02
STEP
W0.02
Step W0.02
(C)
Step (C) ladder program
SNXT
W30.0
STEP
ꢀ Additional Information:
• In the above example, where SNXT(009) is executed for W0.02, the branching moves onto the next
steps even though the same control bit is used twice. This is not picked up as an error in the program
check using the CX-Programmer. A duplicate bit error will only occur in a step ladder program only
when a control bit in a step instructions is also used in the normal ladder diagram.
• The above programming is used when steps A and B cannot be executed simultaneously. For simul-
taneous execution of A and B, delete the execution conditions illustrated below.
0.02
0.01
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2 Instructions
(3) Parallel Control
0.01
SNXT
W0.00
0.01 (Step (A), (C) simultaneous starting condition)
Step (A) W0.00
Step (C) W0.02
SNXT
W0.02
0.02 (Step (A) →
Step (B) transition
0.03 (Step (C) → Step (D)
transition condition)
STEP
condition)
W0.00
Step (B) W0.01
Step (D) W0.02
Step W0.00 (A)
Step (A) ladder program
0.04 (When both Step (B) and Step (D)
are complete, moves to Step (E)
0.02
SNXT
W0.01
Step (E) W0.04
0.05 (Step (C) reset conditions)
STEP
W0.01
End
Step W0.01
(B)
Step (B) ladder program
W0.03
200.03
0.04
SNXT
W0.04
STEP
W0.02
Step W0.02
(C)
Step (C) ladder program
0.03
SNXT
W0.03
STEP
W0.03
Step W0.03
(D)
Step (D) ladder program
STEP
W0.04
Step (E) ladder program
Step W0.04
(E)
0.05
SNXT
W30.0
STEP
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2 Instructions
Application Examples
(1) Sequential Execution
Robot hand
Solenoid 1
Solenoid 2
Photomicro-
sensor
SW 1
SW 4
SW 2
SW 3
2
Conveyor belt 1
Conveyor belt 2
Conveyor belt 3
Process A: Loading
Process B: Part installation
Process C: Inspection/Unloading
0.01(SW1)
Process A
started.
SNXT
W0.00
0.01 (SW1)
Loading
Process A
Process B
STEP
W0.00
0.02 (SW2)
0.03 (SW3)
Part Installation
Programming for process A
0.02(SW2)
Process A
reset.
Process B
started.
SNXT
W0.01
Inspection/Unloading
Process C
STEP
0.04 (SW4)
W0.01
End
Programming for process B
Explanation of operation
(1) SW1 ON:
Solenoid 1 operates
Conveyor 1 operates
(2) SW2 ON stops the previous process
0.03(SW3)
Process B
reset.
Process C
started.
SNXT
W0.02
Process A
Robot hand operates
Conveyor 2 operates
Process B
STEP
W0.02
(3) SW3 ON stops the previous process
Photo microsensor operates (for part inspection)
Conveyor 3 operates
Solenoid 2 operates (removal of defective items)
(4) SW4 ON stops the previous process
Process C
Programming for process C
0.01(SW1)
Process C
reset.
SNXT
W30.0
Additional Information
When another process is started from within a process (when an
SNXT instruction turns ON), all outputs of the current process are
turned OFF within that cycle.
STEP
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2 Instructions
(2) Branching Execution
Printer
SW C1
SW C2
SW D
SW A1
Guide
SW A2
Process A
Conveyer A
Process B
Conveyer B
SW B2
SW B1
Weight scale
Process C
0.01
0.02
(SW A1) (SW B1)
SNXT
W0.00
0.02(SW B1)
0.01(SW A1)
0.01
0.02
Process A
started.
(SW A1) (SW B1)
Process A
Process C
Process B
SNXT
W0.01
0.03(SW A2)
0.05(SW D)
0.04(SW B2)
STEP
W0.00
Programming for process A
End
0.03(SW A2)
Process A
reset.
Process C
started.
SNXT
W0.02
Explanation of operation
Products are sorted by the guides by weight.
(1) SWA1 ON:
STEP
Conveyor (A) operates
Machine (A) operates
W0.01
Process A
(2) SWB1 ON:
Conveyor (B) operates
Machine (B) operates
Programming for process B
Process B
(3) SWA2 ON stops process A
0.04(SW B2)
Printing machine operates (down)
UP by SWC2 ON
Process B
reset.
Process C
started.
Process C
SNXT
W0.02
(4) SWB2 ON stops process B
Printing machine operates (down)
UP by SWC2 ON
Process C
STEP
W0.02
(5) SWD ON stops the printing machine
Programming for process C
0.05(SW D)
Process C
reset.
SNXT
W30.0
STEP
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2 Instructions
(3) Parallel Execution
SW1
SW3
SW5
SW7
Conveyer B
Process B
Process A
Conveyer A
Process E
Conveyer E
Process D
Process C
Conveyer C
SW4
Conveyer D
SW6
SW2
2
0.01(SW1, SW2)
Process A
started.
SNXT
W0.00
0.01(SW 1 and SW2 both ON)
Process C
started.
SNXT
W0.02
Process A
Process B
Process C
Process D
0.03(SW4)
0.02(SW3)
STEP
W0.00
Programming for process A
0.02(SW3)
0.04(SW5 and SW6 both ON)
Process A
reset.
SNXT
W0.01
Process B
started.
Process E
STEP
0.05(SW7)
W0.01
End
Programming for process B
Used to
turn off
process D.
W0.03
W0.03
Explanation of operation
(1) SW1, SW2 ON:
Conveyor (A) operates
Work (A) operates
Conveyor (C) operates
Work (C) operates
(2) SW3 ON:
Process (A) stops
Conveyor (B) operates
Work (B) operates
(3) SW4 ON:
Process (C) stops
Conveyor (D) operates
Work (D) operates
(4) SW5, SW6 ON:
Process (B) stops
Process (D) stops
Conveyor (E) operates
Work (E) operates
(5) SW7 ON:
Process A
Process C
0.04(SW5, SW6)
SNXT
Process E
started.
W0.04
STEP
W0.02
Process B
Process D
Programming for process C
0.03(SW4)
Process C
reset.
SNXT
W0.03
Process D
started.
STEP
W0.03
Process E
Programming for process D
Process (E) stops
STEP
Note When processes (B) and (D) are in operation and SW5 and
W0.04
SW6 turn ON, it is judged that processes (B) and (D) are finished.
Execution of SNXT W0.04 turns OFF the outputs of process
(B) and W0.03 turns OFF.
STEP W0.03 judges ON to OFF and turns OFF the outputs of
process (D).
Programming for process E
0.05(SW7)
Process E
reset.
SNXT
W30.0
Additional Information
The STEP instruction turns all outputs in its process OFF when ON
STEP
changes to OFF.
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2 Instructions
Basic I/O Unit Instructions
IORF
Function
code
Instruction
Mnemonic
IORF
Variations
@IORF
Function
I/O REFRESH
097
Refreshes the specified I/O words.
IORF
IORF(097)
Symbol
St
E
St: Starting word
E: End word
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Operand
Description
Data type
Size
St
E
Starting word
End word
---
---
Variable
Variable
St: Starting Word
CIO 001 to CIO 099, CIO 101 to CIO 199 (CP1W Expansion I/O Unit’s I/O Area)
E: End Word
CIO 001 to CIO 099, CIO 101 to CIO 199 (CP1W Expansion I/O Unit’s I/O Area)
ꢀ Operand Specifications
Word addresses
Indirect DM addresses
Area
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
---
AR
T
C
DM
@DM
*DM
St, E
OK
---
---
---
---
---
---
---
---
---
---
---
Flags
Name
Label
Operation
Error Flag
P_ER
• ON if St is greater than E.
• ON if St and E are in different memory areas.
• OFF in all other cases.
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2 Instructions
Units Refreshed by IORF(097)
Unit type
CH
Refreshable by IORF(097)
CPU Unit with
30 or 40 I/O
Points
CP1E CPU Unit built-in I/O: 0CH, 1CH, 100CH and 101CH
CP1W Expansion I/O Unit: 2CH to 99CH, 102CH to 199CH
CP1W Expansion Unit: 2CH to 99CH, 102CH to 199CH
CP1E CPU Unit built-in I/O: 0CH, 1CH, 2CH, 100CH, 101CH and 102CH
CP1W Expansion I/O Unit: 3CH to 99CH, 103CH to 199CH
CP1W Expansion Unit: 3CH to 99CH, 103CH to 199CH
CP1E CPU Unit built-in I/O: 0CH and 100CH
No
Yes
Yes
No
CPU Unit with
60 I/O Points
Yes
Yes
No
NA-type CPU
Unit
CP1E CPU Unit built-in analog: 90CH, 91CH and 190CH
CP1W Expansion I/O Unit: 1CH to 99CH, 101CH to 199CH
CP1W Expansion Unit: 1CH to 99CH, 101CH to 199CH
Yes
Yes
Yes
2
Note CP1E CPU Unit built-in I/O area cannot be refreshed with IORF(097).
CP1E CPU Unit built-in I/O area can be refreshed with immediate refreshing specifications (!).
Function
IORF(097) refreshes the I/O words between St and E,
inclusively. IORF(097) is used to refresh words allo-
cated to CP1W Expansion (I/O) Units. For 30 or 40 I/O
Points, Expansion (I/O) Units are allocated words
between CIO 002 and CIO 099, CIO102 and CIO199.
For 60 I/O Points, Expansion (I/O) Units are allocated
words between CIO 003 and CIO 099, CIO103 and
CIO199. For NA20 I/O Points, Expansion (I/O) Units
are allocated words between CIO 001 and CIO 099,
CIO101 and CIO199.
CP1W Expansion Units,
CP1W Expansion I/O Units
I/O bit area
St
E
I/O refreshing
Precaution
• IORF(097) can be used in an interrupt task, which allows high-speed processing of specific I/O data
with an interrupt. If IORF(097) is used in an interrupt task, always disable cyclic refreshing of the
specified Special I/O Unit by turning ON the corresponding Special I/O Unit Cyclic Refreshing Dis-
able Bit in the PLC Setup.
• If words for which there is no Unit mounted exist between St and E, nothing will be done for those
words and only the words allocated to Units will be refreshed.
• The I/O refreshing initiated by IORF(097) will be stopped midway if an I/O bus error occurs during I/O
refreshing.
Sample program
Refreshing Words in the I/O Bit Area
When CIO 0.00 turns ON in the following example, CIO 2 to CIO 4 (36 inputs) are refreshed (1) and
then after the required processing is performed (2), CIO 104 (8 outputs) is refreshed (3).
0.00
(1)
IORF
St
E
2
4
CPM1A Expansion I/O Units
CIO 2 and CIO 3 CIO 4
(2)
(3)
Processing
15
15
0
0
St CIO 2
CIO 3
IORF
104
I/O refreshing
St
E
E
CIO 4
104
CIO 102 and CIO 103
CIO 104
St
E
CIO 104
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2 Instructions
SDEC
Instruction
Function
code
Mnemonic
Variations
Function
Converts the hexadecimal contents of the desig-
nated digit(s) into 8-bit, 7-segment display code
and places it into the upper or lower 8-bits of the
specified destination words.
7-SEGMENT DECODER
SDEC
@SDEC
078
SDEC
SDEC(078)
Symbol
S: Source word
S
Di
D
Di: Digit designator
D: First destination word
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Operand
Description
Data type
UINT
Size
S
Di
D
Source word
Digit designator
First destination word
1
1
UINT
UINT
Variable
Di: Digit designator
15
12 11
1/0
8 7
4 3
0
0
m
n
Di
First digit of S to convert (0 to 3)
0: Digit 0 (bits 0 to 3 of S)
1: Digit 1 (bits 4 to 7 of S)
2: Digit 2 (bits 8 to 11 of S)
3: Digit 3 (bits 12 to 15 of S)
Number of digits to convert
0 to 3: 1 to 4 digits
First half of D to receive converted data
0: Rightmost 8 bits (1st half)
1: Leftmost 8 bits (2nd half)
Not used; set to 0.
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
S
Di
D
---
OK
---
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
Flags
Name
Label
Operation
Error Flag
P_ER
• ON if settings in Di are not within the specified ranges.
• OFF in all other cases.
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2 Instructions
Function
SDEC(078) regards the data specified by
15
12 11
1/0
8 7
4 3
0
S as 4-digit hexadecimal data, converts the
digits specified in S by Di (first digit and
number of digits) to 7-segment data and
outputs the results to D in the bits specified
in Di.
Di
0
m
n
Number of digits
n
m
First digit to convert
S
S+1
HEX
Rightmost 8 bits (0)
7-segment
D
D+1
D+2
2
Precaution
• If more than one digit is specified for conversion in Di, digits are converted in order toward the most-
significant digit. Digit 0 is the next digit after digit 3.
• Results are stored in D in order from the specified portion toward higher-address words. If just one of
the bytes in a destination word receives converted data, the other byte is left unchanged.
Sample program
When CIO 0.00 turns ON in the following example, the contents of the 3 digits beginning with digit 1 in
D100 will be converted from hexadecimal data to 7-segment data, and the results will be output to the
upper byte of D200 and both bytes of D201. The specifications of the bytes to be converted and the
location of the output bytes are made in CIO 100.
0.00
SDEC
S
Di
D
D100
100
D200
15
15
12 11
8 7
4 3
0
Di: 100
3
1
1
0
3
2
2
1
1
12 11
8 7
4 3
0
F
S: D100
Hexadecimal to 7-segment data conversion
(F → 71, 1 → 06, and 2 → 5B)
D: D200
D201
7
5
1
B
0
6
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2 Instructions
ꢀ 7-segment Data
The following table shows the data conversions from a hexadecimal digit (4 bits) to 7-segment code (8
bits).
Original data
Bits
Converted code (segments)
Display Original data
Digit
–
g
f
e
d
c
b
a
Hex
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
0
1
1
1
1
1
1
3F
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
0
1
1
1
1
0
1
1
1
0
0
0
1
1
1
1
1
1
1
1
1
0
1
1
0
1
0
0
0
1
0
1
0
1
1
1
1
1
1
0
1
1
0
1
1
0
1
1
0
1
1
1
1
0
1
0
1
1
1
1
1
1
1
1
1
0
1
0
0
1
1
1
1
0
0
1
1
1
1
0
0
1
0
0
0
1
1
0
1
1
1
1
1
1
0
1
0
1
1
06
5B
4F
66
6D
7D
27
7F
6F
77
7C
39
5E
79
71
LSB
a
b
c
d
e
f
1
1
1
1
1
1
1
a
g
f
b
c
e
d
g
0
MSB
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2 Instructions
DSW
Instruction
Function
code
Mnemonic
Variations
Function
Reads the value set on a external digital switch (or
thumbwheel switch) connected to an I/O Unit and
stores the 4-digit or 8-digit value in the specified
words.
DIGITAL SWITCH INPUT
DSW
---
210
DSW
DSW(210)
2
I
I: Input word
Symbol
O
O: Output word
D
D: First result word
C1: Number of digits
C2: System word
C1
C2
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
Not allowed
Usage
OK
Operands
Operand
Description
Data type
UINT
Size
I
Input word
Output word
1
O
UINT
1
D
First result word
Number of digit
System word
WORD
UINT
Variable
C1
C2
1
1
WORD
I: Input Word (Data Line D0 to D3 Inputs)
Specify the input word allocated to the Input Unit and connect the digital switch’s D0 to D3 data lines to
the Input Unit as shown in the following diagram.
15 14 13 12 11 10
Leftmost 4 digits
9
8
7
6
5
4
3
2
1
0
I
D3
D2
D1
D0
D0
D1
D2
D3
Rightmost 4 digits
O: Output Word (CS/RD Control Signal Outputs)
Specify the output word allocated to the Output Unit and connect the digital switch’s control signals (CS
and RD signals) to the Output Unit as shown in the following diagram.
15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
O
CS0
CS1
CS2
CS3
CS signals
One Round Flag
RD0 Read signal
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2 Instructions
D: First Result Word
Specifies the leading word address where the external digital switch’s set values will be stored.
15
12 11
8
7
4
3
0
D
Digit 4
12 11
Digit 2
Digit 3
Digit 1
0
15
8
7
4
3
D+1
(See note.)
Digit 8
Digit 6
Digit 7
Digit 5
Note: Only when C1 = 0001 hex to read 8 digits.
C1: Number of Digits
Specifies the number of digits that will be read from the external digital switch. Set C1 to 0000 hex to
read 4 digits or 0001 hex to read 8 digits.
C2: System Word
Specifies a work word used by the instruction. This word cannot be used in any other application.
15
0
C2
System word
(Cannot be accessed by the user.)
ꢀ Operand Specifications
Word addresses
Indirect DM addresses
Area
Constants
CF
Pulse bits
TR bits
CIO
OK
---
WR
OK
---
HR
AR
OK
---
T
C
DM
OK
---
@DM
OK
*DM
I, O, D
C1
OK
---
OK
---
OK
---
OK
---
OK
---
---
---
---
---
---
C2
OK
OK
OK
OK
OK
OK
OK
OK
Flags
Name
Label
Operation
Error Flag
P_ER
OFF
Function
DSW(210) outputs control signals to bits 00 to 04 of O, reads the specified number of digits (either 4-
digit or 8-digit, specified in C1) of digital switch data line data from I, and stores the result in D and D+1.
(If 4 digits are read, the result is stored in D. If 8 digits are read, the result is stored in D and D+1.)
DSW(210) reads the 4-digit or 8-digit switch data once every 16 cycles, and then starts over and contin-
ues reading the data. The One Round Flag (bit 05 of O) is turned ON once every 16 CPU Unit cycles.
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2 Instructions
ꢀ External Connections
Connect the digital switch or thumbwheel switch to Input Unit contacts 0 to 7 and Output Unit contacts 0
to 4, as shown in the following diagram. The following example illustrates connections for an A7B Thum-
bwheel Switch.
8 4 2 1
IN
2
Switch
No. 8
Switch
No. 7
Switch
No. 6
Switch
No. 5
Switch Switch
No. 4 No. 3
Switch
No. 2
Switch
No. 1
CP1W-20EDT
OUT
A7B
Thumbwheel
Switch
ꢀ Timing Chart
I
Four digits: 00 to 03
10 0
10 1
10 2
10 3
Input data
Eight digits: 00 to 03, 04 to 07
Leftmost
4 digits
Rightmost
4 digits
O
D+1
D
00
When only 4 digits are read,
only word D is used.
01
02
03
04
05
CS signals
RD (read) signal
One Round Flag
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16
16 cycles to complete one round of execution
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2 Instructions
Precaution
• Do not read or write the system word (C2) from any other instruction. DSW(210) will not operate cor-
rectly if the system word is accessed by another instruction. The system word is not initialized by
DSW(210) in the first cycle when program execution starts. If DSW(210) is being used from the first
cycle, clear the system word from the program.
• DSW(210) will not operate correctly if I/O refreshing is not performed with the Input Unit and Output
Unit connected to the digital switch or thumbwheel switch after DSW(210) is executed. Consequently,
set the input time constant for the Input Units used for the data line input word to a value that is
shorter than the cycle time.
• DSW(210) reads the 4-digit or 8-digit data once in 16 cycles, and then starts over and reads the data
again in the next 16 cycles.
• When executed, DSW(210) begins reading the switch data from the first of the sixteen cycles, regard-
less of the point at which the last instruction was stopped.
Sample program
In this example, DSW(210) is used to read an 8-digit number from a digital switch and outputs the
resulting value constantly to D0 and D3. The digital switch is connected through CIO 3 and CIO 104.
D1000 is used as the system word.
P_On
DSW(210)
Always ON Flag
3
I
O
104
D0
D
#0001
D1000
C1
C2
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2 Instructions
MTR
Function
code
Instruction
Mnemonic
Variations
Function
Inputs up to 64 signals from an 8 × 8 matrix con-
nected to an Input Unit and an Output Unit (using
8 input points and 8 output points) and stores that
64-bit data in the 4 destination words.
MATRIX INPUT
MTR
---
213
MTR
MTR(213)
2
I: Input word
O: Output word
I
Symbol
O
D
C
D: First destination word
C: System word
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
Not allowed
Usage
OK
Operands
Operand
Description
Data type
UINT
Size
I
Input word
Output word
1
1
4
1
O
D
C
UINT
First destination word
System word
ULINT
WORD
I: Input Word
Specify the input word allocated to the Input Unit and connect the 8 input signal lines to the Input Unit
as shown in the following diagram.
15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
I
0
1
2
3
4
5
6
7
Bits 00 to 07 correspond to
Input Unit inputs 0 to 7.
O: Output Word (Selection Signal Outputs)
Specify the output word allocated to the Output Unit and connect the 8 selection signals to the Output
Unit as shown in the following diagram.
15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
O
0
1
2
3
4
5
6
7
Bits 00 to 07 correspond to
Output Unit outputs 0 to 7.
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2 Instructions
D: First Register Word
Specifies the leading word address of the 4 words that contain the data from the 8 × 8 matrix.
15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
D
15
14
13
12
11
10
9
0
1
2
3
4
5
6
7
Bits 00 to 15 correspond to
matrix elements 0 to 15.
8
15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
D+1
15
14
13
12
11
10
9
0
1
2
3
4
5
6
7
Bits 00 to 15 correspond to
matrix elements 16 to 31.
8
15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
D+2
15
14
13
12
11
10
9
0
1
2
3
4
5
6
7
Bits 00 to 15 correspond to
matrix elements 32 to 47.
8
15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
D+3
15
14
13
12
11
10
9
0
1
2
3
4
5
6
7
Bits 00 to 15 correspond to
matrix elements 48 to 63.
8
C: System Word
Specifies a work word used by the instruction. This word cannot be used in any other application.
15
0
C
System word
(Cannot be accessed by the user.)
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
I, O, D, C
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
---
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2 Instructions
Flags
Name
Label
P_ER
Operation
Error Flag
OFF
Function
MTR(213) outputs the selection signals to bits 00 to 07 of O, reads the data in order from bits 00 to 07
of I, and stores the 64 bits of data in the 4 words D through D+3. MTR(213) reads the status of the 64-
bit matrix every 24 CPU Unit cycles. The One Round Flag (bit 08 of O) is turned ON for one cycle in
every 24 cycles after each of the selection signals has been turned ON.
ꢀ External Connections
Connect the hexadecimal keypad to Input Unit contacts 0 to 7 and Output Unit contacts 0 to 7, as
shown in the following diagram.
2
1st row
IN
CP1W-20EDT
7th row
OUT
8th row
ꢀ Timing Chart
00
01
02
03
Selection signals
04
05
06
07
00
:
Matrix status
32
:
64
00
Bits indicating status of inputs
(Bit ON when input is ON)
:
32
:
64
08
One Round Flag
One round completed in 24 cycles
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2 Instructions
Precaution
• Do not read or write the system word (C) from any other instruction. MTR(213) will not operate cor-
rectly if the system word is accessed by another instruction. The system word is not initialized by
MTR(213) in the first cycle when program execution starts. If MTR(213) is being used from the first
cycle, clear the system word from the program.
• MTR(213) will not operate correctly if I/O refreshing is not performed with the Input Unit and Output
Unit connected to the external matrix after MTR(213) is executed. Consequently, set the input time
constant for the Input Units used for the data line input word to a value that is shorter than the cycle
time.
• When executed, MTR(213) begins reading the matrix status from the beginning of the matrix, regard-
less of the point at which the last instruction was stopped.
Sample program
In this example, MTR(213) reads the 64 bits of data from the 8 × 8 matrix and stores the data in W0 to
W3. The 8 × 8 matrix is connected through CIO 3 and CIO 104. D1000 is used as the system word.
P_On
MTR(213)
Always ON Flag
3
104
I
O
D
C
W0
D1000
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2 Instructions
7SEG
Function
code
Instruction
Mnemonic
Variations
Function
Converts the source data (either 4-digit or 8-digit
BCD) to 7-segment display data, and outputs that
data to the specified output word.
7-SEGMENT DISPLAY
OUTPUT
7SEG
---
214
7SEG
7SEG(214)
S: Source word
O: Output word
C: Control data
D: System word
S
O
C
D
2
Symbol
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
Not allowed
Usage
OK
Operands
Operand
Description
Data type
WORD
Size
S
O
C
D
Source word
Output word
Variable
UINT
1
1
1
Control word
System word
#+10 decimal only
WORD
S: Source Word
Specify the first source word containing the data that will be converted to 7-segment display data.
15
12 11
8
7
4
3
0
S
Digit 4
12 11
Digit 2
Digit 3
Digit 1
0
15
8
7
4
3
S+1
Digit 8
Digit 6
Digit 7
Digit 5
O: Output Word (Data and Latch Outputs)
Specify the output word allocated to the Output Unit and connect the 7-segment display to the Output
Unit as shown in the following diagram.
• Converting 4 digits
15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
O
One Round Flag
LE3
D0
D1
D2
D3
LE2
LE1
LE0
Latch outputs
4-digit data output
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2 Instructions
• Converting 8 digits
15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
O
One Round Flag
Latch outputs
LE3
LE2
LE1
LE0
D0
D1
D2
D3
Leftmost 4-digit data output
D0
D1
D2
D3
Rightmost 4-digit data output
C: Control Data
The value of C indicates the number of digits of source data and the logic for the Input and Output
Units, as shown in the following table. (The logic refers to the transistor output’s NPN or PNP logic.)
Source data
Display’s data input logic
Display’s latch input logic
Same as Output Unit
C
4 digits (S)
Same as Output Unit
0000
0001
0002
0003
0004
0005
0006
0007
Different from Output Unit
Same as Output Unit
Different from Output Unit
Same as Output Unit
Different from Output Unit
Same as Output Unit
8 digits (S, S+1)
Different from Output Unit
Same as Output Unit
Different from Output Unit
Different from Output Unit
D: System Word
Specifies a work word used by the instruction. This word cannot be used in any other application.
15
0
D
System word
(Cannot be accessed by the user.)
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
OK
---
WR
OK
---
HR
OK
---
AR
OK
---
T
C
DM
OK
---
@DM
OK
*DM
OK
---
S, O
C
OK
---
OK
---
---
OK
---
---
---
---
---
D
OK
OK
OK
OK
OK
OK
OK
OK
OK
Flags
Name
Label
Operation
Error Flag
P_ER
OFF
Function
7SEG(214) reads the source data, converts it to 7-segment display data, and outputs that data (as left-
most 4 digits D0 to D3, rightmost 4 digits D0 to D3, latch output signals LE0 to LE3) to the 7-segment
display connected to the output indicated by O. The value of C indicates the number of digits of source
data (either 4-digit or 8-digit) and the logic for the Input and Output Units.
7SEG(214) displays the 4-digit or 8-digit data in 12 cycles, and then starts over and continues display-
ing the data.
The One Round Flag (bit 08 of O when converting 4 digits, bit 12 of O when converting 8 digits) is
turned ON for one cycle in every 12 cycles after 7SEG(214) has turned ON each of the latch output sig-
nals.
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2 Instructions
ꢀ External Connections
Connect the 7-segment display to the Output Unit as shown in the following diagram. This example
shows an 8-digit display. With a 4-digit display, the data outputs (D0 to D3) would be connected to out-
puts 0 to 3 and the latch outputs (LE0 to LE3) would be connected to outputs 4 to 7. Output point 12 (for
8-digit display) or output point 8 (for 4-digit display) will be turned ON when one round of data has been
output, but it is not necessary to connect them unless required by the application.
IN@ CH
IN@ CH
CP1W-40EDT
2
OUT@ CH
OUT@ CH
LE3
LE2
LE1
LE0
VDD
(+)
VSS
(0)
LE3
VDD
(+)
VSS
(0)
LE2
LE1
LE0
D0
D1
D2
D3
D0
D1
D2
D3
Leftmost 4 digits
Rightmost 4 digits
7-segment display
ꢀ Timing Chart
Bit(s) in O
Function
Output status (Data and latch logic depends on C)
(4 digits, 1 block) (4 digits, 2 blocks)
00 to 03
04 to 07
Data output
00 to 03
10 0
10 1
10 2
10 3
Note 0 to 3: Data output for word S
4 to 7: Data output for word S+1
Latch output 0
04
08
Latch output 1
Latch output 2
05
06
09
10
Latch output 3
07
08
11
12
One Round Flag
1 2
3
4
5
6
7
8
9 10 11 12 1
12 cycles required to complete one round
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2 Instructions
Precaution
• Do not read or write the system word (D) from any other instruction. 7SEG(214) will not operate cor-
rectly if the system word is accessed by another instruction. The system word is not initialized by
7SEG(214) in the first cycle when program execution starts. If 7SEG(214) is being used from the first
cycle, clear the system word from the program.
• After the 7-segment data is output in 12 cycles, 7SEG(214) starts over and converts the present con-
tents of the source word(s) in the next 12 cycles.
• When executed, 7SEG(214) begins on latch output 0 at the beginning of the round, regardless of the
point at which the last instruction was stopped.
• Even if the connected 7-segment display has fewer than 4 digits or 8 digits in its display, 7SEG(214)
will still output 4 digits or 8 digits of data.
Sample program
In this example, 7SEG(214) converts the 8 digits of BCD data in D100 and D101 and outputs the data
through CIO 100.
There are 8 digits of data being output and the 7-segment display’s logic is the same as the Output
Unit’s logic, so the control data (C) is set to 4. D200 is used as the system word, D.
P_On
7SEG(214)
Always ON Flag
D100
100
4
S
O
C
D
D200
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2 Instructions
Serial Communication Instructions
TXD
Function
code
Instruction
Mnemonic
Variations
Function
Outputs the specified number of bytes of data
from the CPU Unit’s built-in RS-232C port or the
Serial Option Board port.
TRANSMIT
TXD
@TXD
236
2
TXD
TXD(236)
S
C
N
S: First source word
Symbol
C: Control word
N: Number of bytes
0000 to 0100 hex (0 to 256)
Applicable Program Areas
Area
Step program areas
Subroutines
Interrupt tasks
OK
Usage
OK
OK
Operands
Operand
Description
Data type
UINT
Size
S
C
N
First source word
Control word
Number of bytes 0000 to 0100 hex (0 to 256)
Variable
UINT
1
1
UINT
C: Control word
15
12 11
8 7
4 3
0
C
Byte order
0: Most significant bytes first
1: Least significant bytes first
RS and ER signal control
0: No RS and ER signal control
1: RS signal control
Always 0
2: ER signal control
3: RS and ER signal control
Serial port specifier
1: CPU Unit’s RS-232C port
2: Serial Option Board port
ꢀ Operand Specifications
Word addresses
Indirect DM addresses
Area
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
S
---
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
C, N
OK
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2 Instructions
Flags
Name
Label
Operation
Error Flag
P_ER
• ON if no-protocol mode is not set in the PLC Setup.
• ON if the value of C is not within range.
• ON if the value for N is not between 0000 and 0100 hex.
• ON if a send is attempted when the Send Ready Flag is OFF. (The Send Ready Flag is A392.05 for
the CPU Unit’s RS-232C port, or A392.13 for Serial Option Board port.)
• OFF in all other cases.
Related Auxiliary Area Words and Bits
ꢀ CPU Unit’s Built-in RS-232C Port
Port
Address
Contents
CPU Unit’s built-in RS-232C port
A392.05
ON when data can be sent in the no-protocol mode.
ꢀ Serial Option Board Port
Port
Address
Contents
Serial Option Board port
A392.13
ON when data can be sent in the no-protocol mode.
Related PLC Setup Settings
Function
• TXD(236) reads N bytes of data from words S to S+(N÷2)-1 and outputs the raw data in no-protocol
mode from the CPU Unit’s built-in RS-232C port or the Serial Option Board port. (The output port is
specified with bits 8 to 11 of C.)
• The following send-message frame format can be set in the PLC Setup.
1) Start code: None or 00 to FF hex.
2) End code: None, CR+LF, or 00 to FF hex.
The data will be sent with any start and/or end codes specified in the PLC Setup. If start and end
codes are specified, the codes will be added to the send data (N). In this case, the maximum number
of bytes that can be specified for N is 256 bytes.
• Data is sent in the order specified in C0 to C3.
• Specification of control in C4 to C7 for the RS and ER signals take effect as follows:
1) If RS signal control is specified in C, bit 15 of S will be used as the RS signal.
2) If ER signal control is specified in C, bit 15 of S will be used as the ER signal.
3) If RS and ER signal control is specified in C, bit 15 of S will be used as the RS signal and bit 14 of S
will be used as the ER signal.
• If 1, 2, or 3 hex is specified for RS and ER signal control in C, TXD(236) will be executed regardless
of the status of the Send Ready Flag (A392.05, or A392.13 depending on the port being used).
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2 Instructions
• Up to 259 bytes can be sent, including the send data (N = 256 bytes max.), the start code, and the
end code.
• Specify the size of the send data, not including the start code and end code, in N.
ꢀ Start code / end code settings and send data
15
8 7
0
N bytes of data is sent in the following order when sending
the most significant bytes first is specified:
ᕃ, ᕄ, ᕅ, ᕆ, ᕇ, ᕈ
ᕃ
ᕅ
ᕇ
ᕄ
ᕆ
ᕈ
S
S+1
S+2
No Start or End Code
ᕃ ᕄ ᕅ ᕆ ᕇ ᕈ . . .
N send bytes: 256 max.
2
Only Start Code
ᕃ ᕄ ᕅ ᕆ ᕇ ᕈ . . .
ST
Send bytes after ST:
256 max.
Only End Code
ᕃ ᕄ ᕅ ᕆ ᕇ ᕈ . . .
ED
Send bytes before ED:
256 max.
Start and End Code
ᕃ ᕄ ᕅ ᕆ ᕇ ᕈ . . .
ST
ED
Send bytes between
ST and ED: 256 max.
CR+LF End Code
ᕃ ᕄ ᕅ ᕆ ᕇ ᕈ . . .
CR LF
Send bytes before
CR+LF: 256 max.
Start and CR+LF End Code
ᕃ ᕄ ᕅ ᕆ ᕇ ᕈ . . .
ST
CR LF
Send bytes between ST
and CR+LF: 256 max.
CPU Unit’s built-in RS-232C port or Serial Option
Board port
Data sent.
Hint
• When sending data to another device by TXD instruction, the device may require that the data be
sent at certain intervals. In that case, a transmission delay time can be set to adjust the transmission
intervals.
Precautions
• TXD(236) can be used only for the CPU Unit’s RS-232C port or the Serial Option Board port. In addi-
tion, the port must be set to no-protocol mode.
• Data can be sent only when the port’s Send Ready Flag is ON. (The Send Ready Flag is A392.05 for
the CPU Unit’s RS-232C port, or A392.13 for Serial Option Board port.)
• Nothing will be sent if 0 is specified for N.
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2 Instructions
Sample program
ꢀ Sending Data to a Code Reader
This example shows how to send data to the V530-R150V3 2D Code Reader as an example of commu-
nicating with an external device.
Hardware Configuration
Sync Sensor
Monitor
F150-M05L
Power Supply
(24 VDC)
Console
F150-KP
Console Cable
RS-232C Cable
XW2Z-200T (2 m)
XW2Z-500T (5 m)
V530-R150V3
Programmable Controller
SYSMAC
CJ1G-CPU@@H
CJ1H-CPU@@H
CJ1M-CPU@@
Camera
F150-SLC20
In this example, the external device is connected to the RS-232C port built into the CPU Unit.
First, set the reading conditions for the Code Reader.
Communications Settings
The communications settings of the Code Reader are given in the following table. These are the default
settings.
Item
Communications mode
Baud rate
Setting
No-protocol
38,400 bps
8 bits
Data bit length
Parity
None
Stop bits
1
Start code
None
End code
#000D (CR)
Set the PLC communications settings to the same values in the PLC Setup. Only the end code needs to
be set.
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2 Instructions
Programming Example
If CIO 0.01 turns ON while the RS-232C Port Send Ready Flag (A392.05) is ON, three bytes of data
starting from the upper byte of D10 are sent without conversion to the Code Reader connected to the
CPU Unit’s built-in RS-232C port. These three bytes contain “@GO”, which is the normal read com-
mand used as a trigger input to the Code Reader from the RS-232C line.
0.01
A392.05
@TXD
D10
D20
&3
RS-232C Port Send
Ready Flag
S
C
N
0.02
A392.06
@RXD
D100
D20
2
RS-232C Port Receive
Ready Flag
RS-232C Port
A393
Reception Counter
Upper byte
Lower byte
15 12 11
8
8
7
4
3
0
0
@ G L
Sent
S: D10
D11
4
4
0
5
0
3
0
40 53 4E
ED
E
Three bytes
15 12 11
0
7
4
3
C: D20
1
0
0
Byte Order
#0: Most significant bytes first
RS and ER Signal Control
#0: No RS and ER signal control.
Serial Port Specifier
#1: CPU Unit’s built-in RS-232C port
Always #0.
ꢀ Controlling Signals
0.01
TXD
D300
D400
&0
When CIO 0.01 turns ON, the
status of bit 15 of D300 is output
as the RS signal and the status
of bit 14 is output as the ER
signal.
S
C
N
15
1
14 13 12
0
0
0
S: D300
Turns OFF ER signal.
Turns ON RS signal.
15 12 11
0
8
7
4
3
0
1
3
0
C: D400
Byte Order
#0: Most significant bytes first
RS and ER Signal Control
#3: RS and ER signal control
Serial Port Specifier
#1: CPU Unit’s built-in RS-232C port
Always #0.
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2 Instructions
RXD
Function
code
Instruction
Mnemonic
Variations
Function
Reads the specified number of bytes of data from
the CPU Unit’s built-in RS-232C port or the Serial
Option Board port.
RECEIVE
RXD
@RXD
235
RXD
RXD(235)
D: First destination word
C: Control word
Symbol
D
C
N
N: Number of bytes to store
0000 to 0100 hex (0 to 256 decimal)
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Operand
Description
Data type
Size
D
C
N
First destination word
Control word
Number of bytes to store 0000 to 0100 hex (0 to 256 decimal)
UINT
UINT
UINT
Variable
1
1
C: Control Word
15
1211
8
7
4 3
0
C
Byte order
0 Hex: Most significant byte to least significant byte
1 Hex: Lest significant byte to most significant byte
CS and DR signal monitoring
0: No CS and DR signal monitoring
1: CS signal monitoring
Always 0
2: DR signal monitoring
3: CS and DR signal monitoring.
Serial port specifier
1: CPU Unit’s RS-232C port
2: Serial Option Board port
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
D
---
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
C, N
OK
Flags
Name
Label
Operation
Error Flag
P_ER
• ON if no-protocol mode is not set in the PLC Setup.
• ON if the value of C is not within range.
• ON if the value for N is not between 0000 and 0100 hex.
• OFF in all other cases.
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2 Instructions
Related Auxiliary Area Words and Bits
ꢀ Auxiliary Area Flags for CPU Unit’s RS-232C Port
Name
Address
Contents
ON when no-protocol reception is completed.
RS-232C Port Reception Completed Flag
A392.06
Number of Receive Bytes Specified: The flag will turn ON when the specified number of
bytes has been received.
End Code Specified: The flag will turn ON when the end code is received or when 256
bytes have been received.
RS-232C Port Reception Overflow Flag
A392.07
ON when more than the expected number of receive bytes has been received.
Number of Receive Bytes Specified: The flag will turn ON when anything is received
after reception has been completed and execution of the next RXD(235).
End Code Specified: The flag will turn ON when anything is received after the end code
has been received and execution of the next RXD(235) or when the 257th byte of data is
received before the end code is received.
2
RS-232C Port Reception Counter
A393
Counts in hexadecimal the number of bytes received in no-protocol mode (0 to 256 decimal).
ꢀ Auxiliary Area Flags for Serial Option Board Port
Name
Address
Contents
Serial Option Board port Reception Completed A392.14
Flag
ON when no-protocol reception is completed.
Number of Receive Bytes Specified: The flag will turn ON when the specified num-
ber of bytes has been received.
End Code Specified: The flag will turn ON when the end code is received or when
256 bytes have been received.
Serial Option Board port Reception Overflow
Flag
A392.15
ON when more than the expected number of receive bytes has been received in no-
protocol mode.
Number of Receive Bytes Specified: The flag will turn ON when more data is
received after reception was completed but before the received data was not read
from the buffer with RXD(235).
End Code Specified: The flag will turn ON when 257 or more bytes of data are
received without an end code.
Serial Option Board port Reception Counter
A394.00 to A394.15
Counts in hexadecimal the number of bytes received in no-protocol mode (0 to 256
decimal).
Related PLC Setup Settings
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2 Instructions
Function
• RXD(235) reads data that has been received in no-protocol mode at the CPU Unit’s built-in RS-232C
port or the Serial Option Board port (the port is specified with bits 8 to 11 of C) and stores N bytes of
data in words D to D+(N÷2)-1. If N bytes of data has not been received at the port, then only the data
that has been received will be stored.
• The following receive message frame format can be set in the PLC Setup.
1) Start code: None or 00 to FF hex
2) End code: None, CR+LF, or 00 to FF hex. If no end code is specified, the number of bytes to
received is set from 00 to FF hex (1 to 256 decimal; 00 specifies 256 bytes).
• Data will be stored in memory in the order specified in C0 to C3.
• Cases where the reception completion flag turns ON
The Reception Completed Flag (note (a)) will turn ON when the number of bytes specified in the PLC
Setup has been received. When the Reception Completed Flag turns ON, the number of bytes in the
Reception Counter (note (b)) will have the same value as the number of receive bytes specified in the
PLC Setup.
If an end code is specified in the PLC Setup, the Reception Completed Flag (note (a)) will turn ON
when the end code is received or when 256 bytes of data have been received. If more bytes are
received than specified, the Reception Overflow Flag (note (c)) will turn ON.
• When RXD(235) is executed, data is stored in memory starting at D, the Reception Completed Flag
(note (a)) will turn OFF (even if the Reception Overflow Flag (note (c)) is ON), and the Reception
Counter (note (b)) will be cleared to 0.
• If the RS-232C Port Restart Bit (note (d)) is turned ON, the Reception Completed Flag (note (a)) will
be turned OFF (even if the Reception Overflow Flag is ON), and the Reception Counter (note (b)) will
be cleared to 0.
• Specification of monitor in bits C4 to C7 for the CS and DR signals takes effect as follows:
1) If CS signal monitoring is specified in C, the status of the CS signal will be stored in bit 15 of D.
2) If DR signal monitoring is specified in C, the status of the DR signal will be stored in bit 15 of D.
3) If CS and DR signal monitoring is specified in C, the status of the CS signal will be stored in bit 15
of D and the status of the DR signal will be stored in bit 14 of D.
• If 1, 2, or 3 hex is specified for CS and DR signal control in C, RXD(235) will be executed regardless
of the status of the Receive Completed Flag (note (a)).
• Receive data will not be stored if CS or DR signal monitoring is specified.
• Up to 259 bytes can be received, including the receive data (N = 256 bytes max.), the start code, and
the end code.
• Specify the size of the receive data, not including the start code and end code, in N.
Note Related Auxiliary Area and CIO Area Addresses
(a) Reception Completed Flags
Built-in RS232C port
Serial Option Board port:
(b) Reception Counters
Built-in RS232C port
A392.06
A392.14
A393
A394
Serial Option Board port:
(c) Reception Overflow Flags
Built-in RS232C port
A392.07
A392.15
Serial Option Board port:
(d) RS-232C Port Restart Bit
Built-in RS232C port
A526.00
A526.01
Serial Option Board port:
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2 Instructions
ꢀ Start Code/End Code Settings and Receive Data
No Start or End Code
1 2 3 4 5 6 0...
Receive bytes: Specified
in the PC Setup
Only Start Code
1 2 3 4 5 6 0...
ST
Receive bytes after ST:
Specified in the PC Setup
Only End Code
1 2 3 4 5 6 0...
ED
ED
Receive bytes before
ED: 256 max.
Start and End Code
1 2 3 4 5 6 0...
ST
Receive bytes between
ST and ED: 256 max.
CR+LF End Code
1 2 3 4 5 6 0...
2
CR LF
Receive bytes before
CR+LF: 256 max.
Start and CR+LF End Code
1 2 3 4 5 6 0...
Received
CR LF
ST
Receive bytes between
ST and CR+LF: 256 max.
CPU Unit’s built-in RS-232C port
or Serial Option Board port
When receiving the most significant
bytes first is specified (0):
Bytes
Least signif-
icant bytes
Most signifi-
cant bytes
1
2
3
4
N bytes
stored in the
specified
15
8 7
0
1
3
5
2
4
6
D
D+1
D+2
Max: 256 bytes order.
5
6
When receiving the least significant
bytes first is specified (1):
Most signifi- Least signif-
cant bytes
icant bytes
15
8 7
0
1
3
5
2
4
6
D
D+1
D+2
Hint
• When RXD(235) is used to read data that was received at one of the Serial Option Board’s ports , the
port’s reception buffer is cleared after RXD(235) is executed. Consequently, RXD(235) can not be
executed repeatedly to read a block of data in parts.
Precautions
• RXD(235) can be used only for the CPU Unit’s RS-232C port or the Serial Option Board port. In addi-
tion, the port must be set to no-protocol mode.
• Execute this instruction when the reception completion flag (RS-232C incorporated in the CPU unit:
A392.06, Serial Option Board: A392.14) is 1 (ON) to receive data (from the reception buffer).
• When data is received, the data must be read by an RXD instruction or the next data cannot be
received. When the reception completion flag turns ON, read the received data with an RXD instruc-
tion before the next reception.
• Specify the size of the receive data, not including the start code and end code, in N.
• If 0 is specified for N, the Reception Completed Flag and Reception Overflow Flag (note(a)) will be
turned OFF, the Reception Counter (note(b)) will be cleared to 0, and nothing will be stored in memory.
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2 Instructions
Sample program
ꢀ Receiving data
This example shows how to receive data from the V530-R150V3 2D Code Reader as an example of
communicating with an external device.
Hardware Configuration
Sync Sensor
Monitor
F150-M05L
Power Supply
(24 VDC)
Console
F150-KP
Console Cable
RS-232C Cable
XW2Z-200T (2 m)
XW2Z-500T (5 m)
V530-R150V3
Programmable Controller
SYSMAC
CJ1G-CPUꢀꢀH
CJ1H-CPUꢀꢀH
CJ1M-CPUꢀꢀ
Camera
F150-SLC20
In this example, the external device is connected to the RS-232C port built into the CPU Unit.
First, set the reading conditions for the Code Reader.
Communications Settings
The communications settings of the Code Reader are given in the following table. These are the default
settings.
Item
Communications mode
Baud rate
Setting
No-protocol
38,400 bps
8 bits
Data bit length
Parity
None
Stop bits
1
Start code
None
End code
#000D (CR)
Set the PLC communications settings to the same values in the PLC Setup. Only the end code needs to
be set.
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2 Instructions
Programming Example
If CIO 0.02 turns ON while the RS-232C Port Send Ready Flag (A392.05) is ON, the number of bytes of
reading results specified in the RS-232C Port Reception Counter (A393) are read from the Code
Reader connected to the CPU Unit’s built-in RS-232C port and stored starting from the upper byte of
D100.
0.01
A392.05
TXD
D10
D20
&3
RS-232C Port Send
Ready Flag
0.02
A392.06
RXD
D100
D20
S
C
N
RS-232C Port Receive
Ready Flag
2
RS-232C Port
Reception Counter
A393
Upper byte
15 12 11
Lower byte
8
7
4
3
0
Received
S: D100
D101
3
2
3
3
0
F
8
1
3
3
2
3
6
0
F
1
30 36 2F 30 38 2F 31 31
=”06/08/11
D102
D103
15 12 11
8
7
4
3
0
C: D20
0
1
0
0
Byte Order
#0: Most significant bytes first
RS and ER Signal Control
#0: No RS and ER signal control
Serial Port Specifier
#1: CPU Unit’s built-in RS-232C port
Always #0.
Controlling Signals
0.00
RXD
D100
D200
&10
When CIO 0.00 turns ON, the
status of the CS signal is output
to bit 15 of D100 and the status
of the DR signal is output to bit
14 of D100.
D
C
N
15
1
14 13 12
0
0
0
D: D100
C: D200
DR signal: 0
CS signal: 1
15 12 11
0
8
7
4
3
0
1
3
0
Byte Order
#0: Most significant bytes first
CS and DR Signal Monitor
#3: CS and DR signal monitor
Serial Port Specifier
#1: CPU Unit’s built-in RS-232C port
Always #0.
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2 Instructions
Clock Instructions
CADD/CSUB
Function
code
Instruction
Mnemonic
CADD
CSUB
Variations
@CADD
Function
Adds time to the calendar data in the specified
words.
CALENDAR ADD
730
731
Subtracts time from the calendar data in the spec-
ified words.
CALENDAR SUBTRACT
@CSUB
CADD
CSUB
CSUB(731)
CADD(730)
Symbol
C
T
C: First calendar word
T: First time word
C: First calendar word
T: First time word
C
T
R
R: First result word
R
R: First result word
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Operand
Description
Data type
WORD
Size
C
T
First calendar word
First time word
First result word
3
2
3
DWORD
WORD
R
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2 Instructions
ꢀ CADD
C through C+2: Calendar Data
T and T+1: Time Data
15
8
7
0
15
15
15
8
7
0
T
C
Seconds: 00 to 59 (BCD)
Seconds: 00 to 59 (BCD)
Minutes: 00 to 59 (BCD)
Minutes: 00 to 59 (BCD)
15
0
8
7
0
T+1
C+1
2
Hours: 0000 to 9999 (BCD)
Hour: 00 to 23 (BCD)
Day: 01 to 31 (BCD)
8
7
0
C+2
Month: 01 to 12 (BCD)
Year: 00 to 99 (BCD)
R through R+2: Result Data
15
15
15
8
7
0
R
R+1
R+2
Seconds: 00 to 59 (BCD)
Minutes: 00 to 59 (BCD)
8
7
0
Hour: 00 to 23 (BCD)
Day: 01 to 31 (BCD)
8
7
0
Month: 01 to 12 (BCD)
Year: 00 to 99 (BCD)
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2 Instructions
ꢀ CSUB
C through C+2: Calendar Data
T and T+1: Time Data
15
8
7
0
15
8
7
0
T
C
Seconds: 00 to 59 (BCD)
Minutes: 00 to 59 (BCD)
Seconds: 00 to 59 (BCD)
Minutes: 00 to 59 (BCD)
15
0
15
8
7
0
T+1
C+1
Hour: 00 to 23 (BCD)
Hours: 0000 to 9999 (BCD)
Day: 01 to 31 (BCD)
15
8
7
0
C+2
Month: 01 to 12 (BCD)
Year: 00 to 99 (BCD)
R through R+2: Result Data
15
8
7
0
R
Seconds: 00 to 59 (BCD)
Minutes: 00 to 59 (BCD)
15
8
7
0
R+1
Hour: 00 to 23 (BCD)
Day: 01 to 31 (BCD)
15
8
7
0
R+2
Month: 01 to 12 (BCD)
Year: 00 to 99 (BCD)
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2 Instructions
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
C
T
---
OK
---
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
R
Flags
Name
Label
Operation
Error Flag
P_ER
• ON if the calendar data in C through C+2 is not within the specified ranges.
• ON if the time data in T and T+1 is not within the specified ranges.
• OFF in all other cases.
2
Equal Flag
P_EQ
• ON when the result of a CSUB instruction is 0.
• OFF in all other cases.
Function
ꢀ CADD
15
8 7
0
C
Minutes
Seconds
CADD(730) adds the calendar data (words C through C+2) to the
time data (words T and T+1) and outputs the resulting calendar data
to R through R+2.
Day
Hour
C+1
C+2
Year
Month
+
15
15
8 7
0
0
T
Minutes
Seconds
Hours
T+1
8 7
Minutes
Day
Seconds
R
R+1
R+2
Hour
Year
Month
ꢀ CSUB
15
8 7
0
C
Minutes
Day
Seconds
Hour
CSUB(731) subtracts the time data (words T and T+1) from the cal-
endar data (words C through C+2) to and outputs the resulting calen-
dar data to R through R+2.
C+1
C+2
Year
Month
15
15
8 7
0
0
T
Minutes
Seconds
Hours
T+1
8 7
R
Minutes
Day
Seconds
R+1
R+2
Hour
Year
Month
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2 Instructions
Sample program
ꢀ CADD
When CIO 0.00 turns ON in the following example, the calendar data in D100 through D102 (year,
month, day, hour, minutes, seconds) is added to the time data in D200 and D201 (hours, minutes, sec-
onds) and the result is output to D300 through D302.
0.00
15
8 7
0
CADD
D100
D200
D300
C:D100
D101
30
10
99
20
18
12
18:30:20
10 December, 1999
C
T
D102
+
R
15
15
8 7
0
0
T:D200
D201
10
06
15
00
10 minutes, 15 seconds
600 hours
8 7
R:D300
D301
D302
40
04
00
35
18
01
18:40:35
4 January, 2000
ꢀ CSUB
When CIO 0.00 turns ON in the following example, the time data in D200 and D201 (hours, minutes,
seconds) is subtracted from the calendar data in D100 through D102 (year, month, day, hour, minutes,
seconds) and the result is output to D300 through D302.
0.00
15
8 7
0
CSUB
D100
D200
D300
C:D100
D101
30
10
98
20
18
07
18:30:20
10 July, 1998
C
T
D102
R
15
15
8 7
8 7
0
0
T:D200
D201
10
00
15
50
50 hours, 10 minutes, 15 seconds
R:D300
D301
D302
20
08
98
05
16
07
16:20:05
8 July, 1998
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2 Instructions
DATE
Function
code
Instruction
Mnemonic
DATE
Variations
@DATE
Function
Changes the internal clock setting to the setting in
the specified source words.
CLOCK ADJUSTMENT
735
DATE
DATE(735)
Symbol
S: First source word
S
2
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Operand
Description
Data type
Size
S
First source word
LWORD
4
S through S+3: New Clock Setting
15
8
7
0
15
8
7
0
S
S+2
Seconds:
00 to 59 (BCD)
Month:
01 to 12 (BCD)
Minutes: 00 to 59 (BCD)
Year: 00 to 99 (BCD)
15
8
7
0
15
8
7
0
S+3
S+1
Day of
Hour:
00 to 23 (BCD)
the week: 00 = Sunday
01 = Monday
Always set to 00.
Day: 01 to 31 (BCD)
02 = Tuesday
03 = Wednesday
04 = Thursday
05 = Friday
06 = Saturday
Note S through S+3 must be in the same data area.
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
S
OK
OK
OK
OK
OK
OK
OK
OK
OK
---
---
---
---
Flags
Name
Label
Operation
Error Flag
P_ER
• ON if the new clock setting in S through S+3 is not within the specified range.
• OFF in all other cases.
• ON when DATE instruction is executed for CP1E-Eꢀꢀꢀꢀ-ꢀ.
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2 Instructions
Related Auxiliary Area Words and Bits
Name
Address
Operation
Clock data
A351 to A354
A351.00 to A351.07: Seconds (00 to 59) (BCD)
A351.08 to A351.15: Minutes (00 to 59) (BCD)
A352.00 to A352.07: Hours (00 to 23) (BCD)
A352.08 to A352.15: Day of the month (01 to 31) (BCD)
A353.00 to A353.07: Month (01 to 12) (BCD)
A353.08 to A353.15: Year (00 to 99) (BCD)
A354.00 to A354.07: Day of the week (00 to 06) (BCD)
00: Sunday, 01: Monday, 02: Tuesday, 03: Wednesday, 04: Thursday,
05: Friday, 06: Saturday
Function
DATE(735) changes the internal clock
setting according to the clock data in
the four source words. The new inter-
nal clock setting is immediately
reflected in the Calendar/Clock Area
(A351 to A354).
CPU Unit
Internal clock
Minutes
Day
Seconds
Hour
S1
S+1
S+2
S+3
New setting
Year
00
Month
Day of week
Hint
The internal clock setting can also be changed from a Peripheral Device or the CLOCK WRITE FINS
command (0702).
Precaution
• An error will not be generated even if the internal clock is set to a non-existent date (such as Novem-
ber 31).
• In case this instruction is executed for E-type CPU Unit (CP1E-Eꢀꢀꢀꢀ-ꢀ), the error flag will turn
ON and the instruction cannot be executed. For E-type CPU Unit, A351 to A354 is always 01-01-01
01:01:01 Sunday.
Sample program
When CIO 0.00 turns ON in the following example, the internal clock is set to 20:15:30 on Thursday,
October 9, 1998.
0.00
DATE
S
D100
15
15
8 7
0
S:D100
D101
15
09
30
Minute Second
8 7
0
20
Day of
the month
8 7
10
Hour
0
15
15
D102
D103
98
Year
Month
0
8 7
04
00
Always Day of the week
set to
00.
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2 Instructions
Failure Diagnosis Instructions
FAL
Function
code
Instruction
Mnemonic
FAL
Variations
@FAL
Function
Generates or clears user-defined non-fatal errors.
Non-fatal errors do not stop PLC operation.
FAILURE ALARM
006
2
FAL
Generating or Clearing User-defined Non-fatal Errors
FAL(006)
Generating Non-fatal System Errors
FAL(006)
Symbol
N: FAL number (value in A529)
N
S
N: FAL number
N
S
S: First word containing the
error code and error details
S: First message word or
constant (0000 to FFFF)
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Operand
Description
Data type
Size
N
S
FAL number
Constants only
1
First message word or constant / First word containing the error
code and error details
WORD
Variable
ꢀ Generating or Clearing User-defined Non-fatal Errors
Note The value of operand N must be different from the content of A529 (the system-generated FAL/FALS number).
Generates a non-fatal error
Clears all non-fatal errors
N
S
1 to 511 (These FAL numbers are shared with FALS numbers.)
0
Word address:
#FFFF:
Clears all non-fatal errors.
Generates a non-fatal error with the corresponding FAL number.
The 16-character ASCII message contained in S through S+7 will
be displayed on the Programming Device.
#0000 to #FFFF:
#0001 to #01FF: Clears the non-fatal error with the corresponding
FAL number.
Other:
Clears the most serious non-fatal error.
Generates a non-fatal error with the corresponding FAL number (no
message).
ꢀ Generating Non-fatal System Errors
Note The value of operand N must be the same as the content of A529 (the system-generated FAL/FALS number).
Generates a non-fatal error
N
S
1 to 511 (These FAL numbers are shared with FALS numbers.)
Error code that will be generated. (See Function below.)
Error details code that will be generated. (See Function below.)
S+1
ꢀ Operand Specifications
Word addresses
Area
Indirect DM addresses
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
---
DM
---
@DM
---
*DM
---
N
S
---
---
---
---
---
OK
---
---
---
OK
OK
OK
OK
OK
OK
OK
OK
OK
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2 Instructions
Flags
Name
Label
Operation
Error Flag
ER
• ON if N is not within the specified range of 0 to 511 decimal.
• ON if a non-fatal system error is being generated, but the specified error code or error details code is
incorrect.
• OFF in all other cases.
Related Auxiliary Area Words and Bits
ꢀ Auxiliary Area Words/Flags for User-defined Errors Only
Name
FAL Error Flag
Executed FAL Number Flags
Address
Operation
A402.15
ON when an error is generated with FAL(006).
A360.01 to
A391.15
When an error is generated with FAL(006), the corresponding flag will be turned ON. Flags A360.01 to
A391.15 correspond to FAL numbers1 to 511 decimal.
ꢀ Auxiliary Area Words/Flags for System Errors Only
Name
Address
Operation
System-generated FAL/FALS
number
A529
A dummy FAL/FALS number is used when a system error is generated with FAL(006). Set the same
dummy FAL/FALS number in this word (0001 to 01FF hex, 1 to 511 decimal).
ꢀ Auxiliary Area Words/Flags for both User-defined and System Errors
Name
Address
Operation
Error Log Area
A100 to A199
The Error Log Area contains the error codes and time/date of occurrence for the most recent 20 errors,
including errors generated by FAL(006).
Error code
A400
When an error occurs its error code is stored in A400. The error codes for FAL numbers 0001 to 01FF
are 4101 to 42FF, respectively.
If two or more errors occur simultaneously, the error code of the most serious error will be stored in
A400.
Clearing Non-fatal Errors without a Programming Device
ꢀ Clearing User-defined Non-fatal Errors
When FAL(006) is executed with N set to 0, non-fatal errors can be cleared. The value of S will deter-
mine the processing, as shown in the following table.
S
&1 to &511 (0001 to 01FF hex)
FFFF hex
Process
The FAL error of the specified number will be cleared.
All non-fatal errors (including system errors) will be cleared.
0200 to FFFE hex or word specification
The most serious non-fatal error (even if it is a non-fatal system error) that has occurred. When more
than one FAL error has occurred, the FAL error with the smallest FAL number will be cleared.
ꢀ Clearing Non-fatal System Errors
There are two ways to clear non-fatal system errors generated with FAL(006).
• Turn the PLC OFF and then ON again.
• When keeping the PLC ON, the system error must be cleared as if the specified error had actually
occurred.
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2 Instructions
Function
ꢀ Generating Non-fatal User-defined Errors
The following table shows the error codes and FAL Error Flags for FAL(006).
FAL number
1 to 511 decimal
4101 to 42FF
FAL error codes
Executed FAL Number Flags
A360.01 to A391.15
When FAL(006) is executed with N set to an FAL number (&1 to &511) that is not equal to the content of
A529 (the system-generated FAL/FALS number), a non-fatal error will be generated with that FAL num-
ber and the following processing will be performed:
FAL Error Flag ON
2
Corresponding Executed FAL Number Flag ON
FAL
N
Execution of
FAL(006)
generates a
non-fatal er-
ror with FAL
number N.
Error code written to A400
Error code and time written to Error Log Area
0000
ERR Indicator flashes
1. The FAL Error Flag (A402.15) will be turned ON. (PLC operation will continue.)
2. The Executed FAL Number Flag will be turned ON for the corresponding FAL number. Flags A360.01
to A391.15 correspond to FAL numbers 0001 to 01FF (1 to 511).
3. The error code will be written to A400. Error codes 4101 to 42FF correspond to FAL numbers 0001 to
01FF (1 to 511).
4. The error code and the time that the error occurred will be written to the Error Log Area (A100
through A199).
Note The error record will not be written to the Error Log Area if the Don’t register FAL to error log Option in the
PLC Setup is selected.
5. The ERR Indicator on the CPU Unit will flash.
6. If a word address has been specified in S, the message beginning at S will be registered (displayed
on the Programming Device).
Note If a fatal error or a more serious non-fatal error occurs at the same time as the FAL(006) instruction, the more
serious error’s error code will be written to A400.
ꢀ Generating Non-fatal System Errors
When FAL(006) is executed with N set to an FAL number (&1 to &511) that is equal to the content of
A529 (the system-generated FAL/FALS number), a non-fatal error will be generated with the error code
and error details code specified in S and S+1. The following processing will be performed at the same
time:
Error code written to A400
Error code and time written to Error Log Area
FAL
N
Execution of FAL(006)
generates a non-fatal
system error with the
error code/details
The corresponding Auxiliary Area Flags are set
based on the error code and error details.
S
specified in S and S+1.
ERR Indicator flashes.
Matching
values
A529CH
N
Error code
S
Error details
S+1
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2 Instructions
1. The specified error code will be written to A400.
2. The error code and the time that the error occurred will be written to the Error Log Area (A100
through A199).
3. The appropriate Auxiliary Area Flags are set based on the error code and error details.
4. The ERR Indicator on the CPU Unit will flash and PLC operation will continue.
Note 1 FAL(006) can be used to generate non-fatal errors from the system when debugging the program. For
example, a system error can be generated intentionally to check whether or not error messages are being
displayed properly at an interface such as a Programmable Terminal (PT).
2 The value of A529 (the system-generated FAL/FALS number) is a dummy FAL number (FAL and FALS
numbers are shared.) used when a non-fatal error is generated intentionally by the system. This number is
a dummy FAL number, so it does not change the status of the Executed FAL Number Flags (A360.01 to
A391.15) or the error code.
When it is necessary to generate two or more system errors (fatal and/or non-fatal errors), different errors
can be generated by executing the FAL/FALS instructions more than once with the same values in A529
and N, but different values in S and S+1.
3 If a more serious error (including a system-generated fatal error or FALS(007) error) occurs at the same
time as the FAL(006) instruction, the more serious error’s error code will be written to A400.
4 To clear a system error generated by FAL(006), turn the PLC OFF and then ON again. The PLC can be
kept ON, but the same processing will be required to clear the error as if the specified error had actually
occurred.
Refer to CP1E CPU Unit Hardware Operation Manual or CP1E CPU Unit Software Operation Manual.
The following table shows how to specify error codes and error details in S and S+1.
Error name
PLC Setup Error
S
S+1
009B hex
PLC Setup Error Location
0000 to FFFF hex
Built-in Analog Error
Option Board Error
008A hex
00D1 hex
--- (not fixed)
Option Board Slot No.
0001 hex
Battery Error
00F7 hex
--- (not fixed)
ꢀ Disabling Error Log Entries of User-defined Errors
Normally when FAL(006) generates a user-defined error, the error code and the time that the error
occurred are written to the Error Log Area (A100 through A199). It is possible to set the PLC Setup so
that user-defined errors generated by FAL(006) are not recorded in the Error Log.
Note Even though the error will not be recorded in the Error Log, the FAL Error Flag (402.15) will be turned ON,
the corresponding flag in the Executed FAL Number Flags (A360.01 to A391.15) will be turned ON, and the
error code will be written to A400.
Disable Error Log entries for user-defined FAL(006) errors when you want to record only the system-
generated errors. For example, this function is useful during debugging if the FAL(006) instructions are
used in several applications and the Error Log is becoming full of user-defined FAL(006) errors.
• The following screen capture shows the PLC Setup setting from the CX-Programmer.
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Note Even if PLC Setup word 129 bit 15 is set to 1 (Do not record FAL Errors in Error Log.), the following errors will
be recorded:
• Fatal errors generated by FALS(007)
• Non-fatal errors from the system
• Fatal errors from the system
• Non-fatal errors from the system generated intentionally with FAL(006)
• Fatal errors from the system generated intentionally with FALS(007)
ꢀ Displaying Messages with Non-fatal User-defined Errors
• If S is a word address and an ASCII message has been stored at S, that message will be displayed at
the Peripheral Device when FAL(006) is executed. (If a message is not required, set S to a constant.)
• The message beginning at S will be registered when FAL(006) is executed. Once the message is reg-
istered, it will be displayed.
2
• An ASCII message up to 16 characters long can be stored in S through S+7. The leftmost (most sig-
nificant) byte in each word is displayed first.
• The end code for the message is the null character (00 hexadecimal).
• All 16 characters in words S to S+7 will be displayed if the null character is omitted.
• If the contents of the words containing the message are changed after FAL(006) is executed, the
message will change accordingly.
Sample program
ꢀ Generating a Non-fatal Error
When CIO 0.00 is ON in the following example, FAL(006) will generate a non-fatal error with FAL num-
ber 31 and execute the following processes.
1. The FAL Error Flag (A402.15) will be turned ON.
2. The corresponding Executed FAL Number Flag (A361.15) will be turned ON.
3. The corresponding error code (411F) will be written to A400.
4. The error code and the time/date that the error occurred will be written to the Error Log Area (A100
through A199).
5. The ERR Indicator on the CPU Unit will flash.
6. The ASCII message in D100 to D107 will be displayed at the Peripheral Device.
Note If a message is not required, specify a constant for S.
0.00
FAL
15
4C
0
31
N
4F
20
4F
54
47
00
M: D100
D100
M
57
56
4C
41
45
D101
D102
D103
D104
D105
D106
D107
MESSAGE
LOW VOLTAGE
Disregarded
Note If two or more errors occur at the same time, the error code of the most serious error (with the highest error
code) will be stored in A400.
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ꢀ Clearing a Particular Non-fatal Error
When CIO 0.01 is ON in the following example, FAL(006) will clear the non-fatal error with FAL number
31, turn OFF the corresponding Executed FAL Number Flag (A361.15), and turn OFF the FAL Error
Flag (A402.15).
0.01
FAL
Set N to 0 to clear errors.
N
0
M
#001F
Set M to the desired FAL
number (031(001F)).
ꢀ Clearing All Non-fatal Errors
When CIO 0.02 is ON in the following example, FAL(006) will clear all of the non-fatal errors, turn OFF
the Executed FAL Number Flags (A360.01 to A391.15), and turn OFF the FAL Error Flag (A402.15).
0.02
FAL
N
0
Set N to 0 to clear errors.
M
#FFFF
Set M to FFFF to clear all non-fatal errors (both
FAL(006) and system errors).
ꢀ Clearing the Most Serious Non-fatal Error
When CIO 0.03 is ON in the following example, FAL(006) will clear the most serious non-fatal error that
has occurred and reset the error code in A400. If the cleared error was originally generated by
FAL(006), the corresponding Executed FAL Number Flag and the FAL Error Flag (A402.15) will be
turned OFF.
0.03
FAL
Set N to 0 to clear errors.
N
0
Set M to 0000, another constant between
0200 and FFFE, or a word address to
clear the most serious non-fatal error.
(In this case, M is set to 0000.)
M
#0000
ꢀ Generating a Non-fatal System Error
When CIO 0.00 is ON in the following example, FAL(006) will generate Option Board Error. In this case,
dummy FAL number 10 is used and the corresponding value (000A hex) is stored in A529.
1. The specified error code (00D1) will be written to A400 if it is the most serious error.
2. The error code and the time/date that the error occurred will be written to the Error Log Area (A100
through A199).
3. Option Board Error Flag(A315.13) will be turned ON.
4. The CPU Unit’s ERR Indicator will flash.
5. Option Board Error will occur.
0.00
MOV
#000A
A529
FAL
10
N
S
D200
Matching
values
A529CH
000A
S: D200
D201
#00D1
#0001
Error code: #00D1(Option Board Error)
Error Slot number: 1(#0001)
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2 Instructions
FALS
Function
code
Instruction
Mnemonic
FALS
Variations
Function
Generates user-defined fatal errors. Fatal errors
stop PLC operation.
SEVERE FAILURE ALARM
---
007
FALS
Generating User-defined Fatal Errors
Generating Fatal System Errors
FALS(007)
FALS(007)
Symbol
N: FAL number
N: FAL number (value in A529)
N
S
N
S
2
S: First message word or
S: First word containing the
error code and error details
constant (0000 to FFFF)
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Operand
Description
Data type
Size
N
S
FAL number
Constants only
1
First message word or constant / First word containing the error
code and error details
WORD
Variable
ꢀ Generating User-defined Fatal Errors
Note The value of operand N must be different from the content of A529 (the system-generated FAL/FALS number).
Generates a non-fatal error
N
S
1 to 511 (These FALS numbers are shared with FALS numbers.)
Specifies the first of eight words containing an ASCII message to be displayed on the Programming Device.
Specify a constant (0000 to FFFF) if a message is not required.
ꢀ Generating Fatal Errors from the System
The following table shows the function of the operands.
Note The value of operand N must be the same as the content of A529 (the system-generated FAL/FALS number).
Generates a non-fatal error
N
S
1 to 511 (These FALS numbers are shared with FAL numbers.)
Error code that will be generated. (See Description below.)
Error details code that will be generated. (See Description below.)
S+1
ꢀ Operand Specifications
Word addresses
Indirect DM addresses
Area
Constants
CF
Pulse bits
TR bits
CIO
---
WR
---
HR
---
AR
---
T
C
---
DM
---
@DM
---
*DM
---
N
S
---
OK
---
---
---
OK
OK
OK
OK
OK
OK
OK
OK
OK
Flags
Name
Label
P_ER
Operation
• ON if N is not within the specified range of 0001 to 01FF (1 to 511 decimal).
Error Flag
• ON if a fatal system error is being generated, but the specified error code or error details code is
incorrect.
• OFF in all other cases.
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Related Auxiliary Area Words and Bits
ꢀ Auxiliary Area Words/Flags for User-defined Errors Only
Name
Address
Operation
FALS Error Flag
A401.06
ON when an error is generated with FALS(007).
ꢀ Auxiliary Area Words/Flags for System Errors Only
Name
Address
Operation
System-generated FAL/FALS
number
A529
A dummy FAL/FALS number is used when a system error is generated with FALS(007). Set the same
dummy FAL/FALS number in this word (0001 to 01FF hex, 1 to 511 decimal).
ꢀ Auxiliary Area Words/Flags for both User-defined and System Errors
Name
Address
Operation
Error Log Area
A100 to A199
The Error Log Area contains the error codes and time/date of occurrence for the most recent 20 errors,
including errors generated by FALS(007).
Error code
A400
When an error occurs its error code is stored in A400. The error codes for FALS numbers 0001 to 01FF
(1 to 511 decimal) are C101 to C2FF, respectively.
Note If two or more errors occur simultaneously, the error code of the most serious error will be stored
in A400.
Function
ꢀ Generating Fatal User-defined Errors
FALS number
1 to 511
FALS error codes
C101 TO C2FF
When FALS(007) is executed with N set to an FALS number (1 to 511) that is not equal to the content of
A529 (the system-generated FAL/FALS number), a fatal error will be generated with that FALS number
and the following processing will be performed:
FALS Error Flag ON
Error code written to A400
Execution of
FALS(007)
generates a
fatal error
with FALS
number N.
FALS
N
Error code and time/date written to Error Log Area
0000
ERR Indicator lit
1. The FALS Error Flag (A401.06) will be turned ON. (PLC operation will stop.)
2. The error code will be written to A400. Error codes C101 to C2FF correspond to FALS numbers 0001
to 01FF (1 to 511).
Note If an error more serious than the FALS(007) instruction (one with a higher error code) has occurred, A400
will contain the more serious error’s error code.
3. The error code and the time/date that the error occurred will be written to the Error Log Area (A100
through A199).
4. The ERR Indicator on the CPU Unit will be lit.
5. If a word address has been specified in S, the ASCII message beginning at S will be registered (dis-
played on the Peripheral Device).
Note 1 If an error that is more serious (including fatal system errors) than an error registered with this instruction
occurs simultaneously, the error code of that error will be set in error code A400.
2 The end code for the message is the null character (00 hexadecimal). All 16 characters in words S to S+7
will be displayed if the null character is omitted.
3 N must between 0001 and 01FF. An error will occur and the Error Flag will be turned ON if N is outside of
the specified range.
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4 When a user-defined fatal error is registered, the I/O memory and output status from output units will be as
indicated below.
I/O memory
Output status from output units
OFF
OFF
ON
Hold
Hold
IOM Hold Bit (A500.12).
OFF
ꢀ Generating Non-fatal System Errors
Error code written to A400
Execution of FALS(007)
Error code and time written to Error Log Area
FALS
N
generates a fatal system
error with the error
code/details specified in
S and S+1.
The corresponding Auxiliary Area Flags are set
based on the error code and error details.
S
ERR Indicator flashes.
2
Matching
values
A529CH
N
Error code
S
S+1 Error details
When FALS(007) is executed with N set to an FAL number (1 to 511) that is equal to the content of
A529 (the system-generated FAL/FALS number), a fatal error will be generated with the error code and
error details code specified in S and S+1. The following processing will be performed at the same time:
1. The specified error code will be written to A400.
2. The error code and the time that the error occurred will be written to the Error Log Area (A100
through A199).
3. The appropriate Auxiliary Area Flags are set based on the error code and error details.
4. The ERR Indicator on the CPU Unit will light and PLC operation will be stopped.
Note 1 The value of A529 (the system-generated FAL/FALS number) is a dummy FAL number (FAL and FALS
numbers are shared.) used when a non-fatal error is generated intentionally by the system. This number is
a dummy FAL number, so it is not reflected in the error code.
When it is necessary to generate two or more system errors, different errors can be generated by execut-
ing the FAL/FALS instructions more than once with the same values in A529 and N, but different values in
S and S+1.
2 If a more serious error (including a system-generated fatal error or another FALS(007) error) occurs at the
same time as the FALS(007) instruction, the more serious error’s error code will be written to A400.
3 To clear a system error generated by FALS(007), turn the PLC OFF and then ON again. The PLC can be
kept ON, but the same processing will be required to clear the error as if the specified error had actually
occurred. Refer to CP1E CPU Unit Hardware Operation Manual or CP1E CPU Unit Software Operation
Manual for details.
4 The following table shows how the IOM Hold Bit affects the status of I/O memory and the status of outputs
on Output Units after a fatal system error has been generated with FALS(007).
Status of I/O memory
Retained
Status of outputs on Output Units
ON
OFF
OFF
IOM Hold Bit (A500.12)
OFF
Cleared
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The following table shows how to specify error codes and error details in S and S+1.
S
S+1
Error name
Error code
80F1 hex
Error details
Memory Error
Bits 00 to 09: Memory Error Location
Bit 00: User program
Bit 01: I/O memory
Bit 04: PLC Setup
Bits 2, 3, 5 to 15: Invalid
I/O Bus Error
80CA hex
80E1 hex
CP1W Expansion I/O Unit, Expansion Unit
#0A0A hex
Too Many I/O Points Error
Bits 13 to 15: Error Cause
Bits 00 to 12: Details
• The channel number of CP1W Expansion I/O Unit is too many.
Bits 13 to 15: 001
Bits 00 to 12: All zeroes
Program Error
80F0 hex
Bits 08 to 15: Error Cause
Bit 15: UM overflow error
Bit 14: Illegal instruction error
Bit 13: Differentiation overflow error
Bit 12: Task error
Bit 11: No END error
Bit 10: Illegal access error
Bit 09: Indirect DM BCD error
Bit 08: Instruction error
Bits 00 to 07: Invalid
Cycle Time Overrun Error
809F hex
#0000 hex
ꢀ Displaying Messages with Fatal User-defined Errors
• If S is a word address, the ASCII message beginning at S will be displayed at the Programming
Device when FALS(007) is executed. (If a message is not required, set S to a constant.)
• The message beginning at S will be registered when FALS(007) is executed. Once the message is
registered, it will be displayed.
• An ASCII message up to 16 characters long can be stored in S through S+7. The leftmost (most sig-
nificant) byte in each word is displayed first.
• The end code for the message is the null character (00 hexadecimal).
• All 16 characters in words S to S+7 will be displayed if the null character is omitted.
• If the contents of the words containing the message are changed after FALS(007) is executed, the
message will change accordingly.
ꢀ Clearing FALS(007) Fatal System Errors
There are two ways to clear fatal system errors generated with FALS(007).
1. Turn the PLC OFF and then ON again.
2. When keeping the PLC ON, the system error must be cleared as if the specified error had actually
occurred.
ꢀ Clearing FALS(007) User-defined Fatal Errors
To clear errors generated by FALS(007), first eliminate the cause of the error and then either clear the
error from a Programming Device or turn the PLC OFF and then ON again.
Precaution
When a fatal system error is registered, if the IOM Hold Bit is OFF, I/O memory will be cleared.
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Sample program
ꢀ Generating a User-defined Error
When CIO 0.00 is ON in the following example, FALS(007) will generate a fatal error with FAL number
31 and execute the following processes.
1. The FALS Error Flag (A401.06) will be turned ON.
2. The corresponding error code (C11F) will be written to A400.
3. The error code and the time/date that the error occurred will be written to the Error Log Area (A100
through A199).
4. The ERR Indicator on the CPU Unit will be lit.
5. The ASCII message in D100 to D107 will be displayed at the Peripheral Device.
Note If a message is not required, specify a constant for S.
2
0.00
FALS
31
N
D100
M
15
4C
0
4F
20
4F
54
47
00
M: D100
D101
D102
D103
D104
D105
D106
D107
57
56
4C
41
45
MESSAGE
LOW VOLTAGE
Disregarded
Note A400 will contain the error code of the most serious of all of the errors that have occurred, including non-fatal
and fatal system errors, as well as errors generated by FAL(006) and FAL(007).
ꢀ Generating a Non-fatal System Error
When CIO 0.00 is ON in the following example, FALS(007) will generate Memory Error (User programe
Error). In this case, dummy FAL number 10 is used and the corresponding value (80F1 hex) is stored in
A529.
1. The specified error code (80F1) will be written to A400 if it is the most serious error.
2. The error code and the time/date that the error occurred will be written to the Error Log Area (A100
through A199).
3. The Memory Error Flag (A401.15) will be turned ON.
4. The CPU Unit’s ERR Indicator will light and PLC operation will stop.
5. Memory Error has occured.
0.00
MOV
#000A
A529
FALS
10
N
S
D200
Matching
values
A529CH
000A
......
......
S: D200
D201
#80F1
#0001
Error code: #80F1 (Memory Error Flag)
Memory Error generating Area: #0001(User Memory)
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2 Instructions
Other Instructions
STC/CLC
Function
code
Instruction
Mnemonic
Variations
Function
Sets the Carry Flag (CY).
SET CARRY
STC
CLC
@STC
@CLC
040
041
CLEAR CARRY
Turns OFF the Carry Flag (CY).
STC
CLC
Symbol
STC(040)
CLC(041)
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Flags
Data type
Operand
Description
STC
CLC
Carry Flag
P_CY
ON
OFF
Function
ꢀ STC
When the execution condition is ON, STC(040) turns ON the Carry Flag (CY). Although STC(040) turns
the Carry Flag ON, the flag will be turned ON/OFF by the execution of subsequent instructions which
affect the Carry Flag.
ROL(027) and ROR(028) make use of the Carry Flag in their rotation shift operations.
ꢀ CLC
When the execution condition is ON, CLC(040) turns OFF the Carry Flag (CY). Although CLC(040)
turns the Carry Flag OFF, the flag will be turned ON/OFF by the execution of subsequent instructions
which affect the Carry Flag.
+C(402), +CL(403), +BC(406), +BCL(407), -C(412), -CL(413), -BC(416), and -BCL(417) make use of
the Carry Flag in their addition operations. Use CLC(041) just before any of these instructions to pre-
vent any influence from other preceding instructions.
ROL(027) and ROR(028) make use of the Carry Flag in their rotation shift operations.
Hint
The +(400), +L(401), +B(404), +BL(405), -(410), -L(411), -B(414), and -BL(415) instructions do no
include the Carry Flag in their addition and subtraction operations. In general, use these instructions
when performing addition or subtraction.
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2 Instructions
WDT
Function
code
Instruction
Mnemonic
Variations
Function
Extends the maximum cycle time, but only for the cycle
in which the instruction is executed. WDT(094) can be
used to prevent errors for long cycle times when a
longer cycle time is temporarily required for special
processing.
EXTEND MAXIMUM
CYCLE TIME
WDT
@WDT
094
WDT
2
Symbol
WDT(094)
T
T: Timer setting
Applicable Program Areas
Area
Step program areas
Subroutines
OK
Interrupt tasks
OK
Usage
OK
Operands
Operand
Description
Timer setting
Data type
Size
T
Constants only
1
T: Timer setting
Specifies the watchdog timer setting between 0000 and 0064 hexadecimal or between &0000 and
&0100 decimal.
ꢀ Operand Specifications
Word addresses
Indirect DM addresses
Area
Constants
CF
Pulse bits
TR bits
CIO
WR
HR
AR
T
C
DM
@DM
*DM
T
---
---
---
---
---
---
---
---
---
OK
---
---
---
Flags
Operand
Description
Data type
Error Flag
P_ER
• ON if the watchdog timer setting exceeds 1 second.
• OFF in all other cases.
Related PLC Setup Settings
ꢀ CX-Programmer settings
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2 Instructions
ꢀ PLC Setup settings
Name
Function
Settings
0: Default setting (1,000 ms)
Watch cycle time
A Cycle Time Too Long error (fatal error) will be registered if the cycle
time exceeds the maximum setting.
1: User time setting
Sets the maximum cycle time.
0001 to 0FA0
(This setting is valid only when the first setting has been set to 1.)
(10 to 1,000 ms, 10-ms units)
Note • The default value for the maximum cycle time is 1,000 ms, although it can be set anywhere from 10 to 1,000 ms in
10-ms units.
• WDT(094) can be used more than once in a cycle. When WDT(094) is executed more than once the cycle time
extensions are added together, although the total must not exceed 1,000 ms. If WDT(094) cannot be executed
again if the cycle has already been extended to 1,000 ms.
Related Auxiliary Area Words and Bits
Name
Address
Operation
Cycle Time Too Long Flag
A401.08
ON when the present cycle time exceeds the maximum cycle time (watch cycle time) set in
the PLC Setup. This is a fatal error which causes program execution to stop.
Maximum Cycle Time
Present Cycle Time
A262 and A263
A264 and A265
These words contain the maximum cycle time in 32-bit binary. This value is updated every
cycle.
These words contain the present cycle time in 32-bit binary. This value is updated every
cycle.
Function
WDT(094) extends the maximum cycle time for the cycle in which this instruction is executed. The
watchdog timer setting in the PLC Setup is extended by an interval of T × 10 ms (0 to 1,000 ms).
When it is likely that the cycle time will increase due to a temporary increase in processing data, this
instruction can be used to prevent a cycle time error.
Sample program
0.00
0.01
0.02
WDT
&30
1
2
3
WDT
&500
WDT
&10
Operation of WDT(094)
In this example, the watchdog timer setting is set to 500ms.
• When CIO 0.00 turns ON, the first WDT(094) instruction extends the cycle time by 300 ms (30 × 10 ms).
Thus, the total cycle time is 800 ms at this point.
• When CIO 0.01 turns ON, the second WDT(094) instruction attempts to extend the cycle time by
another 500 ms. Since the total cycle time (1,300 ms) exceeds the upper limit of 1,000 ms, the extra
300 ms is ignored. As a result, the second WDT(094) instruction actually extends the total cycle time
by 200 ms.
• When CIO 0.02 turns ON, the third WDT(094) instruction attempts to extend the cycle time by
another 10 ms. Since the total cycle time has already reached the upper limit of 1,000 ms, the third
WDT(094) instruction is not executed.
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Instruction Execution Times and
Number of Steps
3
This section provides the execution times for all instructions used with a CP1E CPU
Unit.
3-1 CP1E CPU Unit Instruction Execution Times and Number of Steps . . . . . 3-2
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3 Instruction Execution Times and Number of Steps
3-1 CP1E CPU Unit Instruction Execution
Times and Number of Steps
The following table lists the execution times for all instructions that are supported by the CPU Units.
The total execution time of instructions within one whole user program is the process time for program
execution when calculating the cycle time (See note.).
Note User programs are allocated tasks that can be executed within cyclic tasks and interrupt tasks
that satisfy interrupt conditions.
Execution times for most instructions differ depending on the CPU Unit used and the conditions when
the instruction is executed.
The execution time can also vary when the execution condition is OFF.
The following table also lists the length of each instruction in the Length (steps) column. The number of
steps required in the user program area for each instructions depends on the instruction and the oper-
ands used with it.
The number of steps in a program is not the same as the number of instructions.
↓
Note 1 Most instructions are supported in differentiated form (indicated with , ↓, @, and %).
Specifying differentiation will increase the execution times by the following amounts.
(unit:s)
CP1E CPU Unit
Symbol
CPUꢀꢀ
↓
or ↓
+4.0
+2.5
@ or %
2 Use the following time as a guideline when instructions are not executed.
CP1E CPU Unit
CPUꢀꢀ
1.4
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3-2
3 Instruction Execution Times and Number of Steps
Sequence Input Instructions
FUN
No.
Length
(steps)
ON execution
time (µs)
Instruction
Mnemonic
LD
Conditions
LOAD
---
---
1
2
1
2
1
2
1
2
1
2
1
2
1
1
1
3
4
1.19
10.26
1.19
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
!LD
LOAD NOT
AND
LD NOT
!LD NOT
AND
---
---
10.26
1.19
---
!AND
---
10.26
1.19
AND NOT
OR
AND NOT
!AND NOT
OR
---
---
10.26
1.29
---
!OR
---
10.36
1.29
3
OR NOT
OR NOT
!OR NOT
AND LD
OR LD
NOT
---
---
10.36
0.60
AND LOAD
OR LOAD
NOT
---
---
0.60
520
521
522
0.80
CONDITION ON
CONDITION OFF
UP
4.92
DOWN
5.69
Sequence Output Instructions
FUN
No.
Length
(steps)
ON execution
time (µs)
Instruction
Mnemonic
OUT
Conditions
OUTPUT
---
1
2
1
2
1
2
2
1
2
1
2
4
1.61
38.06
1.61
---
---
---
---
---
---
---
---
---
!OUT
---
OUTPUT NOT
OUT NOT
!OUT NOT
KEEP
DIFU
---
---
38.06
4.72
KEEP
011
013
014
---
DIFFERENTIATE UP
DIFFERENTIATE DOWN
SET
4.12
DIFD
4.19
SET
2.69
!SET
---
39.12
2.69
RESET
RSET
!RSET
SETA
---
Word specified
With 1-bit set
---
39.12
17.60
253.5
17.60
249.5
16.60
54.60
16.60
54.60
---
MULTIPLE BIT SET
MULTIPLE BIT RESET
SINGLE BIT SET
SINGLE BIT OUTPUT
530
With 1,000-bit set
With 1-bit reset
RSTA
531
532
534
4
With 1,000-bit reset
SETB
!SETB
RSTB
!RSTB
2
3
2
3
---
---
---
---
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3-3
3 Instruction Execution Times and Number of Steps
Sequence Control Instructions
FUN
No.
Length
(steps)
ON execution
time (µs)
Instruction
Mnemonic
Conditions
END
END
4.6
1.2
001
000
002
003
517
1
1
1
1
3
---
---
---
---
NO OPERATION
NOP
IL
INTERLOCK
4.3
INTERLOCK CLEAR
MULTI-INTERLOCK
DIFFERENTIATION HOLD
ILC
4.3
MILH
19.4
19.4
21.5
19.4
19.4
21.5
8.9
During interlock
Not during interlock and interlock not set
Not during interlock and interlock set
During interlock
MULTI-INTERLOCK
MILR
MILC
518
519
3
2
DIFFERENTIATION RELEASE
Not during interlock and interlock not set
Not during interlock and interlock set
Interlock not cleared
Interlock cleared
MULTI-INTERLOCK CLEAR
8.9
JUMP
JMP
6.1
004
005
510
512
514
513
2
2
2
2
1
1
---
JUMP END
JME
6.2
---
CONDITIONAL JUMP
FOR LOOP
CJP
10.1
9.7
When JMP condition is satisfied
Designating a constant
---
FOR
BREAK LOOP
NEXT LOOP
BREAK
NEXT
4.1
5.8
When loop is continued
When loop is ended
5.7
Timer and Counter Instructions
FUN
No.
Length
(steps)
ON execution
time (µs)
Instruction
Mnemonic
Conditions
TIMER
TIM
---
3
3
3
3
3
11.6
11.5
11.6
10.8
---
TIMX
550
---
When loop is continued
COUNTER
CNT
---
CNTX
TIMH
546
015
551
540
552
087
When loop is continued
HIGH-SPEED TIMER
ONE-MS TIMER
---
TIMHX
TMHH
TMHHX
TTIM
When loop is continued
---
---
ACCUMULATIVE TIMER
22.7
17.4
15.0
22.2
17.4
15.2
24.3
20.4
24.5
22.2
26.2
25.4
19.0
659.0
19.0
659.0
---
When resetting
When interlocking
---
TTIMX
555
3
When resetting
When interlocking
---
LONG TIMER
TIML
542
553
4
4
3
3
3
When interlocking
---
TIMLX
When interlocking
---
REVERSIBLE COUNTER
RESET TIMER/ COUNTER
CNTR
CNTRX
CNR
012
548
545
---
When resetting 1 word
When resetting 256 words
When resetting 1 word
When resetting 256 words
CNRX
547
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3 Instruction Execution Times and Number of Steps
Comparison Instructions
Length
(steps)
ON execution
time (µs)
Instruction
Mnemonic
FUN No.
Conditions
Input Comparison Instructions
(unsigned)
LD,AND,OR+=
LD,AND,OR+<>
LD,AND,OR+<
LD,AND,OR+<=
LD,AND,OR+>
LD,AND,OR+>=
LD,AND,OR+=+L
LD,AND,OR+<>+L
LD,AND,OR+<+L
LD,AND,OR+<=+L
LD,AND,OR+>+L
LD,AND,OR+>=+L
LD,AND,OR+=+S
LD,AND,OR+<>+S
LD,AND,OR+<+S
LD,AND,OR+<=+S
LD,AND,OR+>+S
LD,AND,OR+>=+S
LD,AND,OR+=+SL
LD,AND,OR+<>+SL
LD,AND,OR+<+SL
LD,AND,OR+<=+SL
LD,AND,OR+>+SL
LD,AND,OR+>=+SL
=DT
300
305
310
315
320
325
301
306
311
316
321
326
302
307
312
317
322
327
303
308
313
318
323
328
341
342
343
344
345
346
020
020
060
114
114
115
4
4
4
4
9.3
10.8
9.4
---
Input Comparison Instructions
(double, unsigned)
---
---
---
3
Input Comparison Instructions
(signed)
Input Comparison Instructions
(double, signed)
10.9
Time Comparison Instructions
4
4
4
4
4
4
3
7
3
3
7
3
14.5
14.5
14.4
14.4
14.6
14.6
8.1
---
---
---
---
---
---
---
---
---
---
---
<>DT
<DT
<=DT
>DT
>=DT
COMPARE
CMP
!CMP
49.1
9.5
DOUBLE COMPARE
CMPL
SIGNED BINARY COMPARE
CPS
8.1
!CPS
49.1
9.5
DOUBLE SIGNED BINARY
COMPARE
CPSL
---
TABLE COMPARE
TCMP
BCMP
ZCP
085
068
088
116
4
4
3
3
61.1
107.6
17.8
---
---
---
UNSIGNED BLOCK COMPARE
AREA RANGE COMPARE
DOUBLE AREA RANGE
COMPARE
ZCPL
20.1
---
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3 Instruction Execution Times and Number of Steps
Data Movement Instructions
FUN
No.
Length
(steps)
ON execution
time (µs)
Instruction
Mnemonic
MOV
Conditions
MOVE
021
021
498
022
082
083
062
3
7
3
3
4
4
8.0
57.7
8.9
---
---
---
---
---
---
!MOV
MOVL
MVN
DOUBLE MOVE
MOVE NOT
13.7
21.4
22.4
26.4
137.3
24.2
3747.7
21.3
2074.4
19.2
20.8
20.6
MOVE BIT
MOVB
MOVD
XFRB
MOVE DIGIT
MULTIPLE BIT TRANSFER
Transferring 1 word
Transferring 255 bits
BLOCK TRANSFER
BLOCK SET
XFER
BSET
070
071
4
4
Transferring 1 word
Transferring 1,000 words
Setting 1 word
Setting 1,000 words
DATA EXCHANGE
XCHG
DIST
073
080
081
3
4
4
---
---
---
SINGLE WORD DISTRIBUTE
DATA COLLECT
COLL
Data Shift Instructions
FUN
No.
Length
(steps)
ON execution
time (µs)
Instruction
SHIFT REGISTER
Mnemonic
Conditions
SFT
010
084
016
3
4
4
14.1
1076.0
18.0
Shifting 1 word
Shifting 290 words
REVERSIBLE SHIFT REGISTER
WORD SHIFT
SFTR
WSFT
Shifting 1 word
3784.4
25.8
Shifting 1,000 words
Shifting 1 word
3783.9
13.0
Shifting 1,000 words
ARITHMETIC SHIFT LEFT
ARITHMETIC SHIFT RIGHT
ROTATE LEFT
ASL
ASR
ROL
ROR
SLD
025
026
027
028
074
2
2
2
2
3
---
13.0
---
13.3
---
ROTATE RIGHT
13.5
---
ONE DIGIT SHIFT LEFT
21.8
Shifting 1 word
3778.3
22.2
Shifting 1,000 words
ONE DIGIT SHIFT RIGHT
SRD
075
3
Shifting 1 word
3778.6
19.5
Shifting 1,000 words
SHIFT N-BITS LEFT
NASL
NSLL
NASR
NSRL
580
582
581
583
3
3
3
3
---
---
---
---
DOUBLE SHIFT NBITS LEFT
SHIFT N-BITS RIGHT
20.8
19.6
DOUBLE SHIFT NBITS RIGHT
21.0
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3-6
3 Instruction Execution Times and Number of Steps
Increment/Decrement Instructions
FUN
No.
Length
(steps)
ON execution
time (µs)
Instruction
Mnemonic
++
Conditions
INCREMENT BINARY
590
591
592
593
594
595
596
597
2
2
2
2
2
2
2
2
12.3
13.5
12.3
13.6
13.2
14.4
13.2
14.5
---
---
---
---
---
---
---
---
DOUBLE INCREMENT BINARY
DECREMENT BINARY
++L
--
DOUBLE DECREMENT BINARY
INCREMENT BCD
--L
++B
++BL
DOUBLE INCREMENT BCD
DECREMENT BCD
--
--
B
DOUBLE DECREMENT BCD
BL
3
Symbol Math Instructions
FUN
Length
(steps)
ON execution
Instruction
Mnemonic
Conditions
No.
400
401
402
403
404
405
406
407
410
411
412
413
414
415
416
417
420
421
424
425
430
431
434
435
time (µs)
11.5
13.0
11.7
13.2
20.6
22.9
20.8
23.1
11.6
13.2
11.7
13.3
20.3
23.6
20.5
23.8
18.4
23.9
22.0
33.2
19.8
25.8
23.2
33.0
SIGNED BINARY ADD WITHOUT CARRY
DOUBLE SIGNED BINARY ADD WITHOUT CARRY
SIGNED BINARY ADD WITH CARRY
DOUBLE SIGNED BINARY ADD WITH CARRY
BCD ADD WITHOUT CARRY
+
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
+L
+C
+CL
+B
DOUBLE BCD ADD WITHOUT CARRY
BCD ADD WITH CARRY
+BL
+BC
+BCL
-
DOUBLE BCD ADD WITH CARRY
SIGNED BINARY SUBTRACT WITHOUT CARRY
DOUBLE SIGNED BINARY SUBTRACT WITHOUT CARRY
SIGNED BINARY SUBTRACT WITH CARRY
DOUBLE SIGNED BINARY SUBTRACT WITH CARRY
BCD SUBTRACT WITHOUT CARRY
DOUBLE BCD SUBTRACT WITHOUT CARRY
BCD SUBTRACT WITH CARRY
DOUBLE BCD SUBTRACT WITH CARRY
SIGNED BINARY MULTIPLY
-
-
-
-
-
-
-
∗
L
C
CL
B
BL
BC
BCL
DOUBLE SIGNED BINARY MULTIPLY
BCD MULTIPLY
∗L
∗B
∗BL
/
DOUBLE BCD MULTIPLY
SIGNED BINARY DIVIDE
DOUBLE SIGNED BINARY DIVIDE
BCD DIVIDE
/L
/B
DOUBLE BCD DIVIDE
/BL
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3 Instruction Execution Times and Number of Steps
Conversion Instructions
FUN
No.
Length
(steps)
ON execution
time (µs)
Instruction
BCD TO BINARY
Mnemonic
BIN
Conditions
023
058
3
3
15.1
16.7
---
---
---
DOUBLE BCD TO DOUBLE
BINARY
BINL
BINARY TO BCD
DOUBLE BINARY TO
DOUBLE BCD
BCD
024
059
3
3
15.1
17.3
BCDL
---
2’S COMPLEMENT
DATA DECODER
NEG
160
076
3
4
14.3
19.6
31.0
79.4
138.2
32.5
63.0
68.0
112.3
22.8
24.7
18.4
---
MLPX
Decoding 1 digit (4 to 16)
Decoding 4 digits (4 to 16)
Decoding 1 digit (8 to 256)
Decoding 2 digits (8 to 256)
Encoding 1 digit (16 to 4)
Encoding 4 digits (16 to 4)
Encoding 1 digit (256 to 8)
Encoding 2 digits (256 to 8)
Converting 1 digit into ASCII
Converting 4 digits into ASCII
Converting 1 digit
DATA ENCODER
DMPX
077
4
ASCII CONVERT
ASCII TO HEX
ASC
HEX
086
162
4
4
Logic Instructions
FUN
No.
Length
(steps)
ON execution
time (µs)
Instruction
Mnemonic
Conditions
LOGICAL AND
ANDW
ANDL
034
610
035
611
036
612
029
614
4
4
4
4
4
4
2
2
18.6
20.4
18.6
20.4
18.6
20.4
12.4
13.6
---
---
---
---
---
---
---
---
DOUBLE LOGICAL AND
LOGICAL OR
ORW
DOUBLE LOGICAL OR
EXCLUSIVE OR
ORWL
XORW
XORL
COM
DOUBLE EXCLUSIVE OR
COMPLEMENT
DOUBLE COMPLEMENT
COML
Special Math Instructions
FUN
No.
Length
(steps)
ON execution
time (µs)
Instruction
Mnemonic
APR
Conditions
ARITHMETIC PROCESS
069
4
34.2
25.9
19.5
Designating SIN and COS
Designating line-segment approximation
Counting 1 word
BIT COUNTER
BCNT
067
4
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3-8
3 Instruction Execution Times and Number of Steps
Floating-point Math Instructions
FUN
No.
Length
(steps)
ON execution
time (µs)
Instruction
Mnemonic
FIX
Conditions
FLOATING TO 16-BIT
450
451
452
453
454
455
457
456
329
330
331
332
333
334
448
449
3
3
3
3
4
4
4
4
3
15.9
16.2
16.2
17.1
24.1
25.2
25.0
24.4
11.6
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
---
FLOATING TO 32-BIT
FIXL
FLT
FLTL
+F
16-BIT TO FLOATING
32-BIT TO FLOATING
FLOATING-POINT ADD
FLOATING-POINT SUBTRACT
FLOATING-POINT DIVIDE
FLOATING-POINT MULTIPLY
Floating Symbol Comparison
-F
/F
∗F
LD,AND,OR+=F
LD,AND,OR+<>F
LD,AND,OR+<F
LD,AND,OR+<=F
LD,AND,OR+>F
LD,AND,OR+>=F
FSTR
3
FLOATING- POINT TO ASCII
ASCII TO FLOATING-POINT
4
3
56.8
42.9
FVAL
Table Data Processing Instructions
FUN
No.
Length
(steps)
ON execution
time (µs)
Instruction
SWAP BYTES
Mnemonic
SWAP
Conditions
637
3
16.8
6250.0
24.1
Swapping 1 word
Swapping 1,000 words
For 1-word table length
For 1,000-word table length
FRAME CHECKSUM
FCS
180
4
2710.0
Data Control Instructions
FUN
No.
Length
(steps)
ON execution
time (µs)
Instruction
Mnemonic
PIDAT
Conditions
PID CONTROL WITH AUTOTUN-
ING
191
4
316.0
270.0
228.0
275.5
276.0
5.8
Initial execution of PID processing
PID processing When sampling
PID processing When not sampling
Initial execution of autotuning
Autotuning when sampling
TIME-PROPORTIONAL OUTPUT
TPO
685
4
OFF execution time
40.8
ON execution time with duty designation
or displayed output limit
43.4
ON execution time with manipulated vari-
able designation and output limit enabled
SCALING
SCL
194
486
487
195
4
4
4
4
24.8
20.2
26.4
24.2
225.5
---
SCALING 2
SCALING 3
AVERAGE
SCL2
SCL3
AVG
---
---
Average of an operation
Average of 64 operations
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3-9
3 Instruction Execution Times and Number of Steps
Subroutine Instructions
FUN
No.
Length
(steps)
ON execution
time (µs)
Instruction
Mnemonic
SBS
Conditions
SUBROUTINE CALL
SUBROUTINE ENTRY
SUBROUTINE RETURN
091
092
093
2
2
1
6.6
2.6
3.1
---
---
---
SBN
RET
Interrupt Control Instructions
FUN
No.
Length
(steps)
ON execution
time (µs)
Instruction
Mnemonic
MSKS
Conditions
SET INTERRUPT MASK
690
3
15.1
15.1
14.9
18.0
8.5
Set
Reset
Set
CLEAR INTERRUPT
CLI
691
3
Reset
DISABLE INTERRUPTS
ENABLE INTERRUPTS
DI
EI
693
694
1
1
---
---
8.9
High-speed Counter and Pulse Output Instructions
FUN
No.
Length
(steps)
ON execution
time (µs)
Instruction
MODE CONTROL
Mnemonic
Conditions
46.0
31.8
48.7
35.2
27.2
13.0
40.0
35.0
37.2
32.6
24.5
36.5
Starting high-speed counter comparison
Stopping high-speed counter comparison
Changing pulse output PV
880
4
INI
Changing high-speed counter PV
Stopping pulse output
Stopping PWM(891) output
HIGH-SPEED COUNTER PV
READ
Reading pulse output PV
881
4
PRV
Reading high-speed counter PV
Reading pulse output status
Reading high-speed counter status
Reading PWM(891) status
Reading high-speed counter range
comparison results
29.1
69.3
Reading frequency of high-speed counter 0
COMPARISON TABLE LOAD
882
4
Registering target value table and starting
comparison for 1 target value
CTBL
116.3
126.6
46.3
Registering target value table and starting
comparison for 6 target values
Registering range table and starting com-
parison
Only registering target value table for 1
target value
93.3
Only registering target value table for 6
target values
122.5
69.2
74.0
44.1
97.6
Only registering range table
SPEED OUTPUT
Continuous mode
885
4
SPED
Independent mode
SET PULSES
886
887
4
5
---
---
PULS
PLS2
PULSE OUTPUT
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3-10
3 Instruction Execution Times and Number of Steps
FUN
No.
Length
(steps)
ON execution
time (µs)
Instruction
Mnemonic
ACC
Conditions
Continuous mode
ACCELERATION CONTROL
75.6
82.8
52.2
126.8
28.9
888
889
891
4
3
4
Independent mode
Origin search
ORIGIN SEARCH
ORG
PWM
Origin return
PULSE WITH VARIABLE DUTY
FACTOR
---
Step Instructions
FUN
No.
Length
(steps)
ON execution
time (µs)
Instruction
Mnemonic
Conditions
STEP DEFINE
STEP
008
2
10.5
10.4
9.6
Step control bit ON
Step control bit OFF
---
STEP START
SNXT
009
2
3
I/O Unit Instructions
FUN
No.
Length
(steps)
ON execution
time (µs)
Instruction
I/O REFRESH
Mnemonic
Conditions
IORF
170.7
146.6
Refreshing 1 input word for CP1W
Expansion Unit
097
3
Refreshing 1 output word for CP1W
Expansion Unit
1725.8
1359.9
Refreshing 12 input words for CP1W
Expansion Unit
Refreshing 12 output words for CP1W
Expansion Unit
7-SEGMENT DECODER
MATRIX INPUT
SDEC
MTR
078
213
4
5
21.9
31.6
31.6
27.1
30.8
---
Data input value: 00
Data input value:FF
4 digits
7-SEGMENT DISPLAY OUTPUT
7SEG
214
5
8 digits
Serial Communications Instructions
FUN
No.
Length
(steps)
ON execution
time (µs)
Instruction
Mnemonic
TXD
Conditions
TRANSMIT
RECEIVE
236
4
25.0
25.0
Sending 1 byte
Sending 256 bytes
Storing 1 byte
RXD
235
4
39.2
256.6
Storing 256 bytes
Clock Instructions
FUN
No.
Length
(steps)
ON execution
time (µs)
Instruction
Mnemonic
Conditions
CALENDAR ADD
CADD
CSUB
DATE
730
731
735
4
4
2
56.6
55.1
29.9
---
---
---
CALENDAR SUBTRACT
CLOCK ADJUSTMENT
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3-11
3 Instruction Execution Times and Number of Steps
Failure Diagnosis Instructions
FUN
No.
Length
(steps)
ON execution
time (µs)
Instruction
FAILURE ALARM
Mnemonic
FAL
Conditions
Recording errors
006
3
55.6
79.6
61.6
60.0
---
Deleting errors (in order of priority)
Deleting errors (all errors)
Deleting errors (individually)
---
SEVERE FAILURE ALARM
FALS
007
3
Other Instructions
FUN
Length
(steps)
ON execution
time (µs)
Instruction
Mnemonic
Conditions
No.
040
041
094
SET CARRY
STC
CLC
1
1
2
32.6
3.9
---
---
---
CLEAR CARRY
EXTEND MAXIMUM CYCLE TIME WDT
11.7
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3-12
Monitoring and Computing the Cycle
Time
This section describes how to monitor and calculate the cycle time of a CP1E CPU Unit
that can be used in the programs.
4
4-1 Monitoring the Cycle Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-2
4-1-1
Monitoring the Cycle Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-2
4-2 Computing the Cycle Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-3
4-2-1
4-2-2
4-2-3
4-2-4
4-2-5
CPU Unit Operation Flowchart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-3
Cycle Time Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-4
I/O Refresh Times for PLC Units . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-5
Cycle Time Calculation Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-6
Increase in Cycle Time for Online Editing . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-6
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4-1
4 Monitoring and Computing the Cycle Time
4-1 Monitoring the Cycle Time
4-1-1 Monitoring the Cycle Time
The average, maximum, and minimum cycle times can be monitored when the CX-Programmer is con-
nected online to a CPU Unit.
Monitoring the Average Value
While connected online to the PLC, the average cycle time is displayed in the status bar when the CPU
Unit is in any mode other than PROGRAM mode.
Monitoring Maximum and Minimum Values
Select PLC Setting - PLC Information - Cycle Time from the PLC Menu.
The following PLC Cycle Time Dialog Box will be displayed.
The average (mean), maximum, and minimum cycle times will be displayed in order from the top.
Click the Reset Button to recalculate and display the cycle time values.
Additional Information
The cycle time present value and maximum value are stored in the following Auxiliary Area
words.
• Cycle time present value (0.1-ms increments): A264 (lower bytes) and A265 (upper bytes)
• Maximum Cycle Time (0.1-ms increments): A262 (lower bytes) and A263 (upper bytes)
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4 Monitoring and Computing the Cycle Time
4-2 Computing the Cycle Time
4-2-1 CPU Unit Operation Flowchart
The CPU Unit processes data in repeating cycles from the overseeing processing up to peripheral
servicing as shown in the following diagram.
Power ON
Checks Unit connection status
4
Checks hardware and user
program memory
Error
Check OK?
Normal
Sets error flags
Flashing (non-
fatal error)
ERR/ALM
indicator ON or
flashing?
User program executed
Cyclic task executed
Lit (fatal error)
NO
End of program?
YES
Waits until the set cycle time
has elapsed (when the
minimum cycle time is valid)
Calculates cycle time
I/O refresh
Peripheral servicing
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4-3
4 Monitoring and Computing the Cycle Time
4-2-2 Cycle Time Overview
The cycle time depends on the following conditions.
• Type and number of instructions in the user program (cyclic tasks and all interrupt tasks for which the
execution conditions have been satisfied)
• Type and number of CP-series Expansion Units and Expansion I/O Units
• Minimum (constant) cycle time setting in the PLC Setup
• Use of peripheral USB and serial ports
Precautions for Correct Use
When the mode is switched from MONITOR mode to RUN mode, the cycle time may be extended
by 10 ms (this will not, however, cause a cycle time exceeded error).
The cycle time is the total time required for the PLC to perform the operations given in the following
tables.
Cycle time = (1) + (2) + (3) + (4) + (5)
(1) Overseeing
Processing time and
fluctuation cause
Operation
Checks the I/O bus and user memory, checks for battery errors, 0.4 ms min.
etc.
(2) Program Execution
Processing time and
fluctuation cause
Operation
Executes the instructions in the user program. The time
required is the total of the executions times for all instructions.
Total instruction execution
time.
(3) Cycle Time Calculation for Minimum Cycle Time
Operation
Processing time and fluctuation cause
Waits for the specified cycle
When a minimum cycle time is not set, the time for step 3 is
time to elapse when a minimum approximately 0.
(constant) cycle time has been
When a minimum cycle time is set, the time for step 3 is the
preset fixed cycle time minus the actual cycle time
((1) + (2) + (4) + (5)).
set in the PLC Setup.
Calculates the cycle time.
(4) I/O Refreshing
Processing time
Operation
and fluctuation
cause
CPU Unit built-in I/O, CPU
Unit built-in analog I/O (NA-
type only), CP-series Expan- each Unit, and then inputs.
sion Units and Expansion I/O
Units
Outputs from the CPU Unit to the
actual outputs are refreshed first for
I/O refresh time for
each Unit multiplied
by the number of
Units used.
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4 Monitoring and Computing the Cycle Time
(5) Peripheral Servicing
Operation
Processing time and fluctuation cause
Services peripheral
USB port
In this servicing, 8% of the previous cycle’s cycle time (calculated in
step (3)) will be allowed for peripheral servicing.
Services serial port
(Built-in RS-232C
port, serial option
board)
4-2-3 I/O Refresh Times for PLC Units
ꢀ I/O Refresh Times for Built-in Analog I/O (NA-type CPU Unit only)
Unit name
20-point I/O + Analog I/O
CPU Unit
Model numbers
CP1E-NA20Dꢀ-ꢀ
I/O refresh time per unit
0.5 ms
NA-type CPU Unit
Note No matter whether use analog I/O function or not, the I/O refresh time is the same.
4
ꢀ I/O Refresh Times for CP-series Expansion Units and Expansion I/O Units
Unit name
8-point Input Unit
8-point Output Unit
Model numbers
CP1W-8ED
I/O refresh time per unit
0.14 ms
Expansion I/O Unit
CP1W-8ER
0.06 ms
CP1W-8ET
CP1W-8ET1
CP1W-16ER
CP1W-16ET
CP1W-16ET1
CP1W-20EDR1
CP1W-20EDT
CP1W-20EDT1
CP1W-32ER
CP1W-32ET
CP1W-32ET1
CP1W-40EDR
CP1W-40EDT
CP1W-40EDT1
CP1W-AD041
CP1W-DA041
CP1W-MAD11
CP1W-TS001
CP1W-TS002
CP1W-TS101
CP1W-TS102
CP1W-SRT21
16-point Output Unit
20-point I/O Unit
0.17 ms
0.20 ms
0.33 ms
0.45 ms
32-point Output Unit
40-point I/O Unit
Expansion Unit
Analog Input Unit
0.72 ms
0.33 ms
0.36 ms
0.30 ms
0.57 ms
0.30 ms
0.57 ms
0.20 ms
Analog Output Unit
Analog I/O Units
Temperature Sensor Unit
CompoBus/S I/O Link Unit
Additional Information
The I/O refresh time for the built-in I/O of the CPU Unit is included in overseeing processing.
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4-5
4 Monitoring and Computing the Cycle Time
4-2-4 Cycle Time Calculation Example
The following example shows the method used to calculate the cycle time when Expansion I/O Units
are connected to a CP1E CPU Unit.
ꢀ Conditions
Item
Description
1 Unit
CP1E CPU Unit
Ladder diagram
40-point I/O Unit
CP1W-40EDR
5K steps
LD instructions: 2.5K steps
OUT instructions: 2.5K steps
Peripheral USB port connection
Minimum cycle time processing
Serial port connection
Yes or no
None
None
Other peripheral servicing
None
ꢀ Calculation Example
Processing time
Peripheral USB
Process name
Equation
Peripheral USB
port not
port connected
connected
(1)Overseeing
−
0.4 ms
7.0 ms
0 ms
0.4 ms
7.0 ms
0 ms
(2)Program execution
(3)Cycle time calculation
(4)I/O refreshing
1.19µs×2,500+1.61µs×2,500
(Minimum cycle time not set.)
0.45 ms
0.45 ms
0.2 ms
0.45 ms
0 ms
(5)Peripheral servicing
(Only peripheral USB port connected)
Cycle time
(1)+(2)+(3)+(4)+(5)
8.15 ms
7.85 ms
4-2-5 Increase in Cycle Time for Online Editing
When online editing is executed to change the program from the CX-Programmer while the CPU Unit is
operating in MONITOR mode, the CPU Unit will momentarily suspend operation while the program is
being changed. The cycle time is extended by the writing programs for the CPU Unit. And the schedule
task will not be executed while the CPU Unit suspends operation.
If the program size is 8K steps, the cycle time extension will be as follows:
CPU Unit
Increase in cycle time for online editing
CP1E CPU Unit
Maximum: 16 ms, Normal: 6 ms (for a program size of
8K steps)
When editing online, the cycle time will be extended and the schedule task execution may be delayed or
become abnormal according to the editing that is performed.
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pp
Appendices
Alphabetical List of Instructions by Mnemonic . . . . . . . . . . . . . . . . . . . . . . . . . . A-2
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A-1
Appendices
Alphabetical List of Instructions by
Mnemonic
Immediate
refreshing
specifica-
tion
A
Upward
differen- differentia-
tiation
Downward
Mne-
monic
FUN
No.
Instruction
Page
Immediate
refreshing
specifica-
tion
Upward
differen- differentia-
tiation
Downward
tion
Mne-
monic
FUN
No.
Instruction
Page
tion
AND<F
AND<L
AND
FLOATING
LESS THAN
331
311
312
313
---
---
---
---
---
---
---
---
---
2-241
ACC
ACCELER-
ATION
CONTROL
888
@ACC
---
---
2-331
AND DOU-
BLE LESS
THAN
---
---
---
2-88
2-88
2-88
AND
AND
---
@AND
---
%AND
---
!AND
---
2-9
AND
LD
AND LOAD ---
2-13
AND<S AND
SIGNED
LESS THAN
AND
NOT
AND NOT
---
---
---
---
---
---
---
!AND
NOT
2-9
AND<
SL
AND DOU-
BLE
SIGNED
LESS THAN
AND<
AND LESS
THAN
310
315
---
2-88
2-88
AND<=
AND LESS
THAN OR
EQUAL
---
AND=
AND
EQUAL
300
341
329
---
---
---
---
---
---
---
---
---
2-88
2-91
2-241
AND=
DT
AND TIME
EQUAL
AND<=F AND
FLOATING
332
---
---
---
2-241
LESS THAN
OR EQUAL
AND=F
AND
FLOATING
EQUAL
AND<=
DT
AND TIME
LESS THAN
OR EQUAL
344
316
---
---
---
---
---
---
2-91
2-88
AND=L
AND DOU-
BLE EQUAL
301
302
---
---
---
---
---
---
2-88
2-88
AND<=L AND DOU-
BLE LESS
AND=S AND
SIGNED
THAN OR
EQUAL
EQUAL
AND=
SL
AND DOU-
BLE
SIGNED
EQUAL
303
---
---
---
2-88
AND<=S AND
SIGNED
317
318
---
---
---
---
---
---
2-88
2-88
LESS THAN
OR EQUAL
AND>
AND
GREATER
THAN
320
325
---
---
---
---
---
---
2-88
2-88
AND<=
SL
AND DOU-
BLE
SIGNED
LESS THAN
OR EQUAL
AND>=
AND
GREATER
THAN OR
EQUAL
AND<>
AND NOT
EQUAL
305
342
---
---
---
---
---
---
2-88
2-91
AND>=
DT
AND TIME
GREATER
THAN OR
EQUAL
346
334
---
---
---
---
---
---
2-91
AND<>
DT
AND TIME
NOT
EQUAL
AND<>F AND
FLOATING
330
---
---
---
2-241
AND>=F AND
FLOATING
2-241
NOT
EQUAL
GREATER
THAN OR
EQUAL
AND<>L AND DOU-
BLE NOT
306
307
---
---
---
---
---
---
2-88
2-88
AND>=L AND DOU-
BLE
326
327
---
---
---
---
---
---
2-88
2-88
EQUAL
GREATER
THAN OR
EQUAL
AND<>S AND
SIGNED
NOT
EQUAL
AND>=S AND
SIGNED
AND<>
SL
AND DOU-
BLE
SIGNED
NOT
308
343
---
---
---
---
---
---
2-88
2-91
GREATER
THAN OR
EQUAL
EQUAL
AND<
DT
AND TIME
LESS THAN
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A-2
Appendices
Immediate
refreshing
specifica-
tion
Immediate
refreshing
specifica-
tion
Upward
differen- differentia-
tiation tion
Downward
Upward
differen- differentia-
tiation
Downward
Mne-
monic
FUN
No.
Mne-
monic
FUN
No.
Instruction
Page
Instruction
Page
tion
AND>=
SL
AND DBL
SIGNED
GREATER
THAN OR
EQUAL
328
---
---
---
2-88
BINL
DOUBLE
BCD TO
DOUBLE
BINARY
058
@BINL
---
---
2-185
BREAK BREAK
LOOP
514
---
---
---
---
---
2-59
AND>
DT
AND TIME
GREATER
THAN
345
333
---
---
---
---
---
---
2-91
BSET
BLOCK SET 071
@BSET
2-119
AND>F
AND
2-241
FLOATING
GREATER
THAN
C
Immediate
refreshing
specifica-
tion
AND>L
AND DOU-
BLE
GREATER
THAN
321
322
323
---
---
---
---
---
---
---
---
---
2-88
2-88
2-88
Upward
differen- differentia-
tiation
Downward
Mne-
monic
FUN
No.
Instruction
Page
tion
CADD
CJP
CALEN-
DAR ADD
730
510
@CADD ---
---
2-380
2-53
AND>S AND
SIGNED
GREATER
THAN
CONDI-
TIONAL
JUMP
---
---
---
AND>
SL
AND DOU-
BLE
SIGNED
GREATER
THAN
CLC
CLI
CLEAR
CARRY
041
691
@CLC
@CLI
---
---
---
---
2-398
2-303
CLEAR
INTER-
RUPT
ANDL
DOUBLE
LOGICAL
AND
610
@ANDL
---
---
2-210
CMP
COMPARE
020
060
---
---
---
---
!CMP
---
2-95
2-95
CMPL
DOUBLE
COMPARE
ANDW
APR
LOGICAL
AND
034
069
@ANDW ---
---
---
2-210
2-218
CNR
RESET
TIMER/COU
NTER
545
547
@CNR
---
---
---
2-86
2-86
ARITH-
METIC
PROCESS
@APR
---
CNRX
RESET
TIMER/COU
NTER
@CNRX ---
ASC
ASL
ASCII CON- 086
VERT
@ASC
@ASL
---
---
---
---
2-201
2-133
ARITH-
METIC
SHIFT LEFT
025
CNT
COUNTER
---
---
---
---
---
---
---
2-80
2-83
CNTR
REVERS-
IBLE
COUNTER
012
ASR
AVG
B
ARITH-
METIC
SHIFT
RIGHT
026
@ASR
---
---
---
---
---
2-134
2-287
CNTRX REVERS-
IBLE
548
---
---
---
2-83
COUNTER
AVERAGE
195
CNTX
COLL
COUNTER
546
---
---
---
---
---
2-80
DATA COL- 081
LECT
@COLL
2-125
COM
COMPLE-
MENT
029
@COM
---
---
---
2-216
2-216
Immediate
refreshing
specifica-
tion
Upward
differen- differentia-
tiation
Downward
Mne-
monic
FUN
No.
COML
DOUBLE
COMPLE-
MENT
614
@COML ---
Instruction
Page
tion
BCD
BINARY TO 024
BCD
@BCD
---
---
---
2-187
2-187
CPS
SIGNED
BINARY
COMPARE
114
115
---
---
---
---
!CPS
---
2-98
2-98
BCDL
DOUBLE
BINARY TO
DOUBLE
BCD
059
@BCDL
---
CPSL
DOUBLE
SIGNED
BINARY-
COMPARE
BCMP
BCNT
BIN
BLOCK
COMPARE
068
067
023
@BCMP ---
---
---
---
2-103
2-227
2-185
CSUB
CTBL
CALEN-
DAR SUB-
TRACT
731
@CSUB ---
---
---
2-380
2-315
BIT
COUNTER
@BCNT
@BIN
---
---
REGISTER- 882
COMPARI-
SON TABLE
@CTBL
---
BCD TO
BINARY
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Appendices
Immediate
refreshing
specifica-
tion
D
Upward
differen- differentia-
tiation tion
Downward
Mne-
monic
FUN
No.
Instruction
Page
Immediate
refreshing
specifica-
tion
Upward
differen- differentia-
tiation
Downward
Mne-
FUN
No.
Instruction
monic
Page
tion
FOR
---
512
---
---
---
---
---
2-56
FSTR
FLOATING- 448
POINT TO
@FSTR
2-244
DATE
DI
CLOCK
ADJUST-
MENT
735
693
@DATE
---
---
---
---
2-385
ASCII
FVAL
ASCII TO
FLOATING-
POINT
449
@FVAL
---
---
2-249
DISABLE
INTER-
RUPTS
@DI
---
---
2-306
2-27
DIFD
DIFFEREN- 014
TIATE
!DIFD
DOWN
H
DIFU
DIST
DIFFEREN- 013
TIATE UP
---
---
---
!DIFU
---
2-25
Immediate
refreshing
specifica-
tion
Upward
differen- differentia-
tiation
Downward
Mne-
monic
FUN
No.
Instruction
Page
SINGLE
WORD DIS-
TRIBUTE
080
@DIST
2-123
tion
HEX
ASCII TO
HEX
162
@HEX
---
---
2-205
DMPX
DOWN
DSW
DATA
ENCODER
077
522
210
@DMPX ---
---
---
---
2-196
2-17
CONDI-
TION OFF
---
---
---
---
I
DIGITAL
SWITCH
INPUT
2-357
Immediate
refreshing
specifica-
tion
Upward
differen- differentia-
tiation tion
Downward
Mne-
FUN
No.
Instruction
Page
monic
INI
MODE
CONTROL
880
097
@INI
---
---
---
2-308
2-352
E
Immediate
refreshing
specifica-
tion
IORF
I/O
REFRESH
@IORF
---
Upward
differen- differentia-
tiation tion
Downward
Mne-
monic
FUN
No.
Instruction
Page
EI
ENABLE
INTER-
RUPTS
694
001
---
---
---
2-307
J
Immediate
refreshing
specifica-
tion
END
END
---
---
---
2-38
Upward
differen- differentia-
tiation tion
Downward
Mne-
monic
FUN
No.
Instruction
Page
JME
JMP
JUMP END 005
---
---
---
---
---
---
2-53
2-53
F
JUMP
004
Immediate
refreshing
specifica-
tion
Upward
differen- differentia-
tiation tion
Downward
Mne-
monic
FUN
No.
Instruction
Page
K
FAL
FAILURE
ALARM
006
007
@FAL
---
---
---
2-387
2-393
Immediate
refreshing
specifica-
tion
Upward
differen- differentia-
tiation tion
Downward
Mne-
monic
FUN
No.
FALS
SEVERE
FAILURE
ALARM
---
---
Instruction
Page
KEEP
KEEP
011
---
---
!KEEP
2-21
FCS
FRAME
CHECK-
SUM
180
@FCS
---
---
2-255
FIX
FLOATING
TO 16-BIT
450
451
452
453
@FIX
---
---
---
---
---
---
---
---
2-233
2-233
2-235
2-235
L
FIXL
FLT
FLOATING
TO 32-BIT
@FIXL
@FLT
@FLTL
Immediate
refreshing
specifica-
tion
Upward
differen- differentia-
tiation tion
Downward
Mne-
monic
FUN
No.
Instruction
Page
16-BIT TO
FLOATING
LD
LOAD
---
@LD
%LD
!LD
---
2-7
FLTL
32-BIT TO
FLOATING
LD=DT LOAD DATE 341
EQUAL
---
---
2-91
LD =S
LOAD
302
---
---
---
2-88
SIGNED
EQUAL
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Appendices
Immediate
refreshing
specifica-
tion
Immediate
refreshing
specifica-
tion
Upward
differen- differentia-
tiation tion
Downward
Upward
differen- differentia-
tiation tion
Downward
Mne-
monic
FUN
No.
Mne-
monic
FUN
No.
Instruction
Page
Instruction
Page
LD NOT LOAD NOT ---
---
---
---
!LD NOT 2-7
LD=F
LOAD
FLOATING
EQUAL
329
---
---
---
2-241
LD<
LOAD LESS 310
THAN
---
---
2-88
LD=L
LOAD DOU- 301
BLE EQUAL
---
---
---
---
---
---
2-88
2-88
LD<=
LOAD LESS 315
THAN OR
EQUAL
---
---
---
---
---
2-88
2-91
2-241
LD=SL
LOAD DOU- 303
BLE
SIGNED
LD<=
DT
LOAD DATE 344
LESS THAN
OR EQUAL
---
---
---
---
EQUAL
LD>
LOAD
GREATER
THAN
320
325
---
---
---
---
---
---
2-88
2-88
LD<=F
LD<=L
LD<=S
LOAD
332
FLOATING
LESS THAN
OR EQUAL
LD>=
LOAD
GREATER
THAN OR
EQUAL
LOAD DOU- 316
BLE LESS
THAN OR
---
---
---
---
---
---
---
---
---
2-88
2-88
2-88
EQUAL
LD>=
DT
LOAD DATE 346
GREATER
THAN OR
---
---
---
---
---
---
2-91
LOAD
317
SIGNED
LESS THAN
OR EQUAL
EQUAL
LD>=F
LD>=L
LD>=S
LOAD
334
2-241
FLOATING
GREATER
THAN OR
EQUAL
LD<=
SL
LOAD DOU- 318
BLE
SIGNED
LESS THAN
OR EQUAL
LOAD DOU- 326
BLE
GREATER
THAN OR
EQUAL
---
---
---
---
---
---
---
---
---
2-88
2-88
2-88
LD<>
LOAD NOT 305
EQUAL
---
---
---
---
---
---
2-88
2-91
LD<>
DT
LOAD DATE 342
NOT
EQUAL
LOAD
327
328
SIGNED
GREATER
THAN OR
EQUAL
LD<>F
LOAD
330
---
---
---
2-241
FLOATING
NOT
EQUAL
LD>=
SL
LOAD DBL
SIGNED
LD<>L
LD<>S
LOAD DOU- 306
BLE NOT
EQUAL
---
---
---
---
---
---
2-88
2-88
GREATER
THAN OR
EQUAL
LOAD
307
SIGNED
NOT
EQUAL
LD>DT LOAD DATE 345
GREATER
---
---
---
---
---
---
2-91
THAN
LD<>
SL
LOAD DOU- 308
BLE
SIGNED
NOT
---
---
---
2-88
LD>F
LD>L
LD>S
LD>SL
LOAD
333
2-241
FLOATING
GREATER
THAN
EQUAL
LOAD DOU- 321
BLE
GREATER
THAN
---
---
---
---
---
---
---
---
---
2-88
2-88
2-88
LD<DT LOAD DT
LESS THAN
343
331
---
---
---
---
---
---
2-91
LD<F
LD<L
LD<S
LD<SL
LOAD
FLOATING
LESS THAN
2-241
LOAD
322
SIGNED
GREATER
THAN
LOAD DOU- 311
BLE LESS
THAN
---
---
---
---
---
---
---
---
---
2-88
2-88
2-88
LOAD DOU- 323
BLE
LOAD
SIGNED
LESS THAN
312
SIGNED
GREATER
THAN
LOAD DOU- 313
BLE
SIGNED
LESS THAN
LD=
LOAD
300
---
---
---
2-88
EQUAL
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Appendices
M
O
Immediate
refreshing
specifica-
tion
Immediate
refreshing
specifica-
tion
Upward
differen- differentia-
tiation tion
Downward
Upward
differen- differentia-
tiation tion
Downward
Mne-
FUN
No.
Mne-
monic
FUN
No.
Instruction
monic
Page
Instruction
Page
MILC
MILH
MULTI-
INTER-
LOCK
519
---
---
---
---
2-44
OR
OR
---
@OR
%OR
!OR
---
2-11
ORG
ORIGIN
SEARCH
889
@ORG
---
2-336
CLEAR
OR LD
OR LOAD
---
---
---
---
---
---
---
---
2-13
MULTI-
INTER-
LOCK DIF-
FERENTIAT
IONHOLD
517
---
---
---
2-44
2-44
OR NOT OR NOT
---
!OR NOT 2-11
OR<
OR LESS
THAN
310
---
2-88
OR<=
OR LESS
THAN OR
EQUAL
315
344
332
---
---
---
---
---
---
---
2-88
MILR
MULTI-
INTER-
LOCK DIF-
FERENTIAT
IONRE-
518
076
---
---
---
OR<=
DT
OR DATE
LESS THAN
OR EQUAL
---
---
2-91
LEASE
OR<=F OR
FLOATING
2-241
MLPX
DATA
DECODER
@MLPX
@MOV
---
---
2-191
LESS THAN
OR EQUAL
MOV
MOVE
021
082
083
!MOV
---
2-108
2-111
2-113
MOVB
MOVD
MOVE BIT
@MOVB ---
@MOVD ---
OR<=L OR
316
---
---
---
2-88
DOUBLE
LESS THAN
OR EQUAL
MOVE
DIGIT
---
MOVL
MSKS
DOUBLE
MOVE
498
@MOVL ---
@MSKS ---
---
---
2-108
2-300
OR<=S ORSIGNED 317
LESS THAN
---
---
---
---
---
---
2-88
2-88
SET INTER- 690
RUPT
MASK
OR EQUAL
OR<=
SL
OR
318
DOUBLE
SIGNED
LESS THAN
OR EQUAL
MTR
MVN
MATRIX
INPUT
213
---
---
---
---
---
2-361
2-108
MOVE NOT 022
@MVN
OR<>
OR NOT
EQUAL
305
342
---
---
---
---
---
---
---
---
---
2-88
2-91
2-241
OR<>
DT
OR DATE
NOT EQUA
N
OR<>F OR FLOAT- 330
ING NOT
Immediate
refreshing
specifica-
tion
Upward
differen- differentia-
tiation
Downward
Mne-
monic
FUN
No.
Instruction
Page
EQUAL
tion
OR<>L OR
DOUBLE
306
---
---
---
2-88
NASL
NASR
NEG
SHIFT N-
BITS LEFT
580
@NASL
---
---
---
---
---
---
2-141
2-144
2-189
NOT
EQUAL
SHIFT N-
BITS RIGHT
581
160
513
@NASR
@NEG
OR<>S ORSIGNED 307
---
---
---
---
---
---
2-88
2-88
NOT
EQUAL
2'S COM-
PLEMENT
OR<>
SL
OR
308
NEXT
NOP
---
---
---
---
---
---
---
2-56
2-39
DOUBLE
SIGNED
NOT
NO OPERA- 000
TION
EQUAL
NOT
NOT
520
582
---
---
---
---
---
2-16
OR<DT OR DATE
LESS THAN
343
331
---
---
---
---
---
---
2-91
NSLL
DOUBLE
SHIFT N-
BITS LEFT
@NSLL
2-141
OR<F
OR<L
OR<S
OR
FLOATING
LESS THAN
2-241
NSRL
DOUBLE
SHIFT N-
BITSRIGHT
583
@NSRL
---
---
2-144
OR
DOUBLE
LESS THAN
311
---
---
---
2-88
ORSIGNED 312
LESS THAN
---
---
---
---
---
---
2-88
2-88
OR<SL OR
DOUBLE
313
SIGNED
LESS THAN
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Immediate
refreshing
specifica-
tion
Immediate
refreshing
specifica-
tion
Upward
differen- differentia-
tiation tion
Downward
Upward
differen- differentia-
tiation
Downward
Mne-
monic
FUN
No.
Mne-
monic
FUN
No.
Instruction
Page
Instruction
Page
tion
OR=
OR EQUAL 300
---
---
---
---
---
2-88
2-91
ORWL
DOUBLE
LOGICAL
OR
611
@ORWL ---
---
2-212
OR=DT OR DATE
EQUAL
341
---
OUT
OUTPUT
---
---
---
---
---
---
!OUT
2-18
2-18
OR=F
OR=L
OR=S
OR
FLOATING
EQUAL
329
---
---
---
---
---
2-241
2-88
OUT
NOT
OUTPUT
NOT
!OUT
NOT
OR
DOUBLE
EQUAL
301
---
P
ORSIGNED 302
EQUAL
---
---
---
---
---
---
2-88
2-88
Immediate
refreshing
specifica-
tion
Upward
differen- differentia-
tiation tion
Downward
Mne-
monic
FUN
No.
OR=SL OR DOU-
BLE
303
Instruction
Page
SIGNED
EQUAL
PIDAT
PID CON-
TROL
WITHAUTO-
TUNING
191
---
---
---
2-257
OR>
OR
GREATER
THAN
320
325
---
---
---
---
---
---
2-88
2-88
PLS2
PRV
PULSE
OUTPUT
887
881
@PLS2
@PRV
---
---
---
---
2-325
2-311
OR>=
OR
GREATER
THAN OR
EQUAL
HIGH-
SPEED-
COUNTER
PV READ
OR>=
DT
OR DATE
GREATER
THAN OR
EQUAL
346
334
---
---
---
---
---
---
2-91
PULS
PWM
SET
PULSES
886
891
@PULS
@PWM
---
---
---
---
2-323
2-339
OR>=F OR
FLOATING
2-241
PULSE
WITH VARI-
ABLEDUTY
FACTOR
GREATER
THAN OR
EQUAL
OR>=L OR
326
---
---
---
2-88
DOUBLE
GREATER
THAN OR
EQUAL
R
Immediate
refreshing
specifica-
tion
Upward
differen- differentia-
tiation tion
Downward
Mne-
monic
FUN
No.
OR>=S ORSIGNED 327
GREATER
---
---
---
---
---
---
2-88
2-88
Instruction
Page
THAN OR
EQUAL
RET
SUBROU-
TINE
RETURN
093
---
---
---
2-295
OR>=
SL
OR DBL
SIGNED
GREATER
THAN OR
EQUAL
328
345
ROL
ROR
ROTATE
LEFT
027
028
@ROL
@ROR
---
---
---
---
2-135
2-137
ROTATE
RIGHT
OR>DT OR DATE
GREATER
---
---
---
---
---
---
2-91
RSET
RSTA
RESET
---
@RSET
@RSTA
%RSET
---
!RSET
---
2-29
2-31
THAN
MULTIPLE
BIT RESET
531
OR>F
OR>L
OR>S
OR FLOAT- 333
ING
GREATER
THAN
2-241
RSTB
RXD
SINGLE BIT 533
RESET
@RSTB
@RXD
---
---
!RSTB
---
2-33
OR
321
---
---
---
2-88
RECEIVE
235
2-374
DOUBLE
GREATER
THAN
ORSIGNED 322
GREATER
THAN
---
---
---
---
---
---
2-88
2-88
OR>SL OR
DOUBLE
323
SIGNED
GREATER
THAN
ORW
LOGICAL
OR
035
@ORW
---
---
2-212
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Appendices
Immediate
refreshing
specifica-
tion
S
Upward
differen- differentia-
tiation
---
Downward
Mne-
monic
FUN
No.
Instruction
Page
Immediate
refreshing
specifica-
tion
Upward
differen- differentia-
tiation tion
Downward
tion
Mne-
FUN
No.
Instruction
monic
Page
TMHHX
TPO
ONE-MS
TIMER
552
---
---
---
2-72
SBN
SBS
SUBROU-
TINE
ENTRY
092
---
---
---
2-295
TIME-PRO- 685
PORTION-
---
---
2-269
ALOUTPUT
SUBROU-
TINE CALL
091
194
@SBS
---
---
2-290
TR
TR Bits
---
---
---
---
---
---
---
2-20
2-74
TTIM
ACCUMU-
LATIVE
TIMER
087
SCL
SCALING
@SCL
---
---
---
---
---
---
---
---
2-276
2-280
2-284
2-354
SCL2
SCL3
SDEC
SCALING 2 486
SCALING 3 487
@SCL2
@SCL3
@SDEC
TTIMX
TXD
ACCUMU-
LATIVE
TIMER
555
---
---
---
---
---
2-74
7-SEG-
MENT
DECODER
078
TRANSMIT 236
@TXD
2-369
SET
SET
---
@SET
%SET
---
!SET
---
2-29
2-31
SETA
MULTIPLE
BIT SET
530
@SETA
U
SETB
SFT
SINGLE BIT 532
SET
@SETB
---
---
---
---
!SETB
---
2-33
Immedi-
ate
refreshing
specifica-
tion
Down-
Upward
differen-
tiation
SHIFT
010
2-127
2-129
Mne-
monic
FUN
No.
ward dif-
ferentiatio
n
Instruction
Page
REGISTER
SFTR
REVERS-
084
@SFTR
---
IBLE SHIFT
REGISTER
UP
CONDI-
TION ON
521
---
---
---
2-17
SLD
ONE DIGIT 074
SHIFT LEFT
@SLD
---
---
---
---
---
---
---
---
---
2-139
2-342
2-319
2-139
SNXT
SPED
SRD
STEP
009
START
W
SPEED
885
@SPED
@SRD
Immediate
refreshing
specifica-
tion
OUTPUT
Upward
differen- differentia-
tiation
Downward
Mne-
monic
FUN
No.
Instruction
Page
ONE DIGIT 075
SHIFT
tion
RIGHT
WDT
EXTEND
MAXIMUM-
CYCLE
094
@WDT
---
---
2-399
STC
SET
CARRY
040
008
637
@STC
---
---
---
---
---
---
2-398
2-342
2-253
TIME
STEP
SWAP
STEP
DEFINE
WSFT
WORD
SHIFT
016
@WSFT ---
---
2-131
SWAP
@SWAP ---
BYTES
X
T
Immediate
refreshing
specifica-
tion
Upward
differen- differentia-
tiation
Downward
Mne-
monic
FUN
No.
Immediate
refreshing
specifica-
tion
Instruction
Page
Upward
differen- differentia-
tiation
Downward
Mne-
monic
FUN
No.
tion
Instruction
Page
tion
XCHG
XFER
XFRB
DATA
EXCHANGE
073
070
062
@XCHG ---
---
---
---
2-121
2-117
2-115
TCMP
TIM
TABLE
COMPARE
085
@TCMP ---
---
---
---
---
---
---
---
---
2-101
2-66
2-69
2-69
2-77
2-77
2-66
2-72
BLOCK
TRANSFER
@XFER
@XFRB
---
---
HUNDRED- ---
MS TIMER
---
---
---
---
---
---
---
---
---
---
---
---
---
---
MULTIPLE
BIT TRANS-
FER
TIMH
TIMHX
TIML
TEN-MS
TIMER
015
XORL
DOUBLE
EXCLU-
SIVE OR
612
036
@XORL
---
---
---
2-214
2-214
TEN-MS
TIMER
551
542
553
LONG
TIMER
XORW
EXCLU-
@XORW ---
SIVE OR
TIMLX
TIMX
TMHH
LONG
TIMER
HUNDRED- 550
MS TIMER
ONE-MS
TIMER
540
CP1E CPU Unit Instructions Reference Manual(W483)
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A-8
Appendices
Immediate
refreshing
specifica-
tion
Z
Upward
differen- differentia-
tiation tion
Downward
Mne-
monic
FUN
No.
Instruction
Page
Immediate
refreshing
specifica-
tion
Upward
differen- differentia-
tiation tion
Downward
Mne-
monic
FUN
No.
Instruction
Page
+L
DOUBLE
SIGNED
BINARY-
ADD WITH-
OUT
401
410
592
@+L
---
---
---
---
---
---
2-158
2-166
2-150
ZCP
088
---
---
---
---
2-105
AREA
RANGE
COM-
PARE
CARRY
-
SIGNED
BINARY
SUB-
TRACTWIT
HOUT
@-
ZCPL
DOUBLE
AREA
RANGE-
COMPARE
116
---
---
2-105
CARRY
--
DECRE-
MENT
BINARY
@--
Symbol
Immediate
refreshing
specifica-
tion
--B
DECRE-
MENT BCD
596
597
@--B
---
---
---
---
2-156
2-156
Upward
differen- differentia-
tiation tion
Downward
Mne-
monic
FUN
No.
Instruction
Page
--BL
DOUBLE
DECRE-
@--BL
7SEG
7-SEG-
MENT DIS-
PLAY
214
---
---
---
---
2-365
MENT BCD
--L
-B
DECRE-
MENT
BINARY
593
414
@--L
@-B
---
---
---
---
2-150
2-172
OUTPU
+
SIGNED
BINARY
ADDWITH-
OUT
400
@+
---
2-158
2-147
BCD SUB-
TRACT
WITHOUT-
CARRY
CARRY
-BC
-BCL
-BL
BCD SUB-
TRACT
WITH-
416
417
415
@-BC
@-BCL
@-BL
---
---
---
---
---
---
2-175
2-175
2-172
++
INCRE-
MENT
BINARY
590
@++
---
---
CARRY
++B
INCRE-
MENT BCD
594
595
@++B
---
---
---
---
2-153
2-153
DOUBLE
BCD SUB-
TRACTWIT
H CARRY
++BL
DOUBLE
INCRE-
MENT BCD
@++BL
DOUBLE
BCD SUB-
TRACTWIT
HOUT
++L
DOUBLE
INCRE-
MENTBI-
NARY
591
@++L
---
---
2-147
CARRY
+B
BCD ADD
WITHOUT
CARRY
404
406
407
@+B
---
---
---
---
---
---
2-162
2-164
2-164
-C
SIGNED
BINARY
SUB-
TRACTWIT
H CARRY
412
413
@-C
---
---
---
---
2-170
2-170
+BC
+BCL
BCD ADD
WITH
CARRY
@+BC
@+BCL
-CL
DOUBLE
SIGNED
BINA-
RYSUB-
TRACT
WITH
@-CL
DOUBLE
BCD ADD
WITH-
CARRY
+BL
+C
DOUBLE
BCD ADD
WITHOUT-
CARRY
405
402
403
@+BL
@+C
---
---
---
---
---
---
2-162
2-160
2-160
CARRY
-F
-L
FLOATING- 455
POINT
SUBTRACT
@-F
@-L
---
---
---
---
2-237
2-166
SIGNED
BINARY
ADD WITH-
CARRY
DOUBLE
SIGNED
BINA-
RYSUB-
TRACT
411
+CL
DOUBLE
SIGNED
BINARY-
ADD WITH
CARRY
@+CL
WITHOUT-
CARRY
*
SIGNED
BINARY
MULTIPLY
420
@*
---
---
---
---
2-177
2-179
+F
FLOATING- 454
POINT ADD
@+F
---
---
2-237
*B
BCD MULTI- 424
PLY
@*B
CP1E CPU Unit Instructions Reference Manual(W483)
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A-9
Appendices
Immediate
refreshing
specifica-
tion
ASCII Code Table
Upward
differen- differentia-
tiation tion
Downward
Mne-
FUN
No.
Instruction
monic
Page
Four leftmost bits
*BL
*F
DOUBLE
BCD MULTI-
PLY
425
@*BL
---
---
---
---
---
---
2-179
FLOATING- 456
POINT
MULTIPLY
@*F
@*L
2-237
2-177
*L
DOUBLE
SIGNED
BINARY-
MULTIPLY
421
/
SIGNED
BINARY
DIVIDE
430
@/
---
---
2-181
/B
BCD
DIVIDE
434
435
@/B
---
---
---
---
2-183
2-183
/BL
DOUBLE
BCD
@/BL
DIVIDE
/F
/L
FLOATING- 457
POINT
DIVIDE
@/F
@/L
---
---
---
---
2-237
2-181
DOUBLE
SIGNED
BINARYDI-
VIDE
431
CP1E CPU Unit Instructions Reference Manual(W483)
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A-10
Revision History
A manual revision code appears as a suffix to the catalog number on the front cover of the manual.
Cat. No. W483-E1-03
Revision code
Revision code
Date
Revised content
01
02
03
March 2009
June 2009
January 2010
Original production
Errors were corrected.
Information added on E10/14, N14/60 and NA20 CPU Units.
Revision-1
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Revision-2
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OMRON Corporation
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In the interest of product improvement,
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OMRON (CHINA) CO., LTD.
Room 2211, Bank of China Tower,
200 Yin Cheng Zhong Road,
OMRON ASIA PACIFIC PTE. LTD.
No. 438A Alexandra Road # 05-05/08 (Lobby 2),
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Cat. No. W483-E1-03
0110
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