National Instruments Network Card SCXI 1121 User Manual

SCXI  
SCXI-1121 User Manual  
Four-Channel Isolated Universal Transducer Module  
for Signal Conditioning  
SCXI-1121 User Manual  
September 1999 Edition  
Part Number 320426C-01  
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Important Information  
Warranty  
The SCXI-1121 is warranted against defects in materials and workmanship for a period of one year from the date of shipment,  
as evidenced by receipts or other documentation. National Instruments will, at its option, repair or replace equipment that  
proves to be defective during the warranty period. This warranty includes parts and labor.  
A Return Material Authorization (RMA) number must be obtained from the factory and clearly marked on the outside of  
the package before any equipment will be accepted for warranty work. National Instruments will pay the shipping costs of  
returning to the owner parts which are covered by warranty.  
National Instruments believes that the information in this document is accurate. The document has been carefully reviewed  
for technical accuracy. In the event that technical or typographical errors exist, National Instruments reserves the right to  
make changes to subsequent editions of this document without prior notice to holders of this edition. The reader should consult  
National Instruments if errors are suspected. In no event shall National Instruments be liable for any damages arising out of  
or related to this document or the information contained in it.  
EXCEPT AS SPECIFIED HEREIN, NATIONAL INSTRUMENTS MAKES NO WARRANTIES, EXPRESS OR IMPLIED, AND SPECIFICALLY DISCLAIMS ANY  
WARRANTY OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. CUSTOMERS RIGHT TO RECOVER DAMAGES CAUSED BY FAULT  
OR NEGLIGENCE ON THE PART OF NATIONAL INSTRUMENTS SHALL BE LIMITED TO THE AMOUNT THERETOFORE PAID BY THE CUSTOMER.  
NATIONAL INSTRUMENTS WILL NOT BE LIABLE FOR DAMAGES RESULTING FROM LOSS OF DATA, PROFITS, USE OF PRODUCTS, OR INCIDENTAL  
OR CONSEQUENTIAL DAMAGES, EVEN IF ADVISED OF THE POSSIBILITY THEREOF. This limitation of the liability of National Instruments  
will apply regardless of the form of action, whether in contract or tort, including negligence. Any action against National  
Instruments must be brought within one year after the cause of action accrues. National Instruments shall not be liable for  
any delay in performance due to causes beyond its reasonable control. The warranty provided herein does not cover damages,  
defects, malfunctions, or service failures caused by owner’s failure to follow the National Instruments installation, operation,  
or maintenance instructions; owner’s modification of the product; owner’s abuse, misuse, or negligent acts; and power failure  
or surges, fire, flood, accident, actions of third parties, or other events outside reasonable control.  
Copyright  
Under the copyright laws, this publication may not be reproduced or transmitted in any form, electronic or mechanical,  
including photocopying, recording, storing in an information retrieval system, or translating, in whole or in part, without  
the prior written consent of National Instruments Corporation.  
Trademarks  
LabVIEW, natinst.com, National Instruments, NI-DAQ, RTSI, and SCXIare trademarks of  
National Instruments Corporation.  
Product and company names mentioned herein are trademarks or trade names of their respective companies.  
WARNING REGARDING USE OF NATIONAL INSTRUMENTS PRODUCTS  
(1) NATIONAL INSTRUMENTS PRODUCTS ARE NOT DESIGNED WITH COMPONENTS AND TESTING  
FOR A LEVEL OF RELIABILITY SUITABLE FOR USE IN OR IN CONNECTION WITH SURGICAL IMPLANTS  
OR AS CRITICAL COMPONENTS IN ANY LIFE SUPPORT SYSTEMS WHOSE FAILURE TO PERFORM CAN  
REASONABLY BE EXPECTED TO CAUSE SIGNIFICANT INJURY TO A HUMAN.  
(2) IN ANY APPLICATION, INCLUDING THE ABOVE, RELIABILITY OF OPERATION OF THE SOFTWARE  
PRODUCTS CAN BE IMPAIRED BY ADVERSE FACTORS, INCLUDING BUT NOT LIMITED TO FLUCTUATIONS  
IN ELECTRICAL POWER SUPPLY, COMPUTER HARDWARE MALFUNCTIONS, COMPUTER OPERATING  
SYSTEM SOFTWARE FITNESS, FITNESS OF COMPILERS AND DEVELOPMENT SOFTWARE USED TO DEVELOP  
AN APPLICATION, INSTALLATION ERRORS, SOFTWARE AND HARDWARE COMPATIBILITY PROBLEMS,  
MALFUNCTIONS OR FAILURES OF ELECTRONIC MONITORING OR CONTROL DEVICES, TRANSIENT  
FAILURES OF ELECTRONIC SYSTEMS (HARDWARE AND/OR SOFTWARE), UNANTICIPATED USES OR  
MISUSES, OR ERRORS ON THE PART OF THE USER OR APPLICATIONS DESIGNER (ADVERSE FACTORS SUCH  
AS THESE ARE HEREAFTER COLLECTIVELY TERMED “SYSTEM FAILURES”). ANY APPLICATION WHERE A  
SYSTEM FAILURE WOULD CREATE A RISK OF HARM TO PROPERTY OR PERSONS (INCLUDING THE RISK OF  
BODILY INJURY AND DEATH) SHOULD NOT BE RELIANT SOLELY UPON ONE FORM OF ELECTRONIC SYSTEM  
DUE TO THE RISK OF SYSTEM FAILURE. TO AVOID DAMAGE, INJURY, OR DEATH, THE USER OR  
APPLICATION DESIGNER MUST TAKE REASONABLY PRUDENT STEPS TO PROTECT AGAINST SYSTEM  
FAILURES, INCLUDING BUT NOT LIMITED TO BACK-UP OR SHUT DOWN MECHANISMS. BECAUSE EACH  
END-USER SYSTEM IS CUSTOMIZED AND DIFFERS FROM NATIONAL INSTRUMENTS' TESTING PLATFORMS  
AND BECAUSE A USER OR APPLICATION DESIGNER MAY USE NATIONAL INSTRUMENTS PRODUCTS IN  
COMBINATION WITH OTHER PRODUCTS IN A MANNER NOT EVALUATED OR CONTEMPLATED BY  
NATIONAL INSTRUMENTS, THE USER OR APPLICATION DESIGNER IS ULTIMATELY RESPONSIBLE FOR  
VERIFYING AND VALIDATING THE SUITABILITY OF NATIONAL INSTRUMENTS PRODUCTS WHENEVER  
NATIONAL INSTRUMENTS PRODUCTS ARE INCORPORATED IN A SYSTEM OR APPLICATION, INCLUDING,  
WITHOUT LIMITATION, THE APPROPRIATE DESIGN, PROCESS AND SAFETY LEVEL OF SUCH SYSTEM OR  
APPLICATION.  
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About This Manual  
Chapter 1  
What Your Kit Should Contain .....................................................................................1-2  
Optional Equipment.......................................................................................................1-4  
Chapter 2  
Rear Signal Connector.....................................................................................2-37  
Rear Signal Connector Signal Descriptions ...................................................2-38  
Analog Output Signal Connections...................................................2-39  
Digital I/O Signal Connections.........................................................2-40  
Timing Requirements and Communication Protocol........................2-42  
Communication Signals ....................................................................2-42  
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Contents  
Chapter 3  
Scanning Modes ............................................................................................................ 3-17  
Single-Module Parallel Scanning.................................................................... 3-17  
Single-Module Multiplexed Scanning.............................................. 3-18  
Chapter 4  
Register Descriptions  
Register Description Format ........................................................................... 4-1  
Chapter 5  
Initialization...................................................................................... 5-3  
Single-Channel Measurements ....................................................................... 5-4  
Direct Measurements........................................................................ 5-4  
Indirect Measurements ..................................................................... 5-5  
Scanning Measurements ................................................................................. 5-7  
1. Data Acquisition Board Setup Programming ............................... 5-7  
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3. Programming the Slot 0 Hardscan Circuitry.................................5-13  
4. Acquisition Enable, Triggering, and Servicing.............................5-14  
Example 1........................................................................................................5-15  
Example 2........................................................................................................5-15  
Example 3........................................................................................................5-16  
Appendix A  
Specifications  
Appendix B  
Rear Signal Connector  
Appendix C  
SCXIbus Connector  
Appendix D  
SCXI-1121 Front Connector  
Appendix E  
SCXI-1121 Cabling  
Appendix F  
Technical Support Resources  
Glossary  
Index  
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Contents  
Figures  
Figure 2-1.  
SCXI-1121 General Parts Locator Diagram......................................... 2-2  
Ground-Referenced Signal Connection with  
Figure 2-4.  
High Common-Mode Voltage .............................................................. 2-21  
Figure 2-14. SCXI-1121 Rear Signal Connector Pin Assignment ............................ 2-39  
Figure 3-6.  
Figure 3-8.  
Analog Output Circuitry ....................................................................... 3-15  
Single-Module Multiplexed Scanning (Direct) .................................... 3-18  
Figure 3-10. Multiple-Module Multiplexed Scanning............................................... 3-19  
Figure C-1.  
SCXIbus Connector Pin Assignment.................................................... C-2  
Figure D-1. SCXI-1121 Front Connector Pin Assignment ...................................... D-2  
Figure E-1.  
SCXI-1340 Installation ......................................................................... E-4  
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Contents  
Figure E-3.  
Figure E-4.  
SCXI-1180 Front Panel Installation......................................................E-10  
Cover Removal......................................................................................E-11  
Tables  
Table 2-10.  
Table 2-11.  
Table 2-12.  
Table 2-15.  
Trimmer Potentiometer and Corresponding Channel ...........................2-27  
Nulling Resistors and Corresponding Channel .....................................2-27  
Jumper Settings of the Nulling Circuits ................................................2-29  
Jumper Settings on the SCXI-1321 Terminal Block.............................2-34  
Data Acquisition Board Pin Equivalences ............................................2-42  
Table 5-1.  
SCXI-1121 Rear Signal Connector Pin Equivalences ..........................5-2  
Table E-1.  
Table E-2.  
Table E-3.  
Table E-4.  
SCXI-1121 and MIO-16 Pinout Equivalences......................................E-2  
SCXI-1341 and SCXI-1344 Pin Translations .......................................E-5  
SCXI-1342 Pin Translations .................................................................E-7  
SCXI-1343 Pin Connections .................................................................E-14  
© National Instruments Corporation  
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About This Manual  
This manual describes the electrical and mechanical aspects of the  
SCXI-1121 and contains information concerning its operation and  
programming. The SCXI-1121 is a member of the National Instruments  
Signal Conditioning eXtensions for Instrumentation (SCXI) Series for the  
National Instruments data acquisition plug-in boards. This board is  
designed for signal conditioning of strain gauges, RTDs, thermistors,  
thermocouples, volt and millivolt sources, and 4 to 20 mA sources or 0 to  
20 mA process-current sources where high common-mode voltages exist.  
The SCXI-1121 operates as four isolated input channels and four isolated  
excitation channels. Each channel is isolated and independently  
configurable via jumpers.  
This manual describes the installation, basic programming considerations,  
and theory of operation for the SCXI-1121.  
Conventions  
The following conventions appear in this manual:  
<>  
Angle brackets that contain numbers separated by an ellipsis represent a  
range of values associated with a bit or signal name—for example,  
DBIO<3..0>.  
This icon denotes a note, which alerts you to important information.  
This icon denotes a caution, which advises you of precautions to take to  
avoid injury, data loss, or a system crash.  
This icon denotes a warning, which advises you of precautions to take to  
avoid being electrically shocked.  
bold  
Bold text denotes items that you must select or click on in the software,  
such as menu items and dialog box options. Bold text also denotes  
parameter names.  
italic  
Italic text denotes variables, emphasis, a cross reference, or an introduction  
to a key concept. This font also denotes text that is a placeholder for a word  
or value that you must supply.  
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About This Manual  
monospace  
Text in this font denotes text or characters that you should enter from the  
keyboard, sections of code, programming examples, and syntax examples.  
This font is also used for the proper names of disk drives, paths, directories,  
programs, subprograms, subroutines, device names, functions, operations,  
variables, filenames and extensions, and code excerpts.  
monospace italic  
Italic text in this font denotes text that is a placeholder for a word or value  
that you must supply.  
Related Documentation  
The following documents contain information that you may find helpful as  
you read this manual:  
AT-MIO-16 User Manual (part number 320476-01)  
AT-MIO-16D User Manual (part number 320489-01)  
AT-MIO-16F-5 User Manual (part number 320266-01)  
AT-MIO-16X User Manual (part number 320488-01)  
AT-MIO-64F-5 User Manual (part number 320487-01)  
Lab-LC User Manual (part number 320380-01)  
Lab-NB User Manual (part number 320174-01)  
Lab-PC User Manual (part number 320205-01)  
Lab-PC+ User Manual (part number 320502-01)  
MC-MIO-16 User Manual, Revisions A to C (part number 320130-01)  
MC-MIO-16 User Manual, Revision D (part number 320560-01)  
NB-MIO-16 User Manual (part number 320295-01)  
NB-MIO-16X User Manual (part number 320157-01)  
PC-LPM-16 User Manual (part number 320287-01)  
SCXI-1000/1001 User Manual (part number 320423-01)  
SCXI-1121 User Manual  
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1
Introduction  
This chapter describes the SCXI-1121; lists the contents of your  
SCXI-1121 kit; describes the optional software, optional equipment, and  
custom cables; and explains how to unpack the SCXI-1121 kit.  
The SCXI-1121 consists of four isolated input channels and four isolated  
excitation channels. The SCXI-1121 is a module for signal conditioning of  
strain gauges, RTDs, thermistors, thermocouples, volt and millivolt  
sources, 4 to 20 mA current sources, and 0 to 20 mA process-current  
sources. The SCXI-1121 can operate in two output modes—the  
Parallel-Output mode with all four input channels connected in parallel to  
four data acquisition board channels, or the Multiplexed-Output mode with  
all four channels multiplexed into a single data acquisition board channel.  
The SCXI-1121 operates with full functionality with National Instruments  
MIO-16 boards. The SCXI-1121 operates with full functionality with the  
Lab-PC+ board in single-chassis SCXI systems. However, the Lab-PC+  
the Lab-PC, the Lab-LC, and the PC-LPM-16 boards with the SCXI-1121,  
but these boards can control only single-chassis SCXI systems and cannot  
scan the module when it is configured in the Multiplexed-Output mode.  
These boards can perform only single-channel reads in this mode. You can  
also use the SCXI-1121 with other systems that comply with the  
specifications given in Chapter 2, Configuration and Installation. You can  
multiplex several SCXI-1121s into a single channel, thus greatly increasing  
the number of analog input signals that can be digitized.  
The addition of a shielded terminal block provides screw terminals for easy  
signal attachment to the SCXI-1121. In addition, a temperature sensor for  
cold-junction compensation of thermocouples is included on the terminal  
block. This cold-junction reference (CJR) is either multiplexed along with  
the four input channels or connected by jumpers to a different channel of  
the data acquisition board.  
With the SCXI-1121, the SCXI chassis can serve as a fast-scanning signal  
conditioner for laboratory testing, production testing, and industrial  
process monitoring.  
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Chapter 1  
Introduction  
What Your Kit Should Contain  
The contents of the SCXI-1121 kit (part number 776572-21) are listed as  
follows:  
Kit Component  
Part Number  
181700-01  
SCXI-1121 module  
SCXI-1121 User Manual  
320426-01  
If your kit is missing any of the components, contact National Instruments.  
Optional Software  
This manual contains complete instructions for directly programming the  
SCXI-1121. You can order separate software packages for controlling the  
SCXI-1121 from National Instruments.  
When you combine the PC, AT, and MC data acquisition boards with the  
SCXI-1121, you can use LabVIEW for Windows or LabWindows for DOS.  
LabVIEW and LabWindows are innovative program development software  
packages for data acquisition and control applications. LabVIEW uses  
graphical programming, whereas LabWindows enhances Microsoft C and  
QuickBASIC. Both packages include extensive libraries for data  
acquisition, instrument control, data analysis, and graphical data  
presentation.  
Your National Instruments data acquisition board is shipped with the  
NI-DAQ software. NI-DAQ has a library of functions that you can call from  
your application programming environment. These functions include  
routines for analog input (A/D conversion), buffered data acquisition  
(high-speed A/D conversion), analog output (D/A conversion), waveform  
generation, digital I/O, counter/timer, SCXI, RTSI, and self-calibration.  
NI-DAQ maintains a consistent software interface among its different  
versions so you can switch between platforms with minimal modifications  
to your code.  
You can also use the SCXI-1121, together with the PC, AT, and MC data  
acquisition boards, with NI-DAQ software for DOS/Windows/  
LabWindows/CVI. NI-DAQ software for DOS/Windows/  
LabWindows/CVI comes with language interfaces for Professional  
BASIC, Turbo Pascal, Turbo C, Turbo C++, Borland C++, and Microsoft C  
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Chapter 1  
Introduction  
for DOS and Visual Basic, Turbo Pascal, Microsoft C with SDK,  
and Borland C++ for Windows. NI-DAQ software for  
DOS/Windows/LabWindows is on high-density 5.25 in. and 3.5 in.  
diskettes.  
You can use the SCXI-1121, together with the Lab-LC or NB Series data  
acquisition boards, with LabVIEW for Macintosh, a software system that  
features interactive graphics, a state-of-the-art user interface, and a  
powerful graphical programming language. The LabVIEW Data  
Acquisition VI Library, a series of VIs for using LabVIEW with National  
Instruments boards, is included with LabVIEW. The LabVIEW Data  
Acquisition VI Library is functionally equivalent to the NI-DAQ software  
for Macintosh.  
You can also use the SCXI-1121, combined with the NB Series data  
acquisition boards, with NI-DAQ software for Macintosh. NI-DAQ  
software for Macintosh, which is shipped with all National Instruments  
Macintosh data acquisition boards, comes with language interfaces for  
MPW C, THINK C, Pascal, and Microsoft QuickBASIC. Any language  
that uses Device Manager Toolbox calls can access NI-DAQ software for  
Macintosh.  
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Chapter 1  
Introduction  
Optional Equipment  
Equipment  
Part Number  
NB6 cable  
0.5 m  
1.0 m  
181305-01  
181305-10  
776573-20  
776573-21  
776573-28  
776573-30  
776574-40  
776574-41  
776574-42  
776574-43  
776574-44  
776574-46  
SCXI-1320 front terminal block  
SCXI-1321 offset-null and shunt-calibration terminal block  
SCXI-1328 high-accuracy isothermal terminal block  
SCXI-1330 32-pin connector-and-shell assembly  
SCXI-1340 cable assembly  
SCXI-1341 Lab-NB/Lab-PC/Lab-PC+ cable assembly  
SCXI-1342 PC-LPM-16 cable assembly  
SCXI-1343 rear screw terminal adapter  
SCXI-1344 Lab-LC cable assembly  
SCXI-1346 shielded multichassis cable adapter  
SCXI-1347 SCXI shielded cable assembly  
with 1 m cable  
776574-471  
776574-472  
776574-475  
776574-470  
with 2 m cable  
with 5 m cable  
with 10 m cable  
SCXI-1349 SCXI shielded cable assembly  
with 1 m cable  
776574-491  
776574-492  
776574-495  
776574-490  
776575-50  
776582-01  
with 2 m cable  
with 5 m cable  
with 10 m cable  
SCXI-1350 multichassis adapter  
SCXI process-current resistor kit  
Standard ribbon cable  
0.5 m  
180524-05  
180524-10  
1.0 m  
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Chapter 1  
Introduction  
Refer to the Signal Connections section in Chapter 2, Configuration and  
Installation, and to Appendix E, SCXI-1121 Cabling, for additional  
information on cabling, connectors, and adapters.  
Custom Cables  
The SCXI-1121 rear signal connector is a 50-pin male ribbon-cable header.  
The manufacturer part number used by National Instruments for this header  
is as follows:  
AMP Inc. (part number 1-103310-0)  
The mating connector for the SCXI-1121 rear signal connector is a  
50-position polarized ribbon-socket connector with strain relief. National  
Instruments uses a polarized or keyed connector to prevent inadvertent  
upside-down connection to the SCXI-1121. Recommended manufacturer  
part numbers for this mating connector are as follows:  
Electronic Products Division/3M (part number 3425-7650)  
T&B/Ansley Corporation (part number 609-5041CE)  
Standard 50-conductor, 28 AWG, stranded ribbon cables that can be used  
with these connectors are as follows:  
Electronic Products Division/3M (part number 3365/50)  
T&B/Ansley Corporation (part number 171-50)  
The SCXI-1121 front connector is a 32-pin DIN C male connector with  
column A and column C even pins only. The manufacturer part number  
used by National Instruments for this connector is as follows:  
Panduit Corporation (part number 100-932-023)  
The mating connector for the SCXI-1121 front connector is a 32-pin DIN C  
female connector. National Instruments uses a polarized connector to  
prevent inadvertent upside-down connection to the SCXI-1121.  
Recommended manufacturer part numbers for this mating connector are as  
follows:  
Panduit Corporation (part number 100-932-434 straight-solder  
eyelet pins)  
Panduit Corporation (part number 100-932-633; right-angle pins)  
National Instruments selected these connectors to meet UL 1950 and  
UL 1244 for 1,500 Vrms isolation.  
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Chapter 1  
Introduction  
Unpacking  
Your SCXI-1121 module is shipped in an antistatic package to prevent  
electrostatic damage to the module. Several components on the module can  
be damaged by electrostatic discharge. To avoid such damage in handling  
the module, take the following precautions.  
Touch the antistatic package to a metal part of your SCXI chassis  
before removing the module from the package.  
Remove the module from the package and inspect the module for loose  
components or any other sign of damage. Notify National Instruments  
if the module appears damaged in any way. Do not install a damaged  
module into your SCXI chassis.  
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2
Configuration and Installation  
This chapter describes the SCXI-1121 jumper configurations, installation  
of the SCXI-1121 into the SCXI chassis, signal connections to the  
SCXI-1121, and cable wiring.  
Module Configuration  
The SCXI-1121 contains 49 jumpers that are shown in the parts locator  
diagrams in Figures 2-1 and 2-2.  
Figure 2-1. SCXI-1121 General Parts Locator Diagram  
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Chapter 2  
Configuration and Installation  
Figure 2-2. SCXI-1121 Detailed Parts Locator Diagram  
The jumpers are used as follows:  
• Fixed jumpers  
On Revision A and B modules, jumper W32 is unused and should  
not be connected.  
Jumper W45 is reserved and should not be reconfigured.  
On Revision A and B modules, jumper W44 carries the  
SLOT0SEL* signal from the rear signal connector, after  
buffering, to the SCXIbus INTR* line and should be left in the  
factory-set position (position 1). On Revision C or later modules,  
jumper W44 does not exist.  
User-configurable jumpers  
Jumper W38 carries the SCXIbus MISO line, after buffering, to  
the SERDATOUT signal on the rear signal connector.  
On Revision C or later modules, jumper W32 connects a pullup  
resistor to the SERDATOUT signal on the rear signal connector.  
Jumper W33 configures the guard, the analog output ground, and  
enables the Pseudodifferential Reference mode.  
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Chapter 2  
Configuration and Installation  
Jumpers W3, W19, W29, and W41 configure the first-stage gain  
of input channels 0 through 3, respectively.  
Jumpers W4, W20, W30, and W42 configure the second-stage  
gain of input channels 0 through 3, respectively.  
Jumpers W5, W21, W31, and W43 configure the first-stage  
filtering of input channels 0 through 3, respectively.  
Jumpers W6 and W7, W8 and W9, W10 and W11, and W12 and  
W13 configure the second-stage filtering of input channels 0  
through 3, respectively.  
Jumpers W14 and W15, W22 and W23, W34 and W35, and W46  
and W47 configure the voltage or current mode of operation for  
excitation channels 0 through 3, respectively.  
Jumpers W16 and W26, W24 and W25, W36 and W37, and W48  
and W49 configure the level of excitation for excitation channels  
0 through 3, respectively.  
Jumpers W1 and W2, W17 and W18, W27 and W28, and W39  
and W40 configure the half-bridge completion network for  
channels 0 through 3, respectively.  
Further configuration of the board is software controlled and will be  
discussed later in this chapter.  
Digital Signal Connections  
The SCXI-1121 has three jumpers dedicated for communication between  
the data acquisition board and the SCXIbus. These jumpers are W32, W38,  
and W44.  
SLOT0SEL* to the SCXIbus INTR* line. This is the factory-default setting  
and should not be changed. In this setting, the data acquisition board  
controls the SCXIbus INTR* line. See the Timing Requirements and  
Communication Protocol section later in this chapter, and Chapter 5,  
Programming, for information on the use of the INTR* line. See  
Appendix E, SCXI-1121 Cabling, for the pin equivalences of the  
SCXI-1121 rear signal connector and the data acquisition board  
I/O connector.  
Position 3 is reserved and should not be used. This position is not explicitly  
marked on the module.  
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Chapter 2  
Configuration and Installation  
On Revision C or later modules, jumper W44 does not exist. SLOT0SEL*  
is always buffered to the INTR* line.  
Position 1 connects, after buffering, the SCXIbus MISO line to the  
SERDATOUT pin of the rear signal connector. In this setting, along with  
the proper setting of W32, the data acquisition board can read the Module  
ID Register of the SCXI-1121. See the Timing Requirements and  
Communication Protocol section later in this chapter, and Chapter 4,  
Register Descriptions, for information on reading the Module ID Register.  
See Appendix E, SCXI-1121 Cabling, for the pin equivalences of the  
SCXI-1121 rear signal connector and the data acquisition board I/O  
connector. This is the factory-default setting.  
Position 3 disconnects SERDATOUT from the SCXIbus MISO line.  
Jumper W32  
On Revision A and B modules, jumper W32 should not be connected. On  
Revision C or later modules, Position 1 connects a 2.2 kpullup resistor  
to the SERDATOUT line (factory-default setting), and Position 3 does not  
connect the pullup resistor to the SERDATOUT line.  
Using Jumpers W32 and W38  
Set jumpers W32 and W38 as follows:  
If the SCXI-1121 is not cabled to a data acquisition board, the positions of  
these jumpers do not matter, so leave them in their factory default positions  
(both in position 1).  
If the SCXI-1121 is cabled to a data acquisition board, and the SCXI  
chassis that the SCXI-1121 is in, is the only SCXI chassis cabled to that  
data acquisition board, leave the jumpers in their factory default positions  
(both in position 1).  
If the SCXI-1121 is cabled to a data acquisition board, and there are  
multiple SCXI chassis cabled to that data acquisition board with shielded  
cables (you are using SCXI-1346 shielded cable multi-chassis adapters),  
leave the jumpers in their factory default positions (both in position 1).  
If the SCXI-1121 is cabled to a data acquisition board, and there are  
multiple SCXI chassis cabled to that data acquisition board with ribbon  
cables (you are using SCXI-1350 multi-chassis adapters), leave jumper  
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W38 in its factory default position (position 1). On all but one of the  
SCXI-1121s that are cabled to the data acquisition board, move jumper  
W32 to position 3. It does not matter which of the SCXI-1121 modules that  
are cabled to the data acquisition board has jumper W32 set to position 1.  
If you have different types of modules cabled to the data acquisition board,  
those different modules will have jumpers similar to W38 and W32 of the  
SCXI-1121. Set those jumpers on the different modules using the same  
method described here for the SCXI-1121.  
On Revision A and B SCXI-1121s, jumper W32 is not used. You set jumper  
W38 as explained in the cases above, except in the case of a multiple  
chassis ribbon cable system. In a multichassis ribbon cable system with  
Revision A and B SCXI-1121s cabled to the data acquisition board, you can  
access the MISO line in only one chassis. Pick one of the chassis and set  
jumper W38 to position 1 on the SCXI-1121 in that chassis that is cabled  
to the data acquisition board. On the SCXI-1121s that are in the other  
chassis and cabled to the data acquisition board, set jumper W38 to  
position 3. Notice that you will only be able to access digital information  
from the chassis that has the SCXI-1121 with jumper W38 set to position 1.  
Table 2-1. Digital Signal Connections, Jumper Settings  
Jumper  
Description  
Configuration  
W38  
Factory setting;  
connects MISO to  
SERDATOUT  
3
2
1
W38  
W45  
Parking position  
Factory setting  
3
2
1
3
2
1
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Chapter 2  
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Table 2-1. Digital Signal Connections, Jumper Settings (Continued)  
Jumper  
Description  
Configuration  
W44  
W32  
W32  
Factory setting  
(Revision A and B  
modules only)  
3
2
1
Fatory-defaultsetting;  
connects pullup to  
SERDATOUT  
3
2
(Revision C and later)  
1
Parking position (not  
connected on  
Revision A or B  
modules)  
3
2
1
Analog Configuration  
The SCXI-1121 has 45 analog configuration jumpers.  
Before starting, notice that the jumper configurations for each input  
channel and each excitation channel are similar only the jumper numbers  
differ. Therefore, when you learn how to set up one channel pair (input and  
excitation), you can set up the other channel pairs as well.  
Grounding, Shielding, and Reference Mode  
Selection  
Jumper W33  
Position AB-R0 connects the analog reference to the analog output ground  
(pins 1 and 2 on the rear signal connector). Select this configuration if you  
are using an RSE data acquisition board. It is not recommended to use a  
differential input data acquisition board when jumper W33 is in the AB-R0  
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Position AB-R1 connects the analog reference to the SCXIbus guard.  
Position A-R0R1 is the parking position and the factory setting.  
Position AB-R2 enables the Pseudodifferential Reference mode and  
connects the analog reference to the OUTREF pin on the rear signal  
connector. Select this mode when the SCXI-1121 has to operate with data  
acquisition boards that have a nonreferenced single-ended (NRSE) input. It  
is not recommended to use differential-input data acquisition boards when  
jumper W33 is in the AB-R2 position.  
Table 2-2. Jumper W33 Settings  
Jumper  
Description  
Configuration  
W33  
Factory setting in  
parking position  
A
B
R2 R 1 R 0  
W33  
W33  
W33  
Connects the  
analog reference to  
AOGND (pins 1  
and 2 of the rear  
signal connector)  
A
B
R2 R 1 R 0  
Connects SCXIbus  
guard to the analog  
reference  
A
B
R2 R 1 R 0  
Enables the  
Pseudodifferential  
Reference mode  
(pin 19 of the rear  
signal connector is  
connected to the  
analog reference)  
A
B
R2 R 1 R 0  
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Chapter 2  
Configuration and Installation  
Input Channel Jumpers  
Gain Jumpers  
Each input channel has two gain stages. The first gain stage provides gains  
of 1, 10, 50, and 100 and the second stage provides gains of 1, 2, 5, 10, and  
20. Tables 2-3 and 2-4 show how to set up the gain for each channel.  
Table 2-3. Gain Jumper Allocation  
Input Channel  
Number  
First Gain  
Jumper  
Second Gain  
Jumper  
0
1
2
3
W3  
W4  
W19  
W29  
W41  
W20  
W30  
W42  
The board is shipped to you with the first-stage gain set to 100 (position A)  
and a second-stage gain set to 10 (position D). To change the gain of your  
module, move the appropriate jumper on your module to the position  
indicated in Table 2-4. Refer to Figure 2-2 for the jumper locations on your  
module.  
To determine the overall gain of a given channel use the following formula:  
Overall gain = First-stage gain × second-stage gain  
Table 2-4. Gain Jumper Positions  
Gain  
Setting  
Jumper Position  
First-stage  
1
D
10  
C
50  
B
100  
A (factory setting)  
Second-stage  
1
2
A
B
5
C
10  
20  
D (factory setting)  
E
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Filter Jumpers  
Two-stage filtering is also available on your SCXI-1121 module. The first  
stage is located in the isolated section of the input channel, whereas the  
second stage is located in the nonisolated section of the input channel. This  
permits a higher signal-to-noise ratio by eliminating the noise generated by  
the isolation amplifier. Furthermore, two filter bandwidths are  
available—10 kHz and 4 Hz.  
Table 2-5. Filter Jumper Allocation  
First Filter Jumper  
4 Hz  
Second Filter Jumper  
4 Hz  
Input Channel  
Number  
(Factory Setting)  
10 kHz  
(Factory Setting)  
10kHz  
0
1
2
3
W5-A  
W21-A  
W31-A  
W43-A  
W5-B  
W21-B  
W31-B  
W43-B  
W6  
W8  
W7  
W9  
W10  
W12  
W11  
W13  
Your SCXI-1121 is shipped in the 4 Hz configuration. Always make sure  
to set both stages to the same bandwidth. This will ensure that the required  
bandwidth is achieved.  
Excitation Jumpers  
Current and Voltage Excitation Jumpers  
You can configure each excitation channel of your SCXI-1121 to either a  
Voltage or Current excitation mode. Each channel has two jumpers for this  
purpose. Set both jumpers in the same mode for correct operation of the  
excitation channel. Refer to Table 2-6 for setting up your module in the  
mode you want. Your SCXI-1121 is shipped to you in the Voltage mode.  
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Table 2-6. Voltage and Current Mode Excitation Jumper Setup  
Excitation  
Channel  
Voltage Mode  
(Factory Setting)  
Jumpers  
Current Mode  
0
1
2
3
W14 and W15  
W14  
2
W15  
2
W14  
2
W15  
2
1
1
1
1
3
3
3
3
1
1
1
1
3
3
3
3
1
1
1
1
3
3
3
3
1
1
1
1
3
3
3
3
W22 and W23  
W34 and W35  
W46 and W47  
W22  
2
W23  
2
W22  
2
W23  
2
W34  
2
W35  
2
W34  
2
W35  
2
W46  
2
W47  
2
W46  
2
W47  
2
Excitation Level  
Each excitation channel of your SCXI-1121 has two different current or  
voltage levels. You can set a given channel to one of the following level  
modes:  
In the Current mode 0.150 or 0.450 mA  
In the Voltage mode 3.333 or 10 V  
It is important to notice that you should select the level of excitation  
according to the load you are using. Table 2-7 lists the maximum load that  
can be driven per channel at each level of excitation for both volt and  
current excitation.  
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Table 2-7. Maximum Load per Excitation Channel  
Excitation Level  
3.333 V  
Maximum Load  
28 mA  
10 V  
14 mA  
10 kΩ  
10 kΩ  
0.150 mA  
0.450 mA  
After selecting the excitation mode of operation desired—Voltage or  
Current—as described in the previous section, use Table 2-8 to set your  
SCXI-1121 for the level of operation. Your SCXI-1121 is shipped with the  
Voltage mode set to 3.333 V.  
Table 2-8. Excitation Level Jumper Selection  
Excitation  
Channel  
3.333 V or 0.150 mA  
(Factory Setting)  
Jumpers  
10 V or 0.450 mA  
0
W16 and W26  
W26  
W26  
W16  
2
W16  
2
1
2
3
1
2
3
1
3
1
3
1
2
3
W24 and W25  
W36 and W37  
W48 and W49  
W24  
W25  
W24  
W25  
1
1
1
2
3
3
3
1
1
1
2
3
3
3
1
1
1
2
3
3
3
1
1
1
2
3
3
3
W36  
W37  
W36  
W37  
2
2
2
2
W48  
W49  
W48  
W49  
2
2
2
2
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Chapter 2  
Configuration and Installation  
Using the Internal Half-Bridge Completion  
Your SCXI-1121 includes half-bridge completion for half-bridge and  
quarter-bridge setups. The completion network consists of two  
4.5 k± 0.05% ratio tolerance resistors with a temperature coefficient of  
5 ppm/°C. These resistors are connected in series. To enable the network,  
you must set two jumpers for each input/excitation channel pair.  
When the completion network is enabled, you cannot access the negative  
input of the amplifier, which preserves the overvoltage protection of the  
channel. Table 2-9 shows how to enable and disable the completion  
network.  
Note When using the half-bridge completion network with a quarter-bridge setup, you  
must use an extra resistor to complete the bridge. Place this resistor on the terminal block  
between the positive input channel and the negative excitation output.  
Table 2-9. Completion Network Jumpers  
Disable Network  
Channel  
Jumpers  
Enable Completion  
(Factory Setting)  
0
W1 and W2  
W2  
W2  
A
B
A
B
W1  
W1  
1
2
3
1
2
3
1
W17 and W18  
W18  
W18  
A
B
A
B
W17  
W17  
1
2
3
1
2
3
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Table 2-9. Completion Network Jumpers (Continued)  
Disable Network  
(Factory Setting)  
Channel  
Jumpers  
Enable Completion  
2
W27 and W28  
W28  
W28  
A
B
A
B
W27  
W27  
1
2
3
1
2
3
3
W39 and W40  
W40  
W40  
A
B
A
B
W39  
W39  
1
2
3
1
2
3
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Chapter 2  
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Hardware Installation  
You can install the SCXI-1121 in any available SCXI chassis. After you  
have made any necessary changes and have verified and recorded the  
jumper settings on the form in Appendix G, Technical Support Resources,  
you are ready to install the SCXI-1121. The following are general  
installation instructions consult the user manual or technical reference  
manual of your SCXI chassis for specific instructions and warnings.  
1. Turn off the computer that contains the data acquisition board or  
disconnect it from your SCXI chassis.  
2. Turn off the SCXI chassis. Do not insert the SCXI-1121 into a chassis  
that is turned on.  
3. Insert the SCXI-1121 into the board guides. Gently guide the module  
into the back of the slot until the connectors make good contact. If a  
cable assembly has already been installed in the rear of the chassis, the  
module and cable assembly must be firmly engaged; however, do not  
force the module into place.  
4. Screw the front mounting panel of the SCXI-1121 to the top and  
bottom threaded strips of your SCXI chassis.  
5. If this module is to be connected to an MIO-16 data acquisition board,  
attach the connector at the metal end of the SCXI-1340 cable assembly  
to the rear signal connector on the SCXI-1121 module. Screw the rear  
panel to the rear threaded strip. Attach the loose end of the cable to the  
MIO-16 board.  
Note For installation procedures with other SCXI accessories and data acquisition boards,  
consult Appendix E, SCXI-1121 Cabling.  
6. Check the installation.  
7. Turn on the SCXI chassis.  
8. Turn on the computer or reconnect it to your chassis.  
The SCXI-1121 module is installed and ready for operation.  
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Chapter 2  
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Signal Connections  
This section describes the input and output signal connections to the  
SCXI-1121 board via the SCXI-1121 front connector and rear signal  
connector, and includes specifications and connection instructions for the  
signals given on the SCXI-1121 connectors.  
Cautions Do not operate the device in an explosive atmosphere or where there may be  
flammable gasses or fumes.  
Keep away from live circuits. Do not remove equipment covers or shields unless you are  
trained to do so. If signal wires are connected to the device, hazardous voltages may exist  
even when the equipment is turned off. To avoid a shock hazard, do not perform procedures  
involving cover or shield removal unless you are qualified to do so and disconnect all field  
power prior to removing covers or shields.  
Equipment described in this document must be used in an Installation Category II  
environment per IEC 60664. This category requires local level supply mains-connected  
installation.  
Do not operate damaged equipment. The safety protection features built into this device  
can become impaired if the device becomes damaged in any way. If the device is damaged,  
turn the device off and do not use until service-trained personnel can check its safety. If  
necessary, return the device to National Instruments for service and repair to ensure that its  
safety is not compromised.  
Do not operate this equipment in a manner that contradicts the information specified in this  
document. Misuse of this equipment could result in a shock hazard.  
Terminals are for use only with equipment that has no accessible live parts.  
Do not substitute parts or modify equipment. Because of the danger of introducing  
additional hazards, do not install unauthorized parts or modify the device. Return the  
device to National Instruments for service and repair to ensure that its safety features are  
not compromised.  
When using the device with high common-mode voltages, you must insulate your signal  
wires for the highest input voltage. National Instruments is not liable for any damages or  
injuries resulting from inadequate signal wire insulation. Use only 26-14 AWG wire with  
a voltage rating of 300 V and 60 °C for measuring 250 V. Prepare your signal wire by  
stripping the insulation no more than 7 mm.  
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When connecting or disconnecting signal lines to the SCXI terminal block screw terminals,  
make sure the lines are powered off. Potential differences between the lines and the SCXI  
ground create a shock hazard while you connect the lines.  
Connect the signal wires to the screw terminals by inserting the stripped end of the wire  
fully into the terminals. Tighten the terminals to a torque of 5 to 7 in.-lb.  
Connections, including power signals to ground and vice versa, that exceed any of the  
maximum signal ratings on the SCXI device can create a shock or fire hazard or can  
damage any or all of the boards connected to the SCXI chassis, the host computer, and the  
SCXI device. National Instruments is not liable for any damages or injuries resulting from  
incorrect signal connections.  
If high voltages (30 Vrms and 42.4 V peak or 60 VDC) are present, you must connect a  
safety earth ground wire to the terminal block safety ground solder lug. This complies with  
safety agency requirements and protects against electric shock when the terminal block is  
not connected to the chassis. To connect the safety earth ground to the safety ground solder  
lug, run an earth ground wire in the cable from the signal source to the terminal block.  
National Instruments is not liable for any damages or injuries resulting from inadequate  
safety earth ground connections.  
Do not loosen or re-orient the safety ground solder lug hardware when connecting the  
safety ground wire. To do so reduces the safety isolation between the high voltage and  
safety ground.  
Clean devices and terminal blocks by brushing off light dust with a soft, nonmetallic brush.  
Remove other contaminants with deionized water and a stiff nonmetallic brush. The unit  
must be completely dry and free from contaminants before returning to service.  
Use only National Instruments TBX Series cable assemblies with high-voltage TBX Series  
terminal blocks.  
Front Connector  
Figure 2-3 shows the pin assignments for the SCXI-1121 front connector.  
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Chapter 2  
Configuration and Installation  
Pin  
Number  
Signal  
Name  
Column  
B
Signal  
Name  
A
C
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
10  
9
CH0+  
CH0–  
EX0+  
EX0+  
EGND0  
CH1+  
CH1–  
EX1–  
EX1+  
EGND1  
CH2+  
EX2+  
CH2–  
EX2–  
EGND2  
CH3+  
CH3–  
EX3–  
EX3+  
EGND3  
8
RSVD  
7
SCAL  
+5 V  
RSVD  
6
5
MTEMP  
DTEMP  
4
3
CGND  
2
1
Figure 2-3. SCXI-1121 Front Connector Pin Assignment  
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Chapter 2  
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Front Connector Signal Descriptions  
Pin  
Signal Name  
Description  
A2  
C2  
CGND  
Chassis Ground—This pin is tied to the SCXI chassis.  
DTEMP  
+5 V  
Direct Temperature Sensor—This pin connects the  
temperature sensor to the MCH4+ when the terminal block  
is configured for direct temperature connection.  
A4  
+5 VDC Source—This pin is used to power the  
temperature sensor on the terminal block. 0.2 mA of source  
not protected.  
C4  
A6  
MTEMP  
SCAL  
Multiplexed Temperature Sensor—This pin connects the  
temperature sensor to the output multiplexer.  
Shunt Calibration—This pin is tied to the SCAL bit and is  
used to control the SCXI-1321 shunt calibration switch.  
CMOS/TTL output not protected.  
C6, C8  
RSVD  
No Connect  
EGND3  
EX3+  
Reserved—These pins are reserved. Do not connect any  
signal to these pins.  
A8, C10, C16,  
C22, C28  
Do not connect any signal to these pins.  
A10  
A12  
C12  
A14  
C14  
A16  
A18  
C18  
Excitation Ground 3—This pin connects to the excitation  
ground 3 via a 51 kresistor.  
Positive Excitation Output 3—This pin is connected to the  
excitation channel 3 positive output.  
EX3–  
Negative Excitation Output 3—This pin is connected to the  
excitation channel 3 negative output.  
CH3+  
Positive Input Channel 3—This pin is connected to the  
input channel 3 positive input.  
CH3–  
Negative Input Channel 3—This pin is connected to the  
input channel 3 negative input.  
EGND2  
EX2+  
Excitation Ground 2—This pin connects to the excitation  
ground 2 via a 51 kresistor.  
Positive Excitation Output 2—This pin is connected to the  
excitation channel 2 positive output.  
EX2–  
Negative Excitation Output 2—This pin is connected to the  
excitation channel 2 negative output.  
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Pin  
Signal Name  
CH2+  
Description  
A20  
C20  
A22  
A24  
C24  
A26  
C26  
A28  
A30  
C30  
A32  
C32  
Positive Input Channel 2—This pin is connected to the  
input channel 2 positive input.  
CH2–  
EGND1  
EX1+  
EX1–  
CH1+  
CH1–  
EGND0  
EX0+  
EX0–  
CH0+  
CH0–  
Negative Input Channel 2—This pin is connected to the  
input channel 2 negative input.  
Excitation Ground 1—This pin connects to the excitation  
ground 1 via a 51 kresistor.  
Positive Excitation Output 1—This pin is connected to the  
excitation channel 1 positive output.  
Negative Excitation Output 1—This pin is connected to the  
excitation channel 1 negative output.  
Positive Input Channel 1—This pin is connected to the  
input channel 1 positive input.  
Negative Input Channel 1—This pin is connected to the  
input channel 1 negative input.  
Excitation Ground 0—This pin connects to the excitation  
ground 0 via a 51 kresistor.  
Positive Excitation Output 0—This pin is connected to the  
excitation channel 0 positive output.  
Negative Excitation Output 0—This pin is connected to the  
excitation channel 0 negative output.  
Positive Input Channel 0—This pin is connected to the  
input channel 0 positive input.  
Negative Input Channel 0—This pin is connected to the  
input channel 0 negative input.  
The signals on the front connector are all analog except pins A6, C6, and  
C8, which are digital controls. These analog signals can be divided into  
three groups—the analog input channels, the excitation channels, and the  
temperature sensor.  
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Chapter 2  
Configuration and Installation  
Analog Input Channels  
The positive input channels are located in column A. Their corresponding  
negative input channels are located in column C. Each input corresponds to  
earth ground. The inputs are designed in a floating single-ended  
level with common-mode voltage up to 250 Vrms. For better noise  
immunity, connect the negative input channel to the signal reference. If the  
measured signals are floating, connect the negative input channel to chassis  
ground on the terminal block. Figure 2-4 shows how to connect a  
ground-referenced signal. Figure 2-5 shows how to connect a floating  
signal. Figures 2-6 and 2-7 show how to connect AC-coupled signals.  
+
+
+
V
s
Vout  
+
High  
CMV  
Vcm  
Module  
Figure 2-4. Ground-Referenced Signal Connection with High Common-Mode Voltage  
+
+
+
Vout  
V
s
Module  
Figure 2-5. Floating Signal Connection Referenced to Chassis Ground for Better  
Signal-to-Noise Ratio  
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Chapter 2  
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+
+
Vout  
+
V
s
Rbias  
Module  
Figure 2-6. Floating AC-Coupled Signal Connection  
+
+
+
Vout  
Rbias  
V
s
+
High  
CMV  
V
cm  
Module  
Figure 2-7. AC-Coupled Signal Connection with High Common-Mode Voltage  
For AC-coupled signals, you should connect an external resistor from the  
positive input channel to the signal reference. This is needed to provide the  
DC path for the positive input bias current. Typical resistor values range  
from 100 kto 1 M. This solution, although necessary in this case, lowers  
the input impedance of the input channel amplifier and introduces an  
additional offset voltage proportional to the input bias current and to the  
resistor value used. The typical input bias current of the amplifier consists  
of ±80 pA and a negligible offset drift current. When a 100 kresistor is  
used, this will result into ±8 µV of offset, which is insignificant in most  
applications. However, if larger resistors are used, significant input offset  
may result. To determine the maximum offset introduced by the biasing  
resistor, use the following equation:  
Vofsbias = Ibias × Rbias  
The input signal range of an SCXI-1121 input channel is ±5 V/ Gtotal  
referenced to its negative input, where Gtotal is equal to the product of the  
first-stage and second-stage gains. In addition, the input channels are  
overvoltage protected to 250 Vrms with power on or off at a maximum of  
4.5 mArms sink or source.  
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Warning Exceeding the input signal range and the common-mode input range results in  
distorted signals. Exceeding the maximum input voltage rating (250 Vrms between positive  
and negative terminals and between any terminal and earth ground) can damage the  
SCXI-1121, the SCXIbus, and the DAQ board. National Instruments is not liable for any  
damages or injuries resulting from such signal connections.  
Excitation Channels  
Four fully isolated excitation channels are available. Each excitation  
channel corresponds to an input channel. A 250 Vrms isolation barrier exists  
between two corresponding channels (for example, between input  
channel 0 and excitation channel 0). In addition, the excitation outputs are  
overvoltage protected to 250 Vrms with current foldback.  
Warning Exceeding the overvoltage protection or isolation rating on the excitation output  
can damage the SCXI-1121, the SCXIbus, and the DAQ board. National Instruments is not  
liable for any damages or injuries resulting from such signal connections.  
Temperature Sensor Connection  
Pins C2 and C4 are dedicated for connecting the temperature sensor to the  
SCXI-1121. The temperature sensor is not isolated and is referenced to  
chassis ground. The connection is overvoltage-protected to ±25 VDC with  
power on and ±15 VDC with power off.  
Warning Exceeding the overvoltage protection on the temperature connections can  
damage the SCXI-1121, the SCXIbus, and the DAQ board. National Instruments is not  
Connector-and-Shell Assembly  
Two types of signal connectors are available to connect the transducers to  
the SCXI-1121 inputs. The first, the SCXI-1330 32-pin DIN C female  
connector-and-shell assembly, is available in a kit listed in the Optional  
Equipment section in Chapter 1, Introduction. The connector has eyelet  
your own signal cable to connect to the SCXI-1121 inputs. After you have  
built the cable, the shell covers and protects the connector. Perform the  
following steps to assemble and mount the connector-and-shell assembly  
to your SCXI module:  
1. Refer to Figure 2-8, Assembling and Mounting the SCXI-1330  
Connector-and-Shell Assembly, and the diagram included with your  
SCXI-1330 kit to build the connector-and-shell assembly.  
2. Turn off the computer that contains your DAQ board or disconnect the  
board from your SCXI chassis.  
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3. Turn off your SCXI chassis.  
4. Slide the selected module out of the SCXI chassis.  
5. Remove the module cover.  
6. Place one jack screw on the SCXI-1121 as indicated in Figure 2-8.  
7. While holding the jack screw in place, insert the lock washer and then  
the nut. Notice that you might need long-nose pliers to insert the  
washer and nut.  
8. Tighten the nut by holding it firmly and rotating the jack screw.  
9. Repeat steps 6 through 8 for the second jack screw.  
10. Replace the module cover and tighten the grounding screw.  
11. Slide the module back in place.  
12. Connect the SCXI-1330 to your module connector and secure it by  
tightening both mounting screws.  
Shell Assembly  
Mounting Screw  
Connector  
Jack  
Screws  
SCXI-1121 Module  
Nut  
Lock Washers  
Nut  
Shell Assembly  
Grounding Screw  
Mounting Screw  
Figure 2-8. Assembling and Mounting the SCXI-1330 Connector-and-Shell Assembly  
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SCXI-1320, SCXI-1328, and SCXI-1321  
The second type of connector available to connect the transducers to the  
SCXI-1121 inputs is a terminal block with an onboard temperature sensor  
and screw terminals for easy connection. One terminal block, the  
SCXI-1328 isothermal terminal block, has a high-accuracy onboard  
temperature sensor. The terminal block kits are listed in the Optional  
Equipment section in Chapter 1, Introduction.  
The terminal blocks consist of a shielded board with supports for  
connection to the SCXI-1121 input connector. The terminal blocks have  
18 screw terminals for easy connection. Four pairs of screw terminals are  
for signal connection to the four inputs of the SCXI-1121, four pairs are for  
the excitation channels, and one pair of screw terminals connects to the  
chassis ground.  
The following warnings contain important safety information concerning  
hazardous voltages and terminal blocks.  
Warnings When using the terminal block with high common-mode voltages, you must  
insulate your signal wires appropriately. National Instruments is not liable for any damages  
or injuries resulting from inadequate signal wire insulation.  
If high voltages (42 Vrms) are present, you must connect the safety earth ground to the  
strain-relief tab. This complies with UL 1244 and protects against electric shock when the  
terminal block is not connected to the chassis. To connect the safety earth ground to the  
strain-relief tab, run an earth ground wire in the cable from the signal source to the terminal  
block. National Instruments is not liable for any damages or injuries resulting from  
inadequate safety earth ground connections.  
SCXI-1320 and SCXI-1328 Terminal Blocks  
When connecting your signals to the SCXI-1320 terminal block for use  
with the SCXI-1121, follow the labeling on the SCXI-1320 indicated under  
the module type column for the SCXI-1121 as indicated in Figure 2-11.  
When connecting your signals to the SCXI-1328 high-accuracy isothermal  
terminal block for use with the SCXI-1121, follow the labeling on the  
SCXI-1328 indicated along the module type row for the SCXI-1121 as  
indicated in Figure 2-12.  
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SCXI-1321 Offset-Null and Shunt-Calibration Terminal Block  
The SCXI-1321 terminal block operates only with Revision C and later  
SCXI-1121 modules.  
In addition to the 18 screw terminals, the SCXI-1321 has circuitry for  
offset-null adjust of Wheatstone bridges as well as a shunt resistor for  
strain-gauge shunt calibration. This terminal block works especially well  
with bridge-type transducers such as strain gauges. The SCXI-1321 can  
also easily accommodate thermocouples, RTDs, thermistors, millivolt  
sources, volt sources, and current-loop receivers.  
SCXI-1321 Nulling Circuitry  
The nulling circuitry operates with full-bridge, half-bridge, quarter-bridge,  
and strain-gauge configurations. Each channel has its own nulling circuitry  
and its own trimming potentiometer as listed in Table 2-10.  
Table 2-10. Trimmer Potentiometer and Corresponding Channel  
Channel Number  
Trimmer Potentiometer  
0
1
2
3
R1  
R2  
R14  
R15  
To null the static offset voltage of the bridge, use the following procedure:  
1. Configure your bridge to the selected channel.  
2. Select and read the channel output.  
3. While monitoring the output, rotate the trimmer wiper with a flathead  
screwdriver until you reach 0 V.  
You have nulled your bridge and are ready for a measurement.  
The nulling range for your terminal block is ±2.5 mV, assuming that you  
have a 120 strain gauge and 3.333 V excitation voltage. You can change  
this range by replacing the nulling resistor with a resistor of another value.  
Each channel has an independent nulling resistor. You can therefore mix  
your ranges to accommodate each channel requirement. Table 2-11 lists the  
nulling resistors and their corresponding channels.  
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Table 2-11. Nulling Resistors and Corresponding Channel  
Channel Number  
Nulling Resistor  
0
1
2
3
R3  
R5  
R7  
R9  
The value of all the nulling resistors on your terminal block is 39 k. Notice  
that these resistors are socketed for easy replacement. These sockets best fit  
a 1/4 W resistor lead size.  
To determine your nulling range, use the following formula (refer to  
Figure 2-9 for visual help):  
Vexc  
Vnullingrange = ± --------- – ----------------------------------------------------------  
RnullRg + Rd(Rnull + Rg)  
VexcRd(Rnull + Rg)  
2
where  
Rg is the nominal strain-gauge resistance value.  
Rd is either a completion resistor or a second strain-gauge nominal  
resistance.  
R
V
null is the nulling resistor value.  
exc is the excitation voltage (3.333 or 10 V).  
For example, assuming:  
exc = 3.333 V  
V
Rg = 120 Ω  
Rd = 120 Ω  
R
V
null = 39 kΩ  
nulling = ±2.56 mV  
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Assuming a strain-gauge range with a gauge factor of GF = 2 and a  
quarter-bridge configuration, this range corresponds to ±1,498 µε as given  
by the strain formula for a quarter-bridge strain-gauge configuration:  
–4Vr  
ε = -------------------------------  
GF(1 + 2Vr)  
where  
strained voltage static unstrained voltage  
Vr = -------------------------------------------------------------------------------------------------------  
Vexc  
EX+  
Rg  
R
R
Rnull  
Trimmer  
Potentiometer  
CH+  
CH–  
Rd  
SCXI-1321  
EX–  
Figure 2-9. Nulling Circuit  
Using the SCXI-1321 with RTDs and Thermistors  
When using this terminal block with RTDs or thermistor-type transducers  
and with the SCXI-1121 excitation set in the Current mode, you must  
disable the nulling circuit of the channel of interest. You can do this in two  
steps:  
1. Place the enable/disable jumper in position D (disable) as shown in  
Table 2-12.  
2. Remove the nulling resistor from its sockets.  
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Table 2-12. Jumper Settings of the Nulling Circuits  
Jumper  
Position  
Description  
Nulling circuit of Channel 0 is enabled;  
factory setting  
D
E
W1  
W2  
W3  
W4  
Nulling circuit of Channel 0 is disabled  
D
E
Nulling circuit of Channel 1 is enabled;  
factory setting  
D
E
Nulling circuit of Channel 1 is disabled  
D
E
Nulling circuit of Channel 2 is enabled;  
factory setting  
D
E
Nulling circuit of Channel 2 is disabled  
D
E
Nulling circuit of Channel 3 is enabled;  
factory setting  
D
E
Nulling circuit of Channel 3 is disabled  
D
E
SCXI-1121 Shunt Calibration  
Shunt calibration circuits are independent from each other but are  
controlled together. In other words, when SCAL is set to 1 on the  
SCXI-1121, all the shunt switches close when SCAL is cleared to 0, all the  
switches open. At startup or reset, all switches are open. This shunt  
calibration circuitry configuration places a shunting resistor in parallel with  
the strain gauge as shown in Figure 2-10.  
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EX+  
R
SCAL  
Rg  
R
RSCAL  
CH+  
CH–  
SCXI-1321  
R
EX–  
Figure 2-10. Shunt Circuit  
The shunting resistors RSCAL are socketed so that you can replace them with  
a resistor of another value to achieve the required changes. The RSCAL  
resistors on your terminal block have a 301 k±1% value.  
Assuming a quarter-bridge strain-gauge configuration with a gauge factor  
of GF = 2, the equivalent strain change introduced by the RSCAL shunting  
resistor is –199 µε. Determine the change as follows:  
1. Determine the change caused by the shunting resistor using the  
following formula:  
VexcRd(RSCAL + Rg)  
Vchange = ---------------------------------------------------------- – ---------  
RSCAL + Rd(RSCAL + Rg)  
Vexc  
2
2. Using the appropriate strain-gauge strain formula, and assuming that  
you have no static voltage, determine the equivalent strain that the  
R
SCAL should produce. For example, RSCAL = 301 kand a  
quarter-bridge 120 strain gauge with a gauge factor of GF = 2 and  
exc = 3.333 V and R = 120 produces the following result:  
V
Vchange = 0.3321 mV  
Replacing the strained voltage with Vchange in the quarter-bridge strain  
equation produces an equivalent –199 µε of change.  
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Terminal Block Temperature Sensor  
To accommodate thermocouples with the SCXI-1121, the terminal block  
has an onboard temperature sensor for cold-junction compensation. You  
can connect this temperature sensor in two ways:  
You can connect the temperature sensor to the MTEMP pin (C4) on the  
module front connector and multiplex the sensor at the output  
multiplexer along with the amplifier outputs. This is the Multiplexed  
Temperature Sensor (MTS) mode. Refer to the Configuration Register  
section in Chapter 4, Register Descriptions, for further details.  
You can connect the temperature sensor to a separate data acquisition  
channel via MCH4± (pins 11 and 12 on the module rear signal  
connector). This is the Direct Temperature Sensor (DTS) mode.  
Note Use an average of a large number of samples to obtain the most accurate reading.  
Noisy environments require more samples for greater accuracy.  
The SCXI-1320 and SCXI-1321 temperature sensors output 10 mV/°C and  
have an accuracy of ±1 °C over the 0 to 55 °C temperature range. To  
determine the temperature, use the following formulas:  
T(°C) = 100(VTEMPOUT  
)
[T(°C)]9  
T(°F) = ---------------------- + 3 2  
5
where VTEMPOUT is the temperature sensor output and T (°F) and T (°C) are  
the temperature readings in degrees Fahrenheit and degrees Celsius,  
respectively.  
The SCXI-1328 temperature sensor outputs 0.62 to 0.07 V from 0 to 55 °C  
and has an accuracy of ±0.35 °C over the 15 to 35 °C range and ±0.65 °C  
over the 0 to 15 °C and 35 to 55 °C ranges. To determine the temperature,  
use the following formulas:  
T(°C) = TK – 273.15  
where TK is the temperature in kelvin  
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1
TK = --------------------------------------------------------------  
[a + b( lnRT) + c( lnRT)3]  
a = 1.288 x 10–3  
b = 2.356 x 10–4  
c = 9.556 x 10–8  
RT = resistance of the thermistor in Ω  
VTEMPOUT  
--------------------------------------  
RT = 50,000  
2.5 – VTEMPOUT  
VTEMPOUT = output voltage of the temperature sensor  
[T(°C)]9  
T(°F) = ---------------------- + 3 2  
5
where T (°F) and T (°C) are the temperature readings in degrees Fahrenheit  
and degrees Celsius, respectively.  
Terminal Block Jumper Configuration  
In addition to the screw terminals, the terminal block has one jumper for  
configuring the onboard temperature sensor. When you set jumper W1 on  
the SCXI-1320 or SCXI-1328 (jumper W5 on the SCXI-1321) to the  
MTEMP position, the jumper connects the temperature sensor output to the  
SCXI-1121 output multiplexer. This is the factory setting. The DTEMP  
position of jumper W1 (jumper W5 on the SCXI-1321) connects the  
temperature sensor to the SCXI-1121 MCH4+ signal on the rear signal  
connector.  
In both MTS and DTS modes, the reference to the temperature sensor  
signal is the SCXI-1121 analog ground that is connected to MCH0– in the  
MTS mode and to MCH4– in the DTS mode. Notice that MCH4– is  
continuously connected to the SCXI-1121 ground, whereas MCH0– is  
switched through the output multiplexer.  
One jumper block comprises both positions; therefore, you can use only  
one type of configuration at a time. The parking position for the jumper  
block is in the MTEMP position (the temperature sensor is disabled until  
the RTEMP bit in the Configuration Register selects the sensor).  
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Tables 2-13, 2-14, and 2-15 show the jumper settings on the SCXI-1320,  
SCXI-1328, and SCXI-1321 terminal blocks.  
Table 2-13. Jumper Settings on the SCXI-1320 Terminal Block  
Jumper  
Position  
Description  
W1  
MTS mode selected; factory  
setting; parking position  
MTEMP  
DTEMP  
W1  
DTS mode selected  
MTEMP  
DTEMP  
Table 2-14. Jumper Settings on the SCXI-1328 Terminal Block  
Jumper  
Position  
Description  
W1  
MTS mode selected; factory  
setting; parking position  
DTEMP  
DTEMP  
MTEMP  
MTEMP  
W1  
DTS mode selected  
Table 2-15. Jumper Settings on the SCXI-1321 Terminal Block  
Jumper  
Position  
Description  
W5  
MTS mode selected;  
factory setting; parking  
position  
DTEMP  
DTEMP  
MTEMP  
MTEMP  
W5  
DTS mode selected  
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Terminal Block Signal Connection  
Warnings The chassis GND terminals on your terminal block are for grounding high  
impedance sources such as a floating source (1 mA maximum). Do not use these terminals  
as safety earth grounds.  
If high voltages (42 Vrms) are present, you must connect the safety earth ground to the  
strain-relief tab. This complies with UL 1244 and fully protects against electric shock when  
the terminal block is not connected to the chassis. To connect the safety earth ground to the  
strain-relief tab, run an earth ground wire in the cable from the signal source to the terminal  
block. National Instruments is not liable for any damages or injuries resulting from  
inadequate safety earth ground connections.  
Shock Hazard—This unit should only be opened by qualified personnel aware of the  
dangers involved. Disconnect all power before removing cover. Always install grounding  
screw.  
To connect the signal to the terminal block, use the following procedure:  
1. Remove the grounding screw of the top cover.  
2. Snap out the top cover of the shield by placing a screwdriver in the  
3. Slide the signal wires, one at a time, through the front panel  
strain-relief opening. You can add padding or insulation if necessary.  
4. Connect the wires to the screw terminals. For thermistor and RTD  
connection, follow the procedure stated in the Using the SCXI-1321  
with RTDs and Thermistors section earlier in this chapter.  
5. Tighten the larger strain-relief screws.  
6. Snap the top cover back in place.  
7. Reinsert the grounding screw to ensure proper shielding.  
8. Connect the terminal block to the SCXI-1121 front connector as  
explained in the Terminal Block Installation section later in this  
chapter.  
Figure 2-11 shows a parts locator diagram for the SCXI-1320 terminal  
block. Figure 2-12 shows a parts locator diagram for the SCXI-1328  
terminal block. Figure 2-13 shows a parts locator diagram for the  
SCXI-1321 terminal block.  
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Figure 2-11. SCXI-1320 Parts Locator Diagram  
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Figure 2-12. SCXI-1328 Parts Locator Diagram  
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Figure 2-13. SCXI-1321 Parts Locator Diagram  
Terminal Block Installation  
To connect the terminal block to the SCXI-1121 front connector, perform  
the following steps:  
1. Connect the SCXI-1121 front connector to its mating connector on the  
terminal block.  
2. Make sure that the SCXI-1121 top and bottom thumbscrews do not  
obstruct the rear panel of the terminal block.  
3. Tighten the top and bottom screws on the back of the terminal block to  
hold it securely in place.  
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Rear Signal Connector  
Note If you are using the SCXI-1121 with a National Instruments data acquisition board  
and cable assembly, you do not need to read the remainder of this chapter. If you are using  
the SCXI-1180 feedthrough panel, the SCXI-1343 rear screw terminal adapter, or the  
SCXI-1351 one-slot cable extender with the SCXI-1121, you should read this section.  
Figure 2-14 shows the pin assignments for the SCXI-1121 rear signal  
connector.  
1
3
5
7
9
2
4
AOGND  
MCH0+  
MCH1+  
AOGND  
MCH0–  
MCH1–  
MCH2–  
MCH3–  
MCH4–  
6
8
MCH2+  
MCH3+  
MCH4+  
10  
11 12  
13 14  
15 16  
17 18  
19 20  
21 22  
23 24  
25 26  
27 28  
29 30  
31 32  
33 34  
35 36  
37 38  
39 40  
41 42  
43 44  
45 46  
47 48  
49 50  
OUTREF  
DIG GND  
SERDATOUT  
SERDATIN  
DAQD*/A  
SLOT0SEL*  
DIG GND  
SERCLK  
SCANCLK  
RSVD  
Figure 2-14. SCXI-1121 Rear Signal Connector Pin Assignment  
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Rear Signal Connector Signal Descriptions  
Pin  
Signal Name  
Description  
1-2  
AOGND  
Analog Output Ground—These pins are connected to the analog  
reference when jumper W33 is in position AB-R0.  
3-12  
19  
MCH0± through  
MCH4±  
Analog Output Channels 0 through 4—Connects to the data  
acquisition board differential analog input channels.  
OUTREF  
Output Reference—This pin serves as the reference node for the  
analog channels output in the Pseudodifferential Reference mode.  
It should be connected to the analog input sense of the NRSE data  
acquisition board.  
24, 33  
DIG GND  
Digital Ground—These pins supply the reference for data  
acquisition board digital signals and are tied to the module digital  
ground.  
25  
26  
27  
SERDATIN  
SERDATOUT  
DAQD*/A  
Serial Data In—This signal taps into the SCXIbus MOSI line to  
provide serial input data to a module or Slot 0.  
Serial Data Out—This signal taps into the SCXIbus MISO line to  
accept serial output data from a module.  
Data Acquisition Board Data/Address Line—This signal taps into  
the SCXIbus D*/A line to indicate to the module whether the  
incoming serial stream is data or address information.  
29  
36  
SLOT0SEL*  
SCANCLK  
Slot 0 Select—This signal taps into the SCXIbus INTR* line to  
indicate whether the information on MOSI is being sent to a  
module or Slot 0.  
Scan Clock—This indicates to the SCXI-1121 that a sample has  
been taken by the data acquisition board and causes the SCXI-1121  
to change channels. See the Timing Requirements and  
Communication Protocol section later in this chapter for more  
detailed information on timing.  
37  
43  
SERCLK  
RSVD  
Serial Clock—This signal taps into the SCXIbus SPICLK line to  
clock the data on the MOSI and MISO lines. See the Timing  
Requirements and Communication Protocol section later in this  
chapter for more detailed information on timing.  
Reserved.  
All other pins are not connected.  
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The signals on the rear signal connector can be classified as analog output  
signals, digital I/O signals, or timing I/O signals. Signal connection  
guidelines for each of these groups are given in the following section.  
Analog Output Signal Connections  
Pins 1 through 12 and pin 19 of the rear signal connector are analog output  
signal pins. Pins 1 and 2 are AOGND signal pins. AOGND is an analog  
output common signal that is routed through jumper W33 to the analog  
reference on the SCXI-1121. You can use these pins for a general analog  
power ground tie point to the SCXI-1121 if necessary. In particular, when  
using differential input data acquisition boards such as the MIO-16 series,  
it is preferable to leave jumper W33 in its factory setting or in position  
AB-R1 to avoid ground loops. With data acquisition boards that are  
configured for referenced single-ended (RSE) measurements, W33 should  
be in position AB-R0 to connect the SCXI-1121 ground to the data  
acquisition analog ground. Pin 19 is the OUTREF pin this pin is connected  
internally to the analog reference when jumper W33 is in position AB-R2.  
Pins 3 through 12 are the analog output channels of the SCXI-1121. Pins 3  
temperature sensor output. Pins 5 through 10 or MCH1± through MCH3±  
are a parallel connection of input channels 1 through 3 to the rear signal  
connector. Pins 11 and 12 or MCH4± are a direct connection of the  
temperature sensor. Notice that the temperature sensor is located on the  
terminal block. For further details on configuring the temperature sensor  
output, refer to the SCXI-1320, SCXI-1328, and SCXI-1321  
Terminal Blocks section earlier in this chapter.  
Warning The SCXI-1121 analog outputs are not overvoltage-protected. Applying external  
voltages to these outputs can damage the SCXI-1121. National Instruments is not liable for  
any damages resulting from such signal connections.  
Note The SCXI-1121 analog outputs are short-circuit protected.  
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Chapter 2  
Configuration and Installation  
Digital I/O Signal Connections  
Pins 24 through 27, 29, 33, 36, 37, and 43 constitute the digital I/O lines of  
the rear signal connector. They are divided into three categories—the  
digital input signals, the digital output signals, and the digital timing  
signals.  
The digital input signals are pins 24, 25, 27, 29, 33, and 37. The data  
acquisition board uses these pins to configure an SCXI module that is under  
data acquisition board control. Each digital line emulates the SCXIbus  
communication signals as follows:  
Pin 25 is SERDATIN and is equivalent to the SCXIbus MOSI serial  
data input line.  
Pin 27 is DAQD*/A and is equivalent to the SCXIbus D*/A line. It  
indicates to the module whether the incoming serial stream on  
SERDATIN is data (DAQD*/A = 0), or address (DAQD*/A = 1)  
information.  
Pin 29 is SLOT0SEL* and is equivalent to the SCXIbus INTR* line. It  
indicates whether the data on the SERDATIN line is being sent to  
Slot 0 (SLOT0SEL* = 0) or to a module (SLOT0SEL* = 1).  
Pins 24 and 33 are the digital ground references for the data acquisition  
board digital signals and are tied to the module digital ground.  
Pin 37 is SERCLK and is equivalent to the SCXIbus SPICLK line and  
is used to clock the serial data on the SERDATIN line into the module  
registers.  
The digital output signal is pin 26.  
Pin 26 is SERDATOUT and is equivalent to SCXIbus MISO when  
jumper W38 is in position 1.  
The digital input and output signals of the SCXI-1121 match the digital I/O  
lines of the MIO-16 board. When used with an SCXI-1341, SCXI-1342, or  
SCXI-1344 cable assembly, the SCXI-1121 signals match the digital lines  
of the Lab-NB/Lab-PC/Lab-PC+/Lab-LC boards and the PC-LPM-16  
board, respectively. Table 2-16 lists the equivalences. For more  
information, consult Appendix E, SCXI-1121 Cabling.  
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Table 2-16. SCXIbus to SCXI-1121 Rear Signal Connector to Data Acquisition Board Pin Equivalences  
SCXI-1121  
Rear Signal  
Connector  
Lab-NB/Lab-PC  
Lab-PC+/Lab-LC  
SCXIbus Line  
MOSI  
MIO-16  
ADIO0  
PC-LPM-16  
DOUT4  
DOUT5  
DOUT6  
DOUT7  
DIN6  
SERDATIN  
DAQD*/A  
PB4  
PB5  
PB6  
PB7  
PC1  
D*/A  
ADIO1  
INTR*  
SLOT0SEL*  
SERCLK  
ADIO2  
SPICLK  
MISO  
EXTSTROBE*  
BDIO0  
SERDATOUT  
The digital timing signals are pins 36 and 43.  
Pin 36 is used as a clock by the SCXI-1121 to increment the  
MUXCOUNTER after each conversion by the data acquisition board  
during scanning. This signal is referred to as SCANCLK. See  
Chapter 3, Theory of Operation, for a description of MUXCOUNTER.  
Pin 43 is a reserved digital input.  
The following specifications and ratings apply to the digital I/O lines.  
Absolute maximum voltage  
Input rating  
5.5 V with respect to DIG GND  
Digital input specifications (referenced to DIG GND):  
V
V
IH input logic high voltage  
IL input logic low voltage  
2 V minimum  
0.8 V maximum  
II input current leakage  
±1 µA maximum  
Digital output specifications (referenced to DIG GND):  
V
V
OH output logic high voltage 3.7 V minimum at 4 mA maximum  
OL output logic low voltage  
0.4 V maximum at 4 mA maximum  
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Chapter 2  
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Timing Signal  
The data acquisition timing signal is SCANCLK.  
SCANCLK is used to increment MUXCOUNTER on its rising edge.  
Figure 2-15 shows the timing requirements of the SCANCLK signal. These  
requirements will ensure that SCANCLK is properly transmitted over  
TRIG0.  
T
high  
T
low  
SCANCLK  
Tlow  
Time low before rising edge  
Time high before falling edge  
400 nsec minimum  
250 nsec minimum  
Thigh  
Figure 2-15. SCANCLK Timing Requirements  
For output selection time specifications, refer to Appendix A,  
Specifications.  
Communication Signals  
This section describes the methods for communicating on the Serial  
Peripheral Interface (SPI) bus and their timing requirements. The  
communication signals are SERDATIN, DAQD*/A, SLOT0SEL*,  
SERDATOUT, and SERCLK. Furthermore, SS* is produced by Slot 0  
according to data acquisition board programming, and SS* timing  
relationships will also be discussed. For information on the Slot 0  
Slot-Select Register, consult Chapter 4, Register Descriptions.  
The data acquisition board determines to which slot it will talk by writing  
a slot-select number to Slot 0. In the case of an SCXI-1001 chassis, this  
write also determines to which chassis the data acquisition board will talk.  
Writing a slot-select number is also used in programming the Slot 0  
hardscan circuitry. See Chapter 5, Programming, for information on  
programming the Slot 0 hardscan circuitry.  
The following sections detail the procedure for selecting a slot in a  
particular chassis. Figure 2-16 illustrates the timing of this procedure with  
the example case of selecting Slot 11 in Chassis 9. Notice that the  
factory-default chassis address for the SCXI-1000 is address 0. For  
information on changing the address of your chassis, consult the  
SCXI-1000/1001 User Manual. An SCXI-1000 chassis will respond to any  
chassis number.  
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SLOT0SEL*  
T
ss_dis  
SS*X  
Chassis Y  
SS*11  
Chassis 9  
T
clk_wait  
T
ss_en  
SERCLK  
T
slot0sel*_wait  
SERDATIN  
0
1
0
0
1
1
0
1
1
Chassis ID = 9  
SLOT0SEL* low to SS* disabled  
SLOT0SEL* low to first rising edge on SERCLK  
Last rising edge on SERCLK to SLOT0SEL* high  
SLOT0SEL* high to SS* enabled  
Slot 11  
Tss _ dis  
200 nsec maximum  
75 nsec minimum  
250 nsec minimum  
350 nsec maximum  
Tclk _ wait  
Tslot0sel* _ wait  
Tss _ en  
Figure 2-16. Slot-Select Timing Diagram  
To write the 16-bit slot-select number to Slot 0, follow these steps:  
1. Initial conditions:  
SERDATIN = don't care  
DAQD*/A = don't care  
SLOT0SEL* = 1  
SERCLK = 1  
2. Clear SLOT0SEL* to 0. This will deassert all SS* lines to all modules  
in all chassis.  
3. For each bit, starting with the most significant bit, perform the  
following action:  
a. SERDATIN = bit to be sent. These bits are the data that is being  
written to the Slot-Select Register.  
b. SERCLK = 0  
c. SERCLK = 1. This rising edge clocks the data.  
4. Set SLOT0SEL* to 1. This will assert the SS* line of the module  
whose slot number was written to Slot 0. If multiple chassis are being  
used, only the appropriate slot in the chassis whose address  
corresponds to the written chassis number will be selected. When no  
communication is taking place between the data acquisition board and  
any modules, it is recommended that 0 be written to the Slot-Select  
Register to ensure that no accidental writes occur.  
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Figure 2-17 shows the timing requirements on the SERCLK and  
SERDATIN signals. You must observe these timing requirements for all  
communications. Tdelay is a specification of the SCXI-1121.  
T
high  
T
low  
SERCLK  
SERDATIN  
T
setup  
T
hold  
T
delay  
SERDATOUT  
Tlow  
Minimum low time  
65 nsec minimum  
400 nsec minimum  
200 nsec minimum  
200 nsec minimum  
350 nsec maximum  
Thigh  
Tsetup  
Thold  
Tdelay  
Minimum high time  
SERDATIN setup time  
SERDATIN hold time  
SERDATOUT delay  
Figure 2-17. Serial Data Timing Diagram  
After the Slot-Select line to an SCXI-1121 has been asserted, you can write  
to its Configuration Register and read from its Module ID Register by  
following the protocols given below. The contents of the Module ID  
Register are reinitialized by deasserting Slot-Select. After the 32 bits of  
data are read from the Module ID Register, further data will be zeros until  
reinitialization occurs.  
To write to the Configuration Register, follow these steps:  
1. Initial conditions:  
SS* asserted low  
SERDATIN = don't care  
DAQD*/A = 0 (indicates data will be written to Configuration  
Register)  
SLOT0SEL* = 1  
SERCLK = 1 (and has not transitioned since SS* went low)  
2. For each bit to be written:  
Establish the desired SERDATIN level corresponding to this bit.  
SERCLK = 0  
SERCLK = 1. Clock the data.  
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3. Pull SLOT0SEL* low to deassert the SS* line and establish conditions  
for writing a new slot-select number to the Slot 0 Slot-Select Register.  
4. If you are not selecting another slot, you should write zero to the Slot  
0 Slot-Select Register.  
Figure 2-18 illustrates a write to the SCXI-1121 Configuration Register of  
the binary pattern:  
10000011 00001111  
SLOT0SEL*  
SS*  
SERCLK  
SERDATIN  
1
0
0
0
0
0
1
1
0
0
0
0
1
1
1
1
Figure 2-18. Configuration Register Write Timing Diagram  
To read from the Module ID Register, follow these steps:  
1. Initial conditions:  
SS* asserted low  
SERDATIN = don't care  
DAQD*/A = 1. Make sure DAQD*/A does not go low or erroneous  
data will be written to the Configuration Register.  
SLOT0SEL* = 1  
SERCLK = 1 (and has not changed since SS* went low)  
2. For each bit to be read:  
SERCLK = 0  
SERCLK = 1. Clock the data.  
Read the level of the SERDATOUT line.  
3. Pull SLOT0SEL* low to deassert the SS* line and establish conditions  
for writing a new slot- select number to the Slot 0 Slot-Select Register.  
4. If you are not selecting another slot, you should write zero to the Slot 0  
Slot-Select Register.  
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Figure 2-19 illustrates a read of the SCXI-1121 Module ID Register.  
SLOT0SEL*  
SS*  
SERCLK  
Tdelay  
SERDATOUT  
0 0 0 0 00 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0  
byte 3 = 0  
Tdelay  
SS* high to SERDATOUT high  
350 nsec maximum  
Figure 2-19. SCXI-1121 Module ID Register Timing Diagram  
For further details on programming these signals, refer to Chapter 5,  
Programming.  
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3
Theory of Operation  
This chapter contains a functional overview of the SCXI-1121 module and  
explains the operation of each functional unit making up the SCXI-1121.  
Functional Overview  
The block diagram in Figure 3-1 illustrates the key functional components  
of the SCXI-1121.  
SCXIbus  
Isolated Section  
Nonisolated  
Section  
Input channel 0  
+
+
Digital  
Interface  
and  
+
+
Control  
Excitation 0  
Timing  
and  
Analog  
Output  
Stage  
Input channel 3  
+
+
+
Excitation 3  
Temperature sensor  
Figure 3-1. SCXI-1121 Block Diagram  
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Chapter 3  
Theory of Operation  
The major components of the SCXI-1121 are as follows:  
SCXIbus connector  
Digital interface  
Digital control circuitry  
Timing and analog circuitry  
The SCXI-1121 consists of four isolated amplifier channels with gains of  
1, 2, 5, 10, 20, 50, 100, 200, 500, 1,000, and 2,000, and four isolated  
excitation channels with voltage or current excitation. The SCXI-1121 also  
has a digital section for automatic control of channel scanning, for  
temperature selection, and for MUXCOUNTER clock selection.  
The theory of operation for each of these components is explained in the  
rest of this chapter.  
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SCXIbus Connector  
Figure 3-2 shows the pin assignments for the SCXIbus connector.  
A1  
B1  
A2  
B2  
D1  
C1  
D2  
C2  
GUARD  
GUARD  
GUARD  
AB0+  
GUARD  
GUARD  
GUARD  
AB0–  
A3  
B3  
A4  
D3  
C3  
D4  
GUARD  
GUARD  
GUARD  
GUARD  
GUARD  
GUARD  
B4  
C4  
A5  
B5  
A6  
D5  
C5  
D6  
GUARD  
GUARD  
GUARD  
GUARD  
GUARD  
GUARD  
B6  
C6  
A7  
D7  
B7  
C7  
A8  
D8  
B8  
C8  
A9  
D9  
B9  
C9  
A10  
B10  
A11  
B11  
A12  
B12  
A13  
B13  
A14  
B14  
A15  
B15  
A16  
B16  
A17  
B17  
A18  
B18  
A19  
B19  
A20  
B20  
A21  
B21  
A22  
B22  
A23  
B23  
A24  
B24  
D10  
C10  
D11  
C11  
D12  
C12  
D13  
C13  
D14  
C14  
D15  
C15  
D16  
C16  
D17  
C17  
D18  
C18  
D19  
C19  
D20  
C20  
D21  
C21  
D22  
C22  
D23  
C23  
D24  
C24  
CHSGND  
CHSGND  
CHSGND  
CHSGND  
CHSGND  
RSVD  
INTR*  
D*/A  
V–  
V–  
CHSGND  
CHSGND  
V+  
V+  
+5 V  
RESET*  
MISO  
V–  
V–  
CHSGND  
CHSGND  
V+  
V+  
+5 V  
SPICLK  
TRIG0  
SS*  
MOSI  
SCANCON  
Figure 3-2. SCXIbus Connector Pin Assignment  
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SCXIbus Connector Signal Descriptions  
Pin  
Signal Name  
Description  
A1, B1, C1, D1, A2,  
D2,A3, B3, C3, D3, A4,  
D4, A5, B5, C5, D5, A6, D6  
GUARD  
Guard—Shields and guards the analog bus lines  
from noise.  
B2  
AB0+  
Analog Bus 0+ —Positive analog bus 0 line. Used  
to multiplex several modules to one analog signal.  
C2  
AB0–  
Analog Bus 0– —Negative analog bus 0 line. Used  
to multiplex several modules to one analog signal.  
C13-C17, A21, B21, C21,  
D21  
CHSGND  
Chassis Ground—Digital and analog ground  
reference.  
C18  
A19  
RSVD  
Reserved.  
RESET*  
Reset—When pulled low, reinitializes the module  
to its power-up state. Totem pole. Input.  
B19  
C19  
MISO  
D*/A  
Master-In Slave-Out—Transmits data from the  
module to the SCXIbus. Open collector. I/O.  
Data/Address—Indicates to the module whether  
address information or data information is being  
sent to the module on MOSI. Open collector. I/O.  
D19  
INTR*  
Interrupt—Active low. Causes data that is on  
MOSI to be written to the Slot-Select Register in  
Slot 0. Open collector. Output.  
A20, B20, C20, D20  
A22, B22, C22, D22  
A23, D23  
V–  
Negative Analog Supply— –18.5 to –25 V.  
Positive Analog Supply— +18.5 to +25 V.  
+5 VDC Source—Digital power supply.  
V+  
+5 V  
SPICLK  
B23  
Serial Peripheral Interface (SPI) Clock—Clocks  
the serial data on the MOSI and MISO lines. Open  
collector. I/O.  
C23  
MOSI  
Master-Out Slave-In—Transmits data from the  
SCXIbus to the module. Open collector. I/O.  
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Pin  
Signal Name  
Description  
A24  
TRIG0  
TRIG0—General-purpose trigger line used by the  
SCXI-1121 to send SCANCLK to other modules  
or receive SCANCLK from other modules. Open  
collector. I/O.  
B24  
C24  
SS*  
Slot Select—When low, enables module  
communications over the SCXIbus. Totem pole.  
Input.  
SCANCON  
Scanning Control—Combination output enable  
and reload signal for scanning operations. Totem  
pole. Input.  
All other pins are not connected.  
MOSI, MISO, SPICLK, and SS* form a synchronous communication link  
that conforms with SPI using an idle-high clock and second-edge data  
latching. D*/A, INTR*, and RESET* are additional control signals.  
When the module is being used in an SCXI-1000 or SCXI-1001 chassis, the  
data acquisition board, via the module rear signal connector, must tap into  
the open-collector backplane signal lines as a master to write to the module.  
The signal connections from the rear signal connector to the backplane are  
shown in Table 3-1.  
Table 3-1. SCXIbus Equivalents for the Rear Signal Connector  
Rear Signal  
Connector Signal  
SERDATIN  
DAQD*/A  
SCXIbus Equivalent  
MOSI  
D*/A  
SLOT0SEL*  
SERCLK  
INTR* Jumper W44 must be set to position 1  
SPICLK  
SERDATOUT  
MISO Jumper W38 must be set to position 1  
The SCXI-1121 module converts the data acquisition board signals to  
open-collector signals on the backplane of the SCXI chassis. In order for  
the data acquisition board to talk to a slot, the board must first assert the SS*  
for that slot. This is done by asserting INTR* low, writing a 16-bit number  
over MOSI corresponding to the desired slot (and chassis if an SCXI-1001  
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chassis is being used), and then releasing INTR* high. At this point, SS* of  
the desired slot is asserted low and the data acquisition board can  
communicate with the module in that slot according to the SPI protocol.  
Digital Interface  
Figure 3-3 shows a diagram of the SCXI-1121 and SCXIbus digital  
interface circuitry.  
SCXIbus  
SERDATIN  
DAQD*/A  
Buffered Serial  
Data  
Digital  
Interface  
SLOT0SEL*  
Buffered Digital  
Signal Controls  
SERCLK  
SERDATOUT  
Figure 3-3. Digital Interface Circuitry Block Diagram  
The digital interface circuitry is divided into a data acquisition section  
and an SCXIbus section. The SCXI-1121 connects to the SCXIbus via a  
4 × 24 metral receptacle and to the data acquisition board via a 50-pin  
ribbon-cable header. The digital interface circuitry buffers the digital  
signals from the data acquisition board and from the SCXIbus and sends  
signals back and forth between the data acquisition board and the SCXIbus.  
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Digital Control Circuitry  
Figure 3-4 diagrams the SCXI-1121 digital control.  
Serial Data Out  
Module ID Register  
Buffered  
Serial Data In  
Input Channel  
Select  
Configuration  
Register  
Buffered Digital  
Control Signals  
Output  
Stage  
Control  
SCANCLK  
Path  
Control  
Hardware  
Scan  
Control  
Figure 3-4. SCXI-1121 Digital Control  
The digital control section consists of the Configuration Register and the  
Module ID Register.  
The Configuration Register is a two-byte, serial-in parallel-out shift  
register. Data is received on the MOSI line from either Slot 0 or the data  
(D*/A low). The Configuration Register provides temperature channel  
selection and channel selection, and configures the SCXI-1121 for  
scanning options. All the control bits are fed into a latch before being  
routed to the rest of the module. The channel-select bits are taken directly  
from the shift register. Complete descriptions of the register bits are given  
in Chapter 4, Register Descriptions. Writes to the Configuration Register  
require the following steps:  
1. SS* goes low, enabling communication with the board.  
2. D*/A goes low, indicating that the information sent on the MOSI line  
is data.  
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3. The serial data is available on MOSI and SPICLK clocks it into the  
register.  
4. SS* goes high and D*/A goes high, indicating an end of  
communication. This action latches the Configuration Register bits.  
When the SCXIbus is reset, all bits in the Configuration Register are  
cleared.  
The Module ID Register connects to MISO on the SCXIbus. The Module  
ID Register is an 8-bit parallel/serial-in serial-out shift register and an SPI  
communication adapter. The contents of the Module ID Register are written  
onto MISO during the first four bytes of transfer after SS* has been asserted  
low. Zeros are written to MISO thereafter until SS* is released and  
reasserted. The SCXI-1121 module ID is hex 00000002.  
The SCXIbus provides analog power (±18.5 VDC) that is regulated on the  
SCXI-1121 to ±15 VDC, a guard, an analog bus (AB0±), and a chassis  
ground (CHSGND). AB0± buses the SCXI-1121 output to other modules  
or receives outputs from other modules via the SCXIbus. Refer to the  
Calibration section later in this chapter for more information. The guard  
guards the analog bus, and can be connected via jumper W33 to the analog  
ground reference or can be left floating (a connection can be made by  
another board).  
The data acquisition board analog input and timing is the interface between  
the SCXI-1121 output and the data acquisition board. This is fully  
described in the following section.  
Analog Input Channels  
Figure 3-5 is a diagram of the analog input block.  
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Input Channel 0  
LPF  
+
To Output  
Stage  
+
+
LPF  
I
+
EX0  
Input Channel 1  
LPF  
+
To Output  
Stage  
+
+
LPF  
LPF  
LPF  
I
+
EX1  
Input Channel 2  
LPF  
+
To Output  
Stage  
+
+
I
+
EX2  
Input Channel 3  
LPF  
+
To Output  
Stage  
+
+
I
+
EX3  
MTEMP  
DTEMP  
Figure 3-5. Analog Input Block Diagram  
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Theory of Operation  
The analog input consists of four isolated single-ended noninverting  
amplifiers. In addition, lowpass filtering is available at the inputs. You can  
jumper select one of two bandwidths, 10 kHz or 4 Hz. The amplifier gain  
is divided into two stages, a first stage providing gains of 1, 10, 50, and 100,  
and a second stage providing gains of 1, 2, 5, 10, and 20. Also, the module  
has an internal completion network that can be used with half-bridge or  
quarter-bridge networks. Each channel is configurable to a different  
bandwidth, gain, or completion network operation.  
Use the following formula to determine the overall gain of a given amplifier  
input channel:  
Gtotal = G1st × G2nd  
where Gtotal is the overall gain and G1st and G2nd are the first and  
second-stage gains. It is important to note that the choice of gain in each  
stage will affect the amplifier bandwidth. To determine the bandwidth of a  
given gain stage use the following formula:  
GBWP  
BW = -----------------  
G
where BW is a given amplifier stage bandwidth, GBWP is the gain  
bandwidth product (typically 800 kHz), and G is the gain at this stage. This  
BW might be of concern at high first-stage gains such as 50 and 100. In this  
case the first-stage amplifier has a BW equal to 16 kHz and 8 kHz,  
respectively. Because of this decrease in the amplifier bandwidth, the  
channel overall bandwidth decreases, but noise immunity improves. If this  
bandwidth limitation is unacceptable, you should spread the gains over  
both stages, thus increasing the BW of each amplifier stage. In most cases  
this will introduce a negligible effect on the channel bandwidth. For  
example, to achieve a gain of 100, use G1st = 10 and G2nd = 10 for a gain of  
1,000 use G1st = 50 and G2nd = 20.  
All the amplifier input channels are overvoltage-protected to 240 Vrms with  
power on or off.  
The isolated amplifiers fulfill two purposes on the SCXI-1121 module.  
They convert a small signal riding on a high common-mode voltage into a  
single-ended signal with respect to the SCXI-1121 chassis ground. With  
this conversion, the input analog signal can be extracted from a high  
common-mode voltage or noise before being sampled and converted by the  
data acquisition board. The isolated amplifier also amplifies and conditions  
an input signal, which results in an increase in measurement resolution and  
accuracy.  
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After isolation, further filtering is available to increase the noise immunity  
of the amplifier channel. It is important to note that the overall amplifier  
bandwidth is determined by both filtering stages, so to achieve the required  
bandwidth, both filtering sections should be set the same, as indicated in  
Chapter 2, Configuration and Installation.  
Excitation Output Channels  
In addition to the four input channels, the SCXI-1121 contains four fully  
isolated excitation channels, each corresponding to an input channel. For  
instance, input channel 0 corresponds to excitation channel 0. Each  
excitation channel consists of a voltage/current source with overvoltage  
protection and current limiting. Two levels of excitation are available for  
each mode of operation. In the voltage mode you can set the level to  
3.333 V or 10 V in the current mode you can set the level to 150 µA or  
450 µA. You can choose one configuration out of the four available. To  
configure the excitation channels refer to Chapter 2, Configuration and  
Installation. The excitation channels are isolated from each other and are  
independently configurable for voltage or current excitation.  
Calibration  
Calibration Equipment Requirements  
For best measurement results, calibrate the SCXI-1121 so that its offset is  
adjusted to 0 ± 3 mV RTO and 0 ± 6 µV RTI and its excitation output is  
adjusted to ±0.04%. According to standard practice, the equipment used to  
calibrate the SCXI-1121 should be 10 times as accurate as the SCXI-1121,  
that is, have 0.004% rated accuracy. Practically speaking, calibration  
equipment with four times the accuracy of the item under calibration is  
generally considered acceptable. Four times the SCXI-1121 accuracy is  
0.016%. To calibrate the SCXI-1121 you need the following equipment:  
For the excitation channels, you need a voltmeter with the following  
specifications:  
Accuracy: ±0.004% standard  
±0.016% sufficient  
Range:  
0 to +5 V for 3.333 V and greater than +10 V for 10 V  
Resolution: 5 1/2 digits  
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You also need a 120 1/4 W precision resistor with tempco less than  
or equal to 5 ppm, or an ammeter with the following specifications:  
Accuracy: ±0.004% standard  
±0.016% sufficient  
Range:  
0.5 mA  
Resolution: 6 1/2 digits  
If you use the resistor to calibrate the current excitation, you also need  
an ohmmeter with four-wire measurement and the following  
specifications:  
Accuracy: ±0.004% standard  
±0.016% sufficient  
Range:  
200 Ω  
Resolution: 5 1/2 digits  
A multiranging 5 1/2-digit digital multimeter can provide you with most of  
the necessary functions described previously. We will refer to the  
measuring instrument as a digital multimeter (DMM).  
Each channel on the SCXI-1121 has two potentiometers dedicated for  
calibration. For the amplifier channels, one potentiometer is used to null the  
output offset; the other is used to null the input offset. On the excitation  
channels, one potentiometer is used to adjust the voltage reference, while  
the other is used to adjust the current source.  
Offset Null Adjust  
Follow these steps to null the offset of the amplifier channels:  
1. Short the inputs of the DMM together and then connect them to chassis  
ground.  
2. Record the measurement indicated by the DMM display. This is the  
DMM inherent offset and should be subtracted from subsequent  
measurements.  
3. Short the channel inputs of interest together and then to chassis  
ground.  
4. Set the amplifier gain to 1.  
5. Connect the amplifier output to the DMM. Make sure that the DMM  
can achieve the accuracy and resolution you need.  
6. Adjust the output potentiometer of the channel of interest until the  
output is 0 ± 3 mV.  
7. Set the amplifier gain to 1,000.  
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8. Adjust the input potentiometer of the channel of interest until the  
output is 0 ± 6 mV.  
9. Go to the next channel.  
To avoid erroneous results when nulling the amplifier, follow these steps in  
the order indicated.  
Excitation Adjust  
When calibrating the excitation channels, you should always start with the  
voltage excitation and then proceed to the current excitation, because the  
voltage excitation reference is used as a voltage reference for the current  
excitation. The following procedure will show you how to recalibrate your  
module excitation channel to the factory-calibration setting.  
1. Connect a 120 precision resistor to the output of your excitation  
channel. Before connecting this resistor, measure it with a four-wire  
ohmmeter and record the exact value you have measured.  
2. Set up the excitation channel of interest to 3.333 V excitation level.  
3. Connect your DMM leads to the excitation output as close as possible  
to the resistor body.  
4. Adjust the excitation voltage potentiometer until you read  
3.333 V ± 0.04%.  
5. Set up your channel for 150 µA excitation level.  
6. Adjust the excitation current potentiometer until you read  
(150 µA x R120) V ± 0.04%, where R120 is the measured value of the  
precision resistor.  
7. Go to the next channel.  
If you are using an ammeter to calibrate the current excitation level, you do  
not need a low-tempco resistor a simple 120 , 1%, 1/4 W, 100 ppm,  
metal-film resistor will do, and you do not need to measure the resistor.  
After following the previous procedure through step 4, follow these steps:  
1. Remove the resistor from the excitation channel.  
2. Set up your channel for 150 µA excitation level.  
3. Connect the ammeter leads to the excitation channel output.  
4. Adjust the excitation current potentiometer until you read  
150 µA ± 0.04%.  
5. Go to the next channel.  
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This procedure calibrates the 10 V and 450 µA levels at the same time but  
the accuracy achieved is limited to ±0.2%. To achieve better accuracies at  
these levels, follow the procedure indicated above but set the excitation  
levels to 10 V and to 450 µA instead of 3.333 V and 150 µA. If you do so,  
the lower excitation levels of this channel will then be calibrated to ±0.2%  
instead of to 0.04%. In the factory, the module is calibrated for 3.333 V and  
150 µA.  
You can seal the potentiometers after calibration with antisabotage lacquer  
to avoid tampering with the calibration.  
Table 3-2 lists the potentiometer reference designators that correspond to  
each channel.  
Table 3-2. Calibration Potentiometer Reference Designators  
Amplifier Channel Excitation Channel  
Input Channel  
Number  
Input Null  
Output Null  
Voltage Mode  
Current Mode  
0
1
2
3
R2  
R3  
R4  
R5  
R6  
R10  
R20  
R30  
R40  
R7  
R16  
R26  
R36  
R17  
R27  
R37  
The resistor used to calibrate the current level must be a precision type with  
a tempco of 5 ppm or less. You should measure and record the resistor value  
before each calibration procedure. The DMM you are using should provide  
you with the required resolution and accuracy to achieve the calibration  
levels indicated in the paragraphs above. Annual or semi-annual calibration  
is recommended to maintain the accuracy level.  
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Analog Output Circuitry  
Figure 3-6 shows the SCXI-1121 analog output circuitry.  
SCXIbus  
Output  
AB0  
Stage  
Control  
Switch  
Channel 0  
Output  
Mux  
MCH0+  
MCH0–  
Channel 1  
Channel 2  
Channel 3  
Buffer  
MTEMP  
From MCH1+  
Channel 1  
MCH1–  
Output Stage and  
Hardware Scan Control  
From MCH2+  
Channel 2  
MCH2–  
Analog  
From  
Reference  
MCH3+  
Channel 3  
MCH3–  
MCH4+  
MCH4–  
DTEMP  
Figure 3-6. Analog Output Circuitry  
The SCXI-1121 output circuitry consists of a buffered-output multiplexer  
and channel-select hardware. The channel-select hardware consists of a  
two-bit counter, MUXCOUNTER. This counter is needed when the board  
is operating in the Multiplexed-Output Mode. The counter output is sent to  
the multiplexer address pins to determine which of the four channels is to  
be connected to MCH0. In the Single-Channel Read mode, the  
MUXCOUNTER is loaded with the desired channel number. In the  
Scanning mode, the counter is loaded with the first channel to be read.  
During the scan, the counter is clocked by SCANCLK from the data  
acquisition board, or TRIG0 from the SCXIbus, depending on the state of  
the CLKSELECT bit in the Configuration Register. During scanning  
operations, the MUXCOUNTER is reloaded with the channel value stored  
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in the Configuration Register when SCANCON is high (inactive) and will  
count upwards on each rising clock edge when SCANCON is low (active).  
In the Parallel-Output Mode, the MUXCOUNTER is disabled and its  
output indicates binary 00 hence, amplifier channel 0 is selected at the  
output multiplexer and is connected to MCH0. The three other channels are  
hardwired to MCH1 through MCH3 on the rear signal connector.  
The output multiplexer multiplexes all four amplifier outputs and the  
temperature sensor reading provided on the MTEMP line. To read the  
temperature sensor when it is multiplexed with the other input channels, set  
the RTEMP bit of the Configuration Register high. This measurement is  
only software controlled. For hardware control of the temperature sensor  
reading, connect the temperature sensor to MCH4+. Notice that MCH4–,  
the DTS reference, is hardwired to the chassis ground. The multiplexer  
output connects to the MCH0± and is connected to the data acquisition  
board analog channel input. In the case of the MIO data acquisition boards,  
MCH0± on the rear signal connector corresponds to ACH0 and ACH8.  
Furthermore, you can bus the multiplexed output of the SCXI-1121 via  
switches to AB0± on the SCXIbus and on to other modules. When you use  
multiple modules, you can bus the output of the module via AB0 to the  
module that is connected to the data acquisition board. In this case, the AB0  
switches of all the modules are closed, whereas the output multiplexer of  
all the modules but the one being read are disabled. Refer to Chapters 2  
and 5 for further details on how to configure and program multiple  
modules.  
In addition to the Multiplexed-Output mode described in the previous  
paragraph, you can operate the SCXI-1121 in Parallel-Output mode. In this  
mode, you need no software—other than software used with your data  
acquisition board—to control the scanning of the four channels or to  
perform a single read. To access the temperature sensor in this mode,  
configure the temperature sensor in the DTS mode. At power up or at reset,  
amplifier channel 0 is selected on the output multiplexer, and hence  
connects to MCH0. The other four channels (three amplifier channels and  
one temperature channel) are hardwired to the rear signal connector. Notice  
that even when you select the Multiplexed-Output mode, the SCXI-1121  
drives the rear signal connector pins 5 through 12. The SCXI-1121 outputs  
on the rear signal connector are short-circuit protected.  
Refer to the following Scanning Modes section for further details on how  
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Scanning Modes  
There are four basic types of scanning modes possible with the  
SCXI-1121—single-module parallel scanning, single-module multiplexed  
scanning, multiple-module multiplexed scanning, and multiple-chassis  
scanning (possible only with the SCXI-1001 chassis). For additional  
information, consult Chapter 2, Configuration and Installation, Chapter 5,  
Programming, your data acquisition board manual, and your SCXI chassis  
user manual. If you need further information, contact National Instruments.  
Single-Module Parallel Scanning  
Single-Module parallel scanning is the simplest scanning mode. Directly  
cable the SCXI-1121 to the data acquisition board as shown in Figure 3-7.  
In this configuration, each analog signal has its own channel. Timing  
signals are not necessary for this type of scanning because the module  
provides all channels to the data acquisition board at all times. You can  
implement single-module parallel scanning with any data acquisition board  
that is appropriately cabled to the SCXI-1121.  
SCXI-1121  
DataAcquisition Board  
Cable Assembly  
CH0  
CH1  
CH2  
CH3  
MCH0  
MCH1  
MCH2  
MCH3  
Analog Input 0  
Analog Input 1  
Analog Input 2  
Analog Input 3  
Four Isolated  
Floating  
Single-Ended  
Inputs  
Figure 3-7. Single-Module Parallel Scanning  
Multiplexed Scanning  
Only the MIO-16 data acquisition boards support multiplexed scanning on  
the SCXI-1121. During multiplexed scanning, a module sends the  
SCANCLK signal to Slot 0 over the TRIG0 backplane line, and Slot 0  
sends unique SCANCON signals to each module. Each module uses its  
signal to reload MUXCOUNTER and to determine when the SCXI-1121  
output is enabled. Slot 0 contains a module list first-in-first-out (FIFO)  
memory chip, similar to the Channel/Gain FIFO on an MIO-16 board,  
except that instead of having a channel number and gain setting for each  
entry, the Slot 0 FIFO contains a slot number and a sample count for each  
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entry. The list in Slot 0 will determine which module is being accessed and  
for how many samples. It is important that you make sure that the lists on  
the data acquisition board and Slot 0 are compatible so that the samples are  
acquired as intended. See your SCXI chassis manual for more information.  
Single-Module Multiplexed Scanning  
Single-Module Multiplexed Scanning (Direct)  
This is the simplest multiplexed scanning mode. Directly cable the  
SCXI-1121 to the data acquisition board as shown in Figure 3-8. The  
module sends SCANCLK onto TRIG0, and Slot 0 sends SCANCON back  
to the module. SCANCON will be low at all times during the scan except  
during changes from one Slot 0 scan list entry to the next, when  
SCANCON pulses high to make the MUXCOUNTER reload its starting  
channel. Notice that although you are using only a single module, you can  
put many entries with different counts in the Slot 0 FIFO, so that some  
channels are read more often than others. You cannot change the start  
channel in the module Configuration Register during a scan.  
SCXI-1000 or SCXI-1001 Chassis  
SCANCON X  
TRIG0  
DataAcquisition Board  
Cable  
Assembly  
Four Isolated  
Floating  
Single-Ended  
Inputs  
SCANCLK  
MCH0  
Timing Output  
Analog Input  
SLOT 0  
SCXI-1121  
SLOT X  
Figure 3-8. Single-Module Multiplexed Scanning (Direct)  
Single-Module Multiplexed Scanning (Indirect)  
In this mode, the SCXI-1121 is not directly cabled to the data acquisition  
board. Instead, you connect another module to the data acquisition board,  
and the analog output of the SCXI-1121 is sent over Analog Bus 0, through  
the intermediate module, and then to the data acquisition board. The  
SCXI-1121 receives its MUXCOUNTER clock from TRIG0, which is sent  
by the intermediate module, as illustrated in Figure 3-9. Slot 0 operation is  
the same for direct connection scanning.  
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SCXI-1000 or SCXI-1001 Chassis  
SCANCON X  
TRIG0  
DataAcquisition Board  
Cable  
Assembly  
SCANCLK  
MCH0  
Timing Output  
Analog Input  
Other  
SLOT 0  
SCXI-1121  
SLOT X  
Module  
Analog Bus 0  
Figure 3-9. Single-Module Multiplexed Scanning (Indirect)  
Multiple-Module Multiplexed Scanning  
In this mode, all the modules tie into Analog Bus 0, and SCANCON  
enables the output of their amplifiers. The module that is directly cabled to  
the data acquisition board sends SCANCLK onto TRIG0 for the other  
modules and Slot 0, as illustrated in Figure 3-10. The scan list in Slot 0 is  
programmed with the sequence of modules and the number of samples per  
entry.  
SCXI-1000 or SCXI-1001 Chassis  
SCANCON X  
DataAcquisition Board  
SCANCON B  
SCANCONA  
TRIG0  
SCANCLK  
MCH0  
SLOT 0  
CableAssembly  
SCXI Module  
SLOT B  
SCXI Module  
SLOTA  
SCXI Module  
SLOT X  
Analog Bus 0  
Figure 3-10. Multiple-Module Multiplexed Scanning  
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Multiple-Chassis Scanning  
In this mode, you attach each SCXI-1001 chassis to a daisy chain of cable  
assemblies and multichassis adapter boards, as illustrated in Figure 3-11.  
You program each chassis separately, and each chassis occupies a  
dedicated channel of the data acquisition board. Within each chassis,  
scanning operations act as if the other chassis are not being used, with one  
exception. You must program the Slot 0 scan list in each chassis with  
dummy entries of Slot 13 to fill the samples when the data acquisition board  
will be sampling another chassis or data acquisition board channel. This  
will keep the chassis synchronized. Notice that you can only perform  
multiple-chassis scanning with the SCXI-1001 chassis and MIO-16 data  
acquisition boards. See Chapter 5, Programming, for more information on  
multiple-chassis scanning. See Appendix E, SCXI-1121 Cabling, for more  
information on the necessary cable accessories for multichassis scanning.  
Multichassis  
Adapter  
Multichassis  
Adapter  
Multichassis  
Adapter  
Data Acquisition Board  
Input Ch. N  
Cable  
Assembly  
Cable  
Assembly  
Cable  
Assemblies  
Input Ch. 1  
Input Ch. 0  
Timing Output  
Chassis 1  
Chassis 2  
Chassis  
Chassis N  
Figure 3-11. Multiple-Chassis Scanning  
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4
Register Descriptions  
This chapter describes in detail the SCXI-1121 Module ID Register, the  
Configuration Register, the Slot 0 registers, and multiplexer addressing.  
Note If you plan to use a programming software package such as NI-DAQ, LabWindows,  
or LabVIEW with your SCXI-1121 board, you do not need to read this chapter.  
Register Description  
Register Description Format  
The register description chapter discusses each of the SCXI-1121 registers  
and the Slot 0 registers. A detailed bit description of each register is given.  
The individual register description gives the type, word size, and bit map  
of the register, followed by a description of each bit.  
The register bit map shows a diagram of the register with the MSB shown  
on the left (bit 15 for a 16-bit register, bit 7 for an 8-bit register), and the  
LSB shown on the right (bit 0). A rectangle is used to represent each bit.  
Each bit is labeled with a name inside its rectangle. An asterisk (*) after the  
bit name indicates that the bit is inverted (negative logic). The Module ID  
register has a unique format described in the Module ID Register section.  
In many of the registers, several bits are labeled with an X, indicating don’t  
care bits. When you write to a register you may set or clear these bits  
without effect.  
SCXI-1121 Registers  
The SCXI-1121 has two registers. The Module ID Register is a four-byte,  
read-only register that contains the Module ID number of the SCXI-1121.  
The Configuration Register is a 16-bit, write-only register that controls the  
functions and characteristics of the SCXI-1121.  
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Register Descriptions  
Module ID Register  
The Module ID Register contains the 4-byte module ID code for the SCXI-1121. This code  
number will be read as the first four bytes on the MISO line whenever the module is accessed.  
The bytes will appear least significant byte first. Within each byte, data is sent out most  
significant bit first. Additional data transfers will result in all zeros being sent on the MISO  
line. The Module ID Register is reinitialized to its original value each time the SCXI-1121 is  
deselected by the SS* signal on the backplane.  
Type:  
Read-only  
4-byte  
Word Size:  
Bit Map:  
Byte 0  
7
0
6
0
5
0
4
0
3
0
2
0
1
1
0
0
Byte 1  
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
0
Byte 2  
7
6
0
5
0
4
3
2
1
0
0
0
0
0
0
0
Byte 3  
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
0
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Register Descriptions  
Configuration Register  
The Configuration Register contains 16 bits that control the functions of the SCXI-1121.  
When SS* is asserted (low) and D*/A indicates data (low), the register will shift in the data  
present on the MOSI line, bit 15 first, and then latch it when the SCXI-1121 is deselected by  
the SS* signal on the backplane. The Configuration Register initializes to all zeros when the  
SCXI chassis is reset or first turned on.  
Type:  
Write-only  
16-bit  
Word Size:  
Bit Map:  
15  
14  
13  
12  
X
11  
X
10  
X
9
8
CLKOUTEN  
CLKSELECT  
SCAL  
CHAN1  
CHAN0  
7
6
5
4
3
2
1
0
X
X
RTEMP  
RSVD  
SCANCLKEN  
SCANCONEN  
AB0EN  
FOUTEN*  
Bit  
Name  
Description  
15  
CLKOUTEN  
Scanclock Output Enable—This bit determines whether  
the SCANCLK signal from the rear signal connector is  
sent out, in inverted form, to the TRIG0 backplane signal.  
If CLKOUTEN is set to 1, SCANCLK* is transmitted on  
TRIG0. If CLKOUTEN is cleared to 0, SCANCLK* is not  
transmitted on TRIG0.  
14  
13  
CLKSELECT Scanclock Select—This bit determines whether the  
SCXI-1121 uses SCANCLK or the inverted form of  
TRIG0 to clock the MUXCOUNTER for the purpose of  
scanning through the analog channels. If CLKSELECT is  
cleared to 0, SCANCLK is used to clock MUXCOUNTER.  
If CLKSELECT is set to 1, TRIG0* is used as the source  
to clock MUXCOUNTER.  
SCAL  
Shunt Calibrate—This bit determines whether the shunt  
calibration switches on the SCXI-1321 are closed or open.  
If SCAL is cleared to 0, the switches are open. If SCAL is  
set to 1, the shunt calibration switches on the SCXI-1321  
are closed and an RSCAL is placed in parallel with the  
bridge between EX+ and CH+ on all four channels.  
12-10, 7-6  
X
Don’t care bits.  
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9-8  
CHAN<1..0>  
Channel Select—These bits determine the channel number  
(zero to three) that is loaded into the MUXCOUNTER to  
determine the analog channel to be read during a single  
read, or the starting channel on the module for a scanned  
data acquisition. CHAN1 is the MSB.  
5
RTEMP  
Read Temperature—This bit determines whether the  
selected channel output or the MTEMP signal is driven  
onto the MCH0± pins of the rear signal connector. If  
RTEMP is cleared to zero, the selected channel output is  
used as the module output. If RTEMP is set to one, the  
MTEMP signal is used as the module output. The module  
output will only be driven when FOUTEN* is cleared to 0,  
or SCANCON is active (low) while SCANCONEN* is  
cleared.  
4
3
RSVD  
Reserved—This bit should always be written to zero.  
SCANCLKEN Scan Clock Enable—This bit determines whether  
MUXCOUNTER will increment on each clock signal  
(the clock source is determined by CLKSELECT), or keep  
its loaded value. If SCANCLKEN is set to one,  
MUXCOUNTER will be clocked during scans. If  
SCANCLKEN is cleared to zero, MUXCOUNTER will  
not be clocked.  
2
1
SCANCONEN Scan Control Enable—This bit, when high, enables the  
SCANCON signal.  
AB0EN  
Analog Bus 0 Enable—This bit determines whether  
Analog Bus 0 on the SCXIbus drives MCH0 on the rear  
signal connector. If AB0EN is cleared to zero, Analog  
Bus 0 does not drive MCH0. If AB0EN is set to one,  
Analog Bus 0 + drives MCH0+ through a buffer and a  
Analog Bus 0 – is connected to MCH0–.  
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0
FOUTEN*  
Forced Output Enable—This bit determines whether the  
module will drive the MCH0± pins on the rear signal  
connector with either the selected channel output or the  
MTEMP signal, depending on the state of RTEMP. If  
FOUTEN* is cleared to zero, the MCH0± pins will be  
driven through a buffer by the selected channel output or  
the MTEMP line. If FOUTEN* is set to one, the MCH0±  
pins will not be driven by the selected channel output or  
MTEMP, unless SCANCON is active (low) and the  
SCANCONEN bit is cleared. If the selected channel  
output or MTEMP is driving the output buffer, it will drive  
Analog Bus 0 if AB0EN is set. If nothing is driving the  
output buffer, the SCXI-1121 output will saturate.  
Slot 0 Register Descriptions  
Slot 0 has three registers. The Slot-Select Register is a 16-bit, write-only  
register that determines with which slot the data acquisition board will  
speak when SLOT0SEL* is released high. In the case of the SCXI-1001  
chassis, the Slot-Select Register also determines in which chassis the  
desired slot is. The FIFO Register is a 16-bit, write-only register used for  
storing the Slot 0 scan list that determines the chassis scan sequence. The  
Hardscan Control Register (HSCR) is an 8-bit, write-only register used for  
setting up the timing circuitry in Slot 0. The Slot-Select Register is written  
to by using the SLOT0SEL* line. The HSCR and the FIFO Register are  
written to as if they were registers located on modules in Slots 13 and 14.  
It is recommended that you maintain software copies of the Slot-Select  
Register, HSCRs, and all the Slot 0 scan lists that correspond to the writes  
to FIFO Registers.  
If you are using multiple chassis, it is important to understand the  
architectural differences of the Slot-Select Register as compared to the  
HSCR and the FIFO Register. Although each chassis has its own physical  
Slot-Select Register, all are written to at the same time. The jumper settings  
in Slot 0 of a chassis determine with which chassis number Slot 0 is  
identified. From the software perspective, only one Slot-Select Register  
exists in a system composed of multiple chassis. The HSCR and FIFO  
Register, on the other hand, are unique to each chassis and you must  
program them separately.  
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Register Descriptions  
Slot-Select Register  
The Slot-Select Register contains 16 bits that determine which module in which chassis will  
be enabled for communication when the SLOT0SEL* line is set to one. An SCXI-1000  
chassis will select the appropriate module in its chassis, regardless of the chassis number  
written. The Slot-Select Register will shift in the data present on the MOSI line, bit 16 first,  
when SLOT0SEL* is cleared to zero.  
Type:  
Write-only  
16-bit  
Word Size:  
Bit Map:  
15  
X
14  
13  
X
12  
X
11  
X
10  
X
9
8
X
X
CHS4  
7
6
5
4
3
2
1
0
CHS3  
CHS2  
CHS1  
CHS0  
SL3  
SL2  
SL1  
SL0  
Bit  
Name  
Description  
15-9  
8-4  
X
Don’t care bits.  
CHS<4..0>  
Chassis Bit 4 through 0—These bits determine which  
chassis is selected. On the SCXI-1000 chassis, these bits  
are don’t cares.  
3-0  
SL<3..0>  
Slot Bit 3 through 0—These bits determine which slot in  
the selected chassis is selected.  
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Register Descriptions  
Hardscan Control Register (HSCR)  
The HSCR contains eight bits that control the setup and operation of the hardscan timing  
circuitry of Slot 0. To write to the HSCR, follow the procedure given in the Register Writes  
section of Chapter 5, Programming, using 13 as the slot number, and writing eight bits to the  
HSCR. The register will shift in the data present on the MOSI line, bit seven first, when  
Slot 13 is selected by the Slot-Select Register.  
Type:  
Write-only  
8-bit  
Word Size:  
Bit Map:  
7
6
5
4
3
2
1
0
RSVD  
FRT  
RD  
ONCE  
HSRS*  
LOAD*  
SCANCONEN  
CLKEN  
Bit  
7
Name  
Description  
Reserved.  
RSVD  
FRT  
6
Forced Retransmit—This bit, when clear, causes the scan  
list in the FIFO to be reinitialized to the first entry, thus  
allowing the scan list to be reprogrammed in two steps  
instead of having to rewrite the entire list. When this bit is  
set, it has no effect.  
5
4
RD  
Read—This bit, when clear, prevents the FIFO from being  
read. When set, the FIFO is being read except at the end of  
a scan list entry during scanning, when reading is briefly  
disabled to advance to the next scan list entry.  
ONCE  
Once—When set, this bit will cause the Hardscan circuitry  
to shut down at the end of the scan list circuitry during a  
data acquisition. When clear, the circuitry will wrap  
around and continue with the first scan list entry after the  
entry is finished.  
3
2
HSRS*  
LOAD*  
Hardscan Reset—When clear, this bit causes all the  
hardware scanning circuitry, including the FIFO, to be  
reset to the power up state. When set, this bit has no effect.  
Load—This bit, when clear, forces a loading of the Slot 0  
sample counter with the output of the FIFO. When set, this  
bit has no effect.  
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1
0
SCANCONEN Scan Control Enable—When set, this bit enables the  
SCANCON lines. When clear, all SCANCON lines are  
disabled (high).  
CLKEN  
Clock Enable—When set, this bit enables TRIG0 as a  
clock for the hardscan circuitry. When clear, TRIG0 is  
disabled.  
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FIFO Register  
The FIFO Register is used to add entries to the Slot 0 FIFO. The FIFO contains the Slot 0 scan  
list. Each entry contains a slot number to be accessed, and a count number to determine the  
number of samples to be taken from that slot. To write to the FIFO Register, follow the  
procedure given in the Register Writes section of Chapter 5, Programming, using 14 as the  
slot number, and writing 16 bits to the FIFO Register. The register will shift in the data present  
on the MOSI line, bit 15 first, when Slot 14 is selected by the Slot-Select Register. The Slot 0  
scan list is created by consecutive writes to the FIFO Register. Each write creates a new entry  
at the end of the scan list. The maximum number of entries is 256. To clear the FIFO of all  
entries, clear the HSRS* bit in the HSCR.  
Type:  
Write-only  
16-bit  
Word Size:  
Bit Map:  
15  
X
14  
13  
X
12  
X
11  
X
10  
9
8
X
MOD3  
MOD2  
MOD1  
7
6
5
4
3
2
1
0
MOD0  
CNT6  
CNT5  
CNT4  
CNT3  
CNT2  
CNT1  
CNT0  
Bit  
Name  
Description  
15-11  
10-7  
X
Don’t care bits—Unused.  
MOD<3..0>Module Number—The value of these bits plus  
on determines the number of the slot to be accessed for this  
scan entry. For example, to access Slot 6, MOD<3..0>  
would be 0101.  
6-0  
CNT<6..0>  
Count—The value of these bits plus one determines how  
many samples will be taken before the next scan list entry  
becomes active. A value of zero corresponds to one sample  
and a value of 127 corresponds to 128 samples.  
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5
Programming  
This chapter contains a functional programming description of the  
SCXI-1121 and Slot 0.  
Note If you plan to use a programming software package such as NI-DAQ, LabWindows,  
or LabVIEW with your SCXI-1121 board, you do not need to read this chapter.  
Programming Considerations  
Programming the SCXI-1121 involves writing to the Configuration  
Register. Programming Slot 0 involves writing to the HSCR and FIFO  
Register. Programming the data acquisition boards involves writes to their  
registers. See your data acquisition board user manual for more  
information. The programming instructions list the sequence of steps to  
take. The instructions are language independent that is, they instruct you to  
write a value to a given register without presenting the actual code.  
Notation  
For the bit patterns to be written, the following symbols are used:  
0
Binary zero  
1
Binary one  
X
C
Don't care, either zero or one may be written  
One of two bits used to specify the channel to be loaded into the  
MUXCOUNTER. This value will either be the channel to be read for  
single reads, or a starting channel for scanned measurements.  
The 16-bit patterns are presented MSB first, left to right.  
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Chapter 5  
Programming  
and FIFO Register including the procedure for writing to the Slot-Select  
Register to select the appropriate slot. For timing specifics, refer to the  
Timing Requirements and Communication Protocol section in Chapter 2,  
Configuration and Installation. The rear signal connector pin equivalences  
to the different National Instruments data acquisition boards are given in  
Table 5-1. See also Appendix E, SCXI-1121 Cabling. The Configuration  
Register, the FIFO Register, and the HSCR are write-only registers.  
The different bits in these registers often control independent pieces of  
circuitry. There are times when you may want to set or clear a specific bit  
or bits without affecting the remaining bits. However, a write to one of these  
registers will affect all bits simultaneously. You cannot read the registers to  
determine which bits have been set or cleared in the past therefore, you  
should maintain a software copy of these registers. You can then read the  
software copy to determine the status of the register. To change the state of  
a single bit without disturbing the remaining bits, set or clear the bit in the  
software copy and write the software copy to the register.  
Table 5-1. SCXI-1121 Rear Signal Connector Pin Equivalences  
SCXI-1121  
SCXIbus  
Line  
Rear Signal  
Connector  
MIO-16  
ADIO0  
Lab Board  
PB4  
PC-LPM-16  
DOUT4  
DOUT5  
DOUT6  
DOUT7  
DIN6  
MOSI  
SERDATIN  
DAQD*/A  
D*/A  
ADIO1  
PB5  
INTR*  
SPICLK  
MISO  
SLOT0SEL*  
SERCLK  
ADIO2  
PB6  
EXTSTROBE*  
BDIO0  
PB7  
SERDATOUT  
PC1  
Register Selection and Write Procedure  
1. Select the slot of the module to be written to (or Slot 13 or 14). Initial  
conditions:  
SERDATIN = X  
DAQD*/A = X  
SLOT0SEL* = 1  
SERCLK = 1  
2. Clear SLOT0SEL* to 0. This will deassert all SS* lines to all modules  
in all chassis.  
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3. For each bit, starting with the MSB first (bit 15):  
a. SERDATIN = bit to be sent. These bits are the data that is being  
written to the Slot-Select Register.  
b. Clear SERCLK to 0.  
c. Set SERCLK to 1. This rising edge clocks the data. (If you are  
using an MIO-16 board, writing to the EXTSTROBE* register  
will pulse EXTSTROBE* low and then high, accomplishing  
steps 3b and 3c.)  
4. Set SLOT0SEL* to 1. This will assert the SS* line of the module  
whose slot number was written to Slot 0. If you are using multiple  
chassis, the appropriate slot in the chassis whose address corresponds  
to the written chassis number will be selected automatically. When no  
communications are taking place between the data acquisition board  
and any modules, write zero to the Slot-Select Register to ensure that  
no accidental writes occur.  
5. If you are writing to a Configuration Register, clear DAQD*/A to 0  
(this indicates data will be written to the Configuration Register). If  
you are writing to the HSCR or FIFO Register, leave DAQD*/A high.  
6. For each bit to be written to the Configuration Register:  
a. Establish the desired SERDATIN level corresponding to this bit.  
b. Clear SERCLK to 0.  
c. Set SERCLK to 1 (clock the data). (If you are using an MIO-16  
board, writing to the EXTSTROBE* register will pulse  
EXTSTROBE* low and then high, accomplishing steps 6b  
and 6c.)  
7. Pull SLOT0SEL* low to deassert the SS* line, latch the data into the  
select number to the Slot 0 Slot-Select Register.  
8. If you are not selecting another slot, write zero to the Slot 0 Slot-Select  
Register. If you are selecting another slot, start at step 3.  
For a timing illustration of a Configuration Register write, see Figure 2-18,  
Configuration Register Write Timing Diagram, which shows the proper  
write to configure an SCXI-1121 that is directly cabled to an MIO-16 for  
multiple-module multiplexed scanning with a start channel of 3.  
Initialization  
The SCXI-1121 powers up with its Configuration register cleared to all  
zeros. You can force this state by an active low signal on the RESET* pin  
of the backplane connector. In the reset state, CH0 through CH3 are routed  
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Chapter 5  
Programming  
to MCH0 through MCH3 on the rear signal connector. The module is  
disconnected from Analog Bus 0 and disabled from scanning.  
Single-Channel Measurements  
This section describes how to program the SCXI-1121, either alone or in  
conjunction with other modules, to make single-channel, or nonscanned,  
measurements.  
Parallel Output  
In order to perform a parallel output measurement, you must cable the  
SCXI-1121 rear signal connector to a data acquisition board with each  
output connected to a different data acquisition board channel. See  
Chapter 2, Configuration and Installation, for more information. For  
information on how to make the voltage measurement with your data  
acquisition board, consult your data acquisition board user manual.  
Remember to account for the gains of both the SCXI-1121 and the data  
acquisition board when calculating the actual voltage present at the input of  
the SCXI-1121.  
To measure one of the four differential input channels to the SCXI-1121, or  
the DTEMP line if the module has been configured appropriately, perform  
the following steps:  
1. Write the binary pattern 000XXX00 XX000000to the SCXI-1121  
Configuration Register. Notice that this can be the RESET state.  
Multiplexed Output  
In order to perform a direct multiplexed output measurement, you must  
cable the SCXI-1121 rear signal connector to a data acquisition board.  
See Chapter 2, Configuration and Installation, for more information. For  
information on how to make the voltage measurement with your data  
acquisition board, consult your data acquisition board user manual.  
Remember to account for the gains of both the SCXI-1121 and the data  
acquisition board when calculating the actual voltage present at the input  
of the SCXI-1121.  
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To measure one of the four differential input channels to the SCXI-1121,  
perform the following steps:  
1. Write the binary pattern 000XXXCC XX000000to the SCXI-1121  
Configuration Register.  
2. Measure the voltage with the data acquisition board.  
To shunt calibrate one of the four differential input channels, perform the  
following steps:  
1. Write the binary pattern 001XXXCC XX00000to the SCXI-1121  
Configuration Register. Insert a delay of at least 1 sec if you have set  
the 4 Hz filter, or at least 1 msec if you have set the 10 kHz filter. This  
delay permits the SCXI-1121 amplifier to settle.  
2. Measure the voltage with the data acquisition board.  
To measure the voltage on the MTEMP line, perform the following steps:  
1. Write the binary pattern 000XXXXX XX100000to the SCXI-1121  
Configuration Register.  
2. Measure the voltage with the data acquisition board.  
Indirect Measurements  
Indirect measurements involve one module sending a signal to Analog  
Bus 0, where it is picked up by another module and transmitted to the data  
acquisition board.  
Measurements from Other Modules  
To perform measurements from other modules, you must cable the  
SCXI-1121 rear signal connector to a data acquisition board. See  
Chapter 2, Configuration and Installation, for more information. To make  
a measurement from another module, perform the following steps:  
1. Perform any necessary programming to ensure that no modules are  
driving Analog Bus 0. For an SCXI-1121, clearing AB0EN in the  
Configuration Register will ensure that its output is not driving AB0.  
2. Write the binary pattern 000XXXXX XX100011to the SCXI-1121  
Configuration Register. This step disables the SCXI-1121 from driving  
Analog Bus 0 and allows Analog Bus 0 to drive MCH0 through the  
output buffer.  
3. Program the other module to drive Analog Bus 0 with the signal to be  
measured.  
4. Measure the voltage with the data acquisition board.  
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Measurements from the SCXI-1121 via Another Module  
To perform measurements via another module, you must cable the other  
module rear signal connector to a data acquisition board. The other module  
must also be able to transfer Analog Bus 0 to the data acquisition board. See  
Chapter 2, Configuration and Installation, for more information.  
To measure one of the four differential input channels to the SCXI-1121,  
perform the following steps:  
1. Perform any necessary programming to ensure that no modules are  
driving Analog Bus 0. For an SCXI-1121, clearing AB0EN in the  
Configuration Register will ensure that its output is not driving AB0.  
2. Program the other module not to drive Analog Bus 0, but to send  
Analog Bus 0 to the data acquisition board.  
3. Write the binary pattern 000XXXCC XX000010to the SCXI-1121  
Configuration Register.  
4. Measure the voltage with the data acquisition board.  
To perform a shunt calibration on one of the four differential input channels  
of the SCXI-1121, perform the following steps:  
1. Perform any necessary programming to ensure that no modules are  
driving Analog Bus 0. For an SCXI-1121, clearing AB0EN in the  
Configuration Register will ensure that its output is not driving AB0.  
2. Program the other module not to drive Analog Bus 0, but to send  
Analog Bus 0 to the data acquisition board.  
3. Write the binary pattern 001XXXCC XX000010to the SCXI-1121  
Configuration Register.  
4. Insert a delay equal to 1 sec if you have set the 4 Hz filter, or 1 msec if  
you have set the 10 kHz filter. This delay permits the SCXI-1121  
amplifier to settle.  
5. Measure the voltage with the data acquisition board.  
To measure the voltage on the MTEMP line, perform the following steps:  
1. Perform any necessary programming to ensure that no modules are  
driving Analog Bus 0. For an SCXI-1121, clearing AB0EN in the  
Configuration Register will ensure that its output is not driving AB0.  
2. Program the other module not to drive Analog Bus 0, but to send  
Analog Bus 0 to the data acquisition board.  
3. Write the binary pattern 000XXXXX XX100010to the SCXI-1121  
Configuration Register.  
4. Measure the voltage with the data acquisition board.  
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Scanning Measurements  
Programming for scanned data acquisition involves programming your  
data acquisition board, modules, and Slot 0. In general, the steps to be taken  
are as follows:  
1. Perform all data acquisition board programming to the point of  
enabling the data acquisition.  
2. Perform all module programming.  
3. Program the Slot 0 hardscan circuitry.  
4. Enable the data acquisition, trigger it either through software or  
hardware, and service the data acquisition.  
The MIO and Lab-PC+ boards can do all types of scanning. Lab-NB,  
Lab-PC, Lab-PC+, Lab-LC, and PC-LPM-16 boards support only  
single-module parallel scanning, and do not support any of the multiplexed  
scanning modes. Notice that single-module parallel scanning is typically  
done without any module or Slot 0 programming only programming the  
data acquisition board is necessary.  
1. Data Acquisition Board Setup Programming  
The programming steps for your data acquisition board are given in your  
data acquisition board user manual. You should follow the instructions in  
the following sections:  
AT-MIO-16 User Manual  
Multiple A/D Conversions with Continuous Channel Scanning  
(Round Robin)  
Multiple A/D Conversions with Interval Channel Scanning  
(Pseudosimultaneous)  
AT-MIO-16D User Manual  
Multiple A/D Conversions with Continuous Channel Scanning  
(Round Robin)  
Multiple A/D Conversions with Interval Channel Scanning  
(Pseudosimultaneous)  
AT-MIO-16F-5 User Manual  
Posttrigger Data Acquisition with Continuous Channel Scanning  
Posttrigger Data Acquisition with Interval Channel Scanning  
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AT-MIO-16X User Manual  
Continuous Channel Scanning Data Acquisition  
Interval Channel Scanning Data Acquisition  
AT-MIO-64F-5 User Manual  
Continuous Channel Scanning Data Acquisition  
Interval Channel Scanning Data Acquisition  
Lab-LC User Manual  
Programming Multiple A/D Conversions with Channel Scanning  
Lab-NB User Manual  
Programming Multiple A/D Conversions with Channel Scanning  
Lab-PC User Manual  
Programming Multiple A/D Conversions with Channel Scanning  
Lab-PC+ User Manual  
Programming Multiple A/D Conversions with Channel Scanning  
Programming Multiple A/D Conversions with Interval Scanning  
Programming Multiple A/D Conversions in Single-Channel  
Interval Acquisition Mode  
MC-MIO-16 User Manual  
Multiple A/D Conversions with Continuous Channel Scanning  
(Round Robin)  
Multiple A/D Conversions with Interval Channel Scanning  
(Pseudosimultaneous)  
NB-MIO-16 User Manual  
Programming Multiple A/D Conversions with Channel Scanning  
NB-MIO-16X User Manual  
Multiple A/D Conversions with Continuous Channel Scanning  
(Round Robin)  
Multiple A/D Conversions with Interval Channel Scanning  
(Pseudosimultaneous)  
PC-LPM-16 User Manual  
Programming Multiple A/D Conversions with Channel Scanning  
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Follow the instructions in these sections through the part labeled as follows:  
Clear the A/D Circuitry and Reset the Mux Counter in the MIO board  
user manual (except for the AT-MIO-16X and the AT-MIO-64F-5). Do  
not continue to the part called Enable the Scanning Data Acquisition  
Operation. You will do this after you program the modules and Slot 0.  
Program the Sample Counter (if you are doing continuous channel  
scanning) or Program the Scan-Interval Counter (if you are doing  
interval channel scanning) in the AT-MIO-16X or AT-MIO-64F-5 user  
manual. Do not continue to the part labeled Enable a Scanning Data  
Acquisition Operation or Enable an Interval Scanning Data  
Acquisition Operation. You will do this after you program the modules  
and Slot 0.  
Note For multiplexed scanning with an MIO board, it is important that you follow the  
instructions in the channel-scanning sections, not the single-channel sections. Although  
you may be using only one MIO board channel, the channel scanning programming will  
ensure that the MIO board outputs SCANCLK, which is needed by the SCXI-1120 and  
Slot 0.  
Clear the A/D Circuitry in the Lab-LC User Manual. Do not continue  
to the part called Program the Sample-Interval Counter. You will do  
this after you program the modules and Slot 0.  
Clear the A/D Circuitry in the Lab-PC User Manual, the Lab-PC+  
User Manual, and the PC-LPM-16 User Manual. Do not continue to  
the part called Start and Service the Data Acquisition Operation. You  
will do this after you program the modules and Slot 0.  
Clear the A/D Circuitry in the Lab-NB User Manual. Do not continue  
to the part called Program the Sample-Interval Counter (Counter A0).  
You will do this after you program the modules and Slot 0.  
Counter 1 and SCANDIV  
All MIO boards can operate their data acquisition board scan lists in two  
ways—they can acquire one sample per data acquisition board scan list  
entry or they can acquire N samples per data acquisition board scan list  
entry, where N is a number from 2 to 65,535 that is programmed in  
Counter 1. This second method of operation is especially useful when the  
data acquisition board scan list length is limited to 16 entries, as it is on all  
MIO boards except the AT-MIO-16F-5, which can have up to 512 entries.  
Because you can multiplex many SCXI-1121s in one chassis to one MIO  
board channel, often the simplest way to program the MIO board is to use  
only one data acquisition board scan list entry, and make N the total number  
of samples to be taken on all modules in one scan. Check your MIO board  
user manual for limitations in the data acquisition board scan list format.  
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To program the MIO board to take N samples per data acquisition board  
scan list entry, perform the following additional programming steps at the  
end of the Enable the Scanning Data Acquisition Operation section in the  
appropriate data acquisition board user manual:  
1. Write FF01 to the Am9513 Command Register to select Counter 1  
Mode Register.  
2. Write 0325 (hex) to the Am9513 Data Register to store Counter 1  
Mode Value for most MIO boards. Write 1325 (hex) to the Am9513  
Data Register to store Counter 1 Mode Value for the AT-MIO-16F-5,  
AT-MIO-64F-5, and AT-MIO-16X boards.  
3. Write FF09 to the Am9513 Command Register to select Counter 1  
Load Register.  
4. Write the number of samples to be taken per scan list entry (2 to  
65,535) to the Am9513 Data Register to load Counter 1.  
5. Write FF41 to the Am9513 Command Register to load Counter 1.  
6. Write FFF1 to the Am9513 Command Register to step Counter 1.  
7. Write FF21 to the Am9513 Command Register to arm Counter 1.  
8. Set the SCANDIV bit in Command Register 1.  
2. Module Programming  
This section describes the programming steps for various scanning  
possibilities. For all the bit patterns in this section, Sc signifies the shunt  
calibration bit. If you set this bit to one, the module will be scanned in Shunt  
Calibration mode. If you clear this bit to zero, shunt calibration will be  
disabled on the module during scanning. When programming a module to  
change the shunt calibration mode from disabled to enabled or vice versa,  
insert a delay before you make any measurements. If the SCXI-1121 has a  
filter setting at 10 kHz, the delay should be at least 1 msec. If the  
SCXI-1121 has the filter set at 4 Hz, the delay should be at least 1 sec.  
Single-Module Parallel Scanning  
In order to perform single-module parallel scanning, you must cable the  
SCXI-1121 rear signal connector to a data acquisition board with each  
output connected to a different data acquisition board channel. See  
Chapter 2, Configuration and Installation, for more information.  
To program the SCXI-1121 for single-module parallel scanning, write the  
binary pattern 00ScXXX00 XX000000to the SCXI-1121 Configuration  
Register. Notice that this can be the RESET state.  
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Chapter 5  
Programming  
Single-Module Multiplexed Scanning (Direct)  
To perform simple channel scanning, you must cable the SCXI-1121 to a  
data acquisition board. See Chapter 2, Configuration and Installation, for  
more information.  
To program the module for scanned channel measurements, write the  
binary pattern 10ScXXXCC XX001101to the SCXI-1121 Configuration  
Register. CC represents the starting channel number.  
Single-Module Multiplexed Scanning (Indirect)  
To indirectly scan a module, send the output of the scanned module onto  
Analog Bus 0, where it will be picked up by another module and  
transmitted to the data acquisition board.  
Channel Scanning from Other Modules  
To scan measurements from other modules, you must cable the SCXI-1121  
to a data acquisition board. See Chapter 2, Configuration and Installation,  
for more information. The module programming steps are as follows:  
1. Perform any necessary programming to ensure that no modules are  
driving Analog Bus 0. For an SCXI-1121, clearing AB0EN in the  
Configuration Register will ensure that its output is not driving AB0.  
2. Write the binary pattern 10XXXXXX XX100011to the SCXI-1121  
Configuration Register. This step disables the SCXI-1121 from driving  
Analog Bus 0 and allows Analog Bus 0 to drive MCH0 through the  
output buffer.  
3. Program the other module to be scanned.  
Channel Scanning from the SCXI-1121 via Another Module  
To scan the SCXI-1121 via other modules, you must cable the other  
module to a data acquisition board and the other module must be able to  
transfer Analog Bus 0 to the data acquisition board. The other module must  
also be able to send a SCANCLK*-compatible signal on TRIG0. See  
Chapter 2, Configuration and Installation, for more information. The  
module programming steps are as follows:  
1. Perform any necessary programming to ensure that no modules are  
driving Analog Bus 0. For an SCXI-1121, clearing AB0EN in the  
Configuration Register will ensure that its output is not driving AB0.  
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Chapter 5  
Programming  
2. Program the other module not to drive Analog Bus 0, but to send  
Analog Bus 0 to the data acquisition board. Also program the other  
module to send a SCANCLK*-compatible signal to TRIG0.  
3. Write the binary pattern 01ScXXXCC XX001111to the SCXI-1121  
Configuration Register, where CC is the starting channel number.  
Multiple-Module Multiplexed Scanning  
To scan multiple modules, you must connect one module to the data  
acquisition board and the module must be able to transfer Analog Bus 0 to  
the data acquisition board. This module must also be able to send a  
SCANCLK*-compatible signal on TRIG0. See Chapter 2, Configuration  
and Installation, for more information. The module programming steps are  
as follows:  
1. Perform any necessary programming to ensure that no modules are  
driving Analog Bus 0. For an SCXI-1121, clearing AB0EN in the  
Configuration Register will ensure that its output is not driving AB0.  
2. Program the module that is connected to the data acquisition board to  
connect Analog Bus 0 to the data acquisition board but not drive  
Analog Bus 0 unless it is receiving an active low signal on SCANCON.  
Also program the module to send a SCANCLK*-compatible signal  
onto TRIG0. If this module is an SCXI-1121, this programming is  
accomplished by writing the binary pattern 10ScXXXCC XX001111to  
its Configuration Register.  
Note If this module is an SCXI-1121 and is not going to be scanned (it is just being used  
as an interface), write a zero to bit 2 (SCANCONEN) in the Configuration Register. The  
start channel bits become don't care bits.  
3. Program the other modules to be used in the scan to connect their  
outputs to Analog Bus 0 but not to drive Analog Bus 0 unless receiving  
an active low signal on SCANCON. Also program the other modules  
to use TRIG0 as their clock source. For SCXI-1121 modules, this  
programming is accomplished by writing the binary pattern  
01ScXXXCC XX001111to their Configuration Registers.  
Multiple-Chassis Scanning  
To scan modules on multiple chassis, you must use the SCXI-1001. The  
cable from the data acquisition board must bus the digital lines to one  
module on each chassis. Additionally, the cable must provide each chassis  
with its own analog channel. The data acquisition board must be able to  
take several readings at a time on a given channel before accessing a new  
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Chapter 5  
Programming  
channel. See the Counter 1 and SCANDIV subsection of the 1. Data  
Acquisition Board Setup Programming section earlier in this chapter. You  
can use the MIO-16 boards in conjunction with the SCXI-1350  
multichassis adapter for multichassis scanning.  
For each chassis, program the modules according to the appropriate mode  
of operation, disregarding the fact that other chassis will be involved.  
chassis. The thirteenth is in the second chassis and is to be scanned through  
a fourteenth module that is cabled to the data acquisition board but is not  
involved in the scan. Program the twelve modules in the first chassis  
according to the steps in the previous Multiple-Module Multiplexed  
Scanning section, and program the thirteenth and fourteenth modules  
according to Channel Scanning from the SCXI-1121 via Another Module  
earlier in this chapter.  
The following section describes how to program the Slot 0 circuitry for  
scanning operations. For a more detailed description of the Slot 0 scanning  
circuitry, consult the SCXI-1000/1001 User Manual. Descriptions of the  
Slot 0 registers are given in the section Slot 0 Register Descriptions in  
Chapter 4, Register Descriptions. Skip this section if you are doing  
single-module parallel scanning.  
To program the hardscan circuitry, perform the following steps:  
1. Write binary 0000 0000to the HSCR.  
2. Write binary 0000 1000to the HSCR.  
3. Write the Slot 0 scan list to the FIFO.  
4. Write binary 0010 1100to the HSCR.  
5. Write binary 101S 1100to the HSCR.  
6. Write binary 101S 1110to the HSCR.  
7. Write binary 101S 1111to the HSCR.  
To program the hardscan circuitry to use the current scan list, perform the  
following steps:  
1. Write binary 0000 1000to the HSCR.  
2. Write binary 0100 1000to the HSCR.  
3. Write binary 0000 1000to the HSCR.  
4. Write binary 0010 1100to the HSCR.  
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Chapter 5  
Programming  
5. Write binary 101S 1100to the HSCR.  
6. Write binary 101S 1110to the HSCR.  
7. Write binary 101S 1111to the HSCR.  
In the preceding steps, S = 0 if you want the scanning to repeat when the  
end of the list is reached. S = 1 if you want the circuitry to shut down after  
a single scan.  
When you are writing multiple entries to the same register, for example,  
repetitive writes to the HSCR or several FIFO entries, it is important that  
SS*13 or SS*14 go inactive (high) between each entry. Select another slot  
or toggle the SLOT0SEL* line to temporarily deassert the appropriate SS*  
line.  
If consecutive scan list entries access an SCXI-1121, the module will reload  
the MUXCOUNTER with the starting channel after each entry. Thus, two  
entries with counts of two for one module will yield different behavior than  
one entry with a count of four.  
For multiple-chassis scanning, program each Slot 0 with dummy entries to  
fill the sample counts when the data acquisition board is accessing other  
chassis. Use Slot 13 as the dummy entry slot.  
See Example 3 at the end of this chapter.  
4. Acquisition Enable, Triggering, and Servicing  
At this point, you should now continue from where you left off in the  
1. Data Acquisition Board Setup Programming section of this chapter.  
Perform the following steps given in your data acquisition board user  
manual.  
MIO Board User Manual  
Enable the scanning data acquisition operation.  
Apply a trigger.  
Service the data acquisition operation.  
Lab-PC User Manual, Lab-PC+ User Manual, and PC-LPM-16 User  
Manual  
Start and service the data acquisition operation.  
Lab-LC User Manual  
Program the sample-interval counter.  
Service the data acquisition operation.  
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Chapter 5  
Programming  
Lab-NB User Manual  
Program the sample-interval counter (Counter A0)  
Service the data acquisition operation.  
Scanning Examples  
The following examples are intended to aid your understanding of module  
and Slot 0 programming. It will be helpful to refer to the bit descriptions for  
the Configuration Register and the FIFO Register at the beginning of  
Chapter 4, Register Descriptions.  
Example 1  
SCXI-1121 in Slot 1 of an SCXI-1000 chassis. The SCXI-1121 is directly  
cabled to a data acquisition board.  
The programming steps are as follows:  
1. Program your data acquisition board as described in the 1. Data  
2. Following the procedure given in the Register Writes section, write  
10000001 00001101to the Configuration Register of the  
SCXI-1121 in Slot 1.  
3. Follow the steps outlined in the section earlier in this chapter,  
3. Programming the Slot 0 Hardscan Circuitry, where step 3, Write the  
Slot 0 scan list to the FIFO, consists of the following:  
Write 00000000 00000010to the FIFO Register. This  
corresponds to Slot 1 for three samples.  
4. Follow the procedure given in the section, 4. Acquisition Enable,  
Triggering, and Servicing, earlier in this chapter.  
Example 2  
An SCXI-1000 chassis has four SCXI-1121s in Slots 1, 2, 3, and 4. The  
scan channels 1 through 3 on the SCXI-1121 in Slot 1, channels 0 and 1 on  
the SCXI-1121 in Slot 4, and channels 3 and 2 on the SCXI-1121 in Slot 3.  
The programming steps are as follows:  
1. Program your data acquisition board as described in the 1. Data  
Acquisition Board Setup Programming section.  
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Chapter 5  
Programming  
2. Following the procedure given in the Register Writes section, write  
00000000 00000000to the Configuration Register of the  
SCXI-1121 in Slot 2. This step resets the module, including the  
module is not necessary, but is used for simplicity.  
3. Following the procedure given in the Register Writes section, write  
100XXX00 00001111to the Configuration Register of the  
SCXI-1121 in Slot 4.  
4. Following the procedure given in the Register Writes section, write  
010XXX01 00001111to the Configuration Register of the  
SCXI-1121 in Slot 1.  
5. Following the procedure given in the Register Writes section, write  
010XXX11 00001111to the Configuration Register of the  
SCXI-1121 in Slot 3. Notice that after Channel 3, the SCXI-1121 will  
wrap around to Channel 0.  
6. Follow the steps given in the section earlier in this chapter,  
3. Programming the Slot 0 Hardscan Circuitry, where step 3, Write the  
Slot 0 scan list to the FIFO, consists of the following:  
a. Write 00000000 00000010to the FIFO Register. This  
corresponds to Slot 1 for three samples.  
b. Write 00000001 10000001to the FIFO Register. This  
corresponds to Slot 4 for two samples.  
c. Write 00000001 00000011to the FIFO Register. This  
corresponds to Slot 3 for four samples.  
Make sure to toggle SLOT0SEL* or reselect the FIFO Register from  
scratch between steps 6a, 6b, and 6c.  
7. Follow the procedure given in the 4. Acquisition Enable, Triggering,  
and Servicing section earlier in this chapter.  
Example 3  
You want to scan four channels on an SCXI-1121 in Slot 4 of Chassis 1,  
then two channels of an SCXI-1121 in Slot 11 of Chassis 2, one channel of  
an SCXI-1121 in Slot 3 in Chassis 3, and three channels of an SCXI-1121  
in Slot 8 of Chassis 3.  
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Chapter 5  
Programming  
Assuming that the modules are cabled and programmed correctly, the  
Slot 0 scan lists should be as follows:  
Chassis 1  
Chassis 2  
Chassis 3  
Slot  
Slot  
Slot  
Entry  
Number Count  
Entry  
Number Count  
Entry  
Number  
Count  
1
2
4
4
6
1
2
3
13  
11  
13  
4
4
1
3
13  
6
3
13  
8
Other solutions are possible.  
In the section, 3. Programming the Slot 0 Hardscan Circuitry, earlier in this  
chapter, step 3 consists of the following steps:  
1. Select Slot 14 in Chassis 1.  
2. Write XXXXX001 10000011over MOSI.  
3. Toggle SLOT0SEL*.  
4. Write XXXXX110 00000101over MOSI.  
5. Select Slot 14 in Chassis 2.  
6. Write XXXXX110 00000011over MOSI.  
7. Toggle SLOT0SEL*.  
8. Write XXXXX101 00000001over MOSI.  
9. Toggle SLOT0SEL*.  
10. Write XXXXX110 00000011over MOSI.  
11. Select Slot 14 in Chassis 3.  
12. Write XXXXX110 00000101over MOSI.  
13. Toggle SLOT0SEL*.  
14. Write XXXXX001 00000000over MOSI.  
15. Toggle SLOT0SEL*.  
16. Write XXXXX011 10000010over MOSI.  
17. Select Slot 0 in Chassis 0.  
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A
Specifications  
This appendix lists the specifications for the SCXI-1121. These are  
typical at 25 °C unless otherwise stated. The operating temperature range  
is 0 to 50 °C.  
Analog Input  
Gain (jumper-selectable)........................ 1, 2, 5, 10, 20, 50, 100, 200, 500,  
1,000, 2,000  
Output range........................................... ±5 V  
Number of channels ............................... 4  
Gain accuracy1 ...................................... 0.15% of full scale  
Offset voltage  
Input................................................ ±6 µV  
Output ............................................. ±3 mV  
Stability versus ambient temperature  
Input offset drift.............................. ±0.2 µV/°C  
Output offset drift ........................... ±200 µV/°C  
Gain drift......................................... 20 ppm/°C  
Input bias current .................................. ±80 pA  
Input resistance  
Normal ............................................ 1 GΩ  
Power off......................................... 50 kΩ  
Overload.......................................... 50 kΩ  
Output resistance  
Multiplexed-Output mode............... 100 Ω  
Parallel-Output mode...................... 330 Ω  
1
Includes the combined effects of gain, offset, and hysteresis and nonlinearity  
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Appendix A  
Specifications  
Filtering (jumper-selectable) ..................4 Hz (–10 dB) or 10 kHz (–3 dB),  
3-pole RC  
Noise (400 kHz bandwidth)1  
Input (gain = 1,000)  
4 Hz filter .................................100 nVrms  
10 kHz filter .............................4 µVrms  
Output (gain = 1)  
4 Hz ..........................................150 µVrms  
10 kHz ......................................1 mVrms  
Output selection time (with 5 V step, all gains)2  
0.012% accuracy..............................5.2 µsec typical, 7 µsec maximum  
0.006% accuracy..............................10 µsec  
0.0015% accuracy............................20 µsec  
Rise time  
4 Hz .................................................0.12 sec  
10 kHz .............................................70 µsec  
Slew rate .................................................0.15 V/µsec  
Operating common-mode voltage,  
50 Hz or 60 Hz  
Channel to channel or  
Channel to earth...............................250 Vrms  
2
Common-mode rejection ratio, 50 or 60 Hz  
1 kin input leads ..........................160 dB minimum at 4 Hz  
bandwidth  
NMR (50 or 60 Hz) .........................60 dB at 4 Hz bandwidth  
Input protection (continuous) .................250 Vrms maximum  
Output protection....................................Continuous short-to-ground  
Power dissipation....................................7.5 W maximum  
1
Includes the combined effects of the SCXI-1121 and the AT-MIO-16F-5  
2
Module tested following the UL1244 standard to twice the working voltage +1000 Vrms  
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Appendix A  
Specifications  
RTD Mode  
Excitation current................................... 0.15 mA ±0.04%, 0.45 mA ±0.2%  
Maximum load resistance ...................... 10 kΩ  
Drift........................................................ 40 ppm/ °C  
Lead resistance effect............................. Negligible (4-wire measurement)  
Resistance range..................................... 10 k, maximum  
Strain Gauge Mode  
Bridge types ........................................... Quarter-, half-, and full-bridge  
Bridge completion.................................. Two 4.5 k±0.05% ratio  
tolerance resistors  
Excitation voltage .................................. 3.333 V ±0.04% or 10 V ±0.2%  
Resistance range..................................... 120 , minimum at 3.333 V  
800 , minimum at 10 V  
Half-bridge voltage ................................ VEXT/2 ±0.04%  
Cold-Junction Sensor 1  
SCXI-1320 and SCXI-1321  
Accuracy ......................................... 1.0 °C over 0 to 55 °C  
Output ............................................. 10 mV/°C  
SCXI-1328  
Accuracy2 ....................................... 0.35 ° from 15 to 35 °C  
0.65 ° from 0 to 15 ° and  
35 to 55 °C  
Output ............................................. 1.91 to 0.58 V from 0 to 55 °C  
Output at 25 °C ............................... 1.25 V  
1
2
Located on the SCXI-1320, SCXI-1328, and SCXI-1321 terminal blocks  
Includes the combined effects of the temperature sensor accuracy and the temperature difference between the temperature  
sensor and any screw terminal.  
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Appendix A  
Specifications  
Note You can find the temperature T (°C) as follows:  
T = TK – 273.15  
where TK is the temperature in kelvin  
1
TK = --------------------------------------------------------------  
[a + b( lnRT) + c( lnRT)3]  
a = 1.288 x 10–3  
b = 2.356 x 10–4  
c = 9.556 x 10–8  
RT = resistance of the thermistor in Ω  
VTEMPOUT  
--------------------------------------  
RT = 50000  
2.5 – VTEMPOUT  
VTEMPOUT = output voltage of the temperature sensor  
Physical  
Dimensions .............................................1.2 by 6.8 by 8.0 in.  
Connectors..............................................50-pin male ribbon-cable rear  
connector  
32-pin DIN C front connector  
(18-screw terminal adapter  
available)  
Environment  
Safety  
Operating Temperature ..........................0 to 50 °C  
Storage Temperature...............................–20 to 70 °C  
Relative humidity ...................................10% to 90% noncondensing  
Designed in accordance with IEC61010-1, UL 3111-1, and CAN/CSA  
C22.2 No. 1010.1 for electrical measuring and test equipment. Approved at  
altitudes up to 2000 meters; Installation Category II; Pollution Degree 2.  
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B
This appendix describes the pinout and signal names for the SCXI-1121  
50-pin rear signal connector, including a description of each connection.  
Figure B-1 shows the pin assignments for the SCXI-1121 rear signal  
connector.  
1
3
5
7
9
2
4
AOGND  
MCH0+  
MCH1+  
AOGND  
MCH0–  
MCH1–  
MCH2–  
MCH3–  
MCH4–  
6
8
MCH2+  
MCH3+  
MCH4+  
10  
11 12  
13 14  
15 16  
17 18  
19 20  
21 22  
23 24  
25 26  
27 28  
29 30  
31 32  
33 34  
35 36  
37 38  
39 40  
41 42  
43 44  
45 46  
47 48  
49 50  
OUTREF  
DIG GND  
SERDATOUT  
SERDATIN  
DAQD*/A  
SLOT0SEL*  
DIG GND  
SERCLK  
SCANCLK  
RSVD  
Figure B-1. SCXI-1121 Rear Signal Connector Pin Assignment  
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Appendix B  
Rear Signal Connector  
Rear Signal Connector Signal Descriptions  
Pin  
1-2  
Signal Name  
AOGND  
Description  
Analog Output Ground—These pins are connected to the  
analog reference when jumper W33 is in position AB-R0.  
3-12  
19  
MCH0± through MCH4± Analog Output Channels 0 through 4—Connects to the data  
acquisition board differential analog input channels.  
OUTREF  
Output Reference—This pin serves as the reference node for  
the analog channels output in the Pseudodifferential  
Reference mode. It should be connected to the analog input  
sense of the NRSE data acquisition board.  
24, 33  
DIG GND  
Digital Ground—These pins supply the reference for data  
acquisition board digital signals and are tied to the module  
digital ground.  
25  
26  
27  
SERDATIN  
SERDATOUT  
DAQD*/A  
Serial Data In—This signal taps into the SCXIbus MOSI line  
to provide serial input data to a module or Slot 0.  
Serial Data Out—This signal taps into the SCXIbus MISO  
line to accept serial output data from a module.  
Data Acquisition Board Data/Address Line—This signal  
taps into the SCXIbus D*/A line to indicate to the module  
whether the incoming serial stream is data or address  
information.  
29  
36  
SLOT0SEL*  
SCANCLK  
Slot 0 Select—This signal taps into the SCXIbus INTR* line  
to indicate whether the information on MOSI is being sent to  
a module or Slot 0.  
Scan Clock—This indicates to the SCXI-1121 that a sample  
has been taken by the data acquisition board and causes the  
SCXI-1121 to change channels.  
37  
43  
SERCLK  
RSVD  
Reserved.  
All other pins are not connected.  
See the Timing Requirements and Communication Protocol section in  
Chapter 2, Configuration and Installation, for more detailed information  
on timing. Detailed signal specifications are also included in Chapter 2.  
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C
SCXIbus Connector  
This appendix describes the pinout and signal names for the SCXI-1121  
96-pin SCXIbus connector, including a description of each connection.  
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Appendix C  
SCXIbus Connector  
Figure C-1 shows the pin assignments for the SCXI-1121 SCXIbus  
connector.  
A1  
B1  
A2  
B2  
D1  
C1  
D2  
C2  
GUARD  
GUARD  
GUARD  
AB0+  
GUARD  
GUARD  
GUARD  
AB0–  
A3  
B3  
A4  
D3  
C3  
D4  
GUARD  
GUARD  
GUARD  
GUARD  
GUARD  
GUARD  
B4  
C4  
A5  
B5  
A6  
D5  
C5  
D6  
GUARD  
GUARD  
GUARD  
GUARD  
GUARD  
GUARD  
B6  
C6  
A7  
D7  
B7  
C7  
A8  
D8  
B8  
C8  
A9  
D9  
B9  
C9  
A10  
B10  
A11  
B11  
A12  
B12  
A13  
B13  
A14  
B14  
A15  
B15  
A16  
B16  
A17  
B17  
A18  
B18  
A19  
B19  
A20  
B20  
A21  
B21  
A22  
B22  
A23  
B23  
A24  
B24  
D10  
C10  
D11  
C11  
D12  
C12  
D13  
C13  
D14  
C14  
D15  
C15  
D16  
C16  
D17  
C17  
D18  
C18  
D19  
C19  
D20  
C20  
D21  
C21  
D22  
C22  
D23  
C23  
D24  
C24  
CHSGND  
CHSGND  
CHSGND  
CHSGND  
CHSGND  
RSVD  
INTR*  
D*/A  
V
V–  
CHSGND  
CHSGND  
V+  
V+  
+5 V  
RESET*  
MISO  
V–  
V–  
CHSGND  
CHSGND  
V+  
V+  
+5 V  
SPICLK  
TRIG0  
SS*  
MOSI  
SCANCON  
Figure C-1. SCXIbus Connector Pin Assignment  
SCXI-1121 User Manual  
C-2  
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Appendix C  
SCXIbus Connector  
SCXIbus Connector Signal Descriptions  
Signal  
Pin  
Name  
Description  
A1, B1, C1, D1, GUARD  
A2, D2,A3, B3,  
C3, D3, A4, D4,  
A5, B5, C5, D5,  
A6, D6  
Guard—Shields and guards the analog bus lines from noise.  
B2  
AB0+  
Analog Bus 0+ —Positive analog bus 0 line. Used to multiplex  
several modules to one analog signal.  
C2  
AB0–  
Analog Bus 0– —Negative analog bus 0 line. Used to multiplex  
several modules to one analog signal.  
C13-C17, A21, CHSGND  
B21, C21, D21  
Chassis Ground—Digital and analog ground reference.  
C18  
A19  
RSVD  
Reserved.  
RESET*  
Reset—When pulled low, reinitializes the module to its power-up  
state. Totem pole. Input.  
B19  
C19  
MISO  
D*/A  
Master-In Slave-Out—Transmits data from the module to the  
SCXIbus. Open collector. I/O.  
Data/Address—Indicates to the module whether address  
information or data information is being sent to the module on  
MOSI. Open collector. I/O.  
D19  
INTR*  
Interrupt—Active low. Causes data that is on MOSI to be written  
to the Slot-Select Register in Slot 0. Open collector. Output.  
A20, B20, C20, V–  
D20  
Negative Analog Supply— –18.5 to –25 V.  
Positive Analog Supply— +18.5 to +25 V.  
+5 VDC Source—Digital power supply.  
A22, B22, C22, V+  
D22  
A23, D23  
B23  
+5 V  
SPICLK  
Serial Peripheral Interface (SPI) Clock—Clocks the serial data  
on the MOSI and MISO lines. Open collector. I/O.  
C23  
MOSI  
Master-Out Slave-In—Transmits data from the SCXIbus to the  
module. Open collector. I/O.  
© National Instruments Corporation  
C-3  
SCXI-1121 User Manual  
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Appendix C  
SCXIbus Connector  
Signal  
Name  
Pin  
Description  
A24  
TRIG0  
TRIG0—General-purpose trigger line used by the SCXI-1121 to  
send SCANCLK to other modules or receive SCANCLK from  
other modules. Open collector. I/O.  
B24  
C24  
SS*  
Slot Select—When low, enables module communications over  
the SCXIbus. Totem pole. Input.  
SCANCON Scanning Control—Combination output enable and reload signal  
for scanning operations. Totem pole. Input.  
All other pins are not connected.  
Further information is given in Chapter 3, Theory of Operation.  
SCXI-1121 User Manual  
C-4  
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D
SCXI-1121 Front Connector  
This appendix describes the pinout and signal names for the SCXI-1121  
front connector, including a description of each connection.  
© National Instruments Corporation  
D-1  
SCXI-1121 User Manual  
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Appendix D  
SCXI-1121 Front Connector  
Figure D-1 shows the pin assignments for the SCXI-1121 front connector.  
Pin  
Number  
Signal  
Name  
Column  
B
Signal  
Name  
A
C
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
10  
9
CH0+  
CH0  
EX0+  
EGND0  
CH1+  
EX0+  
CH1  
EX1+  
EX1–  
EGND1  
CH2+  
EX2+  
CH2-  
EX2–  
EGND2  
CH3+  
CH3–  
EX3–  
EX3+  
EGND3  
8
RSVD  
7
SCAL  
+5 V  
RSVD  
6
5
MTEMP  
DTEMP  
4
3
CGND  
2
1
Figure D-1. SCXI-1121 Front Connector Pin Assignment  
SCXI-1121 User Manual  
D-2  
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Appendix D  
SCXI-1121 Front Connector  
Front Connector Signal Descriptions  
Signal  
Pin  
Name  
Description  
A2  
C2  
CGND  
Chassis Ground—This pin is tied to the SCXI chassis.  
DTEMP  
Direct Temperature Sensor—This pin connects the temperature  
sensor to the MCH4+ when the terminal block is configured for  
direct temperature connection.  
A4  
C4  
A6  
+5 V  
+5 VDC Source—This pin is used to power the temperature sensor  
on the terminal block. 0.2 mA of source not protected.  
MTEMP  
SCAL  
Multiplexed Temperature Sensor—This pin connects the  
temperature sensor to the output multiplexer.  
Shunt Calibration—This pin is tied to the SCAL bit and is used to  
control the SCXI-1321 shunt calibration switch. CMOS/TTL  
output; not protected.  
C6, C8  
RSVD  
Reserved—These pins are reserved. Do not connect any signal to  
these pins.  
A8,C10,C16, No Connect Do not connect any signal to these pins.  
C22, C28  
A10  
A12  
C12  
A14  
C14  
A16  
A18  
EGND3  
EX3+  
Excitation Ground 3—This pin connects to the excitation ground 3  
via a 51 kresistor.  
Positive Excitation Output 3—This pin is connected to the  
excitation channel 3 positive output.  
EX3–  
Negative Excitation Output 3—This pin is connected to the  
excitation channel 3 negative output.  
CH3+  
CH3–  
Positive Input Channel 3—This pin is connected to the input  
channel 3 positive input.  
Negative Input Channel 3—This pin is connected to the input  
channel 3 negative input.  
EGND2  
EX2+  
Excitation Ground 2—This pin connects to the excitation ground 2  
via a 51 kresistor.  
Positive Excitation Output 2—This pin is connected to the  
excitation channel 2 positive output.  
© National Instruments Corporation  
D-3  
SCXI-1121 User Manual  
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Appendix D  
SCXI-1121 Front Connector  
Signal  
Name  
Pin  
Description  
C18  
A20  
C20  
A22  
A24  
C24  
A26  
C26  
A28  
A30  
C30  
A32  
C32  
EX2–  
CH2+  
CH2–  
EGND1  
EX1+  
EX1–  
CH1+  
CH1–  
EGND0  
EX0+  
EX0–  
CH0+  
CH0–  
Negative Excitation Output 2—This pin is connected to the  
excitation channel 2 negative output.  
Positive Input Channel 2—This pin is connected to the input  
channel 2 positive input.  
Negative Input Channel 2—This pin is connected to the input  
channel 2 negative input.  
Excitation Ground 1—This pin connects to the excitation ground 1  
via a 51 kresistor.  
Positive Excitation Output 1—This pin is connected to the  
excitation channel 1 positive output.  
Negative Excitation Output 1—This pin is connected to the  
excitation channel 1 negative output.  
Positive Input Channel 1—This pin is connected to the input  
channel 1 positive input.  
Negative Input Channel 1—This pin is connected to the input  
channel 1 negative input.  
Excitation Ground 0—This pin connects to the excitation ground 0  
via a 51 kresistor.  
Positive Excitation Output 0—This pin is connected to the  
excitation channel 0 positive output.  
Negative Excitation Output 0—This pin is connected to the  
excitation channel 0 negative output.  
Positive Input Channel 0—This pin is connected to the input  
channel 0 positive input.  
Negative Input Channel 0—This pin is connected to the input  
channel 0 negative input.  
Further information is given in Chapter 2, Configuration and Installation.  
SCXI-1121 User Manual  
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E
SCXI-1121 Cabling  
This appendix describes how to use and install the hardware accessories for  
the SCXI-1121:  
SCXI-1340 cable assembly  
SCXI-1341 Lab-NB, Lab-PC, and Lab-PC+ cable assembly  
SCXI-1344 Lab-LC cable assembly  
SCXI-1342 PC-LPM-16 cable assembly  
SCXI-1180 feedthrough panel  
SCXI-1302 50-pin terminal block  
SCXI-1351 one-slot cable extender  
SCXI-1350 multichassis adapter  
SCXI-1343 screw terminal adapter  
SCXI-1340 Cable Assembly  
The SCXI-1340 cable assembly connects an MIO-16 board to an  
SCXI-1121 module. The SCXI-1340 consists of a 50-conductor ribbon  
cable that has mounting bracket at one end and a 50-pin female connector  
at the other end. The female connector connects to the I/O connector of the  
MIO-16 board. Attached to the mounting bracket is a 50-pin female  
mounting-bracket connector that connects to the module rear signal  
connector. To extend the signals of the MIO-16 board to an SCXI-1180  
feedthrough panel or an SCXI-1181 breadboard module, you can use the  
male breakout connector that is near the mounting bracket on the ribbon  
cable. All 50 pins from the MIO-16 board go straight through to the rear  
signal connector.  
© National Instruments Corporation  
E-1  
SCXI-1121 User Manual  
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Appendix E  
SCXI-1121 Cabling  
You can use a standard 50-pin ribbon cable instead of the SCXI-1340 cable  
assembly. The SCXI-1340 has the following advantages over the ribbon  
cable:  
The SCXI-1340 has strain relief so that you cannot accidentally  
disconnect the cable.  
The SCXI-1340 includes a mounting bracket that mounts to the chassis  
so that you can remove and reinsert the module without explicitly  
removing the cable from the back of the chassis. This is especially  
useful when the SCXI chassis is rack mounted, making rear access  
difficult.  
The SCXI-1340 has an extra male breakout connector for use with the  
SCXI-1180 feedthrough panel or additional modules or breadboards  
that need a direct connection to the MIO-16 board.  
The SCXI-1340 rear panel gives the module and the chassis both  
mechanical and electrical shielding.  
Table E-1 lists the pin equivalences of the MIO-16 and the SCXI-1121.  
Table E-1. SCXI-1121 and MIO-16 Pinout Equivalences  
SCXI-1121 Rear  
Pin  
Signal Connector  
AOGND  
MCH 0+  
MCH 0–  
MCH 1+  
MCH1–  
MIO-16 Equivalent  
1–2  
3
AIGND  
ACH0  
4
ACH8  
5
ACH1  
6
ACH9  
7
MCH2+  
ACH2  
8
MCH2–  
ACH10  
ACH3  
9
MCH3+  
10  
11  
12  
19  
24, 33  
MCH3–  
ACH11  
ACH4  
MCH4+  
MCH4–  
ACH12  
AISENSE  
DIG GND  
OUTREF  
DIG GND  
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E-2  
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Appendix E  
SCXI-1121 Cabling  
Table E-1. SCXI-1121 and MIO-16 Pinout Equivalences (Continued)  
SCXI-1121 Rear  
Pin  
Signal Connector  
SERDATIN  
SERDATOUT  
DAQD*/A  
MIO-16 Equivalent  
ADIO0  
25  
26  
27  
29  
36  
37  
43  
BDIO0  
ADIO1  
SLOT0SEL*  
SCANCLK  
SERCLK  
ADIO2  
SCANCLK  
EXTSTROBE*  
OUT1  
RSVD  
No other pins are connected on the SCXI-1121.  
SCXI-1340 Installation  
Follow these steps to install the SCXI-1340:  
1. Make sure that the computer and the SCXI chassis are turned off.  
2. Install the SCXI module in the chassis.  
3. Plug the mounting bracket connector onto the module rear signal  
connector (see Figure E-1). Make sure the alignment tab on the bracket  
enters the upper board guide of the chassis.  
4. Screw the mounting bracket to the threaded strips in the rear of the  
chassis.  
5. Connect the loose end of the cable assembly to the MIO-16 board rear  
signal connector.  
Check the installation.  
After step 1, the order of these steps is not critical however, it is easier to  
locate the correct position for the mounting bracket with a module installed  
in the chassis. If you will attach a cable to the breakout connector,  
installation is easiest if you attach the second cable before installing the  
SCXI-1340.  
© National Instruments Corporation  
E-3  
SCXI-1121 User Manual  
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Appendix E  
SCXI-1121 Cabling  
Rear Panel  
Step 4  
Mounting Bracket  
Connector  
Step 5  
50-Pin Female  
Connector to  
MIO-16 Board  
Step 3  
Male Breakout  
Connector  
Step 4  
SCXI-1121 Rear  
Signal Connector  
Mounting Bracket  
Figure E-1. SCXI-1340 Installation  
SCXI-1341 Lab-NB, Lab-PC, or Lab-PC+ and SCXI-1344  
Lab-LC Cable Assembly  
The SCXI-1341 Lab-NB, Lab-PC, or Lab-PC+ cable assembly connects a  
Lab-NB, Lab-PC, or Lab-PC+ board to an SCXI-1121 module. The  
SCXI-1344 Lab-LC cable assembly connects a Lab-LC board to an  
SCXI-1121 module. The SCXI-1341 and SCXI-1344 cable assemblies  
consist of two pieces—an adapter board and a 50-conductor ribbon cable  
that connects the Lab board to the rear connector of the adapter board. The  
adapter board converts the signals from the Lab board I/O connectors to a  
format compatible with the SCXI-1121 rear signal connector pinout at the  
front connector of the SCXI-1341 or SCXI-1344. The adapter board also  
has an additional male breakout connector that makes the unmodified Lab  
board signals accessible to an SCXI-1180 feedthrough panel or an  
SCXI-1181 breadboard module. The adapter board gives the Lab boards  
full access to the digital control lines and analog signals, but the Lab boards  
cannot scan channels in Multiplexed mode. Leave jumper W1 in position A  
on the SCXI-1341 and SCXI-1344. The SCXI-1121 does not use  
SCXI-1121 User Manual  
E-4  
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Appendix E  
SCXI-1121 Cabling  
jumper W1. Table E-2 lists the SCXI-1341 and SCXI-1344 pin  
translations.  
Note If you are using the Lab-PC+, configure the board for single-ended inputs.  
Table E-2. SCXI-1341 and SCXI-1344 Pin Translations  
Lab Board Pin  
Lab Board Signal  
ACH0  
SCXI-1121 Pin  
SCXI-1121 Signal  
MCH0+  
1
2
3
5
ACH1  
MCH1+  
3
ACH2  
7
MCH2+  
4
ACH3  
9
MCH3+  
5
ACH4  
11  
13  
15  
17  
1-2  
20  
23  
21  
24, 33  
25  
27  
29  
37  
26  
28  
36  
46  
34-35  
MCH4+  
6
ACH5  
No Connect  
No Connect  
No Connect  
AOGND  
7
ACH6  
8
ACH7  
9
AIGND  
DAC0OUT  
AOGND  
DAC1OUT  
DGND  
PB4  
10  
11  
12  
13, 50  
26  
27  
28  
29  
31  
32  
40  
43  
49  
No Connect  
No Connect  
No Connect  
DIG GND  
SERDATIN  
DAQD*/A  
SLOT0SEL*  
SERCLK  
PB5  
PB6  
PB7  
PC1  
SERDATOUT  
No Connect  
SCANCLK  
No Connect  
No Connect  
PC2  
EXTCONV*  
OUTB1  
+5 V  
© National Instruments Corporation  
E-5  
SCXI-1121 User Manual  
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Appendix E  
SCXI-1121 Cabling  
All other pins of the Lab board pinout are not sent to the SCXI-1121 rear  
signal connector.  
SCXI-1341 and SCXI-1344 Installation  
Follow these steps to install the SCXI-1341 or SCXI-1344:  
1. Make sure that the computer and the SCXI chassis are turned off.  
2. Install the SCXI module in the chassis.  
3. Connect one end of the ribbon cable to the adapter board rear  
connector. This is the 50-pin connector of the SCXI-1344 cable.  
4. Plug the adapter board front connector to the module rear signal  
connector. Make sure a corner of the adapter board enters the upper  
board guide of the chassis.  
5. Screw the rear panel to the threaded strips in the rear of the chassis.  
6. For an SCXI-1341, connect the loose end of the ribbon cable to the  
Lab-NB, Lab-PC, or Lab-PC+ I/O connector. For an SCXI-1344,  
connect the two 26-pin connectors to the Lab-LC according to the  
instructions given in the Hardware Installation section of Chapter 2,  
Configuration and Installation, of the Lab-LC User Manual.  
Check the installation.  
SCXI-1342 PC-LPM-16 Cable Assembly  
The SCXI-1342 PC-LPM-16 cable assembly connects a PC-LPM-16 board  
to an SCXI-1121 module. The SCXI-1342 cable assembly consists of two  
pieces—an adapter board and a 50-conductor ribbon cable that connects the  
PC-LPM-16 board to the adapter board. The adapter board converts the  
signals from the PC-LPM-16 I/O connector to a format compatible with the  
SCXI-1121 rear signal connector pinout. The adapter board also has an  
additional male breakout connector that makes the unmodified PC-LPM-16  
signals accessible to an SCXI-1180 feedthrough panel or an SCXI-1181  
breadboard module. The adapter board gives the PC-LPM-16 full access to  
the digital control lines and analog signals, but the PC-LPM-16 cannot scan  
channels in Multiplexed mode. Leave jumper W1 in position A on the  
SCXI-1342. The SCXI-1121 does not use jumper W1. Table E-3 lists the  
SCXI-1342 pin translations.  
SCXI-1121 User Manual  
E-6  
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Appendix E  
SCXI-1121 Cabling  
Table E-3. SCXI-1342 Pin Translations  
PC-LPM-16 Pin PC-LPM-16 Signal Rear Signal Connector Pin  
SCXI-1121 Use  
AOGND  
1-2  
3
AIGND  
ACH0  
ACH8  
ACH1  
ACH9  
ACH2  
ACH10  
ACH3  
ACH11  
ACH4  
ACH12  
ACH5  
ACH13  
ACH6  
ACH14  
ACH7  
ACH15  
DGND  
DIN6  
1-2  
3
MCH0+  
4
4
MCH0–  
5
5
MCH1+  
6
6
MCH1-  
7
7
MCH2+  
8
8
MCH2–  
9
9
MCH3+  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19, 50  
28  
29  
34  
35  
36  
37  
46  
49  
10  
11  
12  
13  
14  
15  
16  
17  
18  
24, 33  
26  
28  
25  
27  
29  
37  
46  
34-35  
MCH3–  
MCH4+  
MCH4–  
No Connect  
No Connect  
No Connect  
No Connect  
No Connect  
No Connect  
DIG GND  
SERDATOUT  
No Connect  
SERDATIN  
DAQD*/A  
SLOT0SEL*  
SERCLK  
DIN7  
DOUT4  
DOUT5  
DOUT6  
DOUT7  
OUT2  
+5 V  
No Connect  
No Connect  
© National Instruments Corporation  
E-7  
SCXI-1121 User Manual  
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Appendix E  
SCXI-1121 Cabling  
All other pins of the PC-LPM-16 pinout are not sent to the SCXI-1121 rear  
signal connector.  
SCXI-1342 Installation  
Follow these steps to install the SCXI-1342:  
1. Make sure that the computer and the SCXI chassis are turned off.  
2. Install the SCXI module to which the SCXI-1342 will connect.  
3. Connect one end of the ribbon cable to the adapter board rear  
connector.  
4. Plug the adapter board front connector onto the module rear signal  
connector. Make sure a corner of the adapter board enters the upper  
board guide of the chassis.  
5. Screw the rear panel to the threaded strips in the rear of the chassis.  
6. Connect the loose end of the ribbon cable to the PC-LPM-16 I/O  
connector.  
Check the installation.  
SCXI-1180 Feedthrough Panel  
The SCXI-1180 feedthrough panel provides front-panel access to the  
signals of any data acquisition board that uses a 50-pin I/O connector. The  
SCXI-1180 consists of a front panel with a 50-pin male front panel  
connector that occupies one slot in the SCXI chassis, and a ribbon cable  
with a female rear connector and a male breakout connector. You can attach  
the rear connector to the male breakout connector of an SCXI-1340,  
SCXI-1341, SCXI-1342, SCXI-1344, or SCXI-1351 in the adjacent slot.  
The breakout connector further extends the cabling scheme. The front panel  
connector provides the feedthrough connection. You can attach an  
SCXI-1302 terminal block to the front panel connector for simple screw  
terminal connections. A rear filler panel that shields and protects the  
interior of the SCXI chassis is also included.  
SCXI-1121 User Manual  
E-8  
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Appendix E  
SCXI-1121 Cabling  
SCXI-1180 Installation  
Install the SCXI-1180 to the right of a slot that has an SCXI-1340,  
SCXI-1341, SCXI-1342, or SCXI-1344 cable assembly or an SCXI-1351  
slot extender in its rear connector space.  
Follow these steps to install the SCXI-1180:  
1. Make sure that the computer and the SCXI chassis are turned off.  
2. Remove the front filler panel of the slot where you will insert the  
SCXI-1180.  
3. Thread the rear connector through the front of the chassis to the rear of  
the chassis. Attach the rear connector to the breakout connector of the  
adjacent cable assembly or slot extender, as shown in Figure E-2.  
Threaded Strip in  
Step 4  
Rear of Chassis  
Step 3  
SCXI-1180  
Breakout Connector  
Rear  
Panel  
Breakout Connector  
from SCXI-1340  
Rear Connector  
Ribbon Cable to  
Front Panel  
Figure E-2. SCXI-1180 Rear Connections  
4. Screw in the rear panel to the threaded strip in the rear of the chassis.  
5. Screw the front panel into the front threaded strip, as shown in  
Figure E-3.  
Check the installation.  
© National Instruments Corporation  
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Appendix E  
SCXI-1121 Cabling  
Front Panel  
Connector  
Ribbon Cable to  
Rear and Breakout  
Connectors  
Step 5  
Front Threaded Strip  
Figure E-3. SCXI-1180 Front Panel Installation  
Front Panel  
SCXI-1302 50-Pin Terminal Block  
The SCXI-1302 terminal block has screw terminal connections for the  
50-pin connector on the SCXI-1180 feedthrough panel.  
SCXI-1302 Wiring Procedure  
To wire the SCXI-1302 terminal block, you must remove the cover, connect  
all the wiring, and replace the cover. The procedure for this is as follows:  
1. Unscrew the rear grounding screw on the back of the terminal block,  
as shown in Figure E-4.  
2. With a flathead screwdriver, carefully pry the cover off the terminal  
block.  
3. Insert each wire through the terminal block strain-relief opening.  
4. Connect the wires to the screw terminals.  
5. Tighten the large strain-relief screws to secure the wires.  
SCXI-1121 User Manual  
E-10  
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Appendix E  
SCXI-1121 Cabling  
6. Snap the cover back in place.  
7. Reinsert the rear grounding screw. The terminal block is now ready to  
be connected to the front panel connector.  
50-Pin  
Connector  
Grounding  
Screw  
Step 2  
Step 1  
Insert Screwdriver in  
Groove and Rotate to  
Pry Open  
Thumbscrew Cutout  
Figure E-4. Cover Removal  
SCXI-1302 Installation  
Follow these steps to install the SCXI-1302:  
1. Install an SCXI-1180 feedthrough panel as described in the SCXI-1180  
Installation section.  
2. Wire the terminal block as described in the SCXI-1302 Wiring  
Procedure section.  
3. Connect the SCXI-1302 terminal block to the front panel connector on  
the SCXI-1180 feedthrough panel. Be careful to fit the thumbscrews in  
the thumbscrew cutouts.  
4. Tighten the top and bottom captive screws on the back of the terminal  
block into the screw holes in the front panel. This will hold the  
SCXI-1302 securely in place.  
5. Check the installation.  
© National Instruments Corporation  
E-11  
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Appendix E  
SCXI-1121 Cabling  
SCXI-1351 One-Slot Cable Extender  
The SCXI-1351 cable extender is a miniature SCXI-1340 cable assembly.  
Instead of connecting to an MIO board 1 m away, the SCXI-1351 female  
rear connector connects to the male breakout connector of a module that  
must be in the rear connector space of the slot to the left. The SCXI-1351  
has a female mounting bracket connector that mates with the rear signal  
connector of a module, and also has a male breakout connector on the  
ribbon cable for connecting to a feedthrough panel or more cable extenders.  
SCXI-1351 Installation  
1. Make sure that the computer and the SCXI chassis are turned off.  
2. Install the SCXI module in the chassis.  
3. Connect the rear connector of the cable extender to the breakout  
connector in the adjacent slot. This attachment is similar to Step 3 in  
the SCXI-1180 Installation section, as shown in Figure E-2.  
4. Plug the mounting bracket connector to the module rear signal  
connector. Make sure the alignment tab on the bracket enters the upper  
board guide of the chassis.  
5. Screw the mounting bracket to the threaded strips in the rear of the  
chassis.  
Check the installation.  
SCXI-1350 Multichassis Adapter  
You use the SCXI-1350 multichassis adapter to connect an additional  
SCXI-1001 chassis to the MIO-16 board. Using several SCXI-1350s, you  
can connect up to eight chassis to a single MIO board. The SCXI-1350  
consists of a multichassis adapter board. You will also need a ribbon cable  
for each chassis-to-chassis connection, as well as a ribbon cable to connect  
the MIO board to the first chassis.  
Note Use 0.5 m ribbon cable when connecting multiple chassis together to minimize cable  
length and maintain signal integrity. You can use a 1 m cable to connect the MIO board to  
SCXI-1121 User Manual  
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SCXI-1121 Cabling  
The adapter board has a male rear connector, a female front connector, and  
a male chassis extender connector. You can attach the rear connector to a  
ribbon cable from the MIO board or a preceding chassis. You connect the  
front connector with the module rear signal connector. You connect the  
chassis extender connector to a ribbon cable that goes to the subsequent  
chassis. The adapter takes Channel 0 from the front connector and sends it  
to Channel 0 of the rear connector. The adapter also takes channels 0  
through 6 on the chassis extender connector and maps them to channels 1  
through 7, respectively, on the rear connector.  
SCXI-1350 Installation  
Follow these steps to install the SCXI-1350:  
1. Make sure that the computer and all the SCXI chassis are turned off.  
2. Insert all the modules in all the chassis.  
3. Connect one end of a ribbon cable to the MIO board.  
4. Connect the other end of the ribbon cable to the rear connector of the  
first SCXI-1350.  
5. Connect another ribbon cable or cable assembly to the chassis extender  
connector.  
6. Plug the adapter board front connector to the module rear signal  
connector. Make sure a corner of the adapter board enters the upper  
board guide of the chassis.  
7. Screw the rear panel to the threaded strips in the rear of the chassis.  
8. Connect the cable assembly to the desired module in the second  
chassis, or if you are using more than two chassis, connect the loose  
end of the ribbon cable to the rear connector of the second SCXI-1350,  
and install the adapter board.  
9. Continue until all chassis are connected. For N chassis, you will need  
N ribbon cables and N multichassis adapters.  
© National Instruments Corporation  
E-13  
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Appendix E  
SCXI-1121 Cabling  
SCXI-1343 Rear Screw Terminal Adapter  
You use the SCXI-1343 universal adapter to adapt custom wiring to the  
SCXI-1121. The SCXI-1343 has screw terminals for the analog output  
connections and solder pads for the rest of the signals. A strain-relief clamp  
is on the outside of the rear panel. Table E-4 shows the SCXI-1343 pin  
connections.  
SCXI-1343 Installation  
Follow these steps to install the SCXI-1343:  
1. Insert each wire through the adapter strain-relief opening.  
2. Make all solder connections first.  
3. Connect the other wires to the screw terminals.  
4. Tighten the strain-relief screws to secure the wires.  
5. Plug the adapter board front connector to the module rear signal  
connector. Make sure a corner of the adapter board enters the upper  
board guide of the chassis.  
6. Screw the rear panel to the threaded strips in the rear of the chassis.  
Table E-4. SCXI-1343 Pin Connections  
Rear Signal  
Connector Pin  
SCXI-1121 Use  
AOGND  
AOGND  
MCH0+  
MCH0–  
Connection Type  
Solder pad  
1
2
Screw terminal  
Screw terminal  
Screw terminal  
Screw terminal  
Screw terminal  
Screw terminal  
Screw terminal  
Screw terminal  
Screw terminal  
Screw terminal  
3
4
5
MCH1+  
MCH1–  
6
7
MCH2+  
MCH2–  
8
9
MCH3+  
MCH3–  
10  
11  
MCH4+  
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Appendix E  
SCXI-1121 Cabling  
Table E-4. SCXI-1343 Pin Connections (Continued)  
Rear Signal  
Connector Pin  
SCXI-1121 Use  
Connection Type  
Screw terminal  
Screw terminal  
Screw terminal  
Screw terminal  
Screw terminal  
Screw terminal  
Screw terminal  
Screw terminal  
Solder pad  
12  
13  
MCH4–  
No Connect  
No Connect  
No Connect  
No Connect  
No Connect  
No Connect  
OUTREF  
14  
15  
16  
17  
18  
19  
20  
No Connect  
No Connect  
No Connect  
No Connect  
DIG GND  
21  
Solder pad  
22  
Solder pad  
23  
Solder pad  
24, 33  
26  
Solder pad  
SERDATOUT  
DAQD*/A  
Solder pad  
27  
Solder pad  
28  
No Connect  
SLOT0SEL*  
No Connect  
No Connect  
No Connect  
No Connect  
No Connect  
SCANCLK  
SERCLK  
Solder pad  
29  
Solder pad  
30  
Solder pad  
31  
Solder pad  
32  
Solder pad  
33  
Solder pad  
34-35  
36  
Solder pad  
Solder pad  
37  
Solder pad  
38  
No Connect  
Solder pad  
© National Instruments Corporation  
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Appendix E  
SCXI-1121 Cabling  
Table E-4. SCXI-1343 Pin Connections (Continued)  
Rear Signal  
Connector Pin  
SCXI-1121 Use  
No Connect  
No Connect  
No Connect  
No Connect  
RSVD  
Connection Type  
Solder pad  
Solder pad  
Solder pad  
Solder pad  
Solder pad  
Solder pad  
Solder pad  
Solder pad  
Solder pad  
Solder pad  
Solder pad  
Solder pad  
39  
40  
41  
42  
43  
44  
45  
46  
47  
48  
49  
50  
No Connect  
No Connect  
No Connect  
No Connect  
No Connect  
No Connect  
No Connect  
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F
Revision A and B Photo and  
Parts Locator Diagrams  
This appendix contains a photograph of the Revision A and B SCXI-1121  
signal conditioning module and the general and detailed parts locator  
diagrams.  
Figure F-1 shows the SCXI-1121 module. Figures F-2 and F-3 show the  
general and detailed parts locator diagrams of the Revision A and B  
SCXI-1121.  
Figure F-1. Revision A and B SCXI-1121 Signal Conditioning Module  
© National Instruments Corporation  
F-1  
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Figure F-2. Revision A and B SCXI-1121 General Parts Locator Diagram  
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Figure F-3. Revision A and B SCXI-1121 Detailed Parts Locator Diagram  
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G
Technical Support Resources  
This appendix describes the comprehensive resources available to you in  
the Technical Support section of the National Instruments Web site and  
provides technical support telephone numbers for you to use if you have  
trouble connecting to our Web site or if you do not have internet access.  
NI Web Support  
To provide you with immediate answers and solutions 24 hours a day,  
365 days a year, National Instruments maintains extensive online technical  
support resources. They are available to you at no cost, are updated daily,  
and can be found in the Technical Support section of our Web site at  
www.natinst.com/support.  
Online Problem-Solving and Diagnostic Resources  
KnowledgeBase—A searchable database containing thousands of  
frequently asked questions (FAQs) and their corresponding answers or  
solutions, including special sections devoted to our newest products.  
The database is updated daily in response to new customer experiences  
and feedback.  
Troubleshooting Wizards—Step-by-step guides lead you through  
common problems and answer questions about our entire product line.  
Wizards include screen shots that illustrate the steps being described  
and provide detailed information ranging from simple getting started  
instructions to advanced topics.  
Product Manuals—A comprehensive, searchable library of the latest  
editions of National Instruments hardware and software product  
manuals.  
Hardware Reference Database—A searchable database containing  
brief hardware descriptions, mechanical drawings, and helpful images  
of jumper settings and connector pinouts.  
Application Notes—A library with more than 100 short papers  
addressing specific topics such as creating and calling DLLs,  
developing your own instrument driver software, and porting  
applications between platforms and operating systems.  
© National Instruments Corporation  
G-1  
SCXI-1121 User Manual  
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Appendix G  
Technical Support Resources  
Software-Related Resources  
Instrument Driver Network—A library with hundreds of instrument  
drivers for control of standalone instruments via GPIB, VXI, or serial  
interfaces. You also can submit a request for a particular instrument  
driver if it does not already appear in the library.  
Example Programs Database—A database with numerous,  
non-shipping example programs for National Instruments  
programming environments. You can use them to complement the  
example programs that are already included with National Instruments  
products.  
Software Library—A library with updates and patches to application  
software, links to the latest versions of driver software for National  
Instruments hardware products, and utility routines.  
Worldwide Support  
National Instruments has offices located around the globe. Many branch  
offices maintain a Web site to provide information on local services. You  
can access these Web sites from www.natinst.com/worldwide.  
If you have trouble connecting to our Web site, please contact your local  
National Instruments office or the source from which you purchased your  
National Instruments product(s) to obtain support.  
For telephone support in the United States, dial 512 795 8248. For  
telephone support outside the United States, contact your local branch  
office:  
Australia 03 9879 5166, Austria 0662 45 79 90 0, Belgium 02 757 00 20,  
Brazil 011 284 5011, Canada (Calgary) 403 274 9391,  
Canada (Ontario) 905 785 0085, Canada (Québec) 514 694 8521,  
China 0755 3904939, Denmark 45 76 26 00, Finland 09 725 725 11,  
France 01 48 14 24 24, Germany 089 741 31 30, Greece 30 1 42 96 427,  
Hong Kong 2645 3186, India 91805275406, Israel 03 6120092,  
Italy 02 413091, Japan 03 5472 2970, Korea 02 596 7456,  
Mexico (D.F.) 5 280 7625, Mexico (Monterrey) 8 357 7695,  
Netherlands 0348 433466, Norway 32 27 73 00, Singapore 2265886,  
Spain (Barcelona) 93 582 0251, Spain (Madrid) 91 640 0085,  
Sweden 08 587 895 00, Switzerland 056 200 51 51,  
Taiwan 02 2377 1200, United Kingdom 01635 523545  
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Glossary  
Prefix  
p-  
Meaning  
pico-  
Value  
10–12  
10–9  
10– 6  
10–3  
103  
n-  
nano-  
micro-  
milli-  
µ-  
m-  
k-  
kilo-  
M-  
mega-  
106  
Numbers/Symbols  
°
degrees  
ohms  
ε
strain  
+5 V (signal)  
+5 VDC source signal  
A
A
amperes  
AB0+  
AB0–  
AB0EN  
AB2+  
AB2–  
ACH#  
A/D  
positive analog bus 0 line signal  
negative analog bus 0 line signal  
analog bus 0 enable bit  
positive analog bus 2 line signal  
negative analog bus 2 line signal  
data acquisition board analog input channel number  
analog-to-digital  
© National Instruments Corporation  
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Glossary  
AOGND  
Arms  
analog output ground signal  
amperes, root mean square  
American Wire Gauge  
AWG  
B
BW  
bandwidth  
C
C
Celsius  
CH#+  
positive input channel number signal  
negative input channel number signal  
channel select bit  
CH#–  
CHAN  
CHS  
chassis bit  
CHSGND  
CJR  
chassis ground signal  
cold-junction reference  
clock enable bit  
CLKEN  
CLKOUTEN  
CLKSELECT  
CNT  
scanclock output enable bit  
scanclock select bit  
count bit  
D
D*/A  
data/address line signal  
digital-to-analog  
D/A  
DAQD*/A  
dB  
data acquisition board data/address line signal  
decibels  
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Glossary  
DIG GND  
DIN  
digital ground signal  
Deutsche Industrie Norme  
digital multimeter  
DMM  
DTEMP  
DTS  
direct temperature sensor  
direct temperature sensor  
E
EGND#  
EX#+  
EX#–  
excitation ground number signal  
positive excitation output number signal  
negative excitation output number signal  
F
F
Fahrenheit  
FIFO  
FOUTEN*  
FRT  
first-in-first-out  
forced output enable bit  
forced retransmit bit  
G
GBWP  
gain bandwidth product  
guard signal  
GUARD  
H
hex  
hexadecimal  
HSCR  
hardscan control register  
© National Instruments Corporation  
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Glossary  
HSRS*  
Hz  
hardscan reset bit  
hertz  
I
II  
input current leakage  
inches  
in.  
INTR*  
I/O  
interrupt signal  
input/output  
K
K
kelvin  
L
LOAD*  
load bit  
LSB  
least significant bit  
M
m
meters  
M
megabytes of memory  
MCH#+  
MCH#–  
MISO  
MOD  
MOSI  
MSB  
positive analog output channel number signal  
negative analog output channel number signal  
master-in slave-out signal  
module number bit  
master-out slave-in signal  
most significant bit  
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Glossary  
MTEMP  
MTS  
multiplexed temperature sensor  
multiplexed temperature sensor  
N
NRSE  
nonreferenced single-ended (input)  
O
ONCE  
once bit  
OUTREF  
output reference signal  
P
ppm  
parts per million  
R
RAM  
random-access memory  
read bit  
RD  
RESET*  
rms  
reset signal  
root mean square  
RSE  
referenced single-ended (input)  
reserved bit/signal  
resistance temperature detector  
read temperature bit  
referred to input  
RSVD  
RTD  
RTEMP  
RTI  
RTO  
RTSI  
referred to output  
real time system integration  
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Glossary  
S
SCAL (bit)  
SCAL (signal)  
SCANCLK  
SCANCLKEN  
SCANCON  
SCANCONEN  
SCXI  
shunt calibrate bit  
shunt calibration signal  
scan clock signal  
scan clock enable bit  
scanning control signal  
scan control enable bit  
Signal Conditioning eXtensions for Instrumentation (bus)  
software developer’s kit  
seconds  
SDK  
sec  
SERCLK  
SERDATIN  
SERDATOUT  
SL  
serial clock signal  
serial data in signal  
serial data out signal  
slot bit  
SLOT0SEL*  
SPI  
slot 0 select signal  
serial peripheral interface  
serial peripheral interface clock signal  
slot select signal  
SPICLK  
SS*  
T
tempco  
temperature coefficient  
trigger 0 signal  
TRIG0  
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Glossary  
U
UL  
Underwriters Laboratory  
V
V
volts  
V+  
V–  
positive analog supply signal  
negative analog supply signal  
volts direct current  
volts input high  
VDC  
VIH  
VIL  
VOH  
VOL  
Vrms  
volts input low  
volts output high  
volts output low  
volts, root mean square  
W
W
watts  
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Index  
AC-coupled, with high common-mode  
voltage (figure), 2-21  
exceeding input range and  
common-mode input range  
(warning), 2-22  
Numbers  
+5 V signal  
front connector (table), 2-18, D-3  
SCXIbus connector (table), 3-4  
floating, referenced to chassis ground  
(figure), 2-20  
A
floating AC-coupled (figure), 2-21  
ground-referenced, with high  
common-mode voltage (figure), 2-20  
theory of operation, 3-8 to 3-11  
analog input specifications, A-1 to A-2  
analog output circuitry, 3-15 to 3-16  
analog output signal connections, 2-39  
AOGND signal (table), 2-38, B-2  
AB0+ signal (table), 3-4, C-3  
AB0- signal (table), 3-4, C-3  
AB0EN bit, 4-4  
AC-coupled signal connections  
external resistor required, 2-21  
floating (figure), 2-21  
referenced to chassis ground (figure), 2-20  
acquisition enable, programming, 5-14 to 5-15  
analog and timing circuitry, 3-8 to 3-16  
analog input channels, 3-8 to 3-11  
analog output circuitry, 3-15 to 3-16  
calibration, 3-11 to 3-14  
B
bits  
AB0EN, 4-4  
excitation output channels, 3-11  
analog configuration, 2-6 to 2-13  
excitation jumpers, 2-9 to 2-13  
current and voltage jumpers,  
2-9 to 2-10  
CHAN<1..0>, 4-4  
CHS<4..0>, 4-6  
CLKEN, 4-8  
CLKOUTEN, 4-3  
CLKSELECT, 4-3  
CNT<6..0>, 4-9  
FOUTEN*, 4-5  
FRT, 4-7  
HSRS*, 4-7  
LOAD*, 4-7  
ONCE, 4-7  
RD, 4-7  
RTEMP, 4-4  
SCAL, 4-3  
SCANCLKEN, 4-4  
SCANCONEN, 4-4, 4-8  
SL<3..0>, 4-6  
excitation level, 2-10 to 2-11  
internal half-bridge completion,  
2-12 to 2-13  
grounding, shielding, and reference mode  
selection, 2-6 to 2-7  
input channel jumpers, 2-8 to 2-13  
excitation jumpers, 2-9 to 2-13  
filter jumpers, 2-9  
gain jumpers, 2-8  
jumper W33, 2-6 to 2-7  
analog input channels  
block diagram, 3-9  
signal connections, 2-20 to 2-22  
© National Instruments Corporation  
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Index  
configuration  
analog, 2-6 to 2-13  
C
cable assemblies. See SCXI-1121 cabling.  
cables, custom, 1-5  
excitation jumpers, 2-9 to 2-13  
filter jumpers, 2-9  
gain jumpers, 2-8  
calibration, 3-11 to 3-14  
equipment requirements, 3-11 to 3-12  
excitation adjust, 3-13 to 3-14  
offset null adjust, 3-11  
potentiometer reference designators  
(table), 3-14  
grounding, shielding, and reference  
mode selection, 2-6 to 2-7  
input channel jumpers, 2-8 to 2-13  
jumper W33, 2-6 to 2-7  
digital signal connections  
jumper settings (figure), 2-5 to 2-6  
jumper W32, 2-4  
CGND signal (table), 2-18, D-3  
CH0+ signal (table), 2-19, D-4  
CH0- signal (table), 2-19, D-4  
CH1+ signal (table), 2-19, D-4  
CH1- signal (table), 2-19, D-4  
CH2+ signal (table), 2-19, D-4  
CH2- signal (table), 2-19, D-4  
CH3+ signal (table), 2-18, D-3  
CH3- signal (table), 2-18, D-3  
CHAN<1..0> bits, 4-4  
CHS<4..0> bits, 4-6  
CHSGND signal (table), 3-4, C-3  
CLKEN bit, 4-8  
CLKOUTEN bit, 4-3  
CLKSELECT bit, 4-3  
jumper W38, 2-4  
jumper W44, 2-3 to 2-4  
using jumpers W32 and W38,  
2-4 to 2-5  
excitation jumpers, 2-9 to 2-13  
current and voltage jumpers,  
2-9 to 2-10  
excitation level, 2-10 to 2-11  
internal half-bridge completion,  
2-12 to 2-13  
fixed jumpers, 2-2  
parts locator diagrams  
detailed (figure), 2-2  
general (figure), 2-1  
terminal blocks, 2-31 to 2-32  
user-configurable jumpers, 2-2 to 2-3  
Configuration Register  
CNT<6..0> bits, 4-9  
cold-junction sensor specifications,  
A-3 to A-4  
communication signals, 2-42 to 2-47  
overview, 2-42  
description, 4-3 to 4-5  
overview, 3-7  
write timing diagram, 2-45  
writing to  
reading from Module ID Register,  
2-45 to 2-46  
serial data timing diagram, 2-44  
slot-select timing diagram, 2-43  
timing requirements for SERCLK and  
SERDATIN signals (figure), 2-44  
writing 16-bit slot-select number to  
Slot 0, 2-43  
digital control circuitry, 3-7 to 3-8  
programming, 5-2 to 5-4  
slot-selection procedure, 2-44 to 2-45  
connector-and-shell assembly, 2-22 to 2-24  
connectors. See front connector; rear signal  
connector; SCXIbus connector.  
conventions used in manual, xi-xii  
writing to Configuration Register,  
2-44 to 2-45  
completion network jumpers (table),  
2-12 to 2-13  
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Index  
Counter 1, scanning measurements,  
5-9 to 5-10  
current and voltage excitation jumpers,  
2-9 to 2-10  
using jumpers W32 and W38, 2-4 to 2-5  
direct measurements, single-channel  
multiplexed output, 5-4 to 5-5  
parallel output, 5-4  
custom cables, 1-5  
single-channel measurements, 5-4 to 5-5  
direct multiplexed scanning,  
single-module, 5-11  
D
documentation  
D*/A signal  
conventions used in manual, xi-xii  
related documentation, xii  
DTEMP signal (table), 2-18, D-3  
DTS mode, terminal blocks, 2-31 to 2-32  
description (table), 3-4, C-3  
SCXIbus equivalents for rear signal  
connector (table), 3-5  
SCXIbus to SCXI-1121 rear signal  
connector to DAQ board pin  
equivalences (table), 2-41  
DAQD*/A signal. See also communication  
signals.  
E
EGND0 signal (table), 2-19, D-4  
EGND1 signal (table), 2-19, D-4  
EGND2 signal (table), 2-18, D-3  
EGND3 signal (table), 2-18, D-3  
environment specifications, A-4  
equipment, optional (table), 1-4  
EX0+ signal (table), 2-19, D-4  
EX0- signal (table), 2-19, D-4  
EX1+ signal (table), 2-19, D-4  
EX1- signal (table), 2-19, D-4  
EX2+ signal (table), 2-18, D-3  
EX2- signal (table), 2-18, D-4  
EX3+ signal (table), 2-18, D-3  
EX3- signal (table), 2-18, D-3  
excitation adjust, in calibration, 3-13 to 3-14  
excitation channels  
description (table), 2-38, B-2  
register writes, 5-2 to 5-3  
SCXIbus equivalents for rear signal  
connector (table), 3-5  
SCXIbus to SCXI-1121 rear signal  
connector to DAQ board pin  
equivalences (table), 2-41  
data acquisition board setup, for scanning  
measurements, 5-7 to 5-9  
diagnostic resources, online, G-1  
DIG GND signal (table), 2-38, B-2  
digital control circuitry, 3-7 to 3-8  
digital interface, 3-6  
digital signal connections  
input signals, 2-40  
signal connections, 2-22  
theory of operation, 3-11  
jumper settings (figure), 2-5 to 2-6  
jumper W32, 2-4  
excitation jumpers, 2-9 to 2-13  
current and voltage jumpers, 2-9 to 2-10  
excitation level, 2-10 to 2-11  
internal half-bridge completion,  
2-12 to 2-13  
jumper W38, 2-4  
jumper W44, 2-3 to 2-4  
output signals, 2-40  
SCXIbus to SCXI-1121 rear signal  
connector to DAQ board pin  
equivalences (table), 2-41  
specifications and ratings, 2-41  
timing signals, 2-41  
jumper selection (table), 2-11  
maximum load per excitation channel  
(table), 2-11  
© National Instruments Corporation  
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Index  
F
H
FIFO Register  
half-bridge completion  
completion network jumpers (table),  
2-12 to 2-13  
description, 4-9  
register writes, 5-2 to 5-4  
filter jumpers  
using internal half-bridge  
completion, 2-12  
allocation (table), 2-9  
description, 2-9  
Hardscan Control Register (HSCR)  
description, 4-7 to 4-8  
register writes, 5-2 to 5-4  
hardware installation, 2-14  
HSRS* bit, 4-7  
fixed jumpers, 2-2  
floating signal connections  
AC-coupled (figure), 2-21  
referenced to chassis ground  
(figure), 2-20  
FOUTEN* bit, 4-5  
I
front connector, 2-16 to 2-36  
analog input channels, 2-20 to 2-22  
connector-and-shell assembly,  
2-22 to 2-24  
indirect measurements, single-channel,  
5-5 to 5-6  
from other modules, 5-5  
from SCXI-1121 via another  
module, 5-55-6  
excitation channels, 2-22  
pin assignments (figure), 2-17, D-2  
SCXI-1320, SCXI-1328, and SCXI-1321  
terminal blocks, 2-24 to 2-36  
signal descriptions (table), 2-18 to 2-19,  
D-3 to D-4  
indirect multiplexed scanning, single-module,  
5-11 to 5-12  
channel scanning from other  
modules, 5-11  
channel scanning from SCXI-1121 via  
another module, 5-11 to 5-12  
initialization of registers, 5-4  
input channel jumpers, 2-8 to 2-13  
excitation jumpers, 2-9 to 2-13  
current and voltage jumpers,  
2-9 to 2-10  
temperature sensor connection, 2-22  
FRT bit, 4-7  
G
gain jumpers  
allocation (table), 2-8  
positions (table), 2-8  
grounding, jumper settings for, 2-6 to 2-7  
ground-referenced signal connections  
with high common-mode voltage  
(figure), 2-20  
referenced to chassis ground  
(figure), 2-20  
excitation level, 2-10 to 2-11  
internal half-bridge completion,  
2-12 to 2-13  
filter jumpers, 2-9  
gain jumpers, 2-8  
installation  
hardware installation, 2-14  
SCXI-1180 feedthrough panel,  
E-9 to E-10  
SCXI-1302 50-pin terminal block, E-11  
SCXI-1340 cable assembly, E-3 to E-4  
SCXI-1121 User Manual  
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SCXI-1341 Lab-NB, Lab-PC, or  
Lab-PC+ cable assembly, E-6  
SCXI-1342 PC-LPM-16 cable  
assembly, E-8  
W33, 2-6 to 2-7  
W38  
configuration, 2-4 to 2-5  
description, 2-4  
SCXI-1343 rear screw terminal  
adapter, E-14  
settings (table), 2-5  
W44  
SCXI-1344 Lab-PC+ cable assembly, E-6  
SCXI-1350 multichassis adapter, E-13  
SCXI-1351 one-slot cable extender, E-12  
terminal blocks, 2-36  
configuration, 2-3 to 2-4  
settings (table), 2-6  
W45 (table), 2-5  
unpacking SCXI-1121, 1-6  
internal half-bridge completion, 2-12 to 2-13  
INTR* signal  
L
LabVIEW for Macintosh software, 1-3  
LabVIEW for Windows software, 1-2  
LabWindows/CVI software, 1-2  
LOAD* bit, 4-7  
description (table), 3-4, C-3  
SCXIbus equivalents for rear signal  
connector (table), 3-5  
SCXIbus to SCXI-1121 rear signal  
connector to DAQ board pin  
equivalences (table), 2-41  
M
manual. See documentation.  
MCH0± through MCH4± signals (table),  
2-38, B-2  
J
jumpers  
MISO signal  
fixed jumpers, 2-2  
description (table), 3-4, C-3  
SCXIbus equivalents for rear signal  
connector (table), 3-5  
settings for nulling circuits (table), 2-28  
terminal block configuration, 2-31 to 2-32  
user-configurable jumpers, 2-2 to 2-3  
W1  
SCXIbus to SCXI-1121 rear signal  
connector to DAQ board pin  
equivalences (table), 2-41  
module configuration. See configuration.  
Module ID Register  
nulling circuit setting (table), 2-28  
SCXI-1320 terminal block  
(table), 2-32  
SCXI-1328 terminal block  
(table), 2-32  
description, 4-2  
overview, 3-8  
W2 nulling circuit setting (table), 2-28  
W3 (table), 2-28  
reading from, 2-45 to 2-46  
timing diagram, 2-46  
W4 (table), 2-28  
MOSI signal  
W5 (table), 2-32  
W32  
description (table), 3-4, C-3  
SCXIbus equivalents for rear signal  
connector (table), 3-5  
configuration, 2-4 to 2-5  
description, 2-4  
settings (table), 2-6  
© National Instruments Corporation  
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SCXIbus to SCXI-1121 rear signal  
connector to DAQ board pin  
equivalences (table), 2-41  
offset-null terminal block. See SCXI-1321  
terminal block.  
ONCE bit, 4-7  
MTEMP signal (table), 2-18, D-3  
MTS mode, terminal blocks, 2-31 to 2-32  
multiple-chassis scanning  
programming, 5-12 to 5-13  
theory of operation, 3-20  
multiplexed output, single-channel  
measurements, 5-4 to 5-5  
multiplexed scanning  
online problem-solving and diagnostic  
resources, G-1  
operation of SCXI-1121. See theory of  
operation.  
optional equipment (table), 1-4  
optional software, 1-2 to 1-3  
OUTREF signal (table), 2-38, B-2  
multiple-module  
P
description, 3-19  
parallel output, single-channel  
measurements, 5-4  
programming, 5-12  
overview, 3-17 to 3-18  
parallel scanning, single-module  
description, 3-17  
single-module, 3-18 to 3-19  
direct, 3-18  
programming, 5-10  
indirect, 3-18 to 3-19  
Parallel-Output mode, 3-16  
parts locator diagrams  
programming, 5-11 to 5-12  
Multiplexed-Output mode, 3-16  
MUXCOUNTER, 3-15 to 3-16  
Revision A and B  
detailed, F-3  
general, F-2  
N
SCXI-1121  
detailed (figure), 2-2  
general (figure), 2-1  
National Instruments Web support, G-1 to G-2  
NI-DAQ software, 1-2  
SCXI-1320 terminal block, 2-34  
SCXI-1321 terminal block, 2-36  
SCXI-1328 terminal block, 2-35  
physical specifications, A-4  
pin assignments  
for Macintosh, 1-3  
notation, for programming, 5-1  
nulling circuitry, SCXI-1321 terminal block,  
2-25 to 2-27  
formula for nulling range, 2-26 to 2-27  
jumper settings (table), 2-28  
nulling resistors and corresponding  
channel (table), 2-26  
trimmer potentiometer and corresponding  
channel (table), 2-25  
front connector (figure), 2-17, D-2  
rear signal connector (figure), 2-37, B-1  
SCXI-1343 Rear Screw Terminal Adapter  
(table), E-14 to E-16  
SCXIbus connector (figure), C-2  
pin translations (table)  
SCXI-1341 Lab-NB, Lab-PC, or  
Lab-PC+ cable assembly, E-5  
SCXI-1342 PC-LPM-16 cable assembly,  
E-6 to E-7  
O
offset null adjust, in calibration, 3-12 to 3-13  
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SCXI-1344 Lab-PC+ cable assembly, E-5  
problem-solving and diagnostic resources,  
online, G-1  
programming, 5-1 to 5-17  
notation, 5-1  
R
RD bit, 4-7  
rear signal connector, 2-37 to 2-46  
analog output, 2-39  
communication signals, 2-42 to 2-46  
digital I/O, 2-40 to 2-41  
pin assignments (figure), 2-37, B-1  
SCXIbus to SCXI-1121 to DAQ board  
pin equivalences (table), 2-41  
signal descriptions (table), 2-38, B-2  
timing requirements and communication  
protocol, 2-42  
register writes, 5-2 to 5-4  
initialization, 5-4  
register selection and write  
procedure, 5-2 to 5-3  
SCXI-1121 rear signal connector  
equivalences (table), 5-2  
scanning measurements, 5-7 to 5-15  
acquisition enable, triggering, and  
servicing, 5-14 to 5-15  
reference mode selection, jumper settings for,  
2-6 to 2-7  
Counter 1 and SCANDIV,  
5-9 to 5-10  
data acquisition board setup,  
5-7 to 5-9  
register writes, 5-2 to 5-4  
Configuration Register  
digital control circuitry, 3-7 to 3-8  
programming, 5-2 to 5-4  
slot-selection procedure, 2-44 to 2-45  
initialization, 5-4  
examples, 5-15 to 5-17  
module programming, 5-10 to 5-13  
multiple-chassis scanning,  
5-12 to 5-13  
multiple-module multiplexed  
scanning, 5-12  
single-module multiplexed scanning  
(indirect), 5-11 to 5-12  
single-module parallel  
register selection and write procedure,  
5-2 to 5-3  
SCXI-1121 rear signal connector  
equivalences (table), 5-2  
registers, 4-1 to 4-9  
Configuration Register  
description, 4-3 to 4-5  
scanning, 5-10  
Slot 0 hardscan circuitry,  
5-13 to 5-14  
overview, 3-7  
write timing diagram, 2-45  
writing to, 2-44 to 2-45, 3-7 to 3-8,  
5-2 to 5-4  
single-channel measurements, 5-4 to 5-6  
direct measurements, 5-4 to 5-5  
indirect measurements, 5-5 to 5-6  
multiplexed output, 5-4 to 5-5  
from other modules, 5-5  
parallel output, 5-4  
description format, 4-1  
FIFO Register  
description, 4-9  
register writes, 5-2 to 5-4  
Hardscan Control Register (HSCR),  
4-7 to 4-8  
from SCXI-1121 via another module,  
5-5, 5-6  
programming languages, SCXI-1121 support  
for, 1-2 to 1-3  
Module ID Register  
description, 4-2  
overview, 3-8  
reading from, 2-45 to 2-46  
© National Instruments Corporation  
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Index  
timing diagram, 2-46  
Slot 0 Register  
multiple-module multiplexed  
scanning, 5-12  
single-module multiplexed scanning,  
5-11 to 5-12  
description, 4-5  
programming hardscan circuitry,  
5-13 to 5-14  
single-module parallel scanning, 5-10  
Slot 0 hardscan circuitry, 5-13 to 5-14  
scanning modes, 3-17 to 3-20  
analog output circuitry, 3-15  
multiple-chassis scanning, 3-20  
multiple-module multiplexed  
scanning, 3-19  
Slot-Select Register, 4-6  
register writes, 5-2 to 5-4  
RESET* signal (table), 3-4, C-3  
Revision A and B  
parts locator diagram  
detailed, F-3  
multiplexed scanning, 3-17 to 3-18  
single-module multiplexed scanning,  
3-18 to 3-19  
general, F-2  
photograph, F-1  
RTDs  
single-module parallel scanning, 3-17  
SCXI-1121. See also configuration;  
installation; theory of operation.  
block diagram, 3-1  
specifications for RTD mode, A-3  
using with SCXI-1321 terminal block,  
2-27 to 2-28  
RTEMP bit, 4-4  
custom cables, 1-5  
kit contents, 1-2  
S
major components, 3-2  
optional equipment (table), 1-4  
optional software, 1-2 to 1-3  
overview, 1-1  
safety specifications, A-4  
SCAL bit, 4-3  
SCAL signal (table), 2-18, D-3  
SCANCLK signal  
parts locator diagrams  
detailed (figure), 2-2  
general (figure), 2-1  
Revision A and B  
description (table), 2-38, B-2  
timing requirements, 2-42  
SCANCLKEN bit, 4-4  
parts locator diagram, F-2 to F-3  
photograph, F-1  
unpacking, 1-6  
SCANCON signal (table), 3-5, C-4  
SCANCONEN bit, 4-4, 4-8  
SCANDIV bit, scanning measurements,  
5-9 to 5-10  
SCXI-1121 cabling  
scanning measurements, programming,  
5-7 to 5-15  
SCXI-1180 feedthrough panel,  
E-8 to E-10  
acquisition enable, triggering, and  
servicing, 5-14 to 5-15  
SCXI-1302 50-pin terminal block,  
E-10 to E-11  
Counter 1 and SCANDIV, 5-9 to 5-10  
examples, 5-15 to 5-17  
module programming, 5-10 to 5-13  
multiple-chassis scanning, 5-12 to 5-13  
SCXI-1340 cable assembly, E-1 to E-4  
SCXI-1341 Lab-NB, Lab-PC, or  
Lab-PC+ cable assembly, E-4 to E-6  
SCXI-1342 PC-LPM-16 cable assembly,  
E-6 to E-8  
SCXI-1121 User Manual  
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SCXI-1343 rear screw terminal adapter,  
E-14 to E-16  
SCXI-1344 Lab-PC+ cable assembly,  
E-4 to E-6  
SCXI-1350 multichassis adapter,  
E-12 to E-13  
trimmer potentiometer and corresponding  
channel (table), 2-25 to 2-27  
using with RTDs and thermistors, 2-27  
SCXI-1328 terminal block. See SCXI-1320  
and SCXI-1328 terminal blocks.  
SCXI-1340 cable assembly  
description, E-1 to E-2  
SCXI-1351 one-slot cable extender, E-12  
SCXI-1180 feedthrough panel, E-8 to E-10  
description, E-8  
installation, E-9 to E-10  
SCXI-1302 50-pin terminal block,  
E-10 to E-11  
installation, E-3 to E-4  
SCXI-1121 and MIO-16 pinout  
equivalences (table), E-2 to E-3  
SCXI-1341 Lab-NB, Lab-PC, or Lab-PC+  
cable assembly, E-4 to E-6  
description, E-4 to E-6  
installation, E-11  
wiring procedure, E-10 to E-11  
SCXI-1320 and SCXI-1328 terminal blocks  
connecting signals, 2-24  
installation, 2-36  
installation, E-6  
pin translations (table), E-5  
SCXI-1342 PC-LPM-16 cable assembly,  
E-6 to E-8  
description, E-6  
installation, E-8  
pin translations (table), E-6 to E-7  
SCXI-1343 rear screw terminal adapter,  
E-14 to E-16  
insulating signal wires (warning), 2-24  
jumper configuration, 2-31 to 2-32  
overview, 2-24  
parts locator diagrams  
SCXI-1320, 2-34  
installation, E-14  
SCXI-1328, 2-35  
pin connections (table), E-14 to E-16  
SCXI-1344 Lab-PC+ cable assembly,  
E-4 to E-6  
signal connections, 2-33  
temperature sensor, 2-30 to 2-31  
SCXI-1321 terminal block  
features, 2-25  
description, E-4  
installation, E-6  
installation, 2-36  
pin translations (table), E-5  
SCXI-1350 multichassis adapter, E-12 to E-13  
description, E-12 to E-13  
installation, E-13  
insulating signal wires (warning), 2-24  
jumper configuration, 2-30 to 2-31  
jumper settings of nulling circuits  
(table), 2-28  
SCXI-1351 one-slot cable extender, E-12  
SCXIbus connector  
nulling circuitry, 2-25 to 2-27  
nulling resistors and corresponding  
channel (table), 2-26  
equivalences  
rear signal connector (table), 3-5  
rear signal connector to DAQ board  
pin equivalences (table), 2-41  
pin assignments (figure), 3-3, C-2  
signal descriptions (table), 3-4 to 3-5,  
C-3 to C-4  
overview, 2-24  
parts locator diagrams, 2-36  
shunt calibration, 2-28 to 2-29  
signal connections, 2-33  
temperature sensor, 2-30 to 2-31  
© National Instruments Corporation  
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SERCLK signal. See also communication  
signals.  
rear signal connector, 2-37 to 2-46  
analog output, 2-39  
description (table), 2-38, B-2  
register writes, 5-2 to 5-3  
SCXIbus to SCXI-1121 rear signal  
connector to DAQ board pin  
equivalences (table), 2-41  
communication signals, 2-42 to 2-46  
digital I/O, 2-40 to 2-41  
pin assignments (figure), 2-37, B-1  
signal descriptions (table), 2-38, B-2  
timing requirements and  
communication protocol, 2-42  
safety precautions, 2-15 to 2-16  
SCXIbus connector  
timing requirements (figure), 2-44  
SERDATIN signal. See also communication  
signals.  
description (table), 2-38, B-2  
register writes, 5-2 to 5-3  
equivalents for rear signal connector  
(table), 3-5  
SCXIbus equivalents for rear signal  
connector (table), 3-5  
SCXIbus to SCXI-1121 rear signal  
connector to DAQ board pin  
equivalences (table), 2-41  
pin assignments (figure), 3-3, C-2  
signal descriptions (table), 3-4 to 3-5,  
C-3 to C-4  
terminal blocks, 2-33 to 2-36  
single-channel measurements, programming,  
5-4 to 5-6  
timing requirements (figure), 2-44  
SERDATOUT signal. See also  
communication signals.  
direct measurements, 5-4 to 5-5  
multiplexed output, 5-4 to 5-5  
parallel output, 5-4  
indirect measurements, 5-5 to 5-6  
from other modules, 5-5  
from SCXI-1121 via another module,  
5-5, 5-6  
description (table), 2-38, B-2  
SCXIbus to SCXI-1121 rear signal  
connector to DAQ board pin  
equivalences (table), 2-41  
serial data timing diagram, 2-44  
servicing, programming, 5-14 to 5-15  
shielding, jumper settings for, 2-6 to 2-7  
shunt calibration, SCXI-1321 terminal block,  
2-28 to 2-29  
signal connections, 2-15 to 2-46  
front connector, 2-16 to 2-36  
analog input channels, 2-20 to 2-22  
connector-and-shell assembly,  
2-22 to 2-24  
Single-Channel Read mode, 3-15  
SL<3..0> bits, 4-6  
Slot 0 Register  
description, 4-5  
programming hardscan circuitry,  
5-13 to 5-14  
slot selection  
slot-select timing diagram, 2-43  
writing 16-bit slot-select number to  
Slot 0, 2-43  
excitation channels, 2-22  
pin assignments (figure), 2-17, D-2  
SCXI-1320, SCXI-1328, and  
SCXI-1321 terminal blocks,  
signal descriptions (table), 2-18 to  
2-19, D-3 to D-4  
SLOT0SEL* signal. See also communication  
signals.  
description (table), 2-38, B-2  
register writes, 5-2 to 5-3  
temperature sensor connection, 2-22  
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SCXIbus to SCXI-1121 rear signal  
connector to DAQ board pin  
equivalences (table), 2-41  
Slot-Select Register  
calibration equipment requirements,  
3-11 to 3-14  
excitation output channels, 3-11  
block diagram of SCXI-1121, 3-1  
digital control circuitry, 3-7 to 3-8  
digital interface, 3-6  
major components of SCXI-1121, 3-2  
scanning modes, 3-17 to 3-20  
multiple-chassis scanning, 3-20  
multiple-module multiplexed  
scanning, 3-19  
description, 4-6  
register writes, 5-2 to 5-4  
software, optional, 1-2 to 1-3  
software-related resources, G-2  
specifications  
analog input, A-1 to A-2  
cold-junction sensor, A-3 to A-4  
environment, A-4  
physical, A-4  
RTD mode, A-3  
multiplexed scanning, 3-17 to 3-18  
single-module multiplexed scanning,  
3-18 to 3-19  
single-module parallel  
safety, A-4  
scanning, 3-17  
SCXIbus connector  
strain gauge mode, A-3  
SPICLK signal  
equivalents for rear signal connector  
(table), 3-5  
pin assignments (figure), 3-3  
signal descriptions (table), 3-4 to 3-5  
thermistors, using with SCXI-1321 terminal  
block, 2-27 to 2-28  
description (table), 3-4, C-3  
SCXIbus equivalents for rear signal  
connector (table), 3-5  
SCXIbus to SCXI-1121 rear signal  
connector to DAQ board pin  
equivalences (table), 2-41  
SS* signal (table), 3-5, C-4  
strain gauge mode specifications, A-3  
timing circuitry. See analog and timing  
circuitry.  
timing signal. See SCANCLK signal.  
TRIG0 signal (table), 3-5, C-4  
triggering, programming, 5-14 to 5-15  
T
technical support resources, G-1 to G-2  
temperature sensor  
U
signal connections, 2-22  
terminal blocks, 2-30 to 2-31  
user-configurable jumpers, 2-2 to 2-3  
terminal adapter. See SCXI-1343 rear screw  
terminal adapter.  
V
terminal blocks. See SCXI-1302 50-pin  
terminal block; SCXI-1320 and SCXI-1328  
terminal blocks; SCXI-1321 terminal block.  
theory of operation, 3-1 to 3-20  
analog and timing circuitry, 3-8 to 3-16  
analog input channels, 3-8 to 3-11  
analog output circuitry, 3-15 to 3-16  
V+ signal (table), 3-4, C-3  
V- signal (table), 3-4, C-3  
voltage and current excitation jumpers,  
2-9 to 2-10  
© National Instruments Corporation  
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W
Web support from National Instruments,  
G-1 to G-2  
online problem-solving and diagnostic  
resources, G-1  
software-related resources, G-2  
Worldwide technical support, G-2  
Wxx jumpers. See jumpers.  
SCXI-1121 User Manual  
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