National Instruments Computer Hardware PCI 1200 User Manual

DAQ  
PCI-1200 User Manual  
Multifunctional I/O Board for PCI Bus Computers  
PCI-1200 User Manual  
July 1998 Edition  
Part Number 320942C-01  
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Important Information  
Warranty  
The PCI-1200 is warranted against defects in materials and workmanship for a period of one year from the date of  
shipment, as evidenced by receipts or other documentation. National Instruments will, at its option, repair or replace  
equipment that proves to be defective during the warranty period. This warranty includes parts and labor.  
The media on which you receive National Instruments software are warranted not to fail to execute programming  
instructions, due to defects in materials and workmanship, for a period of 90 days from date of shipment, as evidenced  
by receipts or other documentation. National Instruments will, at its option, repair or replace software media that do not  
execute programming instructions if National Instruments receives notice of such defects during the warranty period.  
National Instruments does not warrant that the operation of the software shall be uninterrupted or error free.  
A Return Material Authorization (RMA) number must be obtained from the factory and clearly marked on the outside  
of the package before any equipment will be accepted for warranty work. National Instruments will pay the shipping costs  
of returning to the owner parts which are covered by warranty.  
National Instruments believes that the information in this manual is accurate. The document has been carefully reviewed  
for technical accuracy. In the event that technical or typographical errors exist, National Instruments reserves the right to  
make changes to subsequent editions of this document without prior notice to holders of this edition. The reader should  
consult National Instruments if errors are suspected. In no event shall National Instruments be liable for any damages  
arising out of or related to this document or the information contained in it.  
EXCEPT AS SPECIFIED HEREIN, NATIONAL INSTRUMENTS MAKES NO WARRANTIES, EXPRESS OR IMPLIED, AND SPECIFICALLY DISCLAIMS  
ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. CUSTOMERS RIGHT TO RECOVER DAMAGES CAUSED  
BY FAULT OR NEGLIGENCE ON THE PART OF NATIONAL INSTRUMENTS SHALL BE LIMITED TO THE AMOUNT THERETOFORE PAID BY THE  
CUSTOMER. NATIONAL INSTRUMENTS WILL NOT BE LIABLE FOR DAMAGES RESULTING FROM LOSS OF DATA, PROFITS, USE OF PRODUCTS,  
OR INCIDENTAL OR CONSEQUENTIAL DAMAGES, EVEN IF ADVISED OF THE POSSIBILITY THEREOF. This limitation of the liability of  
National Instruments will apply regardless of the form of action, whether in contract or tort, including negligence.  
Any action against National Instruments must be brought within one year after the cause of action accrues. National  
Instruments shall not be liable for any delay in performance due to causes beyond its reasonable control. The warranty  
provided herein does not cover damages, defects, malfunctions, or service failures caused by owners failure to follow  
the National Instruments installation, operation, or maintenance instructions; owners modification of the product;  
owners abuse, misuse, or negligent acts; and power failure or surges, fire, flood, accident, actions of third parties,  
or other events outside reasonable control.  
Copyright  
Under the copyright laws, this publication may not be reproduced or transmitted in any form, electronic or mechanical,  
including photocopying, recording, storing in an information retrieval system, or translating, in whole or in part, without  
the prior written consent of National Instruments Corporation.  
Trademarks  
ComponentWorks, CVI, LabVIEW, Measure, MITE, NI-DAQ, SCXI, and VirtualBenchare trademark  
of National Instruments Corporation.  
Product and company names listed are trademarks or trade names of their respective companies.  
WARNING REGARDING MEDICAL AND CLINICAL USE OF NATIONAL INSTRUMENTS PRODUCTS  
National Instruments products are not designed with components and testing intended to ensure a level of reliability  
suitable for use in treatment and diagnosis of humans. Applications of National Instruments products involving medical  
or clinical treatment can create a potential for accidental injury caused by product failure, or by errors on the part of the  
user or application designer. Any use or application of National Instruments products for or involving medical or clinical  
treatment must be performed by properly trained and qualified medical personnel, and all traditional medical safeguards,  
equipment, and procedures that are appropriate in the particular situation to prevent serious injury or death should always  
continue to be used when National Instruments products are being used. National Instruments products are NOT intended  
to be a substitute for any form of established process, procedure, or equipment used to monitor or safeguard human health  
and safety in medical or clinical treatment.  
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About This Manual  
Conventions Used in This Manual.................................................................................x  
Chapter 1  
Introduction  
Software Programming Choices ....................................................................................1-2  
NI-DAQ Driver Software................................................................................1-3  
Chapter 2  
Analog Output Polarity .....................................................................2-3  
Analog Input Mode ...........................................................................2-3  
Chapter 3  
Signal Connections  
I/O Connector ................................................................................................................3-1  
Signal Connection Descriptions ......................................................................3-2  
Analog Input Signal Connections....................................................................3-5  
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Contents  
Input Configurations......................................................................... 3-7  
(DIFF Configuration) ...................................................... 3-9  
DAQ Timing Connections................................................................ 3-19  
Timing Specifications....................................................................... 3-27  
Chapter 4  
Interval Scanning Acquisition Mode................................................ 4-8  
Single-Channel Data Acquisition ..................................................... 4-9  
Multichannel Scanned Data Acquisition .......................................... 4-9  
DAQ Rates ...................................................................................................... 4-10  
Analog Output ............................................................................................................... 4-11  
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Contents  
Chapter 5  
Calibration  
Calibration at Higher Gains ...........................................................................................5-2  
Calibration Equipment Requirements............................................................................5-2  
Appendix A  
Specifications  
Appendix B  
Customer Communication  
Glossary  
Index  
Figures  
Figure 1-1.  
The Relationship between the Programming Environment,  
NI-DAQ, and Your Hardware...............................................................1-4  
Figure 3-1.  
Figure 3-2.  
Figure 3-3.  
Figure 3-4.  
Figure 3-5.  
Figure 3-6.  
Figure 3-7.  
Figure 3-8.  
Figure 3-9.  
PCI-1200 I/O Connector Pin Assignments ...........................................3-2  
PCI-1200 Instrumentation Amplifier ....................................................3-6  
Differential Input Connections for Grounded Signal Sources ..............3-10  
Differential Input Connections for Floating Sources ............................3-11  
Single-Ended Input Connections for Floating Signal Sources..............3-13  
Single-Ended Input Connections for Grounded Signal Sources ...........3-14  
Analog Output Signal Connections.......................................................3-16  
Digital I/O Connections.........................................................................3-17  
EXTCONV* Signal Timing..................................................................3-19  
Figure 3-10. Posttrigger DAQ Timing.......................................................................3-20  
Figure 3-11. Pretrigger DAQ Timing.........................................................................3-21  
Figure 3-12. Interval-Scanning Signal Timing ..........................................................3-22  
Figure 3-13. EXTUPDATE* Signal Timing for Updating DAC Output ..................3-23  
Figure 3-14. Event-Counting Application with External Switch Gating...................3-24  
Figure 3-15. Frequency Measurement Application ...................................................3-25  
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Contents  
Figure 3-16. General Purpose Timing Signals .......................................................... 3-26  
Figure 3-17. Mode 1 Timing Specifications for Input Transfers............................... 3-28  
Figure 3-18. Mode 1 Timing Specifications for Output Transfers............................ 3-29  
Figure 3-19. Mode 2 Timing Specifications for Bidirectional Transfers .................. 3-30  
Figure 4-1.  
Figure 4-2.  
Figure 4-3.  
Figure 4-4.  
Figure 4-5.  
Figure 4-6.  
PCI-1200 Block Diagram ..................................................................... 4-1  
PCI Interface Circuitry.......................................................................... 4-2  
Timing Circuitry ................................................................................... 4-4  
Analog Input Circuitry.......................................................................... 4-5  
Analog Output Circuitry ....................................................................... 4-11  
Digital I/O Circuitry.............................................................................. 4-12  
Tables  
Table 2-1.  
Analog I/O Settings............................................................................... 2-2  
Analog Input Modes for the PCI-1200 ................................................. 2-4  
Table 2-2.  
Table 3-1.  
Table 3-2.  
Table 3-3.  
Table 3-4.  
Table 3-5.  
Table 3-6.  
Signal Descriptions for PCI-1200 I/O Connector Pins ........................ 3-3  
Bipolar Analog Input Signal Range Versus Gain................................. 3-5  
Unipolar Analog Input Signal Range Versus Gain............................... 3-5  
Summary of Analog Input Connections ............................................... 3-8  
Port C Signal Assignments ................................................................... 3-18  
Signal Names Used in Timing Diagrams ............................................. 3-27  
Table 4-1.  
Table 4-2.  
Analog Input Settling Time Versus Gain.............................................. 4-10  
PCI-1200 Maximum Recommended DAQ Rates................................. 4-10  
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About This Manual  
This manual describes the electrical and mechanical aspects of the  
PCI-1200 and contains information concerning its operation and  
programming.  
The PCI-1200 is a low-cost multifunction analog, digital, and timing board.  
The PCI-1200 is a member of the National Instruments PCI Series of  
expansion boards for PCI bus computers. These boards are designed for  
high-performance data acquisition (DAQ) and control for applications in  
laboratory testing, production testing, and industrial process monitoring  
and control.  
Organization of This Manual  
The PCI-1200 User Manual is organized as follows:  
Chapter 1, Introduction, describes the PCI-1200, lists what you need  
to get started, software programming choices, and optional equipment,  
and explains how to build custom cables and unpack the PCI-1200.  
Chapter 2, Installation and Configuration, describes how to install and  
configure your PCI-1200.  
Chapter 3, Signal Connections, describes how to make input and  
output signal connections to the PCI-1200 board via the board I/O  
connector and details the I/O timing specifications.  
Chapter 4, Theory of Operation, explains the operation of each  
functional unit of the PCI-1200.  
Chapter 5, Calibration, discusses the calibration procedures for the  
PCI-1200 analog I/O circuitry.  
Appendix A, Specifications, lists the PCI-1200 specifications.  
Appendix B, Customer Communication, contains forms you can use to  
request help from National Instruments or to comment on our  
products.  
The Glossary contains an alphabetical list and description of terms  
used in this manual, including abbreviations, acronyms, definitions,  
metric prefixes, mnemonics, and symbols.  
The Index contains an alphabetical list of key terms and topics in this  
manual, including the page where you can find each one.  
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About This Manual  
Conventions Used in This Manual  
The following conventions are used in this manual:  
<>  
Angle brackets enclose the name of a key on the keyboardfor example,  
<shift>. Angle brackets containing numbers separated by an ellipsis  
represent a range of values associated with a bit or signal namefor  
example, DBIO<3..0>.  
This icon to the left of bold italicized text denotes a note, which alerts you  
to important information.  
This icon to the left of bold italicized text denotes a caution, which advises  
you of precautions to take to avoid injury, data loss, or a system crash.  
!
This icon to the left of bold italicized text denotes a warning, which advises  
you of precautions to take to avoid being electrically shocked.  
bold  
Bold text denotes the names of menus, menu items, or dialog box buttons  
or options.  
bold italic  
Bold italic text denotes a note, caution, or warning.  
italic  
Italic text denotes variables, emphasis, a cross reference, or an introduction  
to a key concept.  
Macintosh  
Macintosh refers to all Macintosh computers with PCI bus, unless  
otherwise noted.  
monospace  
Text in this font denotes text or characters that you should literally enter  
from the keyboard, sections of code, programming examples, and syntax  
examples. This font is also used for the proper names of disk drives, paths,  
directories, programs, subprograms, subroutines, device names, functions,  
operations, variables, filenames and extensions, and for statements and  
comments taken from programs.  
PC  
PC refers to all IBM PC/XT, PC/AT and compatible computers with  
PCI bus, unless otherwise noted.  
NI-DAQ  
SCXI  
NI-DAQ is used in this manual to refer to the NI-DAQ software for PC or  
Macintosh computers, unless otherwise noted.  
SCXI stands for Signal Conditioning eXtensions for Instrumentation and is  
a National Instruments product line designed to perform front-end signal  
conditioning for National Instruments plug-in DAQ boards.  
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About This Manual  
National Instruments Documentation  
The PCI-1200 User Manual is one piece of the documentation set for your  
DAQ system. You could have any of several types of manuals, depending  
on the hardware and software in your system. Use the manuals you have as  
follows:  
Getting Started with SCXIIf you are using SCXI, this is the first  
manual you should read. It gives an overview of the SCXI system and  
contains the most commonly needed information for the modules,  
chassis, and software.  
Your SCXI hardware user manualsIf you are using SCXI, read these  
manuals next for detailed information about signal connections and  
module configuration. They also explain in greater detail how the  
module works and contain application hints.  
Your DAQ hardware user manualsThese manuals have detailed  
information about the DAQ hardware that plugs into or is connected  
to your computer. Use these manuals for hardware installation and  
configuration instructions, specification information about your DAQ  
hardware, and application hints.  
Software documentationExamples of software documentation  
you may have are the LabVIEW or LabWindows/CVI documentation  
sets and the NI-DAQ documentation. After you set up your  
hardware system, use either the application software (LabVIEW or  
LabWindows/CVI) or the NI-DAQ documentation to help you write  
your application. If you have a large and complicated system, it is  
worthwhile to look through the software documentation before you  
configure your hardware.  
Accessory installation guides or manualsIf you are using accessory  
products, read the terminal block and cable assembly installation  
guides and accessory board user manuals. They explain how to  
physically connect the relevant pieces of the system. Consult these  
guides when you are making your connections.  
SCXI Chassis ManualIf you are using SCXI, read this manual for  
maintenance information on the chassis and installation instructions.  
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About This Manual  
Related Documentation  
The following National Instruments document contains information that  
you may find helpful as you read this manual:  
Application Note 025, Field Wiring and Noise Considerations for  
Analog Signals  
The following documents also contain information that you may find  
helpful as you read this manual:  
Dither in Digital Audio,by John Vanderkooy and Stanley P.  
Lipshitz, Journal of the Audio Engineering Society, Vol. 35, No. 12,  
December 1987.  
PCI Local Bus Specification, Revision 2.0  
Your computers technical reference manual  
The following National Instruments document contains detailed  
information for the register-level programmer:  
PCI-1200 Register-Level Programmer Manual  
are using NI-DAQ, LabVIEW, LabWindows/CVI, or other application  
software, you should not need the register-level programmer manual. Using  
NI-DAQ, LabVIEW, LabWindows/CVI or other application software, is  
easier than, and as flexible as, using the low-level programming described  
in the register-level programmer manual. Refer to the Software  
Programming Choices section in Chapter 1, Introduction, of this manual  
to learn about your programming options.  
Customer Communication  
National Instruments wants to receive your comments on our products  
and manuals. We are interested in the applications you develop with our  
products, and we want to help if you have problems with them. To make it  
easy for you to contact us, this manual contains comment and configuration  
forms for you to complete. These forms are in Appendix B, Customer  
Communication, at the end of this manual.  
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1
Introduction  
This chapter describes the PCI-1200, lists what you need to get started,  
software programming choices, and optional equipment, and explains how  
to build custom cables and unpack the PCI-1200.  
About the PCI-1200  
Thank you for purchasing the PCI-1200, a low-cost, high-performance  
multifunction analog, digital, and timing board for PCI bus computers. The  
PCI-1200 has eight analog input channels that you can configure as eight  
single-ended or four differential inputs; a 12-bit successive-approximation  
ADC; two 12-bit DACs with voltage outputs; 24 lines of TTL-compatible  
digital I/O; and three 16-bit counter/timers for timing I/O.  
The PCI-1200 is a member of the National Instruments PCI Series of  
expansion boards for PCI bus computers. These boards are designed for  
high-performance data acquisition and control for applications in  
laboratory testing, production testing, and industrial process monitoring  
and control.  
Detailed PCI-1200 specifications are in Appendix A, Specifications.  
What You Need to Get Started  
To set up and use your PCI-1200, you will need the following:  
PCI-1200 board  
PCI-1200 User Manual  
One of the following software packages and documentation:  
ComponentWorks  
LabVIEW for Macintosh  
LabVIEW for Windows  
LabWindows/CVI for Windows  
Measure  
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Chapter 1  
Introduction  
NI-DAQ for Macintosh  
NI-DAQ for PC compatibles  
VirtualBench  
Your computer  
Unpacking  
Your PCI-1200 is shipped in an antistatic package to prevent electrostatic  
damage to the board. Electrostatic discharge can damage several  
components on the board. To avoid such damage in handling the board,  
take the following precautions:  
Ground yourself via a grounding strap or by holding a grounded object.  
Touch the antistatic package to a metal part of your computer chassis  
before removing the board from the package.  
Remove the board from the package and inspect the board for loose  
components or any other sign of damage. Notify National Instruments  
if the board appears damaged in any way. Do not install a damaged  
board into your computer.  
Never touch the exposed pins of connectors.  
Software Programming Choices  
There are several options to choose from when programming your  
National Instruments DAQ or SCXI hardware. You can use LabVIEW,  
LabWindows/CVI, ComponentWorks, VirtualBench, NI-DAQ, or  
register-level programming.  
National Instruments Application Software  
ComponentWorks contains tools for data acquisition and instrument  
control built on NI-DAQ driver software. ComponentWorks provides a  
higher-level programming interface for building virtual instruments  
through standard OLE controls and DLLs. With ComponentWorks, you  
can use all of the configuration tools, resource management utilities, and  
interactive control utilities included with NI-DAQ.  
LabVIEW features interactive graphics, a state-of-the-art user interface,  
and a powerful graphical programming language. The LabVIEW Data  
Acquisition Virtual Instrument (VI) Library, a series of VIs for using  
LabVIEW with National Instruments DAQ hardware, is included with  
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Chapter 1  
Introduction  
LabVIEW. The LabVIEW Data Acquisition VI Library is functionally  
equivalent to the NI-DAQ software.  
LabWindows/CVI features interactive graphics, a state-of-the-art user  
interface, and uses the ANSI standard C programming language. The  
LabWindows/CVI Data Acquisition Library, a series of functions for using  
LabWindows/CVI with National Instruments DAQ hardware, is included  
with the NI-DAQ software kit. The LabWindows/CVI Data Acquisition  
Library is functionally equivalent to the NI-DAQ software.  
VirtualBench features VIs that combine DAQ products, software, and  
your computer to create a stand-alone instrument with the added benefit  
of the processing, display, and storage capabilities of your computer.  
VirtualBench instruments load and save waveform data to disk in the same  
forms that can be used in popular spreadsheet programs and word  
processors.  
Using ComponentWorks, LabVIEW, LabWindows/CVI, or VirtualBench  
software will greatly reduce the development time for your data acquisition  
and control application.  
NI-DAQ Driver Software  
The NI-DAQ driver software is included at no charge with all National  
Instruments DAQ hardware. NI-DAQ is not packaged with SCXI or  
accessory products, except for the SCXI-1200. NI-DAQ has an extensive  
library of functions that you can call from your application programming  
environment. These functions include routines for analog input (A/D  
conversion), buffered data acquisition (high-speed A/D conversion),  
analog output (D/A conversion), waveform generation (timed D/A  
conversion), digital I/O, counter/timer operations, SCXI, RTSI,  
self-calibration, messaging, and acquiring data to memory.  
NI-DAQ has both high-level DAQ I/O functions for maximum ease of  
use and low-level DAQ I/O functions for maximum flexibility and  
performance. Examples of high-level functions are streaming data to disk  
or acquiring a certain number of data points. An example of a low-level  
function is writing directly to registers on the DAQ device. NI-DAQ does  
not sacrifice the performance of National Instruments DAQ devices  
because it lets multiple devices operate at their peak performance.  
NI-DAQ also internally addresses many of the complex issues between  
the computer and the DAQ hardware such as programming interrupts and  
DMA controllers. NI-DAQ maintains a consistent software interface  
among its different versions so that you can change platforms with  
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Chapter 1  
Introduction  
minimal modifications to your code. Whether you are using conventional  
programming languages, LabVIEW, LabWindows/CVI, or other  
application software, your application uses the NI-DAQ driver software,  
as illustrated in Figure 1-1.  
Conventional  
Programming Environment  
ComponentWorks,  
LabVIEW,  
LabWindows/CVI, or  
VirtualBench  
NI-DAQ  
Driver Software  
Personal  
Computer or  
Workstation  
DAQ or  
SCXI Hardware  
Figure 1-1. The Relationship between the Programming Environment,  
NI-DAQ, and Your Hardware  
Register-Level Programming  
The final option for programming any National Instruments DAQ  
hardware is to write register-level software. Writing register-level  
programming software can be very time-consuming and inefficient,  
and is not recommended for most users.  
Even if you are an experienced register-level programmer, consider using  
NI-DAQ, LabVIEW, LabWindows/CVI or other National Instruments  
application software to program your National Instruments DAQ hardware.  
Using the National Instruments application software is easier than, and as  
flexible as, register-level programming, and can save weeks of  
development time.  
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Chapter 1  
Introduction  
Optional Equipment  
National Instruments offers a variety of products to use with your PCI-1200  
board, including cables, connector blocks, and other accessories, as  
follows:  
Cables and cable assemblies  
Connector blocks, 50-pin screw terminals  
SCXI modules and accessories for isolating, amplifying, exciting, and  
multiplexing signals for relays and analog output. With SCXI you can  
condition and acquire up to 3,072 channels. To use the PCI-1200 with  
SCXI you need the SCXI-1341 adapter.  
Low channel count signal conditioning modules, boards, and  
accessories, including conditioning for strain gauges and RTDs,  
simultaneous sample and hold, and relays  
For more information about optional equipment available from National  
Instruments, refer to your National Instruments catalogue or call the office  
nearest you.  
Custom Cabling  
National Instruments offers cables and accessories for you to prototype  
your application or to use if you frequently change board interconnections.  
If you want to develop your own cable, however, the following guidelines  
may be useful:  
For the analog input signals, shielded twisted-pair wires for each  
analog input pair yield the best results, assuming that you use  
differential inputs. Tie the shield for each signal pair to the ground  
reference at the source.  
You should route the analog lines separately from the digital lines.  
When using a cable shield, use separate shields for the analog and  
digital halves of the cable. Failure to do so results in noise coupling  
into the analog signals from transient digital signals.  
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Chapter 1  
Introduction  
The mating connector for the PCI-1200 is a 50-position, polarized, ribbon  
socket connector with strain relief. National Instruments uses a polarized  
(keyed) connector to prevent inadvertent upside-down connection to the  
PCI-1200. Recommended manufacturer part numbers for this mating  
connector are as follows:  
Electronic Products Division/3M (part number 3425-7650)  
T&B/Ansley Corporation (part number 609-5041CE)  
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2
Installation and Configuration  
This chapter describes how to install and configure your PCI-1200.  
Software Installation  
If you are using NI-DAQ, or National Instruments application software,  
refer to the installation instructions in your software documentation to  
install and configure your software.  
If you are a register-level programmer, refer to the PCI-1200 Register-Level  
Programmer Manual.  
Hardware Installation  
The PCI-1200 can be installed in any unused PCI expansion slot in your  
computer.  
The following are general installation instructions. Consult the user manual  
or technical reference manual for your computer for specific instructions  
and warnings.  
1. Turn off your computer.  
2. Remove the top cover or access port to the I/O channel.  
3. Remove the expansion slot cover on the back panel of the computer.  
4. Insert the PCI-1200 in an unused 5 V PCI slot. The fit may be tight, but  
do not force the board into place.  
5. Screw the PCI-1200 mounting bracket to the back panel rail of the  
computer or use the slot side tabs, if available, to secure the PCI-1200  
in place.  
6. Replace the top cover on the computer.  
The PCI-1200 board is installed.  
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Chapter 2  
Installation and Configuration  
Board Configuration  
The PCI-1200 is completely software configurable. The PCI-1200 is fully  
compliant with the PCI Local Bus Specification, Revision 2.0. Therefore,  
all board resources are automatically allocated by the system. For the  
PCI-1200, this allocation includes the base memory address and interrupt  
level. You do not need to perform any configuration steps after the system  
powers up.  
Analog I/O Configuration  
Upon power-up or after a software reset, the PCI-1200 is set to the  
following configuration:  
Referenced single-ended input mode  
5 V analog input range (bipolar)  
5 V analog output range (bipolar)  
Table 2-1 lists all the available analog I/O configurations for the PCI-1200  
and shows the configuration in reset condition.  
Table 2-1. Analog I/O Settings  
Parameter  
Configuration  
Analog Output CH0 Polarity  
Analog Output CH1 Polarity  
Analog Input Polarity  
Bipolar5 V (reset condition)  
Unipolar0 to 10 V  
Bipolar5 V (reset condition)  
Unipolar0 to 10 V  
Bipolar5 V (reset condition)  
Unipolar0 to 10 V  
Analog Input Mode  
Referenced single-ended (RSE) (reset condition)  
Nonreferenced single-ended (NRSE)  
Differential (DIFF)  
Both the analog input and analog output circuitries are software  
configurable. Refer to your software documentation for more information  
on changing these settings.  
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Chapter 2  
Installation and Configuration  
Analog Output Polarity  
The PCI-1200 has two channels of analog output voltage at the  
I/O connector. You can configure each analog output channel for either  
unipolar or bipolar output. A unipolar configuration has a range of  
0 to 10 V at the analog output. A bipolar configuration has a range of  
5 to +5 V at the analog output. In addition, you can select the coding  
scheme for each D/A converter (DAC) as either twos complement or  
straight binary. If you select a bipolar range for a DAC, the twos  
complement coding is recommended. In this mode, data values written  
to the analog output channel range from F800 hex (2,048 decimal) to  
7FF hex (2,047 decimal). If you select a unipolar range for a DAC, the  
straight binary coding is recommended. In this mode, data values written  
to the analog output channel range from 0 to FFF hex (4,095 decimal).  
Analog Input Polarity  
You can select the analog input on the PCI-1200 for either a unipolar range  
(0 to 10 V) or a bipolar range (5 to +5 V). In addition, you can select the  
coding scheme for analog input as either twos complement or straight  
binary. If you select a bipolar range, the twos complement coding is  
recommended. In this mode, 5 V input corresponds to F800 hex  
(2,048 decimal) and +5 V corresponds to 7FF hex (2,047 decimal). If you  
select a unipolar mode, the straight binary coding is recommended. In this  
mode, 0 V input corresponds to 0 hex, and +10 V corresponds to FFF hex  
(4,095 decimal).  
Analog Input Mode  
The PCI-1200 has three different input modesRSE input, NRSE input,  
and DIFF input. The single-ended input configurations use eight channels.  
The DIFF input configuration uses four channels. Table 2-2 describes these  
configurations.  
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Table 2-2. Analog Input Modes for the PCI-1200  
Analog Input  
Modes  
Description  
RSE  
RSE mode provides eight single-ended inputs with  
the negative input of the instrumentation amplifier  
referenced to analog ground (reset condition).  
NRSE  
NRSE mode provides eight single-ended inputs with  
the negative input of the instrumentation amplifier  
tied to AISENSE/AIGND and not connected to  
ground.  
DIFF  
DIFF mode provides four differential inputs with the  
channels 0, 2, 4, or 6 and the negative input tied to  
channels 1, 3, 5, or 7, respectively, thus choosing  
channel pairs (0, 1), (2, 3), (4, 5), or (6, 7).  
While reading the following paragraphs, you may find it helpful to refer to  
the Analog Input Signal Connections section of Chapter 3, Signal  
Connections, which contains diagrams showing the signal paths for the  
three configurations.  
RSE Input (Eight Channels, Reset Condition)  
RSE input means that all input signals are referenced to a common ground  
point that is also tied to the PCI-1200 analog input ground. The differential  
amplifier negative input is tied to analog ground. The RSE configuration is  
useful for measuring floating signal sources. With this input configuration,  
the PCI-1200 can monitor eight different analog input channels.  
Considerations for using the RSE configuration are discussed in Chapter 3,  
Signal Connections. Notice that in this mode, the signal return path is  
analog ground at the connector through the AISENSE/AIGND pin.  
NRSE Input (Eight Channels)  
NRSE input means that all input signals are referenced to the same  
common-mode voltage, which floats with respect to the PCI-1200 analog  
ground. This common-mode voltage is subsequently subtracted by the  
input instrumentation amplifier. The NRSE configuration is useful for  
measuring ground-referenced signal sources.  
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Considerations for using the NRSE configuration are discussed in  
Chapter 3, Signal Connections. Notice that in this mode, the signal return  
path is through the negative terminal of the amplifier at the connector  
through the AISENSE/AIGND pin.  
DIFF Input (Four Channels)  
DIFF input means that each input signal has its own reference, and the  
difference between each signal and its reference is measured. The signal  
and its reference are each assigned an input channel. With this input  
configuration, the PCI-1200 can monitor four differential analog input  
signals.  
Considerations for using the DIFF configuration are discussed in  
Chapter 3, Signal Connections. Notice that the signal return path is through  
the amplifiers negative terminal and through channel 1, 3, 5, or 7,  
depending on which channel pair you select.  
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3
Signal Connections  
This chapter describes how to make input and output signal connections to  
the PCI-1200 board via the board I/O connector and details the I/O timing  
specifications.  
The I/O connector for the PCI-1200 has 50 pins that you can connect to  
50-pin accessories.  
I/O Connector  
Figure 3-1 shows the pin assignments for the PCI-1200 I/O connector.  
Caution  
Connections that exceed any of the maximum ratings of input or output signals  
on the PCI-1200 may damage the PCI-1200 and the computer. This includes  
connecting any power signals to ground and vice versa. You should not externally  
drive digital I/O lines while the computer is powered off; doing so can damage the  
computer. National Instruments is NOT liable for any damages resulting from  
signal connections that exceed these maximum ratings.  
!
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1
3
5
7
9
2
4
ACH0  
ACH2  
ACH4  
ACH1  
ACH3  
6
ACH5  
8
ACH7  
ACH6  
10  
DAC0OUT  
DAC1OUT  
PA0  
AISENSE/AIGND  
AGND  
DGND  
PA1  
11 12  
13 14  
15 16  
17 18  
19 20  
21 22  
23 24  
25 26  
27 28  
29 30  
31 32  
33 34  
PA2  
PA3  
PA4  
PA5  
PA6  
PB0  
PA7  
PB2  
PB1  
PB4  
PB3  
PB5  
PB6  
PB7  
PC0  
PC1  
PC2  
PC3  
PC4  
PC5 35 36  
PC6  
37 38  
39 40  
41 42  
43 44  
45 46  
47 48  
49 50  
PC7  
EXTUPDATE*  
OUTB0  
EXTTRIG  
EXTCONV*  
GATB0  
GATB1  
OUTB2  
CLKB2  
DGND  
OUTB1  
CLKB1  
GATB2  
+5 V  
Figure 3-1. PCI-1200 I/O Connector Pin Assignments  
Signal Connection Descriptions  
The following table describes the connector pins on the PCI-1200 I/O  
connector by pin number and gives the signal name and description of  
each signal connector pin.  
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Table 3-1. Signal Descriptions for PCI-1200 I/O Connector Pins  
Signal Name Direction Reference Description  
ACH<7..0>  
Pin  
1-8  
AI  
AGND  
AGND  
Analog Channel 7 through 0Analog  
input channels 0 through 7.  
9
AISENSE/AIGND I/O  
Analog Input Sense/Analog Input  
GroundConnected to AGND in RSE  
mode, analog input sense in NRSE  
mode.  
10  
11  
DAC0OUT  
AGND  
AO  
AGND  
N/A  
Digital-to-Analog Converter 0  
OutputVoltage output signal for  
analog output channel 0.  
N/A  
Analog GroundAnalog output ground  
reference for analog output voltages.  
Bias current return point for differential  
measurements.  
12  
DAC1OUT  
DGND  
AO  
AGND  
N/A  
Digital-to-Analog Converter 1  
OutputVoltage output signal for  
analog output channel 1.  
13,  
50  
N/A  
DIO  
DIO  
DIO  
Digital GroundVoltage ground  
reference for the digital signals and the  
+5 V supply.  
14-21 PA<7..0>  
22-29 PB<7..0>  
30-37 PC<7..0>  
DGND  
DGND  
DGND  
Port A 7 through 0Bidirectional data  
lines for port A. PA7 is the MSB, and  
PA0 is the LSB.  
Port B 7 through 0Bidirectional data  
lines for port B. PB7 is the MSB, and  
PB0 is the LSB.  
Port C 7 through 0Bidirectional data  
lines for port C. PC7 is the MSB, and  
PC0 is the LSB.  
38  
39  
EXTTRIG  
DI  
DI  
DGND  
DGND  
External TriggerExternal control  
signal to trigger a DAQ operation.  
EXTUPDATE*  
External UpdateExternal control  
signal to update DAC outputs.  
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Table 3-1. Signal Descriptions for PCI-1200 I/O Connector Pins (Continued)  
Pin  
Signal Name  
Direction Reference  
Description  
40  
EXTCONV*  
DIO  
DGND  
External ConvertExternal control  
signal to time A/D conversions (DI) and  
drive SCANCLK when you use SCXI  
(DO).  
41  
42  
43  
OUTB0  
GATB0  
OUTB1  
DO  
DI  
DGND  
DGND  
DGND  
Output B0Digital output signal of  
counter B0.  
Gate B0External control signal for  
gating counter B0.  
DIO  
Output B1Digital output signal of  
counter B1 (DO). External control  
signal for timing a scan interval (DI).  
44  
45  
46  
47  
48  
49  
GATB1  
CLKB1  
OUTB2  
GATB2  
CLKB2  
+5 V  
DI  
DGND  
DGND  
DGND  
DGND  
DGND  
DGND  
Gate B1External control signal for  
gating counter B1.  
DI  
Clock B1External control clock  
signal for counter B1.  
DO  
DI  
Counter B2Digital output signal of  
counter B2.  
Gate B2External control signal for  
gating counter B2.  
DI  
Clock B2External control clock  
signal for counter B2.  
DO  
+5 VoltsThis pin is fused for up to 1 A  
of +4.65 to +5.25 V.  
* Indicates that the signal is active low.  
AI = Analog Input  
AO = Analog Output  
DI = Digital Input  
DO = Digital Output  
DIO = Digital Input/Output  
N/A = Not Applicable  
The connector pins are grouped into analog input signal pins, analog output  
signal pins, digital I/O signal pins, timing I/O signal pins, and power  
connections. The following sections describe the signal connection  
guidelines for each of these groups.  
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Analog Input Signal Connections  
Pins 1 through 8 are analog input signal pins for the 12-bit ADC. Pin 9,  
AISENSE/AIGND, is an analog common signal. You can use this pin for  
a general analog power ground tie to the PCI-1200 in RSE mode or as a  
return path in NRSE mode. Pin 11, AGND, is the bias current return point  
for differential measurements. Pins 1 through 8 are tied to the eight  
single-ended analog input channels of the input multiplexer through 4.7 kΩ  
series resistors. Pins 2, 4, 6, and 8 and also tied to an input multiplexer for  
DIFF mode.  
The signal ranges for inputs ACH<7..0> at all possible gains are shown in  
Tables 3-2 and 3-3. Exceeding the input signal range will not damage the  
input circuitry as long as the maximum powered-on input voltage rating  
of 35 V or powered off voltage rating of 25 V is not exceeded. The  
PCI-1200 is guaranteed to withstand inputs up to the maximum input  
voltage rating.  
Caution  
Exceeding the input signal range distorts input signals. Exceeding the maximum  
input voltage rating may damage the PCI-1200 board and the computer. National  
Instruments is NOT liable for any damages resulting from such signal connections.  
!
Table 3-2. Bipolar Analog Input Signal Range Versus Gain  
Gain Setting  
Input Signal Range  
5.0 to 4.99756 V  
2.5 to 2.49878 V  
1.0 to 0.99951 V  
500 to 499.756 mV  
250 to 249.877 mV  
100 to 99.951 mV  
50 to 49.975 mV  
1
2
5
10  
20  
50  
100  
Table 3-3. Unipolar Analog Input Signal Range Versus Gain  
Gain Setting  
Input Signal Range  
0 to 9.99756 V  
1
2
0 to 4.99878 V  
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Table 3-3. Unipolar Analog Input Signal Range Versus Gain  
5
0 to 1.99951 V  
0 to 999.756 mV  
0 to 499.877 mV  
0 to 199.951 mV  
0 to 99.975 mV  
10  
20  
50  
20  
How you connect analog input signals to the PCI-1200 depends on how you  
configure the PCI-1200 analog input circuitry and the type of input signal  
source. With different PCI-1200 configurations, you can use the PCI-1200  
instrumentation amplifier in different ways. Figure 3-2 shows a diagram of  
the PCI-1200 instrumentation amplifier.  
Instrumentation  
Amplifier  
Vin+  
+
+
Vm  
Measured  
Voltage  
Vin–  
Vm = [Vin+  
-
Vin-] * GAIN  
Figure 3-2. PCI-1200 Instrumentation Amplifier  
The PCI-1200 instrumentation amplifier applies gain, common-mode  
voltage rejection, and high-input impedance to the analog input signals  
connected to the PCI-1200 board. Signals are routed to the positive and  
negative inputs of the instrumentation amplifier through input multiplexers  
on the PCI-1200. The instrumentation amplifier converts two input signals  
to a signal that is the difference between the two input signals multiplied by  
the gain setting of the amplifier. The amplifier output voltage is referenced  
to the PCI-1200 ground. The PCI-1200 ADC measures this output voltage  
when it performs A/D conversions.  
All signals must be referenced to ground, either at the source device  
or at the PCI-1200. If you have a floating source, you must use a  
ground-referenced input connection at the PCI-1200. If you have a  
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grounded source, you must use a nonreferenced input connection at the  
PCI-1200.  
Types of Signal Sources  
When configuring the input mode of the PCI-1200 and making signal  
connections, first determine whether the signal source is floating or ground  
referenced. These two types of signals are described as follows.  
Floating Signal Sources  
A floating signal source is not connected in any way to the building ground  
system but has an isolated ground-reference point. Some examples of  
floating signal sources are outputs of transformers, thermocouples,  
battery-powered devices, optical isolator outputs, and isolation amplifiers.  
Tie the ground reference of a floating signal to the PCI-1200 analog input  
ground to establish a local or onboard reference for the signal. Otherwise,  
the measured input signal varies or appears to float. An instrument or  
device that supplies an isolated output falls into the floating signal source  
category.  
Ground-Referenced Signal Sources  
A ground-referenced signal source is connected in some way to the  
building system ground and is, therefore, already connected to a common  
ground point with respect to the PCI-1200, assuming that the computer is  
plugged into the same power system. Nonisolated outputs of instruments  
and devices that plug into the building power system fall into this category.  
The difference in ground potential between two instruments connected to  
the same building power system is typically between 1 and 100 mV but can  
be much higher if power distribution circuits are not properly connected.  
The connection instructions that follow for grounded signal sources  
eliminate this ground potential difference from the measured signal.  
Note  
If you power both the PCI-1200 and your computer with a floating power source  
(such as a battery), your system may be floating with respect to earth ground. In  
this case, treat all of your signal sources as floating sources.  
Input Configurations  
You can configure the PCI-1200 for one of three input modesRSE,  
NRSE, or DIFF. The following sections discuss the use of single-ended and  
differential measurements, and considerations for measuring both floating  
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and ground-referenced signal sources. Table 3-4 summarizes the  
recommended input configurations for both types of signal sources.  
Table 3-4. Summary of Analog Input Connections  
Signal Source Type  
Grounded Signal Source  
Floating Signal Source  
(Not Connected to Building Ground)  
Examples  
Examples  
Plug-in instruments with  
nonisolated outputs  
Ungrounded Thermocouples  
Signal conditioning with isolated outputs  
Battery devices  
Input  
ACH(+)  
+
ACH(+)  
+
+
-
V1  
+
-
V1  
ACH (-)  
ACH (-)  
-
-
R
Differential  
(DIFF)  
AIGND  
AIGND  
See text for information on bias resistors.  
NOT RECOMMENDED  
ACH  
ACH  
Single-Ended —  
Ground  
Referenced  
(RSE)  
+
+
+
+
V1  
V1  
AIGND  
-
-
-
-
+
Vg  
-
Ground-loop losses, Vg, are added to  
measured signal  
ACH  
ACH  
+
+
+
Single-Ended —  
Nonreferenced  
(NRSE)  
+
V1  
V1  
AISENSE  
AISENSE  
R
-
-
-
-
AIGND  
AIGND  
See text for information on bias resistors.  
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Differential Connection Considerations (DIFF Configuration)  
Differential connections are those in which each PCI-1200 analog input  
signal has its own reference signal or signal return path. These connections  
are available when you configure the PCI-1200 in the DIFF mode. Each  
input signal is tied to the positive input of the instrumentation amplifier,  
and its reference signal, or return, is tied to the negative input of the  
instrumentation amplifier.  
When configuring the PCI-1200 for DIFF input, each signal uses two of the  
multiplexer inputsone for the signal and one for its reference signal.  
Therefore, only four analog input channels are available when using the  
DIFF configuration. Use the DIFF input configuration when any of the  
following conditions is present:  
Input signals are low level (less than 1 V).  
Leads connecting the signals to the PCI-1200 are greater than 10 ft.  
Any of the input signals require a separate ground-reference point or  
return signal.  
The signal leads travel through noisy environments.  
Differential signal connections reduce picked-up noise and increase  
common-mode signal and noise rejection. With these connections,  
input signals can float within the common-mode limits of the input  
instrumentation amplifier.  
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Differential Connections for Grounded Signal Sources  
Figure 3-3 shows how to connect a ground-referenced signal source to a  
PCI-1200 board configured for DIFF input. Configuration instructions are  
in the Analog I/O Configuration section in Chapter 2, Installation and  
Configuration.  
ACH0  
ACH2  
ACH4  
ACH6  
1
3
5
7
+
Grounded  
Signal  
Source  
Vs  
+
+
ACH1  
ACH3  
ACH5  
ACH7  
2
4
6
8
Measured  
Voltage  
Vm  
Common-  
Mode  
Noise,  
Ground  
Potential  
PC0  
+
Vcm  
11 AGND  
I/O Connector  
PCI-1200 in DIFF Configuration  
Figure 3-3. Differential Input Connections for Grounded Signal Sources  
With this type of connection, the instrumentation amplifier rejects both the  
common-mode noise in the signal and the ground-potential difference  
between the signal source and the PCI-1200 ground (shown as Vcm in  
Figure 3-3).  
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Differential Connections for Floating Signal Sources  
Figure 3-4 shows how to connect a floating signal source to a PCI-1200  
board configured for DIFF input. Configuration instructions are in the  
Analog I/O Configuration section of Chapter 2, Installation and  
Configuration.  
ACH0  
ACH2  
1
3
5
7
ACH4  
ACH6  
+
Floating  
Signal  
Source  
Vs  
+
+
ACH1  
ACH3  
2
4
6
8
Measured  
Voltage  
Vm  
100 kΩ  
Bias  
Current  
Return  
Paths  
ACH5  
ACH7  
100 kΩ  
11 AGND  
I/O Connector  
PCI-1200 in DIFF Configuration  
Figure 3-4. Differential Input Connections for Floating Sources  
The 100 kresistors shown in Figure 3-4 create a return path to ground for  
the bias currents of the instrumentation amplifier. If there is no return path,  
the instrumentation amplifier bias currents charge stray capacitances,  
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resulting in uncontrollable drift and possible saturation in the amplifier.  
Typically, values from 10 kto 100 kare used.  
A resistor from each input to ground, as shown in Figure 3-4, provides bias  
current return paths for an AC-coupled input signal.  
If the input signal is DC-coupled, you need only the resistor that connects  
the negative signal input to ground. This connection does not lower the  
input impedance of the analog input channel.  
Single-Ended Connection Considerations  
Single-ended connections are those in which all PCI-1200 analog input  
signals are referenced to one common ground. The input signals are tied to  
the positive input of the instrumentation amplifier, and their common  
ground point is tied to the negative input of the instrumentation amplifier.  
When the PCI-1200 is configured for single-ended input (NRSE or RSE),  
eight analog input channels are available. Use single-ended input  
connections when the following conditions are met by all input signals:  
Input signals are high level (greater than 1 V).  
Leads connecting the signals to the PCI-1200 are less than 10 ft.  
All input signals share a common reference signal (at the source).  
If any of the preceding criteria is not met, use the DIFF input configuration.  
You can software configure the PCI-1200 for two different types of  
single-ended connections, RSE configuration and NRSE configuration.  
Use the RSE configuration for floating signal sources; in this case, the  
PCI-1200 provides the reference ground point for the external signal. Use  
the NRSE configuration for ground-referenced signal sources; in this case,  
the external signal supplies its own reference ground point and the  
PCI-1200 should not supply one.  
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Single-Ended Connections for Floating Signal Sources  
Figure 3-5 shows how to connect a floating signal source to a PCI-1200  
board configured for RSE mode. Configure the PCI-1200 analog input  
circuitry for RSE input to make these types of connections. Configuration  
instructions are in the Analog I/O Configuration section of Chapter 2,  
Installation and Configuration.  
ACH0  
ACH1  
ACH2  
1
2
3
+
Floating  
Signal  
Source  
+
Vs  
ACH7  
8
+
AISENSE/AIGND  
9
Measured  
Voltage  
Vm  
AGND  
11  
I/O Connector  
PCI-1200 in RSE Configuration  
Figure 3-5. Single-Ended Input Connections for Floating Signal Sources  
Single-Ended Connections for Grounded Signal Sources  
(NRSE Configuration)  
If you measure a grounded signal source with a single-ended configuration,  
configure the PCI-1200 in the NRSE input configuration. The signal is  
connected to the positive input of the PCI-1200 instrumentation amplifier  
and the signal local ground reference is connected to the negative input of  
the PCI-1200 instrumentation amplifier. Therefore, connect the ground  
point of the signal to the AISENSE pin. Any potential difference between  
the PCI-1200 ground and the signal ground appears as a common-mode  
signal at both the positive and negative inputs of the instrumentation  
amplifier and is therefore rejected by the amplifier. On the other hand, if  
the input circuitry of the PCI-1200 is referenced to ground, such as in the  
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RSE configuration, this difference in ground potentials appears as an error  
in the measured voltage.  
Figure 3-6 shows how to connect a grounded signal source to a PCI-1200  
board configured in the NRSE configuration. Configuration instructions  
are included in the Analog I/O Configuration section in Chapter 2,  
Installation and Configuration.  
1
2
ACH0  
ACH1  
Ground-  
Referenced  
Signal  
+
ACH2  
3
Vs  
Source  
8
ACH7  
+
+
9
Common-  
Mode  
Noise  
Measured  
Voltage  
+
AISENSE/AIGND  
Vm  
AGND  
11  
Vcm  
and so on  
I/O Connector  
Figure 3-6. Single-Ended Input Connections for Grounded Signal Sources  
Common-Mode Signal Rejection Considerations  
Figures 3-4 and 3-6 show connections for signal sources that are already  
referenced to some ground point with respect to the PCI-1200. In these  
cases, the instrumentation amplifier can reject any voltage caused by  
ground-potential differences between the signal source and the PCI-1200.  
In addition, with differential input connections, the instrumentation  
amplifier can reject common-mode noise pickup in the leads connecting the  
signal sources to the PCI-1200.  
The common-mode input range of the PCI-1200 instrumentation amplifier  
is the magnitude of the greatest common-mode signal that can be rejected.  
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The common-mode input range for the PCI-1200 depends on the size of the  
differential input signal (Vdiff = V+in Vin) and the gain setting of the  
instrumentation amplifier. In unipolar mode, the differential input range is  
0 to 10 V. In bipolar mode, the differential input range is 5 to +5 V. Inputs  
should remain within a range of 5 to 10 V in both bipolar and unipolar  
modes.  
Analog Output Signal Connections  
Pins 10 through 12 on the I/O connector are analog output signal pins.  
Pins 10 and 12 are the DAC0OUT and DAC1OUT signal pins. DAC0OUT  
is the voltage output signal for analog output channel 0. DAC1OUT is the  
voltage output signal for analog output channel 1.  
Pin 11, AGND, is the ground-reference point for both analog output  
channels as well as analog input.  
The following output ranges are available:  
Bipolar output  
Unipolar output  
5 V*  
0 to 10 V*  
*
Maximum load current  
2 mA for 12-bit linearity.  
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Chapter 3  
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Figure 3-7 shows how to make analog output signal connections.  
10  
DAC0OUT  
Channel 0  
+
VOUT 0  
Load  
Load  
AGND  
11  
12  
VOUT 1  
DAC1OUT  
+
Channel 1  
Analog Output Channels  
PCI-1200  
I/O Connector  
Figure 3-7. Analog Output Signal Connections  
Digital I/O Signal Connections  
Pins 13 through 37 of the I/O connector are digital I/O signal pins. Digital  
I/O on the PCI-1200 uses the 82C55A integrated circuit. The 82C55A is a  
general purpose peripheral interface containing 24 programmable I/O pins.  
These pins represent the three 8-bit ports (PA, PB, and PC) of the 82C55A.  
Pins 14 through 21 are connected to the digital lines PA<7..0> for digital  
I/O port A. Pins 22 through 29 are connected to the digital lines PB<7..0>  
for digital I/O port B. Pins 30 through 37 are connected to the digital lines  
PC<7..0> for digital I/O port C. Pin 13, DGND, is the digital ground pin for  
all three digital I/O ports. Refer to Appendix A, Specifications, for signal  
voltage and current specifications.  
The following specifications and ratings apply to the digital I/O lines. All  
voltages are with respect to DGND.  
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Logical Inputs and Outputs  
Absolute max voltage rating 0.5 to +5.5 V with respect to DGND  
Digital I/O lines:  
Input logic low voltage  
Input logic high voltage  
0.3 V min 0.8 V max  
2.2 V min  
5.3 V max  
0.4 V max  
Output logic low voltage  
(at output current = 2.5 mA)  
Output logic high voltage  
(at output current = 2.5 mA)  
3.7 V min  
Input leakage current  
(0 < Vin < 5 V)  
1 µA min  
1 µA max  
Figure 3-8 illustrates signal connections for three typical digital I/O  
applications.  
+5 V  
LED  
Port A  
14 PA0  
22 PB0  
PA<7..0>  
Port B  
PB<7..0>  
TTL Signal  
30 PC0  
13  
Port C  
+5 V  
PC<7..0>  
DGND  
I/O Connector  
PCI-1200  
Figure 3-8. Digital I/O Connections  
In Figure 3-8, port A is configured for digital output, and ports B and C are  
configured for digital input. Digital input applications include receiving  
TTL signals and sensing external device states such as the switch in  
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Figure 3-8. Digital output applications include sending TTL signals and  
driving external devices such as the LED shown in Figure 3-8.  
Port C Pin Connections  
The signals assigned to port C depend on the mode in which the 82C55A is  
programmed. In mode 0, port C is considered to be two 4-bit I/O ports. In  
modes 1 and 2, port C is used for status and handshaking signals with two  
or three I/O bits mixed in. Table 3-5 summarizes the signal assignments of  
port C for each programmable mode. Refer to the PCI-1200 Register-Level  
Programmer Manual for register-level programming information.  
Table 3-5. Port C Signal Assignments  
Group A  
PC5  
Group B  
PC1  
Programmable  
Mode  
PC7  
PC6  
PC4  
PC3  
PC2  
PC0  
I/O  
I/O  
I/O  
I/O  
I/O  
I/O  
I/O  
I/O  
Mode 0  
I/O  
I/O  
IBFA  
I/O  
STBA*  
I/O  
INTRA  
INTRA  
INTRA  
STBB*  
ACKB*  
I/O  
IBFBB  
OBFB*  
I/O  
INTRB  
INTRB  
I/O  
Mode 1 Input  
Mode 1 Output  
Mode 2  
OBFA*  
OBFA*  
ACKA*  
ACKA*  
IBFA  
STBA*  
* Indicates that the signal is active low.  
Power Connections  
Pin 49 of the I/O connector supplies +5 V from the computers power  
supply via a self-resetting fuse. The fuse will reset automatically within a  
few seconds after the overcurrent condition is removed. Pin 49 is  
referenced to DGND and you can use the +5 V to power external digital  
circuitry.  
Power rating  
1 A at +4.65 to +5.25 V  
Warning Do not directly connect this +5 V power pin to analog or digital ground or to any  
other voltage source on the PCI-1200 or any other device. Doing so can damage  
the PCI-1200 or your computer. National Instruments is NOT liable for any damage  
due to incorrect power connections.  
DAQ and General Purpose Timing Signal Connections  
Pins 38 through 48 of the I/O connector are connections for timing I/O  
signals. The PCI-1200 timing I/O uses two 82C53 counter/timer integrated  
circuits. One circuit, designated 82C53(A), is used exclusively for DAQ  
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timing, and the other, 82C53(B), is available for general use. Use pins 38  
through 40 and pin 43 to carry external signals for DAQ timing. These  
signals are explained in the next section, DAQ Timing Connections. Pins 41  
through 48 carry general purpose timing signals from 82C53(B). These  
signals are explained in the General Purpose Timing Signal Connections  
section later in this chapter.  
DAQ Timing Connections  
Each 82C53 counter/timer circuit contains three counters. Counter 0 on the  
82C53(A) counter/timer, referred to as A0, is a sample-interval counter in  
timed A/D conversions. Counter 1 on the 82C53(A) counter/timer, referred  
to as A1, is a sample counter in controlled A/D conversions. Therefore,  
counter A1 stops data acquisition after a predefined number of samples.  
These counters are not available for general use.  
Instead of counter A0, you can use EXTCONV* to externally time  
conversions. Figure 3-9 shows the timing requirements for the  
EXTCONV* input. An A/D conversion is initiated by a falling edge  
on the EXTCONV*.  
tw  
VIH  
VIL  
EXTCONV*  
tw  
tw 250 ns minimum  
A/D Conversion starts within  
125 ns from this point  
Figure 3-9. EXTCONV* Signal Timing  
The external control signal EXTTRIG can either start a DAQ sequence or  
terminate an ongoing DAQ sequence depending on the modeposttrigger  
(POSTTRIG) or pretrigger (PRETRIG). These modes are software  
selectable.  
In the POSTTRIG mode, EXTTRIG serves as an external trigger that  
initiates a DAQ sequence. When you use counter A0 to time sample  
intervals, a rising edge on EXTTRIG starts counter A0 and the DAQ  
sequence. When you use EXTCONV* to time sample intervals, data  
acquisition is enabled on a rising edge of EXTTRIG followed by a rising  
edge on EXTCONV*. The first conversion occurs on the next falling edge  
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of EXTCONV*. Further transitions on the EXTTRIG line have no effect  
until a new DAQ sequence is established.  
Figure 3-10 shows a possible controlled DAQ sequence using EXTCONV*  
and EXTTRIG. The rising edge of EXTCONV* that enables external  
conversions must occur a minimum of 50 ns after the rising edge of  
EXTTRIG. The first conversion occurs on the next falling edge of  
EXTCONV*.  
t
w
t
t
50 ns minimum  
50 ns minimum  
w
d
V
IH  
EXTTRIG  
t
w
V
IL  
t
d
EXTCONV*  
CONVERT  
Figure 3-10. Posttrigger DAQ Timing  
In the PRETRIG mode, EXTTRIG serves as a pretrigger signal. Data is  
acquired both before and after the EXTTRIG signal occurs. A/D  
conversions are software enabled, which initiates the DAQ operation.  
However, the sample counter is not started until the EXTTRIG input senses  
a rising edge. Conversions remain enabled until the sample counter counts  
to zero. The maximum number of samples acquired after the stop trigger is  
limited to 65,535. The number of samples acquired before the trigger is  
limited only by the size of the memory buffer available for data acquisition.  
Figure 3-11 shows a pretrigger DAQ timing sequence using EXTTRIG and  
EXTCONV*. The DAQ operation has been initiated through software.  
Notice that the sample counter has been programmed to allow five  
conversions after the rising edge on the EXTTRIG signal. Additional  
transitions on the EXTTRIG line have no effect until you initiate a new  
DAQ sequence.  
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Chapter 3  
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t
w
V
V
IH  
IL  
t
w
50 ns minimum  
EXTTRIG  
t
w
EXTCONV*  
CONVERT  
Figure 3-11. Pretrigger DAQ Timing  
For interval scanning data acquisition, counter B1 determines the scan  
interval. Instead of using counter B1, you can externally time the scan  
interval through OUTB1. If you externally time the sample interval, we  
recommend that you also externally time the scan interval.  
Figure 3-12 shows an example of an interval scanning DAQ operation. The  
scan interval and the sample interval are being timed externally through  
OUTB1 and EXTCONV*. Channels 1 and 0 of the input multiplexers are  
scanned once during each scan interval. The first rising edge of  
OUTB1. The first rising edge of EXTCONV* after the rising edge of  
OUTB1 enables an internal GATE signal that allows conversions to occur.  
The first conversion then occurs on the following falling edge of  
EXTCONV*. The GATE signal disables conversions for the rest of the scan  
interval after the desired channels have been scanned. Refer to the Interval  
Scanning Acquisition Mode section in Chapter 4, Theory of Operation, for  
more information on interval scanning.  
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Chapter 3  
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OUTB1  
t
= 50 ns  
w
t
= 50 ns  
d
EXTCONV*  
CONVERT  
GATE  
ADC CH  
CH1  
CH1  
CH0  
CH0  
Figure 3-12. Interval-Scanning Signal Timing  
You use the final external control signal, EXTUPDATE*, to externally  
control updating the output voltage of the 12-bit DACs and/or to generate  
an externally timed interrupt. There are two update modes, immediate  
update and delayed update. In immediate update mode the analog output is  
updated as soon as a value is written to the DAC. If you select the delayed  
update mode, a value is written to the DAC; however, the corresponding  
DAC voltage is not updated until a low level on the EXTUPDATE* signal  
is sensed. Furthermore, if you enable interrupt generation, an interrupt is  
generated whenever a rising edge is detected on the EXTUPDATE* bit.  
Therefore, you can perform externally timed, interrupt-driven waveform  
generation on the PCI-1200. The EXTUPDATE* line is susceptible to  
noise caused by switching lines and could generate false interrupts. We  
recommend that the width of the EXTUPDATE* pulse be as short as  
possible, but greater than 50 ns.  
Figure 3-13 illustrates a waveform generation timing sequence using the  
EXTUPDATE* signal and the delayed update mode. The DACs are  
updated by a high level on the DAC OUTPUT UPDATE signal, which in  
this case is triggered by a low level on the EXTUPDATE* line. CNTINT is  
the signal that interrupts the computer. This interrupt is generated on the  
rising edge of EXTUPDATE*. DACWRT is the signal that writes a new  
value to the DAC.  
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EXTUPDATE*  
tw  
DAC OUTPUT  
UPDATE  
CNTINT  
DACWRT  
tw Minimum 50 ns  
Figure 3-13. EXTUPDATE* Signal Timing for Updating DAC Output  
The absolute max voltage input rating for the EXTCONV*, EXTTRIG,  
OUTB1, and EXTUPDATE* signals is 0.5 to 5.5 V with respect to  
DGND.  
For more information concerning the various modes of data acquisition and  
analog output, refer to your NI-DAQ documentation or to Chapter 4,  
Theory of Operation, in this manual.  
General Purpose Timing Signal Connections  
The general purpose timing signals include the GATE, CLK, and OUT  
signals for the three 82C53(B) counters. The 82C53 counter/timers can be  
used for general purpose applications such as pulse and square wave  
generation, event counting, and pulse-width, time-lapse, and frequency  
measurement. For these applications, the CLK and GATE signals at the I/O  
connector control the counters. The single exception is counter B0, which  
has an internal 2 MHz clock.  
To perform pulse and square wave generation, program a counter to  
generate a timing signal at its OUT output pin. To perform event counting,  
program a counter to count rising or falling edges applied to any of the  
82C53 CLK inputs, then read the counter value to determine the number of  
edges that have occurred. You can enable or disable the counting operation  
by controlling the gate input. Figure 3-14 shows connections for a typical  
event-counting operation in which a switch is used to gate the counter on  
and off.  
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+5 V  
100 kΩ  
CLK  
OUT  
GATE  
Switch  
Signal  
Counter (from Group B)  
Source  
13  
DGND  
I/O Connector  
PCI-1200  
Figure 3-14. Event-Counting Application with External Switch Gating  
Pulse-width measurement is performed by level gating. The pulse you want  
to measure is applied to the counter GATE input. The counter is loaded with  
the known count and is programmed to count down while the signal at the  
GATE input is high. The pulse width equals the counter difference (loaded  
value minus read value) multiplied by the CLK period.  
Perform time-lapse measurement by programming a counter to be edge  
gated. An edge is applied to the counter GATE input to start the counter.  
Program the counter to start counting after receiving a low-to-high edge.  
The time lapse since receiving the edge equals the counter value difference  
(loaded value minus read value) multiplied by the CLK period.  
To perform frequency measurement, program a counter to be level gated  
and count the number of falling edges in a signal applied to a CLK input.  
The gate signal applied to the counter GATE input is of known duration. In  
this case, program the counter to count falling edges at the CLK input while  
the gate is applied. The frequency of the input signal then equals the count  
value divided by the gate period. Figure 3-15 shows the connections for a  
frequency measurement application. You can also use a second counter to  
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Chapter 3  
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generate the gate signal in this application. If you use a second counter,  
however, you must externally invert the signal.  
+5 V  
100 kΩ  
CLK  
OUT  
GATE  
Signal  
Source  
Gate  
Source  
Counter  
13  
DGND  
I/O Connector  
PCI-1200  
Figure 3-15. Frequency Measurement Application  
The GATE, CLK, and OUT signals for counters B1 and B2 are available at  
the I/O connector. The GATE and CLK pins are internally pulled up to +5 V  
through a 100 kresistor. Refer to Appendix A, Specifications, for signal  
voltage and current specifications.  
The following specifications and ratings apply to the 82C53 I/O signals:  
Absolute max  
0.5 to +5.5 V  
voltage input rating  
with respect to DGND  
82C53 digital input specifications (referenced to DGND):  
Vih input logic high voltage  
Vil input logic low voltage  
Input load current  
2.2 V min  
5.3 V max  
0.3 V min 0.8 V max  
10 µA min +10 µA max  
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82C53 digital output specifications (referenced to DGND):  
Voh output logic high voltage  
Vol output logic low voltage  
3.7 V min  
0.45 V max  
0.92 mA max  
2.1 mA max  
I
oh output source current, at Voh  
Iol output sink current, at Vol  
Figure 3-16 shows the timing requirements for the GATE and CLK input  
signals and the timing specifications for the 82C53 OUT output signals.  
t
t
pwl  
t
pwh  
sc  
V
V
IH  
CLK  
IL  
t
t
gh  
gsu  
V
V
IH  
GATE  
IL  
t
t
gwl  
gwh  
t
t
outc  
outg  
V
V
OH  
OUT  
OL  
tsc  
clock period  
380 ns minimum  
230 ns minimum  
150 ns minimum  
100 ns minimum  
50 ns minimum  
150 ns minimum  
100 ns minimum  
300 ns maximum  
400 ns maximum  
tpwh clock high level  
tpwl  
tgsu  
tgh  
clock low level  
gate setup time  
gate hold time  
tgwh gate high level  
tgwl gate low level  
toutc output delay from clock  
toutg output delay from gate  
Figure 3-16. General Purpose Timing Signals  
The GATE and OUT signals in Figure 3-16 are referenced to the rising edge  
of the CLK signal.  
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Timing Specifications  
Use the handshaking lines STB* and IBF to synchronize input transfers.  
Use the handshaking lines OBF* and ACK* to synchronize output  
transfers.  
The following signals are used in the mode timing diagrams:  
Table 3-6. Signal Names Used in Timing Diagrams  
Description  
Name  
Type  
Input  
STB*  
Strobe InputA low signal on this handshaking line loads data into the  
input latch.  
IBF  
Output  
Input  
Input Buffer FullA high signal on this handshaking line indicates that  
data has been loaded into the input latch. This is primarily an input  
acknowledge signal.  
ACK*  
Acknowledge InputA low signal on this handshaking line indicates  
that the data written from the specified port has been accepted. This  
signal is primarily a response from the external device that it has  
received the data from the PCI-1200.  
OBF*  
INTR  
Output  
Output  
Output Buffer FullA low signal on this handshaking line indicates  
that data has been written from the specified port.  
Interrupt RequestThis signal becomes high when the 82C55A is  
requesting service during a data transfer. Set the appropriate interrupt  
enable signals to generate this signal.  
RD*  
Internal  
Internal  
Read SignalThis signal is the read signal generated from the PCI  
interface circuitry.  
WRT*  
DATA  
Write SignalThis signal is the write signal generated from the PCI  
interface circuitry.  
Bidirectional Data Lines at the Specified PortThis signal indicates when the data  
on the data lines at a specified port is or should be available.  
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Mode 1 Input Timing  
The timing specifications for an input transfer in mode 1 are as follows:  
T1  
T2  
T4  
STB *  
T7  
IBF  
T6  
INTR  
RD *  
T3  
T5  
DATA  
Name  
T1  
Description  
STB* pulse width  
Minimum  
Maximum  
500  
0
T2  
300  
STB* = 0 to IBF = 1  
Data before STB* = 1  
STB* = 1 to INTR = 1  
Data after STB* = 1  
RD* = 0 to INTR = 0  
RD* = 1 to IBF = 0  
T3  
T4  
180  
300  
T5  
T6  
400  
T7  
300  
All timing values are in nanoseconds.  
Figure 3-17. Mode 1 Timing Specifications for Input Transfers  
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Mode 1 Output Timing  
The timing specifications for an output transfer in mode 1 are as follows:  
T3  
WRT*  
OBF*  
T4  
T1  
T6  
INTR  
ACK*  
DATA  
T5  
T2  
Name  
T1  
Description  
WRT* = 0 to INTR = 0  
Minimum  
Maximum  
450  
T2  
350  
WRT* = 1 to output  
WRT* = 1 to OBF* = 0  
ACK* = 0 to OBF* = 1  
ACK* pulse width  
T3  
650  
T4  
350  
T5  
300  
T6  
350  
ACK* = 1 to INTR = 1  
All timing values are in nanoseconds.  
Figure 3-18. Mode 1 Timing Specifications for Output Transfers  
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Chapter 3  
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Mode 2 Bidirectional Timing  
The timing specifications for bidirectional transfers in mode 2 are as  
follows:  
T1  
WRT *  
T6  
OBF *  
INTR  
T7  
ACK *  
T3  
STB *  
IBF  
T10  
T4  
RD *  
T5  
T9  
T2  
T8  
DATA  
Name  
Description  
Minimum  
Maximum  
650  
T1  
T2  
T3  
T4  
T5  
T6  
T7  
T8  
T9  
T10  
0
WRT* = 1 to OBF* = 0  
Data before STB* = 1  
STB* pulse width  
500  
300  
STB* = 0 to IBF = 1  
Data after STB* = 1  
ACK* = 0 to OBF* = 1  
ACK* pulse width  
180  
350  
300  
300  
250  
300  
ACK* = 0 to output  
ACK* = 1 to output float  
20  
All timing values are in nanoseconds.  
Figure 3-19. Mode 2 Timing Specifications for Bidirectional Transfers  
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4
Theory of Operation  
This chapter explains the operation of each functional unit of the PCI-1200.  
Functional Overview  
The block diagram in Figure 4-1 shows a functional overview of the  
PCI-1200 board.  
Dither  
Data/Address  
Address  
16  
8
Pgm  
Gain  
Input  
Mux  
12-Bit  
A/D  
FIFO  
37  
5
Interface Control  
Data  
4
Digital  
Control  
Logic  
6
8
3
Calibration  
Error Reporting  
Control  
MITE  
PCI  
Interface  
Chip  
12  
2
4
4
Interrupt  
Arbitration  
12  
12  
1
82C53  
Ctr/Timer  
Group A  
82C55A  
Digital  
Interface  
12-Bit  
D/A  
2
1
DRQ  
24  
System  
1
2
1
12-Bit  
D/A  
Interrupt  
1
82C53  
Ctr/Timer  
Group B  
1 MHz  
Timebase  
8
8
2 MHz  
Timebase  
Time  
Divider  
10 MHz  
Oscillator  
Figure 4-1. PCI-1200 Block Diagram  
The major components of the PCI-1200 are as follows:  
MITE PCI interface circuitry  
Timing circuitry  
Analog input circuitry  
Analog output circuitry  
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Theory of Operation  
Digital I/O circuitry  
Calibration circuitry  
The internal data and control buses interconnect the components. The rest  
of this chapter explains the theory of operation of each of the PCI-1200  
components. Calibration circuitry is discussed in Chapter 5, Calibration.  
PCI Interface Circuitry  
The PCI-1200 interface circuitry consists of the MITE PCI interface chip  
and a digital control logic chip. The MITE PCI interface chip provides a  
mechanism for the PCI-1200 to communicate with the PCI bus. It is an  
Application Specific Integrated Circuit (ASIC) designed by National  
Instruments specifically for data acquisition. The digital control logic  
chip connects the MITE PCI interface chip with the rest of the board.  
The PCI-1200 is fully compliant with PCI Local Bus Specification,  
Revision 2.0. Therefore, the base memory address and interrupt level for  
the board are stored inside the MITE PCI interface chip at power on. You  
do not need to set any switches or jumpers. The PCI bus is capable of 8-bit,  
16-bit, or 32-bit transfers, but the PCI-1200 uses only 8-bit transfers.  
Data/Address  
Address  
37  
5
Interface Control  
Data  
Digital  
Control  
Logic  
6
8
Error Reporting  
Control/Data  
Control  
MITE  
PCI  
Interface  
Chip  
2
4
Arbitration  
Interrupt  
2
1
System  
DRQ  
1
2
Interrupt  
1
Figure 4-2. PCI Interface Circuitry  
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The PCI-1200 generates an interrupt in the following five cases (each of  
these interrupts is individually enabled and cleared):  
When a single A/D conversion can be read from the A/D FIFO  
memory.  
When the A/D FIFO is half-full.  
When a DAQ operation completes, including when either an  
OVERFLOW or an OVERRUN error occurs.  
When the digital I/O circuitry generates an interrupt.  
When a rising edge signal is detected on the DAC update signal.  
Timing  
The PCI-1200 uses two 82C53 counter/timer integrated circuits for internal  
DAQ and DAC timing and for general purpose I/O timing functions.  
Figure 4-3 shows a block diagram of both groups of timing circuitry  
(counter groups A and B).  
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GATEB2  
CLKB2  
GATEB2  
CLKB2  
OUTB2  
General  
Purpose  
Counter  
OUTB2  
GATEB1  
GATEB1  
CLKB1  
OUTB0  
MUX  
1 MHz Source  
Scan  
MUX  
Interval/  
General  
Purpose  
Counter  
CLKB1  
OUTB1  
CLKA0  
OUTB1  
Data/Address  
Address  
OUTB0  
OUTB0  
37  
5
Data  
GATEB0  
GATEB0  
Interface Control  
CTR RD  
Digital  
Control  
Logic  
Timebase  
Extension/  
General  
Purpose  
Counter  
CTR WRT  
Data  
6
8
Error Reporting  
Control  
MITE  
PCI  
Interface  
Chip  
2
4
8
Arbitration  
Interrupt  
2 MHz  
Source  
2
1
CLKB0  
System  
DRQ  
CLKA0  
82C53 Counter/Timer  
Group B  
2
GATEA0  
1
Interrupt  
Sample  
Interval  
Counter  
1
OUTB1  
OUTA0  
CLKA1  
EXTCONV*  
Sample  
Counter  
A/D Conversion Logic  
GATEA1  
OUTA1  
EXTTRIG  
CLKA2  
+5 V  
GATEA2  
EXTUPDATE*  
DAC  
Timing  
D/A Conversion Logic  
OUTA2  
82C53 Counter/Timer  
Group A  
Figure 4-3. Timing Circuitry  
Each 82C53 contains three independent 16-bit counter/timers and one 8-bit  
mode register. Each counter has a CLK input pin, a GATE input pin, and an  
OUT output pin. You can program all six counter/timers to operate in  
several useful timing modes.  
The first group of counter/timers is called group A and includes A0, A1,  
and A2. You can use these three counters for internal DAQ and DAC  
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timing, or you can use the three external timing signals, EXTCONV*,  
EXTTRIG, and EXTUPDATE*, for DAQ and DAC timing.  
The second group of counter/timers is called group B and includes B0, B1,  
and B2. You can use counters B0 and B1 for internal DAQ and DAC  
timing, or you can use the external timing signal CLKB1 for analog input  
timing. If you are not using counters B0 and B1 for internal timing, you can  
use these counters as general purpose counter/timers. Counter B2 is  
reserved for external use as a general purpose counter/timer.  
For a more detailed description of counter group A and  
counters B0 and B1, refer to the Analog Input and Analog Output sections.  
Analog Input  
The PCI-1200 has eight channels of analog input with  
software-programmable gain and 12-bit A/D conversion. The PCI-1200  
also contains DAQ timing circuitry for automatic timing of multiple A/D  
conversions and includes advanced options such as external triggering,  
gating, and clocking. Figure 4-4 shows a block diagram of the analog input  
circuitry.  
Address  
Data/Address  
5
Data  
37  
+
Data  
12  
A/D  
Data  
Interface Control  
A/D  
FIFO  
ACH0  
ACH1  
ACH2  
Program-  
mable  
Gain Amp  
Sample-  
and-Hold  
Amp  
ADC  
8
6
12  
Error Reporting  
Control  
A/D  
RD  
Digital  
Control  
Logic  
ACH3  
Mux  
MITE  
PCI  
Interface  
Chip  
ACH4  
ACH5  
ACH6  
ACH7  
4
2
Interrupt  
Arbitration  
CONV  
AVAIL  
1
2
GAIN0  
GAIN1  
GAIN2  
Data  
System  
DRQ  
8
WRT/RD  
1
2
Gain Select/  
Mux Counter  
6
Interrupt  
1
ACH1  
ACH3  
ACH5  
ACH7  
AISENSE/  
Mux  
Dither  
Circuitry  
Dither Enable  
AIGND  
Dither  
DAQ  
Timing  
Counter/Timer  
Signals  
External Trigger  
EXTTRIG  
External Convert  
EXTCONV*  
OUTB1  
External Scan Interval  
Figure 4-4. Analog Input Circuitry  
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Chapter 4  
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Analog Input Circuitry  
The analog input circuitry consists of two analog input multiplexers,  
multiplexer (mux) counter/gain select circuitry, a software-programmable  
gain amplifier, a 12-bit ADC, and a 16-bit sign-extended FIFO memory.  
One of the input multiplexers has eight analog input channels (channels 0  
through 7). The other multiplexer is connected to channels 1, 3, 5, and 7 for  
differential mode. The input multiplexers provide input overvoltage  
protection of 35 V powered on and 25 V powered off.  
The mux counters control the input multiplexers. The PCI-1200 can  
perform either single-channel data acquisition or multichannel scanned  
data acquisition. These two modes are software selectable. For  
single-channel data acquisition, you select the channel and gain before  
initiating data acquisition. These gain and multiplexer settings remain  
constant during the entire DAQ process. For multichannel scanned data  
acquisition, you select the highest numbered channel and gain before  
initiating data acquisition. Then the mux counter decrements from the  
highest numbered channel to channel 0 and repeats the process. Thus, you  
can scan any number of channels from two to eight. Notice that you use the  
same gain setting for all channels in the scan sequence.  
The programmable-gain amplifier applies gain to the input signal, allowing  
an input analog signal to be amplified before being sampled and converted,  
thus increasing measurement resolution and accuracy. The instrumentation  
amplifier gain is software selectable. The PCI-1200 board provides gains of  
1, 2, 5, 10, 20, 50, and 100.  
The dither circuitry, when enabled, adds approximately 0.5 LSBrms of  
white Gaussian noise to the signal to be converted to the ADC. This  
addition is useful for applications involving averaging to increase the  
resolution of the PCI-1200 to more than 12 bits, as in calibration. In such  
applications, which are often lower frequency in nature, noise modulation  
is decreased and differential linearity is improved by the addition of the  
dither. For high-speed 12-bit applications not involving averaging, you  
should disable dither because it only adds noise.  
When taking DC measurements, such as when calibrating the board, enable  
dither and average about 1,000 points to take a single reading. This process  
removes the effects of 12-bit quantization and reduces measurement noise,  
resulting in improved resolution. Dither, or additive white noise, has the  
effect of forcing quantization noise to become a zero-mean random variable  
rather than a deterministic function of input. For more information on the  
effects of dither, see Dither in Digital Audioby John Vanderkooy and  
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Stanley P. Lipshitz, Journal of the Audio Engineering Society, Vol. 35,  
No. 12, Dec. 1987.  
The PCI-1200 uses a 12-bit successive-approximation ADC. The  
converters 12-bit resolution allows it to resolve its input range into 4,095  
different steps. The ADC has an input range of 5 V and 0 to 10 V.  
When an A/D conversion is complete, the ADC clocks the result into the  
A/D FIFO. The A/D-FIFO is 16 bits wide and 4,096 words deep. This FIFO  
serves as a buffer to the ADC. The A/D FIFO can collect up to 4,096 A/D  
conversion values before any information is lost, thus allowing software  
some extra time to catch up with the hardware. If you store more than 4,096  
values in the A/D FIFO before reading from it, an error condition called  
A/D FIFO overflow occurs and you lose A/D conversion information.  
The ADC output can be interpreted as either straight binary or twos  
complement, depending on which coding scheme you select. Straight  
binary is the recommended coding scheme for unipolar input mode. With  
this scheme, the ADC data is interpreted as a 12-bit straight binary number  
with a range of 0 to +4,095. Twos complement is the recommended coding  
scheme for bipolar input mode. With this scheme, the ADC data is  
interpreted as a 12-bit twos complement number with a range of 2,048 to  
+2,047. The ADC output is then sign-extended to 16 bits, causing either a  
leading 0 or a leading F (hex) to be added, depending on the coding and the  
sign. Thus, data values read from the FIFO are 16-bits wide.  
DAQ Operations  
This manual uses the phrase data acquisition operation (abbreviated as  
DAQ operation) to refer to a sequence of timed A/D conversions. The  
PCI-1200 performs DAQ operations in one of three modes: controlled  
acquisition mode, freerun acquisition mode, and interval scanning  
acquisition mode. The PCI-1200 performs both single-channel and  
multichannel scanned data acquisition.  
The DAQ timing circuitry consists of various clocks and timing signals that  
control the DAQ operation. DAQ timing consists of signals that initiate a  
DAQ operation, time the individual A/D conversions, gate the DAQ  
operation, and generate scanning clocks. The DAQ operation can be timed  
either by the timing circuitry or by externally generated signals. These two  
timing modes are software configurable.  
DAQ operations are initiated either externally through EXTTRIG or  
through software control. The DAQ operation is terminated either  
internally by counter A1 of the 82C53 (A) counter/timer circuitry, which  
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Chapter 4  
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counts the total number of samples taken during a controlled operation, or  
through software control in a freerun operation.  
Controlled Acquisition Mode  
The PCI-1200 uses two counters, counter A0 and counter A1, to execute  
DAQ operations in controlled acquisition mode. Counter A0 counts sample  
intervals, while counter A1 counts samples. In a controlled acquisition  
mode DAQ operation, the board performs a specified number of  
conversions, and then the hardware shuts off the conversions. Counter A0  
generates the conversion pulses, and counter A1 gates off counter A0 after  
the programmed count has expired. The number of conversions in a single  
controlled acquisition mode DAQ operation is limited to a 16-bit count  
(65,535 conversions).  
Freerun Acquisition Mode  
The PCI-1200 uses one counter, counter A0, to execute DAQ operations in  
freerun acquisition mode. Counter A0 continuously generates the  
conversion pulses as long as GATEA0 is held at a high logic level. The  
software keeps track of the number of conversions that have occurred and  
turns off counter A0 either after the required number of conversions has  
been obtained or after some other user-defined criteria have been met. The  
number of conversions in a single freerun acquisition mode DAQ operation  
is unlimited.  
Interval Scanning Acquisition Mode  
The PCI-1200 uses two counters for interval scanning data acquisition.  
Counter B1 is used to time the scan interval. Counter A0 times the sample  
interval. In interval scanning analog input operations, scan sequences are  
executed at regular, specified intervals. The amount of time that elapses  
between consecutive scans within the sequence is the sample interval. The  
amount of time that elapses between consecutive scan sequences is the scan  
interval. LabVIEW, LabWindows/CVI, other application software, and  
NI-DAQ support only multichannel interval scanning. Single-channel  
interval scanning is available only through register-level programming.  
Refer to the PCI-1200 Register-Level Programming Manual for more  
information on single-channel interval scanning.  
Because interval scanning allows you to specify how frequently scan  
sequences are executed, it is useful for applications in which you need to  
sample data at regular but relatively infrequent intervals. For example, to  
sample channel 1, wait 12 µs, then sample channel 0; and if you want to  
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repeat this process every 65 ms, then you should define the operation as  
follows:  
Start channel:  
Sample interval:  
Scan interval:  
ch1 (which gives a scan sequence of ch1, ch0)  
12 µs  
65 ms  
The first channel will not be sampled until one sample interval from the  
scan interval pulse. Since the A/D conversion time is 10 µs, your sample  
interval must be at least this value to ensure proper operation.  
Single-Channel Data Acquisition  
The PCI-1200 executes a single-channel analog input operation by  
performing an A/D conversion on a specified analog input channel every  
sample interval. The sample interval is the amount of time that elapses  
between successive A/D conversions. The sample interval is controlled  
either externally by EXTCONV* or internally by counter A0 of the timing  
circuitry.  
To specify a single-channel analog input operation, select an analog input  
channel and a gain setting for that channel.  
Multichannel Scanned Data Acquisition  
The PCI-1200 executes a multichannel DAQ operation by repeatedly  
scanning a sequence of analog input channels (the same gain is applied to  
each channel in the sequence). The channels are scanned in decreasing  
consecutive order; the highest-numbered channel is the start channel, and  
channel 0 is the last channel in the sequence.  
During each scan sequence, the PCI-1200 scans the start channel (the  
highest-numbered channel) first, then the next highest-numbered channel,  
and so on until it scans channel 0. The PCI-1200 repeats these scan  
sequences until the DAQ operation is terminated.  
For example, if channel 3 is specified as the start channel, then the scan  
sequence is as follows:  
ch3, ch2, ch1, ch0, ch3, ch2, ch1, ch0, ch3, ch2, …  
To specify the scan sequence for a multichannel scanned analog input  
operation, select the start channel for the scan sequence.  
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Chapter 4  
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DAQ Rates  
Maximum DAQ rates (number of samples per second) are determined by  
the conversion period of the ADC plus the sample-and-hold acquisition  
time. During multichannel scanning, the DAQ rates are further limited by  
the settling time of the input multiplexers and programmable gain  
amplifier. After the input multiplexers are switched, the amplifier must be  
allowed to settle to the new input signal value to within 12-bit accuracy  
before you perform an A/D conversion, or 12-bit accuracy will not be  
achieved. The settling time is a function of the gain selected.  
Table 4-1 shows the recommended settling time for each gain setting  
during multichannel scanning. Table 4-2 shows the maximum  
recommended DAQ rates for both single-channel and multichannel data  
acquisition. For single-channel scanning, this rate is limited only by the  
ADC conversion period plus the sample-and-hold acquisition time,  
specified at 10 µs. For multichannel data acquisition, observing the DAQ  
rates in Table 4-2 ensures 12-bit resolution. The hardware is capable of  
multiple scanning at higher rates than those listed in Table 4-2, but 12-bit  
resolution is not guaranteed.  
Table 4-1. Analog Input Settling Time Versus Gain  
Settling Time  
Gain  
1
(Accuracy 0.024% [ 1 LSB])  
10 µs typ, 14 µs max  
13 µs typ, 16 µs max  
15 µs typ, 19 µs max  
27 µs typ, 34 µs max  
60 µs typ, 80 µs max  
210  
20  
50  
100  
Table 4-2. PCI-1200 Maximum Recommended DAQ Rates  
Acquisition Mode  
Gain  
Rate  
Single-channel  
Multichannel  
1, 2, 5, 10, 20, 50, 100  
100 kS/s  
1
2, 5, 10  
20  
100 kS/s  
77 kS/s  
66.6 kS/s  
37 kS/s  
50  
100  
16.6 kS/s  
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The recommended DAQ rates in Table 4-2 assume that voltage levels on all  
the channels included in the scan sequence are within range for the given  
gain and are driven by low-impedance sources.  
Analog Output  
The PCI-1200 has two channels of 12-bit D/A output. Each analog output  
channel can provide unipolar or bipolar output. The PCI-1200 also contains  
timing circuitry for waveform generation timed either externally or  
internally. Figure 4-5 shows the analog output circuitry.  
Data/Address  
Address  
Two's Complement  
DAC0WRT  
37  
5
Data  
Interface Control  
DAC0  
DAC0OUT  
AGND  
Data  
8
6
8
Error Reporting  
Control  
MITE  
Digital  
Control  
Logic  
2
4
PCI  
Interface  
Chip  
10 V Internal  
Reference  
Arbitration  
Interrupt  
External Update  
Counter  
A2  
EXTUPDATE*  
DAC1OUT  
2
1
System  
DAC1WRT  
2
DAC1  
Interrupt  
Two's Complement  
1
Figure 4-5. Analog Output Circuitry  
Analog Output Circuitry  
Each analog output channel contains a 12-bit DAC. The DAC in each  
analog output channel generates a voltage proportional to the 10 V internal  
reference multiplied by the 12-bit digital code loaded into the DAC. The  
voltage output from the two DACs is available at the DAC0OUT and  
DAC1OUT pins.  
You can program each DAC channel for a unipolar voltage output or a  
bipolar voltage output range. A unipolar output gives an output voltage  
range of 0.0000 to +9.9976 V. A bipolar output gives an output voltage  
range of 5.0000 to +4.9976 V. For unipolar output, 0.0000 V output  
corresponds to a digital code word of 0. For bipolar output, 5.0000 V  
output corresponds to a digital code word of F800 hex. One LSB is the  
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voltage increment corresponding to an LSB change in the digital code  
word. For both outputs:  
10V  
1LSB = --------------  
4, 095  
DAC Timing  
There are two modes in which you can update the DAC voltages. In  
immediate update mode, the DAC output voltage is updated as soon as you  
write to the corresponding DAC. In delayed update mode, the DAC output  
voltage does not change until a low level is detected either from counter A2  
of the timing circuitry or EXTUPDATE*. This mode is useful for  
waveform generation. These two modes are software selectable.  
Digital I/O  
The digital I/O circuitry has an 82C55A integrated circuit. The 82C55A  
is a general purpose programmable peripheral interface containing 24  
programmable I/O pins. These pins represent the three 8-bit I/O ports  
(A, B, and C) of the 82C55A, as well as PA<0..7>, PB<0..7>, and  
PC<0..7> on the PCI-1200 I/O connector. Figure 4-6 shows the digital I/O  
circuitry.  
Data/Address  
Address  
PA<0..7>  
DATA<0..7>  
8
8
8
37  
5
Data  
PB<0..7>  
PC<0..7>  
Interface Control  
DIO RD/WRT  
2
Digital  
Control  
Logic  
82C55A  
Programmable  
Peripheral  
6
8
Error Reporting  
Control  
MITE  
PCI  
Interface  
2
4
Interface  
Chip  
Arbitration  
Interrupt  
2
1
System  
2
Interrupt  
1
PC0  
PC3  
Figure 4-6. Digital I/O Circuitry  
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All three ports on the 82C55A are TTL-compatible. When enabled, the  
digital output ports are capable of sinking 2.5 mA of current and sourcing  
2.5 mA of current on each digital I/O line. When the ports are not enabled,  
the digital I/O lines act as high-impedance inputs.  
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5
Calibration  
This chapter discusses the calibration procedures for the PCI-1200 analog  
I/O circuitry. However, the PCI-1200 is factory calibrated, and National  
Instruments can recalibrate your unit if needed. To maintain the 12-bit  
accuracy of the PCI-1200 analog input and analog output circuitry,  
recalibrate at 6-month intervals.  
There are four ways to perform calibrations.  
If you have LabVIEW, use the 1200 Calibrate VI. This VI is located in  
the Calibration and Configuration palette.  
If you have LabWindows/CVI, use the Calibrate_1200 function.  
If you do not have LabVIEW or LabWindows/CVI, use the NI-DAQ  
Calibrate_1200 function.  
Use your own register-level writes to the calibration DACs and the  
EEPROM. (Use this method only if NI-DAQ does not support your  
operating system.)  
To calibrate using register-level writes, you need to use the PCI-1200  
Register-Level Programmer Manual.  
The PCI-1200 is software calibrated. The calibration process involves  
reading offset and gain errors from the analog input and analog output data  
areas and writing values to the appropriate calibration DACs to null the  
errors. There are four calibration DACs associated with the analog input  
circuitry and four calibration DACs associated with the analog output  
circuitry, two for each output channel. After the calibration process is  
complete, each calibration DAC is at a known value. Because these values  
are lost when the board is powered down, they are also stored in the  
onboard EEPROM for future reference.  
The factory information occupies one half of the EEPROM and is  
write-protected. The lower half of the EEPROM contains user areas for  
calibration data. There are four different user areas.  
When the PCI-1200 is powered on, or the conditions under which it is  
operating change, you must load the calibration DACs with the appropriate  
calibration constants.  
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Chapter 5  
Calibration  
If you use the PCI-1200 with NI-DAQ, LabVIEW, LabWindows/CVI,  
or other application software, the factory calibration constants are  
automatically loaded into the calibration DAC the first time a function  
pertaining to the PCI-1200 is called, and again each time you change your  
configuration (which includes gain). You can, instead, choose to load the  
calibration DACs with calibration constants from the user areas in the  
EEPROM or you can recalibrate the PCI-1200 and load these constants  
directly into the calibration DACs. Calibration software is included with  
the PCI-1200 as part of your NI-DAQ software.  
Calibration at Higher Gains  
The PCI-1200 has a maximum gain error of 0.8%. This means that if the  
board is calibrated at a gain of 1 and if the gain is switched to 100, a  
maximum error of 32 LSB may result in the reading. Therefore, when you  
are recalibrating the PCI-1200, you should perform gain calibration at all  
other gains (2, 5, 10, 20, 50, and 100), and store the corresponding values  
in the user-gain calibration data area of the EEPROM, thus ensuring a  
maximum error of 0.02% at all gains. The PCI-1200 is factory-calibrated at  
all gains, and NI-DAQ automatically loads the correct values into the  
calibration DACs whenever you switch gains.  
Calibration Equipment Requirements  
The equipment you use to calibrate the PCI-1200 should have a 0.001%  
rated accuracy, which is 10 times as accurate as the PCI-1200. However,  
calibration equipment with only four times the accuracy as the PCI-1200  
and a 0.003% rated accuracy is acceptable. The inaccuracy of the  
calibration equipment results only in gain error; offset error is unaffected.  
Calibrate the PCI-1200 to a measurement accuracy of 0.5 LSBs, which is  
within 0.012% of its input range.  
For analog input calibration, use a precision DC voltage source, such as a  
calibrator, with the following specifications.  
Voltage  
0 to 10 V  
Accuracy  
0.001% standard  
0.003% acceptable  
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Chapter 5  
Calibration  
Using the Calibration Function  
The Calibrate_1200 function and the 1200 Calibrate VI can either load  
the calibration DACs with the factory constants or the user-defined  
constants stored in the EEPROM, or you can perform your own calibration  
and directly load these constants into the calibration DACs. To use the  
Calibrate_1200 function or the 1200 Calibrate VI for analog input  
calibration, ground an analog input channel at the I/O connector for offset  
calibration and apply an accurate voltage reference to another input channel  
for gain calibration. You should first configure the ADC for RSE mode,  
then for the correct polarity at which you want to perform data acquisition.  
To use the Calibrate_1200 function or the 1200 Calibrate VI for analog  
output calibration, the DAC0 and DAC1 outputs must be wrapped back and  
applied to two other analog input channels. You should first configure the  
analog input circuitry for RSE and for bipolar polarity, then configure the  
analog output circuitry for the polarity at which you want to perform output  
waveform generation.  
Refer to your software documentation for more details on the  
Calibrate_1200 function and the 1200 Calibrate VI.  
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A
Specifications  
This appendix lists the PCI-1200 specifications. These specifications are  
typical at 25° C unless otherwise stated.  
Analog Input  
Input Characteristics  
Number of channels ............................... Eight single-ended, eight  
pseudodifferential or four  
differential, software selectable  
Type of ADC.......................................... Successive approximation  
Resolution .............................................. 12 bits, 1 in 4,096  
Max sampling rate.................................. 100 kS/s  
Input signal ranges  
Board Ranges  
(Software Selectable)  
Board Gain  
(Software  
Selectable)  
5 V  
5 V  
0 to 10 V  
0 to 10 V  
1
2
2.5 V  
0 to 5 V  
5
1 V  
0 to 2 V  
10  
20  
50  
100  
500 mV  
250 mV  
100 mV  
50 mV  
0 to 1 V  
0 to 500 mV  
0 to 200 mV  
0 to 100 mV  
Input coupling ........................................ DC  
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Appendix A  
Specifications  
Max working voltage..............................In DIFF or NRSE  
(signal + common mode)........................mode, the negative  
input/AISENSE should remain  
within 5 V of AGND (bipolar),  
or 5 to 2 V (unipolar). The  
positive input should remain  
within the 5 to +10 V range.  
Overvoltage protection ........................... 35 V powered on,  
25 V powered off  
Inputs protected ...............................ACH<0..7>  
FIFO buffer size......................................4,096 samples  
Data transfers..........................................DMA, interrupts,  
programmed I/O  
DMA mode.............................................Scatter gather  
Dither......................................................Available  
Transfer Characteristics  
Relative accuracy.................................... 0.5 LSB typ dithered,  
1.5 LSB max undithered  
DNL........................................................ 1 LSB max  
No missing codes....................................12 bits, guaranteed  
Offset error  
Pregain error after calibration..........10 µV max  
Pregain error before calibration....... 20 mV max  
Postgain error after calibration ........1 mV max  
Postgain error before calibration ..... 200 mV max  
Gain error (relative to calibration reference)  
After calibration...............................0.02% of reading max  
Before calibration............................ 2% of reading max  
Amplifier Characteristics  
Input impedance  
Normal powered on .........................100 Gin parallel with 50 pF  
PCI-1200 User Manual  
A-2  
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Appendix A  
Specifications  
Powered off..................................... 4.7 kmin  
Overload.......................................... 4.7 kmin  
Input bias current ................................... 100 pA  
Input offset current................................. 100 pA  
CMRR .................................................... 70 dB, DC to 60 Hz  
Dynamic Characteristics  
Bandwidth  
Small signal (3 dB)  
Gain  
1-10  
20  
Bandwidth  
250 kHz  
150 kHz  
60 kHz  
50  
100  
30 kHz  
Settling time for full-scale step  
Settling Time  
Gain  
1
(Accuracy 0.024% ( 1 LSB))  
10 µs typ, 14 µs max  
13 µs typ, 16 µs max  
15 µs typ, 19 µs max  
27 µs typ, 34 µs max  
60 µs typ, 80 µs max  
210  
20  
50  
100  
System noise (including quantization error)  
Gain  
150  
100  
Dither off  
0.3 LSB rms  
0.5 LSB rms  
Dither on  
0.5 LSB rms  
0.7 LSB rms  
Stability  
Recommended warm-up time ................ 15 min.  
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Appendix A  
Specifications  
Offset temperature coefficient  
Pregain............................................. 15 µV/° C  
Postgain ........................................... 100 µV/° C  
Gain temperature coefficient .................. 40 ppm/° C  
Explanation of Analog Input Specifications  
Relative accuracy is a measure of the linearity of an ADC. However,  
relative accuracy is a tighter specification than a nonlinearity specification.  
Relative accuracy indicates the maximum deviation from a straight line for  
the analog-input-to-digital-output transfer curve. If an ADC has been  
calibrated perfectly, this straight line is the ideal transfer function, and the  
relative accuracy specification indicates the worst deviation from the ideal  
that the ADC permits.  
A relative accuracy specification of 1 LSB is roughly equivalent to, but  
not the same as, a 0.5 LSB nonlinearity or integral nonlinearity  
specification because relative accuracy encompasses both nonlinearity and  
variable quantization uncertainty, a quantity often mistakenly assumed to  
be exactly 0.5 LSB. Although quantization uncertainty is ideally  
0.5 LSB, it can be different for each possible digital code and is actually  
the analog width of each code. Thus, it is more specific to use relative  
accuracy as a measure of linearity than it is to use what is normally called  
nonlinearity, because relative accuracy ensures that the sum of quantization  
uncertainty and A/D conversion error does not exceed a given amount.  
Integral nonlinearity (INL) in an ADC is an often ill-defined specification  
that is supposed to indicate a converters overall A/D transfer linearity. The  
manufacturer of the ADC chip National Instruments uses on the PCI-1200  
specifies its integral nonlinearity by stating that the analog center of any  
code will not deviate from a straight line by more than 1 LSB. This  
specification is misleading because, although a particularly wide codes  
center may be found within 1 LSB of the ideal, one of its edges may be  
well beyond 1.5 LSB; thus, the ADC would have a relative accuracy of  
that amount. National Instruments tests its boards to ensure that they meet  
all three linearity specifications defined in this appendix.  
Differential nonlinearity (DNL) is a measure of deviation of code widths  
from their theoretical value of 1 LSB. The width of a given code is the size  
of the range of analog values that can be input to produce that code, ideally  
1 LSB. A specification of 1 LSB differential nonlinearity ensures that no  
code has a width of 0 LSBs (that is, no missing codes) and that no code  
width exceeds 2 LSBs.  
PCI-1200 User Manual  
A-4  
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Appendix A  
Specifications  
System noise is the amount of noise seen by the ADC when there is no  
signal present at the input of the board. The amount of noise that is reported  
directly (without any analysis) by the ADC is not necessarily the amount of  
real noise present in the system, unless the noise is considerably greater  
than 0.5 LSB rms. Noise that is less than this magnitude produces varying  
amounts of flicker, and the amount of flicker seen is a function of how near  
the real mean of the noise is to a code transition. If the mean is near or at a  
transition between codes, the ADC flickers evenly between the two codes,  
and the noise is very near 0.5 LSB. If the mean is near the center of a code  
and the noise is relatively small, very little or no flicker is seen, and the  
noise is reported by the ADC as nearly 0 LSB. From the relationship  
between the mean of the noise and the measured rms magnitude of the  
noise, the character of the noise can be determined. National Instruments  
has determined that the character of the noise in the PCI-1200 is fairly  
Gaussian, so the noise specifications given are the amounts of pure  
Gaussian noise required to produce our readings.  
Explanation of Dither  
The dither circuitry, when enabled, adds approximately 0.5 LSB rms of  
white Gaussian noise to the signal to be converted to the ADC. This  
addition is useful for applications involving averaging to increase the  
resolution of the PCI-1200 to more than 12 bits, as in calibration. In such  
applications, which are often lower frequency in nature, noise modulation  
is decreased and differential linearity is improved by the addition of dither.  
For high-speed 12-bit applications not involving averaging, dither should  
be disabled because it only adds noise.  
When taking DC measurements, such as when calibrating the board, enable  
dither and average about 1,000 points to take a single reading. This process  
removes the effects of 12-bit quantization and reduces measurement noise,  
resulting in improved resolution. Dither, or additive white noise, has the  
effect of forcing quantization noise to become a zero-mean random variable  
rather than a deterministic function of input. For more information on the  
effects of dither, see Dither in Digital Audioby John Vanderkooy and  
Stanley P. Lipshitz, Journal of the Audio Engineering Society, Vol. 35,  
No. 12, Dec. 1987.  
Explanation of DAQ Rates  
Maximum DAQ rates (number of S/s) are determined by the conversion  
period of the ADC plus the sample-and-hold acquisition time, which is  
specified at 10 µs. During multichannel scanning, the DAQ rates are further  
limited by the settling time of the input multiplexers and programmable  
© National Instruments Corporation  
A-5  
PCI-1200 User Manual  
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Appendix A  
Specifications  
gain amplifier. After the input multiplexers are switched, the amplifier must  
be allowed to settle to the new input signal value to within 12-bit accuracy.  
The settling time is a function of the gain selected.  
Analog Output  
Output Characteristics  
Number of channels................................Two voltage  
Resolution...............................................12 bits, 1 in 4,096  
Typical update rate .................................20 S/s1 kS/s, system dependent  
Type of DAC ..........................................Double buffered  
Data transfers..........................................Interrupts, programmed I/O  
Transfer Characteristics  
Relative accuracy (INL) ......................... 0.25 LSB typ, 0.50 LSB max  
DNL........................................................ 0.25 LSB typ, 0.75 LSB max  
Monotonicity ..........................................12 bits, guaranteed  
Offset error  
After calibration............................... 0.2 mV max  
Before calibration............................ 50 mV max  
Gain error (relative to internal reference)  
After calibration............................... 0.01% of reading max  
Before calibration............................ 1% of reading max  
Voltage Output  
Ranges ....................................................0 to 10 V, 5 V,  
software selectable  
Output coupling ......................................DC  
Output impedance...................................0.2 typ  
Current drive .......................................... 2 mA  
Protection................................................Short circuit to ground  
PCI-1200 User Manual  
A-6  
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Appendix A  
Specifications  
Power-on state........................................ 0 V  
Dynamic Characteristics  
Settling time to full-scale range (FSR) .. 5 µs  
Stability  
Offset temperature coefficient ............... 50 µV/° C  
Gain temperature coefficient.................. 30 ppm/° C  
Explanation of Analog Output Specifications  
Relative accuracy in a D/A system is the same as nonlinearity because no  
uncertainty is added due to code width. Unlike an ADC, every digital code  
in a D/A system represents a specific analog value rather than a range of  
values. The relative accuracy of the system is therefore limited to the  
worst-case deviation from the ideal correspondence (a straight line), except  
noise. If a D/A system has been calibrated perfectly, the relative accuracy  
specification reflects its worst-case absolute error.  
DNL in a D/A system is a measure of deviation of code width from 1 LSB.  
In this case, code width is the difference between the analog values  
produced by consecutive digital codes. A specification of 1 LSB  
differential nonlinearity ensures that the code width is always greater than  
0 LSBs (guaranteeing monotonicity) and is always less than 2 LSBs.  
Digital I/O  
Number of channels ............................... 24 I/O (three 8-bit ports;  
uses 82C55A PPI)  
Compatibility ......................................... TTL  
Digital logic levels  
Level  
Min  
Max  
Input low voltage  
0.3 V  
0.8 V  
Input high voltage  
2.2 V  
5.3 V  
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Appendix A  
Specifications  
Output low voltage  
(IOUT = 2.5 mA)  
0.4 V  
Output high voltage  
(IOUT = 40 µA)  
(IOUT = 2.5 mA)  
4.2 V  
3.7 V  
Power-on state ........................................All ports mode 0 input  
Protection................................................0.5 to 5.5 V powered on,  
0.5 V powered off  
Data transfers..........................................Interrupts, programmed I/O  
Timing I/O  
Number of channels................................3 counter/timers  
Protection................................................0.5 to 5.5 V powered on,  
0.5 V powered off  
Resolution  
Counter/timers.................................16 bits  
Compatibility..........................................TTL  
Base clock available ...............................2 MHz  
Base clock accuracy................................ 50 ppm max  
Max source frequency.............................8 MHz  
Min source pulse duration ......................125 ns  
Min gate pulse duration ..........................50 ns  
Digital logic levels  
Level  
Input low voltage  
Input high voltage  
Min  
0.3 V  
2.2 V  
Max  
0.8 V  
5.3 V  
PCI-1200 User Manual  
A-8  
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Appendix A  
Specifications  
Level  
Min  
Max  
Output low voltage  
(IOUT = 2.1 mA)  
0.45 V  
Output high voltage  
(IOUT = -0.92 mA)  
3.7 V  
Protection ............................................... 0.5 to 5.5 V powered on,  
0.5 V powered off  
Data transfer........................................... Interrupts, programmed I/O  
Digital Trigger  
Compatibility ......................................... TTL  
Response ................................................ Rising edge  
Pulse width............................................. 50 ns min  
Bus Interface  
Type ....................................................... Slave  
Power Requirement  
Power consumption................................ 425 mA at 5 VDC ( 5%)  
Power available at I/O connector........... +4.65 to +5.25 V fused at 1 A  
Physical  
Dimensions............................................. 17.45 by 10.56 cm  
(6.87 by 4.16 in.)  
I/O connector.......................................... 50-pin male  
Environment  
Operating temperature............................ 0° to 50° C  
Storage temperature ............................... 55° to 150° C  
Relative humidity................................... 5% to 90% noncondensing  
© National Instruments Corporation  
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B
Customer Communication  
For your convenience, this appendix contains forms to help you gather the information necessary  
to help us solve your technical problems and a form you can use to comment on the product  
documentation. When you contact us, we need the information on the Technical Support Form and  
the configuration form, if your manual contains one, about your system configuration to answer your  
questions as quickly as possible.  
National Instruments has technical assistance through electronic, fax, and telephone systems to quickly  
provide the information you need. Our electronic services include a bulletin board service, an FTP site,  
a fax-on-demand system, and e-mail support. If you have a hardware or software problem, first try the  
electronic support systems. If the information available on these systems does not answer your  
questions, we offer fax and telephone support through our technical support centers, which are staffed  
by applications engineers.  
Electronic Services  
Bulletin Board Support  
National Instruments has BBS and FTP sites dedicated for 24-hour support with a collection of files  
and documents to answer most common customer questions. From these sites, you can also download  
the latest instrument drivers, updates, and example programs. For recorded instructions on how to use  
the bulletin board and FTP services and for BBS automated information, call 512 795 6990. You can  
access these services at:  
United States: 512 794 5422  
Up to 14,400 baud, 8 data bits, 1 stop bit, no parity  
United Kingdom: 01635 551422  
Up to 9,600 baud, 8 data bits, 1 stop bit, no parity  
France: 01 48 65 15 59  
Up to 9,600 baud, 8 data bits, 1 stop bit, no parity  
FTP Support  
To access our FTP site, log on to our Internet host, ftp.natinst.com, as anonymous and use  
your Internet address, such as [email protected], as your password. The support files and  
documents are located in the /support directories.  
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Fax-on-Demand Support  
Fax-on-Demand is a 24-hour information retrieval system containing a library of documents on a wide  
range of technical information. You can access Fax-on-Demand from a touch-tone telephone at  
512 418 1111.  
E-Mail Support (Currently USA Only)  
You can submit technical support questions to the applications engineering team through e-mail at the  
Internet address listed below. Remember to include your name, address, and phone number so we can  
contact you with solutions and suggestions.  
Telephone and Fax Support  
National Instruments has branch offices all over the world. Use the list below to find the technical  
support number for your country. If there is no National Instruments office in your country, contact  
the source from which you purchased your software to obtain support.  
Country  
Telephone  
Fax  
Australia  
Austria  
Belgium  
Brazil  
Canada (Ontario)  
Canada (Québec)  
Denmark  
Finland  
03 9879 5166  
0662 45 79 90 0  
02 757 00 20  
011 288 3336  
905 785 0085  
514 694 8521  
45 76 26 00  
09 725 725 11  
01 48 14 24 24  
089 741 31 30  
2645 3186  
03 6120092  
02 413091  
03 5472 2970  
02 596 7456  
5 520 2635  
03 9879 6277  
0662 45 79 90 19  
02 757 03 11  
011 288 8528  
905 785 0086  
514 694 4399  
45 76 26 02  
09 725 725 55  
01 48 14 24 14  
089 714 60 35  
2686 8505  
France  
Germany  
Hong Kong  
Israel  
Italy  
Japan  
03 6120095  
02 41309215  
03 5472 2977  
02 596 7455  
5 520 3282  
Korea  
Mexico  
Netherlands  
Norway  
Singapore  
Spain  
Sweden  
Switzerland  
Taiwan  
0348 433466  
32 84 84 00  
2265886  
91 640 0085  
08 730 49 70  
056 200 51 51  
02 377 1200  
01635 523545  
512 795 8248  
0348 430673  
32 84 86 00  
2265887  
91 640 0533  
08 730 43 70  
056 200 51 55  
02 737 4644  
01635 523154  
512 794 5678  
United Kingdom  
United States  
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Technical Support Form  
Photocopy this form and update it each time you make changes to your software or hardware, and use  
the completed copy of this form as a reference for your current configuration. Completing this form  
accurately before contacting National Instruments for technical support helps our applications  
engineers answer your questions more efficiently.  
If you are using any National Instruments hardware or software products related to this problem,  
include the configuration forms from their user manuals. Include additional pages if necessary.  
Name __________________________________________________________________________  
Company _______________________________________________________________________  
Address ________________________________________________________________________  
_______________________________________________________________________________  
Fax (___) _________________Phone (___) ___________________________________________  
Computer brand____________ Model ___________________Processor_____________________  
Operating system (include version number) ____________________________________________  
Clock speed ______MHz RAM _____MB  
Display adapter __________________________  
Mouse ___yes ___no Other adapters installed_______________________________________  
Hard disk capacity _____MB Brand_________________________________________________  
Instruments used _________________________________________________________________  
_______________________________________________________________________________  
National Instruments hardware product model _____________ Revision ____________________  
Configuration ___________________________________________________________________  
National Instruments software product ___________________ Version _____________________  
Configuration ___________________________________________________________________  
The problem is: __________________________________________________________________  
_______________________________________________________________________________  
_______________________________________________________________________________  
_______________________________________________________________________________  
_______________________________________________________________________________  
List any error messages: ___________________________________________________________  
_______________________________________________________________________________  
_______________________________________________________________________________  
The following steps reproduce the problem: ___________________________________________  
_______________________________________________________________________________  
_______________________________________________________________________________  
_______________________________________________________________________________  
_______________________________________________________________________________  
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PCI-1200 Hardware and Software Configuration Form  
Record the settings and revisions of your hardware and software on the line to the right of each item.  
Complete a new copy of this form each time you revise your software or hardware configuration, and  
use this form as a reference for your current configuration. Completing this form accurately before  
contacting National Instruments for technical support helps our applications engineers answer your  
questions more efficiently.  
National Instruments Products  
Serial number ___________________________________________________________________  
Base memory address of PCI-1200 __________________________________________________  
Interrupt line value _______________________________________________________________  
NI-DAQ, LabVIEW, LabWindows/CVI, ComponentWorks, or Virtual Bench ________________  
Other Products  
Computer make and model ________________________________________________________  
Microprocessor __________________________________________________________________  
Clock frequency or speed __________________________________________________________  
Type of video board installed _______________________________________________________  
Operating system version __________________________________________________________  
Operating system mode ___________________________________________________________  
Programming language ___________________________________________________________  
Programming language version _____________________________________________________  
Other boards in system ____________________________________________________________  
Base I/O address of other boards ____________________________________________________  
DMA channels of other boards _____________________________________________________  
Interrupt level of other boards ______________________________________________________  
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Documentation Comment Form  
National Instruments encourages you to comment on the documentation supplied with our products.  
This information helps us provide quality products to meet your needs.  
Title:  
PCI-1200 User Manual  
Edition Date: July 1998  
Part Number: 320942C-01  
Please comment on the completeness, clarity, and organization of the manual.  
_______________________________________________________________________________  
_______________________________________________________________________________  
_______________________________________________________________________________  
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_______________________________________________________________________________  
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_______________________________________________________________________________  
If you find errors in the manual, please record the page numbers and describe the errors.  
_______________________________________________________________________________  
_______________________________________________________________________________  
_______________________________________________________________________________  
_______________________________________________________________________________  
_______________________________________________________________________________  
_______________________________________________________________________________  
_______________________________________________________________________________  
Thank you for your help.  
Name _________________________________________________________________________  
Title __________________________________________________________________________  
Company _______________________________________________________________________  
Address ________________________________________________________________________  
_______________________________________________________________________________  
E-Mail Address __________________________________________________________________  
Phone (___) __________________________ Fax (___) __________________________________  
Mail to: Technical Publications  
National Instruments Corporation  
Fax to: Technical Publications  
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Glossary  
Prefix  
p-  
Meanings  
pico  
Value  
1012  
109  
106  
103  
103  
n-  
nano-  
micro-  
milli-  
kilo-  
µ-  
m-  
k-  
M-  
G-  
mega-  
giga-  
106  
109  
Numbers/Symbols  
°
degrees  
>
<
greater than  
greater than or equal to  
less than  
negative of, or minus  
not equal to  
%
ohms  
percent  
plus or minus  
positive of, or plus  
+5 Volts signal  
+
+5 V  
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Glossary  
A
A
amperes  
AC  
alternating current  
ACH <0..7>  
ACK*  
A/D  
analog channel 0 through 7 signals  
acknowledge input signal  
analog-to-digital  
ADC  
analog-to-digital converteran electronic device, often an integrated  
circuit, that converts an analog voltage to a digital number  
AGND  
analog ground signal  
AI  
analog input  
AISENSE/AIGND  
analog input sense/analog input ground signal  
American National Standards Institute  
analog output  
ANSI  
AO  
AWG  
American Wire Gauge  
C
C
Celsius  
CALDAC  
CH  
calibration digital-to-analog converter  
channel  
CLKB1, CLKB2  
cm  
counter B1, B2 clock signals  
centimeters  
CMRR  
common-mode rejection ratioa measure of an instruments ability to  
reject interference from a common-mode signal, usually expressed in  
decibels (dB)  
CNTINT  
counter interrupt signal  
PCI-1200 User Manual  
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Glossary  
D
D/A  
digital-to-analog  
DAC  
digital-to-analog converteran electronic device, often an integrated  
circuit, that converts a digital number into a corresponding analog voltage  
or current  
DAC OUTPUT  
UPDATE  
DAC output update signal  
DAC0OUT, DAC1OUT digital-to-analog converter 0, 1 output signals  
DACWRT  
DAQ  
DAC write signal  
data acquisitiona system that uses the computer to collect, receive, and  
generate electrical signals  
DATA  
dB  
data lines at the specified port signal  
decibelthe unit for expressing a logarithmic measure of the ratio of two  
signal levels: dB=20log10 V1/V2, for signals in volts  
DC  
direct current  
DGND  
DI  
digital ground signal  
digital input  
DIFF  
DIO  
DMA  
DNL  
DO  
differential  
digital input/output  
direct memory access  
differential nonlinearity  
digital output  
E
EEPROM  
electrically erasable programmable read-only memoryROM that can be  
erased with an electrical signal and reprogrammed  
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Glossary  
EXTCONV*  
EXTTRIG  
external convert signal  
external trigger signal  
external update signal  
EXTUPDATE*  
F
F
farad  
FIFO  
FSR  
ft  
first in first out memory buffer  
full-scale range  
feet  
G
GATB <0..2>  
counter B0, B1, B2 gate signals  
gate signal  
GATE  
H
hex  
hexadecimal  
hertz  
Hz  
I
IBF  
input buffer full signal  
inches  
in.  
INL  
integral nonlinearitya measure in LSB of the worst-case deviation from  
the ideal A/D or D/A transfer characteristic of the analog I/O circuitry  
INTR  
I/O  
interrupt request signal  
input/output  
PCI-1200 User Manual  
G-4  
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Glossary  
L
LED  
light-emitting diode  
least significant bit  
LSB  
M
m
meters  
max  
MB  
min.  
min  
MIO  
MSB  
mux  
maximum  
megabytes of memory  
minutes  
minimum  
multifunction I/O  
most significant bit  
multiplexera switching device with multiple inputs that connects one of  
its inputs to its output.  
N
NRSE  
nonreferenced single-ended modeall measurements are made with  
respect to a common (NRSE) measurement system reference, but the  
voltage at this reference can vary with respect to the measurement system  
ground  
O
OBF*  
output buffer full signal  
counter B0, B1 output signals  
overflow error  
OUTB0, OUTB1  
OVERFLOW  
OVERRUN  
overrun error  
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Glossary  
P
PA, PB, PC <0..7>  
port A, B, or C 0 through 7 signals  
PCI  
Peripheral Component Interconnecta high-performance expansion bus  
architecture originally developed by Intel to replace ISA and EISA. It is  
achieving widespread acceptance as a standard for PCs and work-stations;  
it offers a theoretical maximum transfer rate of 132 Mbytes/s.  
port  
a digital port, consisting of four or eight lines of digital input and/or output  
postriggering  
the technique used on a DAQ board to acquire a programmed number of  
samples after trigger conditions are met  
POSTTRIG  
PPI  
posttrigger mode  
programmable peripheral interface  
parts per million  
ppm  
PRETRIG  
pretriggering  
pretrigger mode  
the technique used on a DAQ board to keep a continuous buffer filled with  
data, so that when the trigger conditions are met, the sample includes the  
data leading up to the trigger condition  
R
RD*  
REXT  
rms  
RSE  
read signal  
external resistance  
root mean square  
referenced single-ended modeall measurements are made with respect to  
a common reference measurement system or a ground. Also called a  
grounded measurement system.  
S
s
seconds  
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Glossary  
S
samples  
scan  
one or more analog or digital input samples. Typically, the number of input  
samples in a scan is equal to the number of channels in the input group. For  
example, one pulse from the scan clock produces one scan which acquires  
one new sample from every analog input channel in the group.  
SCXI  
Signal Conditioning eXtensions for Instrumentationthe National  
Instruments product line for conditioning low-level signals within an  
external chassis near sensors so only high-level signals are sent to DAQ  
boards in the noisy PC environment  
signal conditioning  
STB  
the manipulation of signals to prepare them for digitizing  
strobe input signal  
T
td  
minimum period  
gate hold time  
tgh  
tgsu  
tgwh  
tgwl  
tm  
gate setup time  
gate high level  
gate low level  
minimum pulse width  
output delay from gate  
output delay from clock  
clock high level  
clock low level  
toutc  
toutg  
tpwh  
tpwl  
TTL  
typ  
transistor-transistor logic  
typical  
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Glossary  
V
V
volts  
Vin  
positive/negative input voltage  
common-mode noise  
volts direct current  
differential input voltage  
external voltage  
Vcm  
VDC  
Vdiff  
VEXT  
VI  
virtual instrument(1) a combination of hardware and/or software  
elements, typically used with a PC, that has the functionality of a classic  
stand-alone instrument (2) a LabVIEW software module (VI), which  
consists of a front panel user interface and a block diagram program  
VIH  
VIL  
Vm  
volts, input high  
volts, input low  
measured voltage  
volts, root-mean-square  
signal source  
Vrms  
Vs  
W
W
watts  
WRT*  
write signal  
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Index  
analog input configuration, 2-2 to 2-5  
analog I/O settings (table), 2-2  
differential connections  
purpose and use, 3-9  
A
ACH<7..0> signal  
definition (table), 3-3  
input ranges (table)  
recommended input configurations  
(table), 3-8  
floating signal sources  
differential connections, 3-11 to 3-12  
recommended input configurations  
(table), 3-8  
ground-referenced signal sources  
differential connections, 3-10  
recommended input configurations  
(table), 3-8  
input modes, 2-3 to 2-5  
input polarity, 2-3  
bipolar analog input, 3-5  
unipolar analog input, 3-5 to 3-6  
ACK* signal (table), 3-27  
A/D FIFO, 4-7  
AGND signal (table), 3-3  
AISENSE/AIGND signal  
analog common signal, 3-5  
definition (table), 3-3  
analog input  
circuitry, 4-6 to 4-7  
illustration, 4-5  
configuration. See analog input  
configuration.  
DAQ operations, 4-7 to 4-9  
controlled acquisition mode, 4-8  
freerun acquisition mode, 4-8  
interval scanning acquisition mode,  
4-8 to 4-9  
multiple-channel scanned data  
acquisition, 4-9  
single-channel data acquisition, 4-9  
DAQ rates, 4-10 to 4-11  
maximum recommended rates  
(table), 4-10  
settling time vs. gain (table), 4-10  
input modes. See analog input modes.  
polarity  
analog input modes, 2-3 to 2-5  
DIFF. See also differential connections.  
definition (table), 2-4  
purpose and use, 2-5  
recommended input configurations  
(table), 3-8  
NRSE  
definition (table), 2-4  
purpose and use, 2-4 to 2-5  
recommended input configurations  
(table), 3-8  
single-ended connections for  
ground-referenced signal sources,  
3-13 to 3-14  
RSE  
definition (table), 2-4  
purpose and use, 2-4  
recommended input configurations  
(table), 3-8  
single-ended connections for floating  
signal sources, 3-13  
configuration, 2-3  
settings (table), 2-2  
signal connections. See analog input signal  
connections.  
specifications, A-1 to A-6  
theory of operation, 4-5 to 4-11  
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Index  
analog input signal connections  
bipolar signal range vs. gain (table), 3-5  
common-mode signal rejection,  
3-14 to 3-15  
signal connections, 3-15 to 3-16  
theory of operation, 4-11 to 4-12  
analog output specifications, A-6 to A-7  
dynamic characteristics, A-7  
explanation, A-7  
differential connections  
floating signal sources, 3-11 to 3-12  
grounded signal sources, 3-10  
purpose and use, 3-9  
output characteristics, A-6  
stability, A-7  
transfer characteristics, A-6  
voltage output, A-6 to A-7  
when to use, 3-9  
exceeding maximum input voltage ratings  
(caution), 3-5  
floating signal sources, 3-7  
ground-referenced signal sources,  
3-7 to 3-8  
B
bipolar signal range vs. gain (table), 3-5  
bulletin board support, B-1  
input configurations, 3-7 to 3-15  
instrumentation amplifier, 3-6  
pins, 3-5  
recommended input configurations  
(table), 3-8  
single-ended connections, 3-12  
floating signal sources (RSE  
configuration), 3-13  
bus interface specifications, A-9  
C
cabling, custom, 1-5 to 1-6  
Calibrate_1200 function, 5-3  
calibration, 5-1 to 5-3  
EEPROM contents, 5-1 to 5-2  
equipment requirements, 5-2  
higher gains, 5-2  
grounded signal sources (NRSE  
configuration), 3-13 to 3-14  
when to use, 3-12  
methods, 5-1  
types of signal sources, 3-7  
unipolar signal range vs. gain (table),  
3-5 to 3-6  
overview, 5-1  
using the Calibrate_1200 function, 5-3  
CLK signals  
analog input specifications, A-1 to A-6  
amplifier characteristics, A-2 to A-3  
dynamic characteristics, A-3 to A-4  
explanation, A-4 to A-5  
input characteristics, A-1 to A-2  
stability, A-3 to A-4  
general-purpose timing signal  
connections, 3-23 to 3-26  
timing requirements (figure), 3-26  
CLKB1 signal (table), 3-4  
CLKB2 signal (table), 3-4  
CNTINT signal, 3-22  
transfer characteristics, A-2  
analog output  
common mode signal rejection considerations,  
3-14 to 3-15  
circuitry, 4-11 to 4-12  
DAC timing, 4-12  
ComponentWorks application software, 1-2  
configuration  
polarity  
analog input  
configuration, 2-3  
settings (table), 2-2  
analog I/O settings (table), 2-2  
input modes, 2-3 to 2-5  
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input polarity, 2-3  
analog output polarity, 2-3  
controlled acquisition mode, 4-8  
Counter 0 on 82C53(A) counter/timer, 3-19  
Counter 1 on 82C53(A) counter/timer, 3-19  
counter/timers, 4-3 to 4-5  
EXTTRIG signal, 3-19 to 3-20  
EXTUPDATE* signal, 3-22 to 3-23  
interval scanning, 3-21  
pins, 3-18 to 3-19  
posttrigger and pretrigger modes,  
3-19 to 3-20  
posttrigger timing (figure), 3-20  
pretrigger timing (figure), 3-21  
circuitry (figure), 4-4  
custom cabling, 1-5 to 1-6  
data acquisition timing connections. See DAQ  
timing connections.  
customer communication, xii, B-1 to B-2  
DATA signal (table), 3-27  
DGND signal (table), 3-3  
DIFF input  
D
DAC timing, 4-12  
DAC0OUT signal (table), 3-3  
DAC1OUT signal (table), 3-3  
DACWRT signal, 3-22  
DAQ and general-purpose timing signal  
connections, 3-18 to 3-30  
DAQ timing connections, 3-19 to 3-23  
general-purpose timing connections,  
3-23 to 3-26  
configuration, 2-5  
definition (table), 2-4  
recommended input configurations  
(table), 3-8  
differential connections  
DIFF configuration, 3-9  
floating signal sources, 3-11 to 3-12  
ground-referenced signal sources, 3-10  
purpose and use, 3-9  
pins, 3-18 to 3-19  
timing specifications, 3-27 to 3-30  
DAQ operations, 4-7 to 4-9  
controlled acquisition mode, 4-8  
freerun acquisition mode, 4-8  
interval scanning acquisition mode,  
4-8 to 4-9  
when to use, 3-9  
differential nonlinearity (DNL)  
analog input, A-4  
analog output, A-7  
digital I/O circuitry  
illustration, 4-12  
multiple-channel scanned data  
acquisition, 4-9  
single-channel data acquisition, 4-9  
DAQ rates, 4-10 to 4-11  
theory of operation, 4-12 to 4-13  
digital I/O signal connections  
illustration, 3-17  
logical inputs and outputs, 3-17 to 3-18  
pins, 3-16  
explanation, A-5 to A-6  
maximum recommended rates  
(table), 4-10  
settling time vs. gain (table), 4-10  
DAQ timing connections, 3-19 to 3-23. See  
also general-purpose timing signal  
connections.  
Port C pin connections, 3-18  
digital I/O specifications, A-7 to A-8  
digital trigger, A-9  
dither circuitry  
explanation, A-5  
theory of operation, 4-6 to 4-7  
DNL (differential nonlinearity)  
analog input, A-4  
EXTCONV* signal, 3-19 to 3-21  
EXTCONV* signal timing (figure), 3-19  
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Index  
analog output, A-7  
documentation  
conventions used in manual, x  
purpose and use, 3-7  
recommended input configurations  
(table), 3-8  
single-ended connections (RSE  
configuration), 3-13  
National Instruments documentation  
set, xi  
freerun acquisition mode, 4-8  
frequency measurement  
connections for measurement application  
(figure), 3-25  
general-purpose timing signal  
connections, 3-24 to 3-25  
FTP support, B-1  
organization of manual, ix  
related documentation, xii  
E
EEPROM contents, 5-1 to 5-2  
electronic support services, B-1 to B-2  
e-mail support, B-2  
environment specifications, A-9  
equipment, optional, 1-5  
event-counting  
G
GATB0 signal (table), 3-4  
GATB1 signal (table), 3-4  
GATB2 signal (table), 3-4  
GATE signals  
with external switch gating (figure), 3-24  
general-purpose timing signal  
connections, 3-23  
general-purpose timing signal  
connections, 3-23 to 3-26  
EXTCONV* signal  
definition (table), 3-4  
interval scanning DAQ operation, 3-21  
timing requirements (figure), 3-26  
general-purpose timing signal connections.  
See also DAQ timing connections.  
event-counting, 3-23  
interval-scanning DAQ operation, 3-21  
maximum voltage input rating, 3-23  
timing connections, 3-19 to 3-21  
signal timing (figure), 3-19  
EXTTRIG signal  
DAQ timing, 3-19 to 3-20  
definition (table), 3-3  
maximum voltage input rating, 3-23  
EXTUPDATE* signal  
with external switch gating  
(figure), 3-24  
frequency measurement, 3-24 to 3-25  
GATE, CLK, and OUT signals,  
3-23 to 3-26  
DAQ timing, 3-22 to 3-23  
definition (table), 3-3  
pins, 3-18 to 3-19  
pulse and square wave generation, 3-23  
pulse-width measurement, 3-24  
specifications and ratings, 3-25 to 3-26  
time-lapse measurement, 3-24  
timing requirements for GATE, CLK, and  
OUT signals (figure), 3-26  
ground-referenced signal sources  
differential connections, 3-10  
purpose and use, 3-7  
maximum voltage input rating, 3-23  
updating DAC output (figure), 3-23  
F
fax and telephone support numbers, B-2  
Fax-on-Demand support, B-2  
floating signal sources  
differential connections, 3-11 to 3-12  
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Index  
recommended input configurations  
(table), 3-8  
single-ended connections (NRSE  
configuration), 3-13 to 3-14  
multiple-channel scanned data acquisition, 4-9  
multiplexers, analog input, 4-6  
mux counters, 4-6  
N
I
NI-DAQ driver software, 1-3 to 1-4  
noise, system, A-5  
NRSE input  
IBF signal (table), 3-27  
INL (integral nonlinearity), A-4  
input configurations. See analog input  
configuration.  
configuration, 2-4 to 2-5  
definition (table), 2-4  
recommended input configurations  
(table), 3-8  
single-ended connections for  
ground-referenced signal sources,  
3-13 to 3-14  
installation  
hardware installation, 2-1  
software installation, 2-1  
unpacking the PCI-1200, 1-2  
instrumentation amplifier  
illustration, 3-6  
purpose and use, 3-6  
O
theory of operation, 4-6  
integral nonlinearity (INL), A-4  
interval scanning DAQ operation  
description, 3-21  
signal timing (figure), 3-22  
theory of operation, 4-8 to 4-9  
INTR signal (table), 3-27  
I/O connector  
OBF* signal (table), 3-27  
operation of PCI-1200. See theory of  
operation.  
OUT signals  
general-purpose timing signal  
connections, 3-23 to 3-26  
timing requirements (figure), 3-26  
OUTB0 signal (table), 3-4  
OUTB1 signal  
exceeding maximum ratings  
(caution), 3-1  
pin assignments (figure), 3-2  
definition (table), 3-4  
interval-scanning signal timing, 3-23  
maximum voltage input rating, 3-23  
OUTB2 signal (table), 3-4  
L
LabVIEW application software, 1-1 to 1-2  
LabWindows/CVI application software, 1-3  
P
PA<7..0> signal (table), 3-3  
PB<7..0> signal (table), 3-3  
PC<7..0> signal (table), 3-3  
PCI interface circuitry  
M
manual. See documentation.  
mode 1 input timing, 3-28  
block diagram, 4-2  
theory of operation, 4-2 to 4-3  
mode 1 output timing, 3-29  
mode 2 bidirectional timing, 3-30  
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Index  
PCI-1200  
relative accuracy  
analog input, A-4  
analog output, A-7  
RSE input  
block diagram, 4-1  
configuration. See configuration.  
custom cabling, 1-5 to 1-6  
features, 1-1  
configuration, 2-4  
installation, 2-1  
definition (table), 2-4  
optional equipment, 1-5  
requirements for getting started, 1-1 to 1-2  
software programming choices  
National Instruments application  
software, 1-2 to 1-3  
recommended input configurations  
(table), 3-8  
single-ended connections for floating  
signal sources, 3-13  
NI-DAQ driver software, 1-3 to 1-4  
register-level programming, 1-4  
theory of operation. See theory of  
operation.  
S
sample-interval timing, 3-21  
signal connections  
analog input signal connections,  
3-5 to 3-15  
unpacking, 1-2  
physical specifications, A-9  
pin assignments for I/O connector (figure), 3-2  
polarity  
bipolar signal range vs. gain  
(table), 3-5  
common-mode signal rejection,  
3-14 to 3-15  
differential connections, 3-9 to 3-12  
exceeding maximum input voltage  
ratings (caution), 3-5  
input configurations, 3-7 to 3-15  
instrumentation amplifier, 3-6  
recommended input configurations  
(table), 3-8  
single-ended connections,  
3-12 to 3-14  
types of signal sources, 3-7  
unipolar signal range vs. gain (table),  
3-5 to 3-6  
analog input, 2-3  
analog output, 2-3  
settings (table), 2-2  
Port C  
pin connections, 3-18  
signal assignments (table), 3-18  
POSTTRIG mode, 3-19  
posttrigger DAQ timing (figure), 3-20  
power connections, 3-18  
power requirement specifications, A-9  
PRETRIG mode, 3-20  
pretrigger DAQ timing (figure), 3-21  
programmable-gain amplifier, 4-6  
pulse generation, 3-23  
analog output signal connections,  
3-15 to 3-16  
pulse-width measurement, 3-24  
DAQ and general-purpose timing signal  
connections  
R
DAQ timing connections,  
3-19 to 3-23  
RD* signal (table), 3-27  
referenced single-ended mode. See RSE input.  
register-level programming, 1-4  
general-purpose timing connections,  
3-23 to 3-26  
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pins, 3-18 to 3-19  
timing specifications, 3-27 to 3-30  
digital I/O signal connections,  
3-16 to 3-18  
logical inputs and outputs,  
3-17 to 3-18  
Port C pin connections, 3-18  
I/O connector  
T
technical support, B-1 to B-2  
theory of operation  
analog input, 4-5 to 4-11  
circuitry, 4-6 to 4-7  
illustration, 4-5  
DAQ rates, 4-10 to 4-11  
analog output, 4-11 to 4-12  
circuitry, 4-11 to 4-12  
illustration, 4-11  
exceeding maximum ratings  
(caution), 3-1  
pin assignments (figure), 3-2  
power connections, 3-18  
signal descriptions (table), 3-3 to 3-4  
single-channel data acquisition, 4-9  
single-ended connections  
floating signal sources (RSE  
configuration), 3-13  
DAC timing, 4-12  
block diagram of PCI-1200, 4-1  
digital I/O, 4-12 to 4-13  
circuitry (figure), 4-12  
functional overview, 4-1 to 4-2  
PCI interface circuitry, 4-2 to 4-3  
block diagram, 4-2  
ground-referenced signal sources (NRSE  
configuration), 3-13 to 3-14  
purpose and use, 3-12  
timing, 4-3 to 4-5  
circuitry (figure), 4-4  
time-lapse measurement, 3-24  
timing circuitry  
when to use, 3-12  
software programming choices  
National Instruments application  
software, 1-2 to 1-3  
NI-DAQ driver software, 1-3 to 1-4  
register-level programming, 1-4  
specifications  
illustration, 4-4  
theory of operation, 4-3 to 4-5  
timing I/O specifications, A-8 to A-9  
timing signal connections  
DAQ timing connections, 3-19 to 3-23  
EXTCONV* signal, 3-19 to 3-21  
EXTCONV* signal timing  
(figure), 3-19  
analog input, A-1 to A-6  
analog output, A-6 to A-7  
bus interface, A-9  
EXTTRIG signal, 3-19 to 3-20  
EXTUPDATE* signal, 3-22 to 3-23  
interval scanning, 3-21  
pins, 3-18 to 3-19  
posttrigger and pretrigger modes,  
3-19 to 3-20  
digital I/O, A-7 to A-8  
environment, A-9  
physical, A-9  
power requirements, A-9  
timing I/O, A-8 to A-9  
square wave generation, 3-23  
STB* signal (table), 3-27  
system noise, A-5  
posttrigger timing (figure), 3-20  
pretrigger timing (figure), 3-21  
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Index  
general-purpose timing signal  
connections  
event-counting, 3-23  
with external switch gating  
(figure), 3-24  
frequency measurement, 3-24 to 3-25  
connections for measurement  
application (figure), 3-25  
GATE, CLK, and OUT signals,  
3-23 to 3-26  
pins, 3-18 to 3-19  
pulse-width measurement, 3-24  
specifications and ratings,  
3-25 to 3-26  
square wave generation, 3-23  
time-lapse measurement, 3-24  
timing requirements for GATE, CLK,  
and OUT signals (figure), 3-26  
timing specifications, 3-27 to 3-30  
mode 1 input timing, 3-28  
mode 1 output timing, 3-29  
mode 2 bidirectional timing, 3-30  
trigger, digital, A-9  
U
unipolar signal range vs. gain (table),  
3-5 to 3-6  
unpacking the PCI-1200, 1-2  
V
VirtualBench application software, 1-3  
W
waveform generation timing sequence,  
3-22 to 3-23  
WRT* signal (table), 3-27  
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