Intel Computer Hardware 281809 003 User Manual

Advanced/RH

LPX Motherboard

Technical Product Specification

Order Number 281809-003

April 1996

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Advanced/RH Technical Product Specification

Table of Contents

Introduction

MOTHERBOARD MANUFACTURING OPTIONS

BOARD LEVEL FEATURES

LPX FORM FACTOR

CPU

PROCESSOR UPGRADE

SECOND LEVEL CACHE

SYSTEM MEMORY

PERIPHERAL COMPONENT INTERCONNECT (PCI) PCISET

NATIONAL SEMICONDUCTOR PC87306B SUPER I/O CONTROLLER

GRAPHICS SUBSYSTEM

AUDIO SUBSYSTEM

UNIVERSAL SERIAL BUS (USB)

Connectors

MOTHERBOARD CONNECTORS

FRONT PANEL CONNECTIONS (J3A1, J2A1)

AUDIO CONNECTORS

BACK PANEL CONNECTORS

Power Consumption

Appendix A − User-Installable Upgrades

SYSTEM MEMORY

REAL TIME CLOCK BATTERY REPLACEMENT

CPU UPGRADE

GRAPHICS MEMORY UPGRADE

HARDWARE MPEG MODULE

Appendix B − Configuration Jumper Settings

CPU CONFIGURATION - JUMPER BLOCK J4L1(C&D)

CMOS -J4L1 A PINS 4-6

PSWD -J4L1 A PINS 1-3

SETUP - J4L1 B PINS 1-3

RISER - J4G1

DRIVE OR OVERDRIVE - J6C2

RECOVERY JUMPER - J6C2

Appendix C − Memory Map

Appendix D − I/O Map

Appendix E − PCI Configuration Space Map

Appendix F − Interrupts & DMA Channels

Advanced/RH Technical Product Specification • Page 3

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Appendix G − Connectors

POWER SUPPLY

FRONT PANEL−J3A1

BACK PANEL I/O

PERIPHERALS

MULTIMEDIA

Appendix-H Motherboard BIOS

FLASH MEMORY IMPLEMENTATION

BIOS UPGRADES

SETUP UTILITY

PCI AUTO-CONFIGURATION

ISA PLUG ‘N’ PLAY

ADVANCED POWER MANAGEMENT

LANGUAGE SUPPORT

PCI IDE

BOOT OPTIONS

FLASH LOGO AREA

SECURITY FEATURES

Appendix I − PCI Configuration Error Messages

Appendix J− AMIBIOS Error messages and Beep Codes

BEEP CODES

ERROR MESSAGES

ERROR MESSAGES (CONT.)

ISA NMI MESSAGES

Appendix K − Soft-off Control

Appendix L − Environmental Standards

MOTHERBOARD SPECIFICATIONS

Appendix M − Reliability Data

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Introduction

The Advanced/RH motherboard integrates the latest advances in processor, memory, and I/O technologies into a

standard LPX form factor that provides leading edge technology. This combination of high integration and high

performance makes the Advanced/RH motherboard the ideal platform for the increasing requirements of today's (and

tomorrow's) desktop applications in the corporate workspace.

The flexible LPX design will accept Pentium^®processors operating at 75 MHz, 90 MHz, 100 MHz, 120 MHz, 133

MHz, 150 MHz and 166 MHz as well as future Pentium processors. The processor subsystem is complemented by a

Revision 2.1 Card Edge Low Profile (CELP 2.1) socket that accepts either a 256 KB or 512 KB second level write-

back cache module using pipelined synchronous burst technology. There is also an option for having 256 KB of

Pipeline Burst SRAM soldered onto the motherboard. If cache memory is soldered on the motherboard, the CELP

socket will not be installed. Only one type of cache may be used on the Advanced/RH motherboard. The memory

subsystem is designed to support up to 512 MB of EDO DRAM (for improved performance) or standard Fast Page

DRAM in standard 72-pin SIMM^†sockets. A Type 7 Pentium OverDrive^®socket provides an upgrade to future

OverDrive processors.

The Advanced/RH motherboard utilizes Intel's 82430HX PCIset to provide increased integration and performance

over other motherboard designs. The Intel 82430HX PCIset contains an integrated PCI Bus Mastering IDE controller

with two high performance IDE interfaces for up to four IDE devices (such as hard drives, CD-ROM readers, and so

forth). The 82430HX PCIset coupled with the integration of the industry’s latest peripherals gives the user a robust

computing platform.

Complementing the 82439HX PCI controller is the 82371SB PIIX3 ISA bridge, offering new technology like USB

expandability. The PIIX3 performs as a host on the Universal Serial Bus, and in the middle of 1996 Advanced/RH

will provide connectors to accommodate USB peripherals.

ATI^†264-VT video, with fast SGRAM video memory, provides excellent performance advantages over alternate

solutions using EDO memory. ATI Media Connector modules, supplied by ATI Technologies, can be used to

accelerate hardware MPEG and provide the tuner capabilities that previously required an entire add in card. Memory

expansion modules, also supplied by ATI, can upgrade the motherboard from 1MB to 2 or 4 MB of SGRAM.

The National PC87306B Super I/O controller integrates the standard PC I/O functions: floppy interface, two FIFO

serial ports, one EPP/ECP capable parallel port, a Real Time Clock, keyboard controller, and support for an IrDA^†

compatible infrared interface.

To provide for the increasing number of multimedia applications, a Creative^†VIBRA16S audio CODEC is integrated

onto the motherboard. Either consumer audio or business audio is selected by the OEM. Consumer audio will not

have onboard jacks, like business audio, but will provide audio connections via an audio riser card. Either audio

solution is provided by the VIBRA16S audio controller, and it provides 16-bit stereo, Sound Blaster Pro^†compatible

audio with full duplex capabilities to meet the demands of interactive multimedia applications. PCI and ISA

expansion slots are supported by a connector on the motherboard designed to accept a riser card.

In addition to superior hardware capabilities, a full set of software drivers and utilities are available to allow

advanced operating systems such as Microsoft^†Windows^†95 to take full advantage of the hardware capabilities.

Features such as bus mastering IDE, Windows 95-ready Plug ‘N’ Play, Advanced Power Management (APM) with

application restart, software-controlled power supply shutdown, and full duplex audio are all provided by software

available for the Advanced/RH.

Advanced/RH Technical Product Specification • Page 5

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MOTHERBOARD MANUFACTURING OPTIONS

The following manufacturing options are available. Details for each option are found in the corresponding section

of this specification.

AUDIO SUBSYSTEM

Business audio

Consumer audio

No audio

VIDEO SUBSYSTEM

ATI VT graphic controller

ATI CT graphic controller

CACHE SUBSYSTEM

Soldered SRAM

CELP socket

UNIVERSAL SERIAL BUS

USB

No USB

Advanced/RH Technical Product Specification • Page 6

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BOARD LEVEL FEATURES

C D EFG H I

Y X

OM04270

Figure 1. Advanced/RH Motherboard Features

A − VGA^†connector

S − PCI / ISA expansion connector

T − National PC87306B I/O controller

U − Flash BIOS

V − PCI ISA/IDE Xcelerator (PIIX3)

W − Battery for the Real-time clock

X − Two PCI IDE interfaces

B − Parallel port connector

C − COM2 Header

D − COM2, or Dual in-line USB Connector

E − COM1 connector

F− Four Pin CD-ROM audio connector

G − PS/2^†Mouse port

Y − CPU 3.3v voltage regulator

Z − Front Panel I/O connector

H − PS/2 Keyboard port

I − Two 3.5 mm Audio Jacks (mic in, line out)

J − Eight Pin Wave table upgrade connector

K − 3 Pin Modem Audio Connector

L − Creative Labs Vibra 16S audio, Yamaha^†OPL3 FM

synthesizer

M − Midi Audio/Joystick connector

N − Floppy connector

AA − Socket 7 Pentium Processor socket

BB − Celp 2.1 connector cache module socket

CC − 82439HX controller (TXC)

DD − 256K L2 PBSRAM

EE − Riser Card 2/3 slot jumper

FF − ATI Media Channel Connector for H/W MPEG

GG − ATI graphics controller

O − Power Supply control connector

P − 3.3v Power connector

Q − Primary power connector

R − Six SIMM sockets (three banks)

HH − Configuration jumper blocks

II − Up to 2 MB graphics memory

JJ − SGRAM Graphics memory upgrade header

(This figure identifies the location of motherboard manufacturing options. Not all locations will be populated on all motherboards.)

Advanced/RH Technical Product Specification • Page 7

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LPX FORM FACTOR

The Advanced/RH motherboard is designed to fit into a standard LPX form factor chassis. Figure 2 illustrates the

mechanical form factor for the Advanced/RH. The Advanced/RH LPX form factor does adhere to the standard

LPX guidelines in that the outer dimensions are 13” x 9”. Location of the I/O connectors, riser slot, and mounting

holes are in strict compliance with the LPX specification. However, if business audio is selected by an OEM, a

slight modification to the OEM’s chassis may be necessary to accept the audio jacks on the motherboard.

13.0

11.375

5.875

0.375

0.219

9.0

0.0

0.35

3.906

7.500

8.8125

OM04271

Figure 2. Advanced/RH Motherboard dimensions

CPU

The Advanced/RH LPX motherboard is designed to operate with 3.3 volt Pentium processors. The 3.3 volt power

is provided by a patented on-board voltage regulator circuit. An on-board jumper enables use of VRE specified

processors. The voltage regulator provides the required voltage for the processor from the 5 volt output of a

standard power supply. Processors which run internally at 75, 90, 100, 120, 133, 150 and 166 MHz, and have

iCOMP^®ratings of 615, 735, 815, 1000, 1110, 1176 and 1308 respectively are supported. Future Pentium

processors will also be supported.

The Pentium processor maintains full backward compatibility with the 8086, 80286, Intel386 and Intel486

processors. It supports both read and write burst mode bus cycles, and includes separate 8 KB on-chip code and

data write-back caches. Also integrated into the Pentium processor is an advanced numeric coprocessor which

significantly increases the speed of floating point operations, while maintaining backward compatibility with the

Intel486DX math coprocessor and complying to ANSI/IEEE standard 754-1985.

Advanced/RH Technical Product Specification • Page 8

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PROCESSOR UPGRADE

The Advanced/RH motherboard is manufactured with the 321-pin (socket 7) ZIF processor socket. Socket 7

provides a processor upgrade path that includes higher performance Pentium OverDrive processors than can be

supported with socket 5. The motherboard is built to support uniplane CPUs. However, a manufacturing option

allows the socket 7 design to support split voltage planes that can supply different voltages for a processor’s CPU

core and for the I/O core. Installing a split plane CPU into a motherboard configured only for uniplane processor

may cause damage to the CPU.

SECOND LEVEL CACHE

The Intel 82430HX PCIset supports a second level cache that uses high performance Synchronous Pipeline Burst

SRAM. Asynchronous cache is not supported by the 82430HX controller. Pipeline Burst (PB) SRAM provides

performance similar to expensive Synchronous Burst SRAMs for only a slight cost premium over slower

performing asynchronous SRAMs.

As a manufacturing option, the Advanced/RH motherboard without onboard cache can be provided with a Card

Edge Low Profile (CELP) version 2.1 socket that provides flexibility for second level cache options. The CELP

socket can accommodate either a 256 KB or 512 KB cache module and is designed to work with modules that

adhere to the COAST (Cache On A Stick) specification, version 2.1. The cache size is automatically detected and

configured by the system BIOS for optimal performance. For a list of cache module suppliers or a copy of the

COAST specification, contact your local Intel sales office or Intel authorized distributor.

SYSTEM MEMORY

The Advanced/RH motherboard provides six 72-pin SIMM sites for memory expansion. The sockets support 512

KB x 32 (2MB double sided SIMMs only), 1M x 32 (4 MB), 2M x 32 (8 MB), 4M x 32 (16 MB), 8M x 32 (32

MB), 16M x 32 (64MB), and 32M x 32 (128MB) single-sided or double-sided SIMM modules. Minimum memory

size is 8 MB and maximum memory size, using four 32M x 32 SIMM modules, is 512 MB. Memory timing

requires 70 ns fast page devices or, for optimum performance 60 ns EDO DRAM. 36-bit SIMM modules may be

used for parity or ECC generation and checking.

The six sockets are arranged as Bank 0, Bank 1, and Bank 2. Each bank consists of two sockets and provides a

64/72-bit wide data path. Both SIMMs in a bank must be of the same memory size and type, although each bank

may have different types of memory installed. It is even possible to have 70 ns Fast Page DRAM in one bank and

60 ns EDO DRAM in the other, in which case each bank is independently optimized for maximum performance.

Any combination of the banks may be populated. There are no jumper settings required for the memory size or

type, which is automatically detected by the system BIOS. The Advanced/RH motherboard supports only tin-lead

SIMMs.

When banks 1 and 2 are populated at the same time, memory timing is modified from x333 to x444. This is due to

loading on the address line shared by these two banks. In most applications the L2 cache will mask any

performance degradation that is incurred. In addition, when using EDO Parity memory in an ECC configuration

memory timing is changed from x222 to x333 to allow the chipset to perform Read Modify Writes.

EDO DRAM

Extended Data Out, or Hyper Page, DRAM is designed to improve the DRAM read performance. EDO

DRAM holds the memory data valid until the next CAS# falling edge, unlike standard fast page mode

DRAM which tri-states the memory data when CAS# negates to precharge for the next cycle. With EDO,

the CAS# precharge overlaps the data valid time, allowing CAS# to negate earlier while still satisfying

the memory data valid window time.

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EXPANSION RISER

An expansion slot riser connector of EISA form factor provides the capability to support either two or three PCI

slots by changing a motherboard jumper to route any extra IRQ and ID selects. A riser board can also support up

to five ISA expansion slots. The PCI bus is compliant with the PCI 2.1 specification.

To ensure that the lowest positioned slot on the riser card can support a full length add-in card the following

conditions must be met.

1) The minimum height requirement for the lowest positioned slot on the CPU side of the riser is 1.2”. Therefore

the CPU heat sink should be no more than 1.2” high once installed on the processor.

2) The minimum height requirement for the lowest positioned slot on the SIMM side of the riser is 1.3”.

Therefore, once SIMM memory is installed they should not be taller than 1.3”.

PERIPHERAL COMPONENT INTERCONNECT (PCI) PCISET

The Intel 82430HX PCIset is made up of two components: The 82439HX controller (TXC) and the 82371SB

PCI ISA IDE Xcellerator (PIIX3) ISA bridge. The PCIset provides the following functions:

•

CPU interface control

Integrated L2 write-back cache controller

– Pipeline Burst SRAM

(with B0 stepping of the PIIX 3)

– Host/Hub Controller

– Two USB ports

– 256 KB or 512 KB Direct Mapped

Integrated DRAM controller

– 64/72-bit path to Memory

– Support for EDO and Fast Page DRAM

– 8 MB to 512 MB main memory

– Parity and ECC support

•

Integrated fast IDE interface

– Support for up to 4 devices

– PIO Mode 4 transfers up to 16 MB/sec

– Integrated 8 x 32-bit buffer for Bus

Master PCI IDE burst transfers

– Bus Master mode

•

Fully synchronous PCI bus interface

– 25/30/33 MHz

– PCI to DRAM > 100 Mbytes/sec

Interface between the PCI bus and ISA bus

Universal Serial Bus Controller

•

PCI 2.1 Compliant

Enhanced Fast DMA controller

Interrupt controller and steering

Counters/Timers

•

SMI interrupt logic and timer with Fast On/Off mode

82439HX TXC

The 439HX controller provides all control signals necessary to drive a second level cache and the DRAM array,

including multiplexed address signals. It also controls system access to memory and generates snoop controls to

maintain cache coherency. The 439HX controller comes in a 324 pin Ball Grid Array package.

82371SB PCI ISA IDE XCELERATOR (PIIX3)

The PIIX3 provides the interface between the PCI and ISA buses and integrates a dual channel fast IDE interface

capable of supporting up to 4 devices. USB host/hub bus is provided by the PIIX 3. The PIIX3 integrates seven

32-bit DMA channels, five 16-bit timer/counters, two eight-channel interrupt controllers, PCI-to-AT interrupt

mapping circuitry, NMI logic, ISA refresh address generation, and PCI/ISA bus arbitration circuitry onto the same

device. The PIIX3 comes in a 208 pin QFP package.

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IDE SUPPORT

The Advanced/RH motherboard provides two independent high performance bus-mastering PCI IDE interfaces

capable of supporting PIO Mode 3 and Mode 4 devices. The system BIOS supports Cylinder Sector Head (CHS),

Logical Block Addressing (LBA) and Extended Cylinder Sector Head (ECHS) translation modes as well as ATAPI

(e.g. CD-ROM) devices on both IDE interfaces. IDE device transfer rate and translation mode capability can be

automatically determined by the system BIOS.

Normally, programmed I/O operations require a substantial amount of CPU bandwidth. In multi-tasking operating

systems like Microsoft Windows 95, the CPU bandwidth freed up by using bus mastering IDE can be used to

complete other tasks while disk transfers are occurring. A driver is required for the IDE interface to operate as a

PCI bus master capable of supporting PIO Mode 4 devices with transfer rates up to 22 MB/sec while minimizing

the system demands upon the processor.

Detailed information on the PCIset is available in the Intel 82430HX PCIset data sheet.

NATIONAL SEMICONDUCTOR PC87306B SUPER I/O CONTROLLER

Control for the integrated serial ports, parallel port, floppy drive, RTC and keyboard controller is incorporated into a single

component, the National Semiconductor PC87306B. This component provides:

• Two NS16C550-compatible UARTs with send/receive 16 byte FIFO

— Support for an IrDA compliant Infra Red interface

• Multi-mode bi-directional parallel port

— Standard mode; IBM^†and Centronics^†compatible

— Enhanced Parallel Port (EPP) with BIOS/Driver support

— High Speed mode; Extended Capabilities Port (ECP) compatible

• Industry standard floppy controller with 16 byte data FIFO (2.88 MB floppy support)

• Integrated Real Time Clock accurate within +/- 13 minutes/yr at 25º C and 5 volts when the system is continuously

powered on

• Integrated 8042 compatible keyboard controller

The PC87306B is normally configured by the BIOS automatically. However configuration of these interfaces is possible via

the CMOS Setup program that can be invoked during boot-up. The serial ports can be enabled as COM1, COM2, IrDA, or

disabled. The parallel port can be configured as normal, extended, EPP/ECP, or disabled. The floppy interface can be

configured for 360 KB or 1.2 MB 5¼” media or for 720 KB, 1.2 MB, 1.44 MB, or 2.88 MB 3½” media. Header pins located

near the back of the board allow cabling to use these interfaces

FLOPPY CONTROLLER

The PC87306B is software compatible with the DP8473 and 82077 floppy disk controllers. The floppy interface

can be configured for 360 KB or 1.2 MB 5¼” media or for 720 KB, 1.2 MB, 1.44 MB, or 2.88 MB 3½” media in

the BIOS setup. By default, the Floppy A interface is configured for 1.44 MB and Floppy B is disabled. Another

setup option prevents the user from being able to write to floppy. Configuring the floppy interface for 1.2 MB 3

½” (3-mode floppy) requires the use of a driver to operate correctly.

KEYBOARD INTERFACE

PS/2 keyboard/mouse connectors are located on the back panel side of the motherboard. The 5V lines to these

connectors are protected with a PolySwitch^†circuit which acts much like a self-healing fuse, re-establishing the

connection after an over-current condition is removed. While this device eliminates the possibility of having to

replace a fuse, care should be taken to turn off the system power before installing or removing a keyboard or

mouse. The system BIOS can detect and correct keyboards and mice plugged into the wrong PS/2^†style

connector.

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The integrated 8042 microcontroller contains the AMI Megakey keyboard/mouse controller code which, besides

providing traditional keyboard and mouse control functions, supports Power-On/Reset (POR) password protection.

The POR password can be defined by the user via the Setup program. The keyboard controller also provides for

the following "hot key" sequences:

• <CTRL><ALT><DEL>: System software reset. This sequence performs a software reset of the system by jumping to

the beginning of the BIOS code and running the POST operation.

• <CTRL><ALT><+> and <CTRL><ALT><->: Turbo mode selection. <CTRL><ALT><-> sets the system for de-

turbo mode, emulating an 25 MHz AT, and <CTRL><ALT><+> sets the system for turbo mode. Changing the

Turbo mode may be prohibited by an operating system, or when the CPU is in Protected mode or virtual x86 mode

under DOS.

• <CTRL><ALT><defined in setup>: Power down and coffee-break key sequences take advantage of the SMM

features of the Pentium Processor to greatly reduce the system’s power consumption while maintaining the

responsiveness necessary to service external interrupts.

REAL TIME CLOCK, CMOS RAM AND BATTERY

The integrated Real Time Clock (RTC) is DS1287 and MC146818 compatible and provides a time of day clock

and a 100-year calendar with alarm features. The RTC can be set via the BIOS SETUP program. The RTC also

supports a 242-byte battery-backed CMOS RAM area in two banks. This area is reserved for BIOS use. The

CMOS RAM can be set to specific values or cleared to the system default values using the BIOS SETUP program.

Also, the CMOS RAM values can be cleared to the system defaults by using a configuration jumper on the

motherboard. Table B-1, in Appendix B, lists the configuration jumper settings.

An external coin-cell style battery provides power to the RTC and CMOS memory. The battery has an estimated

lifetime of three years if the system is not plugged into the wall socket. When the system is plugged in, power is

supplied from the LPX power supply’s 5v standby current to extend the life of the battery. See Appendix A for

information regarding replacement batteries.

IRDA (INFRA-RED) SUPPORT

A 5-pin interface on the front panel I/O connector is provided to allow connection to a Hewlett Packard HSDSL-

1000 compatible Infra-red (IrDA) transmitter/receiver. Once the module is connected to the front panel I/O

header, serial port 2 can be re-directed to the IrDA module, allowing the user to transfer files to or from portable

devices such as laptops, PDA’s and printers using application software such as LapLink. The IrDA specification

provides for data transfers at 115 Kbps from a distance of 1 meter.

PARALLEL PORT

The Parallel port can be configured in the BIOS setup as output only compatible mode, bi-directional mode, ECP

or EPP modes. The highly flexible parallel port can also be assigned to I/O addresses 278H, 378H, or 3BCH and

IRQ’s 5 or 7. Furthermore, a routable DMA scheme allows Plug ‘N’ Play operating systems such as Windows 95

to route either DMA channel 1 or 3 to the parallel port for ECP mode. EPP BIOS support must be provided by a

device driver or TSR.

GRAPHICS SUBSYSTEM

The ATI-264VT controller is a highly integrated multimedia graphics & video controller for PCI bus systems. The VT

achieves enhanced performance with an all in one design that integrates a video scaler, a color space converter, a true color

palette DAC, and a triple clock synthesizer with ATI’s proven Mach64^†graphics engine. The ATI-264VT controller is

software applications and drivers.

As a manufacturing option, the Advanced/RH board is also available with an ATI-264CT video controller and 1 MB of

EDO video DRAM, upgradeable to a total of 2 MB by adding 1 MB of socketed video DRAM.

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ATI-264VT RESOLUTIONS SUPPORTED BY THE MOTHERBOARD

1 MB

SGRAM

2 MB

SGRAM

Max Vertical

Refresh Rate

Resolution

640x480x4bpp

640x480x8bpp

640x480x16bpp

640x480x24bpp

640x480x32bpp

800x600x4bpp

800x600x8bpp

800x600x16bpp

800x600x24bpp

1024x768x4bpp

1024x768x8bpp

1024x768x16bpp

1280x1024x4bpp

1280x1024x8bpp

100 Hz

60 Hz

100 Hz

75 Hz

Table 1. Advanced/RH Audio resource mapping

GRAPHICS DRIVERS AND UTILITIES

Graphics drivers and utilities for Windows^†3.11 or for Windows 95 are supplied with the Advanced/RH

motherboard.

AUDIO SUBSYSTEM

The Advanced/RH offers three audio options for the OEM. The consumer audio option uses an onboard header to route

audio to a riser card in the I/O panel. Consumer audio also includes a wave table upgrade header for future expansion.

The business audio option includes mike and line jacks on the motherboard next to the mouse and keyboard connectors. A

third option is to have the board with no on-board audio.

The Advanced/RH audio subsystem is based upon the Creative Labs Vibra 16S audio controller and Yamaha OPL3 FM

synthesizer. The controller features a 16-bit stereo audio sub-system as a factory installed option along with the OPL3 FM

synthesizer. The Vibra 16S controller provides all the digital audio and analog mixing functions required for recording and

playing of audio on personal computers. These functions include stereo analog-to-digital and digital-to-analog converters,

analog mixing, anti-aliasing and reconstruction filters, line and microphone level inputs, and digital audio compression via

selectable A-law / µlaw, and full digital control of all mixer and volume control functions.

VIBRA 16S RESOURCE MAP

Base Address (software configured)

220H - 22FH(Default) or

240H - 24FH or

Joystick Enable (software configured)

Default Enabled

Interrupt (Software configured)

IRQ2/9 or

260H - 26FH or

280H - 28FH

IRQ5 (default) or

FM Address (fixed)

IRQ7 or

388H - 38BH

IRQ10

Joystick Address/Game Port (fixed)

200H - 207H

8-bit DMA Channel (software configured)

DMA Channel 1 (default) or

DMA Channel 3

MPU-401 Address (software configured)

300H - 301H or

16-bit DMA Channel (software configured)

DMA channel 5 (default)

DMA channel 7

330H - 331H (default)

MPU-401 Enable (software configured)

Default is disabled

Table 2. Advanced/RH Audio resource mapping

Advanced/RH Technical Product Specification • Page 13

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AUDIO DRIVERS

Audio software and utilities are provided for the Advanced/RH motherboard. A Windows setup program

installs all of the software programs and utilities onto the system hard drive. Included in the Creative

audio software are DOS utilities that allow the user to play a CD-ROM, control sound volume and mixer

settings, run diagnostics, and switch between Sound Blaster Pro and Windows Sound System modes.

Windows drivers and utilities include the Windows sound driver, audio input control panel, audio mixer

control panel, and a business audio transport utility.

UNIVERSAL SERIAL BUS (USB)

When B0 steppings of PIIX 3 are used in manufacturing, USB connectors may be added as a manufacturing option

to support the new technology. The USB connector will occupy the serial 2 connector location, and there is a

header to reroute COM2 to a breakout in the chassis or IO panel if the customer so desires.

Connectors

MOTHERBOARD CONNECTORS

There are connectors on-board for Floppy, IDE, Graphics memory upgrade sockets, VESA^†feature connector,

SIMMs, CELP cache modules, battery holder and front panel I/O connectors.

Advanced/RH Technical Product Specification • Page 14

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Simm

Socket(6)

PCI/ISA Expansion

Connector(J6J2)

Bank 0(J2D1, J2D2)

Bank 1(J2E1, J2F1)

Bank 2(J2E1, J2F1)

CDROM

J6N1

J9N2

Modem/Audio

Connector

J9N1

Floppy

Drive

J9K2

J9K1

Wave

Table

PS Remote

Connector

ATI Media

Connector

(J1H1)

3.3V

Power

MIDI

Audio

J9H1

CELP

Connector

(J1D1)

J9L1

Primary

Power

J9H1

PCI IDE

Connector(2)

J5C1

J6C1

J3A1

Front Panel I/O Connector

OM04275

Figure 3. Advanced/RH connector locations

Advanced/RH Technical Product Specification • Page 15

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POWER SUPPLY CONTROL (J9H1,J9K2)

When used with a power supply that supports remote power on/off, the Advanced/RH motherboard can

turn off the system power via software control (“soft-off”). The Powerman utility supplied for Windows

3.1x allows for soft-off as does the shutdown icon in Windows 95 Start menu. The system BIOS will turn

the system power off when it receives the proper APM command from the OS. For example, Windows

95 will issue this APM command when the user selects the “Shutdown the computer” option. Note that

APM must be enabled in the system BIOS and OS in order for the soft-off feature to work correctly.

Power supplies that support “soft-off” connect to the motherboard via the 3-pin “PWS CNTRL”

connector, which is a Molex 2695 connector featuring a security latch for reliability. In order for the

system to recognize the presence of a “soft-off” power supply, the supply must tie pin 3 of the PWS

Control connector to ground.

FRONT PANEL CONNECTIONS (J3A1, J2A1)

The Advanced/RH motherboard provides header connectors to support functions typically located on the chassis

bezel. Refer to Appendix G for exact pinout definitions for all of the connectors. Front panel features supported

include:

•

System Speaker

•

Power LED

System Reset

CPU fan

Infra-Red (IrDA) port

Sleep/Resume

Hard Drive activity LED

J3A1

SPKR

SLP/PS-ON

HDLED

PWRLED

RST

FAN

OM04279

Figure 4. Front Panel I/O Connectors

Advanced/RH Technical Product Specification • Page 16

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SPEAKER

The external speaker provides error beep code information during the Power-On Self Test if the system cannot

use the video interface. If no speakers are plugged into the audio output jack, the audio output is redirected to

the external PC speaker.

SLEEP / RESUME

When Advanced Power Management (APM) is activated in the system BIOS and the operating system’s

APM driver is loaded, Sleep mode (Stand-By) can be entered in one of three ways: an optional front panel

“Sleep/Resume” button, a user defined keyboard hot key, or prolonged system inactivity. The

Sleep/Resume button is supported by a 2-pin header located on the front panel I/O connector. Closing the

“Sleep” switch will generate an SMI (System Management Interrupt) to the processor which immediately

goes into System Management Mode (SMM), the so called “Sleep” mode. The front panel “Sleep mode”

switch must be a momentary two pin SPST type that is normally open. The function of the Sleep/Resume

button can also be achieved via a keyboard hot-key sequence, or by a time-out of the system inactivity

timer. Both the keyboard hot-key and the inactivity timer are programmable in the BIOS setup (timer is

set to 10 minutes by default). To re-activate the system, or “Resume”, the user must simply press the

sleep/resume button again, or use the keyboard or mouse. Note that mouse activity will only “wake up”

the system if a mouse driver is loaded. While the system is in Stand-By or “sleep” mode it is fully

capable of responding to and servicing external interrupts (such as incoming fax) even though the monitor

will only turn on if a user interrupt (keyboard/mouse) occurs as mentioned above. This interface is also

supported by pins 1 and 2 of the PS SLEEP connector.

INFRA-RED (IRDA) CONNECTOR

Serial port 2 can be configured to support an IrDA module via a 5 pin header connector . Once

configured for IrDA, the user can transfer files to or from portable devices such as laptop computers,

PDA’s or printers using application software such as Traveling Software’s LapLink. The IrDA

specification provides for data transfers at 115 Kbps from a distance of 1 meter.

RESET

This 2-pin header can be connected to a momentary SPST type switch that is normally open. When the switch

is closed, the system will hard reset and run POST.

Advanced/RH Technical Product Specification • Page 17

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AUDIO CONNECTORS

There are two methods of accessing the audio features on the Advanced/RH. The method installed depends on the

audio option that has been selected. For business audio, audio is accessed using audio jacks provided on the

motherboard. These two 1/8” jacks supply Line Out, and Mic In connections and are available through the back

I/O panel.

MIDI/AUDIO I/O CONNECTOR

Consumer audio is provided by using an audio riser card connected to the audio/midi connector of the

motherboard. The audio riser card contains all of the necessary audio jacks (Speaker Out, Line In, Mic

In) and the game port. It plugs into a 34-pin header connector on the motherboard. An example of the

consumer audio riser card is shown below. The audio connectors are 1/8” stereo jacks

Figure 5. Advanced/RH Consumer audio I/O module

CD-ROM AUDIO INPUT

A four pin connector is provided for interfacing the audio output stream from a CD-ROM reader into the

audio sub-system mixer. This connector is compatible with the typical cable that is supplied with CD-

ROM readers for interfacing to audio add-in cards. This feature is available in both consumer and

business audio options.

Advanced/RH Technical Product Specification • Page 18

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WAVE TABLE UPGRADE

An eight pin header is provided as part of the consumer audio option to connect to a wave table upgrade

card for richer sound quality in both DOS and Windows environments. The wave table upgrade module

is simply installed into a standard ISA slot with a cable routed to the connector.

Compatible wave table upgrade cards are available from several venders; the ICS WaveFront upgrade

module and the CrystaLake Series 2000 wave table product family add a complete General MIDI

compatible music solution to the Advanced/RH based system.

For more information on CrystaLake products Contact CrystaLake Mulitmedia at

http://www.teleport.com/~crystal, or (503) 222-2603 ext. 209

Figure 6. Advanced/RH Wave Table Upgrade module

Advanced/RH Technical Product Specification • Page 19

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BACK PANEL CONNECTORS

The back panel provides external access to PS/2 style keyboard and mouse connectors as well as two serial and one

parallel port, which are integrated on the Advanced/RH motherboard. If a USB connector is present, COM2 can be

routed to a back panel knockout from the COM2 header on the motherboard. Audio jacks for Speaker Out and

Microphone are provided for business audio on the back I/O panel. By adding an audio riser for consumer audio

solutions a Midi/Game port can be made available through an ISA panel. Figure 5 shows the general location of

the I/O connectors. Business audio jacks and the consumer audio/midi riser are mutually exclusive features.

PS/2

Keyboard

COM 1

COM 2

Parallel Port

VGA

Audio

Jacks

PS/2

Mouse

OM04272

Figure 7. Back Panel I/O Connectors

Advanced/RH Technical Product Specification • Page 20

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Power Consumption

Tables 3 and 4 list the measured current and voltage requirements for the Advanced/RH motherboard configured

with 16 MB of DRAM. Table 5 lists the typical power consumed by the same configuration.. This information is

preliminary and is provided only as a guide for calculating approximate total system power usage with additional

resources added.

Voltage

DC Voltage

Acceptable tolerance

+/- 5%

+3.3V

+5V

+5V SB (stand by)

-5V

+/- 5%

+12V

+/- 5%

-12V

+/- 5%

Table 3. Advanced/RH Voltage tolerance

Current and Power

AC (watts)

+5v

DC (amps)

+12v

No APM enabled

DOS prompt

Windows95 @1024x768

3.5A

4.0A

160mA

APM enabled

DOS prompt

Windows95 @1024x768

Suspended

24.3

24.4

2.2A

160mA

20.3

2.2A

160mA

Table 4. Advanced/RH Power and Current Requirements

System Configuration

Advanced/RH motherboard, 166 MHz Pentium Processor, 24 MB EDO

RAM, 256 KB PBSRAM L2 cache, Floppy drive, 1.6 GB hard drive,

Sony CDU-77E CD-ROM drive

Table 5. Power use by System Resources

Advanced/RH Technical Product Specification • Page 21

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Appendix A − User-Installable Upgrades

SYSTEM MEMORY

Supported SIMM Sizes

512K x 32 (2 MB)

1M x 32 (4 MB)

Bank Size

4MB

Note

8MB

2M x 32 (8 MB)

16MB

4M x 32 (16 MB)

8M x 32 (32 MB)

16M x 32 (64MB)

32M x 32 (128MB)

32MB

64MB

128MB

256MB

Table A-1. Supported Memory SIMM Sizes and Configuration

Note 1: 512K x 32 SIMMs are supported, however, they must be double sided SIMMs

Note: 2 When using Single Sided High Density SIMMs such as 32 MB single sided, 64 MB double sided, or 128

MB SIMMs, SIMMs that have less than 32 MB per side will NOT be recognized in the system.

The Advanced/RH will support both Fast Page DRAM or EDO DRAM SIMMs, but they cannot be mixed within

the same memory bank. If Fast Page DRAM and EDO DRAM SIMMs are installed in separate banks, each bank

will be optimized for maximum performance. Parity or ECC generation and detection are supported when parity

SIMMs are the only SIMMs present on the motherboard. SIMM requirements are 70 ns Fast Page Mode or 60 ns

EDO DRAM with tin-lead connectors.

8 MB is the minimum memory size supported by the Advanced/RH motherboard. 512 MB is the maximum

memory that can be supported in any combination of SIMMs from the table.

REAL TIME CLOCK BATTERY REPLACEMENT

The battery can be replaced with a Sanyo CR2032, or equivalent, coin cell lithium battery. This battery has a 220

mAh rating.

CPU UPGRADE

A Type 7 Zero Insertion Force (ZIF) socket provides users with a performance upgrade path to the P54CTB

OverDrive technology. LPX form factor makes it easier for the end user to replace the processor.

GRAPHICS MEMORY UPGRADE

The ATI-264VT graphics subsystem has either 1 or 2MB of SGRAM soldered down on the base board.

Video memory can be upgraded with a daughter card that is compatible with ATI PCI add in cards.

Information on the memory upgrade can be obtained by contacting ATI Technologies at the numbers listed

below in the HARDWARE MPEG MODULE section.

Advanced/RH Technical Product Specification • Page 22

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HARDWARE MPEG MODULE

ATI provides a hardware MPEG module that will work with the Advanced/RH. This module mounts onto

connector J1H1, and uses mounting holes provided on the motherboard. This modul is also known as the

ATI Multimedia Controller, or AMC.

For more information contact ATI Technologies at http://www.atitech.ca, or

(905) 882-2626 . . . . . Customer Support (voice)

(905) 882-0546 . . . . . Customer Support (fax)

(905) 764-9404 . . . . . ATI DOWNLOAD BBS (8N1)

Advanced/RH Technical Product Specification • Page 23

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Appendix B − Configuration Jumper Settings

13.00"

J4L1

J4G1

Riser Jumpers

Clock Speed, CMOS, Password

J6C2

OverDrive Voltage Jumper

Figure B-1. Configuration Jumper locations

Advanced/RH Technical Product Specification • Page 24

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JUMPER

BLOCK

FUNCTION

FREQ **

CONFIGURATION

See table B-2 below

(Note: These jumpers also set PCI,

and ISA clock speeds.)

MULT

(cpu clock multiplier)

CMOS

(resets CMOS settings to default)

PSWD

(Password Clear)

SETUP

J4L1(C)

J4L1(D)

J4L1(A)

J4L1(B)

J4G1

See table B-2 below

* 4-5 Keep (normal)

5-6 CLR (reset to default)

* 1-2 Keep (Password Enabled)

2-3 CLR (Password Clear/Disabled)

* 1-2 ENBL (Access Allowed)

2-3 DIS (Access Denied)

* 1-2 & 4-5 2 SLOTS

(CMOS Setup Access)

RISER

(Select # of PCI slots on riser)

Recovery

2-3 & 5-6

*1-2 Normal operation

3 SLOTS

J6C2

2-3 Recovery mode

Drive or OverDrive

Processor Voltage **

* Default configuration

** As shipped

J6C2

*5-6- Default voltage (VRE)

4-5 OverDrive processor voltage (VR)

Table B-1. Configuration Jumper settings

Advanced/RH Technical Product Specification • Page 25

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CPU CONFIGURATION - JUMPER BLOCK J4L1(C&D)

These allow the motherboard to be switched between different speeds of the Pentium processor. These jumpers

also affect the PCI and ISA clock speeds according to the following table:

Host Bus

Clk Ratio

CPU Freq.

(MHz)

166

150

133

120

100

reserved

Host Bus

Freq. (MHz)

pins J4L1C

1-3

pins J4L1C

4-6

pins J4L1D

PCI Freq.

CLK Ratio

1-3

2-3

1-2

4-6

5-6

4-5

(MHz)

1-2

2-3

1-2

2-3

1-2

2-3

1-2

5-6

4-5

5-6

4-5

5-6

4-5

5-6

4-5

5/2

3/2

Table B-2. CPU/SYSTEM speed settings (* default setting)

The ISA clock is derived from the PCI bus clock. The BIOS automatically sets the ISA clock speed to one fourth of

the PCI frequency.

PCI Frequency

25 MHz

ISA clock speed

6.25 MHz

30 MHz

7.5 MHz

33 MHz

8.25 MHz

Table B-3. ISA clock settings set by the BIOS based on PCI Clk Speed

CMOS -J4L1 A PINS 4-6

Allows CMOS settings to be reset to default values by moving the jumper from pins 4-5 to pins 5-6 and turning the

system on. When the system reports “NVRAM cleared by jumper”, the system can be turned off and the jumper

should be returned to the 4-5 position to restore normal operation. This procedure should be done whenever the

system BIOS is updated. Default is for this jumper to be on pins 4-5.

PSWD -J4L1 A PINS 1-3

Allows system password to be cleared by moving the jumper from pins 1-2 to pins 2-3 and turning the system on.

The system should then be turned off and the jumper should be returned to the 1-2 position to restore normal

operation. This procedure should only be done if the user password has been forgotten. The password function is

effectively disabled if this jumper is in the 2-3 position. Default is for the password to be enabled (1-2 position).

SETUP - J4L1 B PINS 1-3

Allows access to CMOS Setup utility to be disabled by moving this jumper from the 1-2 position to the 2-3

position. Default is for access to setup to be enabled (1-2 position).

RISER - J4G1

The riser jumper block allows routing of an extra IRQ and ID select to the riser card for an additional PCI slot to

support a maximum of 3 PCI slots on a riser. Default is set for 2 PCI slots on the riser card (1-2 position and 4-5

position).

Advanced/RH Technical Product Specification • Page 26

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DRIVE OR OVERDRIVE - J6C2

Sets the CPU voltage to either standard voltage (3.3v), or OverDrive (3.6v). The Default setting is for a jumper to

connect pin 5-6 for standard voltage. Move the jumper to connect pins 4-5 to select OverDrive voltage.

RECOVERY JUMPER - J6C2

This jumper should be set to normal mode, Pins 1-2, and should only be moved when a recovery is being

performed, i.e. jumper 2-3.

Advanced/RH Technical Product Specification • Page 27

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Appendix C − Memory Map

Address Range

100000-20000000

F0000-FFFFF

EC000-EFFFF

EA000-EBFFF

E8000-E9FFF

E0000-E7FFF

C8000-DFFFF

A0000-C7FFF

9FC00-9FFFF

80000-9FBFF

00000-7FFFF

Size

511M

64K

16K

Description

1024K-512M

Extended Memory

960K-1023K

944K-959K

936K-943K

928K-935K

896K-927K

800-895K

640K-799K

639K

AMI System run time BIOS

Main BIOS Recovery Code

ESCD (Plug ‘N’ Play configuration area)

OEM LOGO (available as UMB)

BIOS RESERVED (Currently available as UMB)

Available HI DOS memory (open to ISA and PCI bus)

Off-board video memory and BIOS

Extended BIOS Data (moveable by QEMM, 386MAX)

Extended conventional

32K

96K

160K

512K-638K

0K-511K

127K

512K

Conventional

Table C-1. Advanced/RH Memory Map

The table above details the Advanced/RH memory map. The ESCD area from EA000-EBFFF is not available for use

as an Upper Memory Block (UMB) by memory managers. The area from E0000-E7FFF is currently not used by the

BIOS and is available for use as UMB by memory managers. Parts of this area may be used by future versions of the

BIOS to add increased functionality.

Advanced/RH Technical Product Specification • Page 28

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Appendix D − I/O Map

Address (hex)

0000 - 000F

0020 - 0021

002E - 002F

0040 - 0043

0048 - 004B

0060

Size

16 bytes

2 bytes

4 bytes

1 byte

Description

PIIX - DMA 1

Address (hex)

0388 - 038B

03B4 - 03B5

03BA

Size

4 bytes

2 bytes

1 byte

Description

PIIX - Interrupt

Ultra I/O configuration

PIIX - Timer 1

03BC - 03BF

03C0 - 03CA

03CC

4 bytes

12 bytes

1 byte

Parallel Port 3

PIIX - Timer 2

Keyboard Controller

PIIX - NMI, speaker

Kbd Controller,

0061

1 byte

03CE - 03CF

03D4 - 03D5

03DA

2 bytes

1 byte

0064

1 byte

0070, bit 7

0070, bits 6:0

0071

1 bit

PIIX - Enable NMI

PIIX - Real Time

Reserved - Brd.

PIIX - DMA Page

PIIX - Interrupt

7 bits

03E8 - 03EF

03F0 - 03F5

03F6

8 bytes

6 bytes

1 byte

Serial Port 3

1 byte

Floppy Channel

Pri IDE Chan

Floppy Chan 1

Floppy Disk

0078

1 byte

0079

1 byte

03F7 (Write)

03F7, bit 7

03F7, bits 6:0

03F8 - 03FF

LPT + 400h

04D0 - 04D1

0608 - 060B

0CF8*

1 byte

0080 - 008F

00A0 - 00A1

00C0 - 00DE

00F0

16 bytes

2 bytes

31 bytes

1 byte

1 bit

7 bits

Pri IDE Chan

On-Board Serial

ECP port, LPT

Edge/Level

PIIX - DMA 2

8 bytes

2 bytes

4 bytes

1 byte

Reset Numeric Error

Secondary IDE

Primary IDE Channel

Game Port

0170 - 0177

01F0 - 01F7

0200 - 0207

0220 - 022F

0278 - 027B

02F8 - 02FF

0330 - 0331

0376

8 bytes

4 bytes

8 bytes

1 bytes

1 byte

PCI Config

0CF9

Turbo & Reset

PCI Config Data

Parallel Port 2

0CFC-0CFF

0FF0 - 0FF7

FF00 - FF07

FFA0 - FFA7

FFA8 - FFAF

4 bytes

8 bytes

On-Board Serial Port 2

MPU - 401 (MIDI)

Sec IDE Chan Cmd

Sec IDE Chan Stat

Parallel Port 1

IDE Bus Master

IDE primary

0377

1 byte

IDE secondary

0378 - 037F

8 bytes

Table D-1. Advanced/RH I/O Address Map

I/O Port 78 is reserved for BIOS use. Port 79 is a read only port, the bit definitions are shown below in Table D-2.

Bit #

Description

Reserved

Bit = 1

n/a

Bit = 0

n/a

Soft Off capable power supply present

Onboard Audio present

External CPU clock

Setup Disable

Yes

Table B-2

Enable access

Keep values

Keep password

Table B-2

Disable access

Clear values

Clear password

Clear CMOS

Password Clear

Table D-2. Advanced/RH Port 79 Definition

Advanced/RH Technical Product Specification • Page 29

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Appendix E − PCI Configuration Space Map

The 82430HX PCIset uses Configuration Mechanism 1 to access PCI configuration space. The PCI Configuration

Address register is a 32-bit register located at CF8h, the PCI Configuration Data register is a 32-bit register located

at CFCh. These registers are only accessible by full DWORD accesses. The table below lists the PCI bus and device

numbers used by the motherboard.

Bus Number

Dev Number (hex)

Func. Number

Description

Intel 82437HX

Intel 82371FB (PIIX 3) PCI/ISA bridge

Intel 82371FB (PIIX 3) IDE Bus Master

Video [ATI]

Option PCI expansion Slot for 3 Slot Riser

PCI Expansion Slot

Table E-1. Advanced/RH PCI Configuration. Space Map

Advanced/RH Technical Product Specification • Page 30

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Appendix F − Interrupts & DMA Channels

IRQ

System Resource

NMI

I/O Channel Check

Reserved, Interval Timer

Reserved, Keyboard buffer full

Reserved, Cascade interrupt from slave PIC

Serial Port 2

Serial Port 1

Audio

DMA

Data Width

System Resource

Floppy

8- or 16-bits

Audio

Parallel Port 1

Audio

Real Time Clock

Floppy

User available

Parallel Port (for ECP/EPP Config.)

User available

Reserved - Cascade channel

Audio

16-bits

Open

Onboard Mouse Port

Reserved, Math coprocessor

Primary IDE

Table F-2. Advanced/RH DMA Map

Secondary IDE if present, else user available

Table F-1. Advanced/RH Interrupts

Advanced/RH Technical Product Specification • Page 31

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Appendix G − Connectors

POWER SUPPLY

PRIMARY POWER J9H1

Name

PWRGD

+5 V

Function

Power Good

+ 5 volts Vcc

+ 12 volts

- 12 volts

PCI (3.3V) POWER J9J1 NOT

POPULATED

+12 V

-12 V

GND

-5 V

Name

Function

Ground

GND

Ground

GND

Ground

GND

Ground

+3.3 V

+3.3V

+3.3 V

+ 3.3 volts

-5 volts

+5 V

+ 5 volts Vcc

+5 V

Advanced/RH Technical Product Specification •

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FRONT PANEL−J3A1

SLEEP/RESUME

Signal Name

SW_ON

GND

SLEEP

SLEEPPU

KEY

POWER INTERFACE HARD

DRIVE LED (DISK)

INFRA-RED

Signal Name

CONIRRX

IRTX

PWRPU

PWDRV

HDA

GND

IRRIN

HDPU

VCC

POWER LED / KEYLOCK

Signal Name

POWER INTERFACE CPU FAN

Signal Name

PWDRV

Ground

+12V

PWRPU

KEY

Ground

POWER INTERFACE SPEAKER

CONNECTOR

POWER INTERFACE RESET

CONNECTOR

Signal Name

GND

Key

RESET

Ground

SPKSRC

SPKOUT

Advanced/RH Technical Product Specification •

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BACK PANEL I/O

PS/2 KEYBOARD J8N1 & MOUSE

PORTS J7N1

Signal Name

Data

No Connect

Ground

Vcc

Clock

SERIAL PORTS COM1 J6N2 & COM2

J5N1

PARALLEL PORT J3N1

Signal Name

STROBE-

Data Bit 0

Data Bit 1

Data Bit 2

Data Bit 3

Data Bit 4

Data Bit 5

Data Bit 6

Data Bit 7

ACK-

Signal Name

AUTO FEED-

ERROR-

INIT-

DCD

Serial In - (SIN)

Serial Out - (SOUT)

DTR-

SLCT IN-

Ground

GND

DSR-

Ground

RTS-

Ground

CTS-

Ground

BUSY

Ground

USB J5N2 REPLACES COM2

PE (Paper End)

SLCT

Ground

Signal Name

N.C.

VCC

USBP0-

USBP0

GND

VIDEO MONITOR PORT J1N1

Signal Name

VCC

Red

USBP1-

USBP1

GND

Green

Blue

No Connect

Ground

LINE OUT J9N2

Ground

Signal Name

Ground

Line Out

No Connect

Ground

MIC IN J8N2

No Connect

MONID1

Horizontal Sync.

Vertical Sync.

MONID2

Signal Name

Line Out

Advanced/RH Technical Product Specification • Page 34

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PERIPHERALS

IDE CONNECTORS J5C1 & J6C1

Signal Name

Reset IDE

Pin Pin

Signal Name

Ground

FLOPPY CONNECTOR J9K1

Signal Name Pin

Signal Name

DENSEL

Host Data 7

Host Data 6

Host Data 5

Host Data 4

Host Data 3

Host Data 2

Host Data 1

Host Data 0

Ground

Host Data 8

Host Data 9

Host Data 10

Host Data 11

Host Data 12

Host Data 13

Host Data 14

Host Data 15

Key

Ground

Key

Reserved

FDEDIN

Ground

MSEN1

Ground

MSEN0

Ground

Index-

Motor Enable A-

Drive Select B-

Drive Select A-

Motor Enable B-

DIR-

DDRQ0 (DDRQ1)

I/O Write-

Ground

STEP-

Ground

Write Data-

Write Gate-

Track 00-

I/O Read-

Ground

IOCHRDY

Vcc pull-up

Ground

DDACK0 (DDACK1)-

IRQ14 (IRQ15)

Addr 1

Write Protect-

Read Data-

Side 1 Select-

Diskette Change-

Addr 0

Addr 2

Chip Select 1P (1S)-

Activity-

Chip Select 3P (3S)-

Ground

Advanced/RH Technical Product Specification • Page 35

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MULTIMEDIA

MIDI/AUDIO CONNECTOR J9L1

Signal Name

+5 V

Signal Name

+5 V

JoyStick But0

JoyStick X1

Ground

JoyStick But2

JoyStick X2

MIDI Out

JoyStick Y2

JoyStick But3

MIDI In

ATI MULTI-MEDIA CON. (AMC) J1H1

Signal Name

Ground

Data enable

Sync enable

PCLK enable

SDA

Signal Name

Data 0

Data 1

Data 2

Data 3

Data 4

Data 5

Data 6

Data 7

DCLK

Ground

JoyStick Y1

JoyStick But1

+5 V

Key

Line Out Right

Right Speaker

Left Speaker

Line Out Left

Line In Right

Line In Left

Mic In

Ground

Key

Ground

VFCSNS

SCL

Ground

-12 V

BLANK

HSYNC

VSYNC

GND

Ground

+12 V

Ground

KEY

key

(NOT A MM OPTION)

VCC

RST

SNRDY

VMASK

WAVE TABLE UPGRADE

CONNECTOR J9N1

SAD

GND

+12V

Signal Name

Wave Right

Ground

Wave Left

Ground

CD-ROM AUDIO INTERFACE J6N1

Signal Name

Key

Ground

CD-LEFT

Ground

MIDI_Write

MIDI_OUT

CD-Right

MIDI/GAME PORT (ON AUDIO

RISER)

TELEPHONY CONNECTOR J9L2

Signal Name

Vcc

JSBUT0

JSX1R

GND

Ground

Mono Out

Mic In

No Connect

GND

JSY1R

JSBUT1

Vcc

JSBUT2

JSX2R

MIDI-OUT-R

JSY2R

JSBUT3

MIDI-IN-R

Advanced/RH Technical Product Specification • Page 36

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PCI / ISA RISER (J6J2)

Signal Name

IOCHK-

SD7

GND

RSTDRV

Vcc

GND

PCIINT0-

PCIINT1-

Vcc

GND

PCIINT2-

PCIINT3-

Vcc

SD6

SD5

IRQ9

SD4

-5V

SD3

DRQ2

-12V

Key

SD2

Vcc

SD1

0WS-

PCIRST-

GNT0-

REQ0-

GND

PCLKE

GND

AD30

3.3V

PCLKF

GND

GNT1-

GND

REQ1-

AD31

AD29

3.3V

SD0

+12V

IOCHRDY

AEN

A10

A11

A12

A13

A14

A15

A16

A17

A18

A19

A20

A21

A22

A23

A24

A25

A26

A27

A28

A29

A30

A31

B10

B11

B12

B13

B14

B15

B16

B17

B18

B19

B20

B21

B22

B23

B24

B25

B26

B27

B28

B29

B30

B31

GND

E10

E11

E12

E13

E14

E15

E16

E17

E18

E19

E20

E21

E22

E23

E24

E25

E26

E27

E28

E29

E30

E31

F10

F11

F12

F13

F14

F15

F16

F17

F18

F19

F20

F21

F22

F23

F24

F25

F26

F27

F28

F29

F30

F31

SMEMW-

SMEMR-

IOW-

SA19

SA18

SA17

SA16

SA15

SA14

SA13

SA12

SA11

SA10

SA9

IOR-

DACK3-

DRQ3

DACK1-

DRQ1

REFRESH-

SYSCLK

IRQ7

Key

3.3V

AD28

AD26

AD24

AD22

AD20

AD18

3.3V

AD27

AD25

CBE3-

AD23

AD21

AD19

3.3V

IRQ6

SA8

IRQ5

SA7

IRQ4

SA6

IRQ3

Key

SA5

DACK2-

3.3V

SA4

AD16

FRAME-

CBE2-

TRDY-

STOP-

SDONE

SBO-

CBE1-

PAR

AD17

IRDY-

DEVSEL-

PLOCK-

PERR-

SERR-

AD15

AD14

AD12

GND

Key

SA3

BALE

SA2

Vcc

SA1

OSC

SA0

GND

SBHE-

LA23

LA22

LA21

LA20

LA19

LA18

LA17

MEMR-

MEMW-

SD8

MEMCS16-

IOCS16-

IRQ10

IRQ11

IRQ12

IRQ15

IRQ14

DACK0-

DRQ0

DACK5-

DRQ5

DACK6-

DRQ6

DACK7-

DRQ7

Vcc

GND

Key

GND

AD13

AD11

AD9

GND

AD10

AD8

C10

C11

C12

C13

C14

C15

C16

C17

C18

D10

D11

D12

D13

D14

D15

D16

D17

D18

G10

G11

G12

G13

G14

G15

G16

G17

G18

G19

H10

H11

H12

H13

H14

H15

H16

H17

H18

H19

AD7

CBE0-

AD6

AD5

SD9

AD3

SD10

SD11

SD12

SD13

SD14

SD15

AD4

AD1

AD2

AD0

Key

Vcc

MASTER-

GND

Vcc

GND

Advanced/RH Technical Product Specification • Page 37

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CELP 2.1 CONNECTOR (J1D1)

Signal Name

GND

TIO0

TIO2

TIO6

TIO4

TIO8

VCC3

TWE*

CADS*

GND

CWE4*

CWE6*

CWE0*

CWE2*

VCC3

CCS*

GWE*

BWE*

GND

D58

D56

GND

D54

D52

D50

D48

GND

D46

D44

D42

VCC3

D40

D38

D36

GND

D34

D32

D30

VCC3

D28

D26

D24

GND

D22

D20

D18

VCC3

D16

D14

D12

GND

D10

GND

TIO1

TIO7

TIO5

TIO3

TI09

121

122

123

124

125

126

127

128

129

130

131

132

133

134

135

136

137

138

139

140

141

142

143

144

145

146

147

148

149

150

151

152

153

154

155

156

157

158

159

160

D59

D57

GND

D55

D53

D51

D49

GND

D47

D45

D43

VCC5

D41

D39

D37

GND

D35

D33

D31

VCC5

D29

D27

D25

GND

D23

D21

D19

VCC5

D17

D15

D13

GND

D11

VCC5

TIO10

CADV*

GND

COE*

CWE5*

CWE7*

CWE1*

VCC5

CWE3*

CAB3

CALE

GND

RSVD

100

101

102

103

104

105

106

107

108

109

110

111

112

113

114

115

116

117

118

119

120

A11

A16

A10

VCC3

A18

VCC5

A17

GND

A12

GND

A13

A14

ADSP*

ECS1*

ECS2*

PD1

A15

RSVD

PD0

PD2

PD3

PD4

GND

CLK1

GND

D62

GND

CLK0

GND

D63

VCC3

VCC5

VCC3

D60

VCC5

D61

GND

Advanced/RH Technical Product Specification • Page 38

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Appendix-H Motherboard BIOS

The Advanced/RH motherboard uses an Intel BIOS, which is stored in Flash EEPROM and easily upgraded using

a floppy disk-based program. BIOS upgrades can be down loaded from the Intel Applications Support electronic

bulletin board service, or the Intel FTP site. In addition to the Intel BIOS, the Flash EEPROM also contains the

Setup utility, Power-On Self Tests (POST), APM 1.1, the PCI auto-configuration utility, and Windows 95 ready

Plug ‘N’ Play. This motherboard also supports system BIOS shadowing, allowing the BIOS to execute from 64-bit

on-board write-protected DRAM.

The BIOS displays a sign-on message during POST identifying the type of BIOS and a five-digit revision code.

The initial production BIOS in the Advanced/RH will be identified as 1.00.01.CV0.

Information on BIOS functions can be found in the IBM PS/2 and Personal Computer BIOS Technical Reference

published by IBM, and the ISA and EISA Hi-Flex AMIBIOS Technical Reference published by AMI. Both manuals

are available at most technical bookstores.

FLASH MEMORY IMPLEMENTATION

The Intel 2 Mb Flash component is organized as 32 x 8 (256 KB). The Flash device is divided into five

areas, as described in Table H-1.

System Address

FLASH Memory Area

64 KB Main BIOS

F0000H

EC000H

EA000H

E8000H

E0000H

FFFFFH

EFFFFH

EBFFFH

E9FFFH

E7FFFH

16 KB System BIOS RECOVERY

8 KB Plug ‘N’ Play ESCD Storage Area

8 KB OEM Logo Area

32 KB System BIOS Reserved during boot

Table H-1. Flash memory organization

BIOS UPGRADES

Flash memory makes distributing BIOS upgrades easy. A new version of the BIOS can be installed from

a diskette. BIOS upgrades are available to be down loaded from the secure section on the Intel bulletin

board, or Intel’s FTP site.

The disk-based Flash upgrade utility, FMUP.EXE, has three options for BIOS upgrades:

• The Flash BIOS can be updated from a file on a disk;

• The current BIOS code can be copied from the Flash EEPROM to a disk file as a backup in the event that an

upgrade cannot be successfully completed; or

• The BIOS in the Flash device can be compared with a file to ensure the system has the correct version.

The upgrade utility ensures the upgrade BIOS extension matches the target system to prevent accidentally

installing a BIOS for a different type of system.

Advanced/RH Technical Product Specification • Page 39

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SETUP UTILITY

The ROM-based Setup utility allows the configuration to be modified without opening the system for

most basic changes. The Setup utility is accessible only during the Power-On Self Test (POST) by

pressing the <F1> key after the POST memory test has begun and before boot begins. A prompt may be

enabled that informs users to press the <F1> key to access Setup. A jumper setting (See table B-1 in

appendix B) on the motherboard can be set to prevent user access to Setup for security purposes.

PCI AUTO-CONFIGURATION

The PCI auto-configuration utility operates in conjunction with the system Setup utility to allow the

insertion and removal of PCI cards to the system without user intervention (Plug ‘N’ Play). When the

system is turned on after adding a PCI add-in card, the BIOS automatically configures interrupts, I/O

space and other parameters. PCI interrupts are distributed to available ISA interrupts that have been not

been assigned to an ISA card, or system resources. Those interrupts left set to “available” in the CMOS

setup will be considered free for PCI add-in card use. It is nondeterministic as to which PCI interrupt

will be assigned to which ISA IRQ.

The PCI Auto-Configuration function complies with version 2.10 of the PCI BIOS specification. System

configuration information is stored in ESCD format. The ESCD data may be cleared by setting the

CMOS clear jumper to the ON position.

PCI specification 2.1 for add-in card auto-configuration is also a part of the Plug ‘N’ Play BIOS. Peer-to-

peer hierarchical PCI Bridge 1.0 is supported, and by using an OEM supplied option ROM or TSR, a

PCI-to-PCMCIA bridge capability is possible as well.

ISA PLUG ‘N’ PLAY

The BIOS incorporates ISA Plug ‘N’ Play capabilities as delivered by Plug ‘N’ Play Release 1.0A (Plug

‘N’ Play BIOS V.. 1.0A, ESCD V.. 1.03). When used in conjunction with the ISA Configuration Utility

(ICU) for DOS or Windows 3.x, the system allows auto-configuration of Plug ‘N’ Play ISA cards, PCI

cards, and resource management for legacy ISA cards. Because the BIOS supports configuring devices

across PCI bridges, release 1.41 or greater of the ICU must be used with the Advanced/RH motherboard

to properly view and change system settings. System configuration information is stored in ESCD

format. The ESCD data may be cleared by setting the CMOS clear jumper to the ON position (See

Appendix B for jumper details).

The Advanced/RH BIOS also has a setup option to support the Windows 95 run time plug and play

utilities. When this option is selected, only devices required to boot the system are assigned resources by

the BIOS. Device Node information is available for all devices to ensure compatibility with Windows

95.

Copies of the IAL Plug ‘N’ Play specification may be obtained from the Intel BBS or from CompuServe

by typing Go PlugPlay.

ADVANCED POWER MANAGEMENT

The Advanced/RH BIOS has support for both 1.0 and 1.1 Advanced Power Management (APM). The

version of APM drivers loaded in the operating system by the user will determine what specification the

BIOS will adhere too. In either case the energy saving Stand By mode can be initiated by a keyboard hot

key sequence set by the user, a time-out period set by the user, or by a suspend/resume button tied to the

front panel sleep connector.

When in Stand-by mode, the Advanced/RH motherboard reduces power consumption by utilizing the

Pentium processor’s System Management Mode (SMM) capabilities and also spinning down hard drives

and turning off VESA DPMS compliant monitors. The user may select which DPMS mode (Stand By,

Suspend, or Off) to send to the monitor in setup. The ability to respond to external interrupts is fully

maintained while in Stand-by mode allowing the system to service requests such as in-coming FAX’s or

network messages while unattended. Any keyboard or mouse activity brings the system out of the energy

saving Stand By mode. When this occurs the monitor and IDE drives are turned back on immediately.

Advanced/RH Technical Product Specification • Page 40

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APM is enabled in BIOS by default, however, the system must be configured with an APM driver (such

as Power.exe for DOS or vpowerd.386 for Windows 3.x) in order for the system power saving features to

take effect. Windows 95 will enable APM automatically upon detecting the presence of the APM BIOS.

LANGUAGE SUPPORT

The BIOS setup screen and help messages are supported in 32 languages. There are 5 languages

translated at this time for use; American English, German, Italian, French, and Spanish. Translations of

other languages will available at a later date.

With a 1 Mb Flash BIOS, only one language can be resident at a time. The default language is American

English, and will always be present unless another language is programmed into the BIOS using the Flash

Memory Update Program (FMUP) available on the Intel BBS.

PCI IDE

The two local bus IDE connectors with independent I/O channel support are setup up automatically by

the BIOS if the user selects “Autoconfiguration” in setup. The IDE interface supports PIO Mode 3 and

Mode 4 hard drives and recognition of ATAPI CD-ROMs, tape drives, and any other ATAPI devices. The

BIOS will determine the capabilities of each drive and configure them to optimize capacity and

performance. For the high capacity hard drives typically available today, the drive will be automatically

configured for Logical Block Addressing (LBA) for maximum capacity and to PIO Mode 3 or 4

depending on the capability of the drive. The user is able to override the auto-configuration options by

using the manual mode setting.

BOOT OPTIONS

Booting from CD-ROM is supported in adherence to the “El Torito” bootable CD-ROM format

specification developed by Phoenix Technologies and IBM. Under the Boot Options field in setup, CD-

ROM is one of four possible boot devices defined in priority order. The default setting is for floppy to be

the primary boot device and hard drive to be the secondary boot device and CD-ROM to be the third

device. The forth device is set to disabled in the default configuration.. The user can also select network

as a boot device. The network option allows booting from a network add-in card with a remote boot

ROM installed.

NOTE: A copy of “El Torito” is available on Phoenix Web page.

FLASH LOGO AREA

Advanced/RH supports a 4 KB programmable flash user area located at EC000-ECFFF. An OEM may

use this area to display a custom logo. The Advanced/RH BIOS accesses the user area just after

completing POST. A utility called USRLUTIL is available on the Intel BBS to assist with installing a

logo into flash for display during POST.

SECURITY FEATURES

Administrative Password

If enabled, the administrative password protects all sensitive Setup options from being changed by a user

unless the password is entered. Without the proper password the user will be able to configure only the User

password and the power management hot key fields. The User password does not alter the protection

provided by the Administrative password.

User Password

The User Password feature provides security, preventing the system from booting or entering setup unless the

user selected password is entered during the boot process,. The user password can be set using the Setup

utility, and must be entered prior to peripheral boot or keyboard/mouse operation.

Advanced/RH Technical Product Specification • Page 41

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If the password is forgotten, it can be cleared by turning off the system and setting the "password clear" jumper

(See Appendix B: table B-1) to the ON position and briefly powering up the system. The Administrative

password and User password are both cleared by this operation. After returning the jumper to the “password

keep” position, a new password can be entered in Setup to re-enable password protection.

Setup Enable Jumper

A motherboard configuration jumper (See Appendix B: table B-1) controls access to the BIOS Setup utility.

By setting the jumper to the disable position, the user is prevented from accessing the Setup utility during the

Power-On Self Test or at any other time. The message prompting the user to press <F1> to enter setup is also

disabled.

Floppy Write Protect

A BIOS setup option under “floppy options” prevents writing to any attached floppy drives. This field is

controlled by the administrative password and can be altered only if the administrative password (if set) is

entered.

Advanced/RH Technical Product Specification • Page 42

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Appendix I − PCI Configuration Error Messages

The following PCI messages are displayed as a group with bus, device and function information.

<'NVRAM Checksum Error, NVRAM Cleared'>, \ ; String

<'System Board Device Resource Conflict'>, \ ; String

<'Primary Output Device Not Found'>, \ ; String

<'Primary Input Device Not Found'>, \ ; String

<'Primary Boot Device Not Found'>, \ ; String

<'NVRAM Cleared By Jumper'>, \ ; String

<'NVRAM Data Invalid, NVRAM Cleared'>, \ ; String

<'Static Device Resource Conflict'>, \ ; String

The following messages chain together to give a message such as:

"PCI I/O Port Conflict: Bus: 00, Device 0D, Function: 01".

If and when more than 15 PCI conflict errors are detected the log full message is displayed.

<'PCI I/O Port Conflict:'>, \ ; String

<'PCI Memory Conflict: '>, \ ; String

<'PCI IRQ Conflict: '>, \ ; String

<' Bus '>, \

; String

<', Device '>, \ ; String

<', Function '>, \ ; String

<‘,PCI Error Log is Full.'>, \ ; String

<'Floppy Disk Controller Resource Conflict '>, \ ; Text

<'Primary IDE Controller Resource Conflict '>, \ ; Text

<'Secondary IDE Controller Resource Conflict '>, \ ; Text

<'Parallel Port Resource Conflict '>, \ ; Text

<'Serial Port 1 Resource Conflict '>, \ ; Text

<'Serial Port 2 Resource Conflict '>, \ ; Text

Advanced/RH Technical Product Specification • Page 43

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Appendix J− AMIBIOS Error messages and Beep Codes

Errors can occur during POST (Power On Self Test) which is performed every time the system is powered on. Fatal

errors, which prevent the system from continuing the boot process, are communicated through a series of audible

beeps. Other errors are displayed in the following format:

ERROR Message Line 1

ERROR Message Line 2

For most displayed error messages, there is only one message. If a second message appears, it is "RUN SETUP". If

this message occurs, press <F1> to run AMIBIOS Setup.

BEEP CODES

Beeps

Error Message

Description

The memory refresh circuitry on the motherboard is faulty.

Parity is not supported on this product, will not occur.

Memory failure in the first 64 KB.

Refresh Failure

Parity Error

Base 64 KB Memory Failure

Timer Not Operational

Memory failure in the first 64 KB of memory, or Timer 1 on the motherboard is not

functioning.

Processor Error

The CPU on the motherboard generated an error.

The keyboard controller (8042) may be bad. The BIOS cannot switch to protected

mode.

8042 - Gate A20 Failure

Processor Exception Interrupt Error

Display Memory Read/Write Error

The CPU generated an exception interrupt.

The system video adapter is either missing or its memory is faulty. This is not a fatal

error.

ROM Checksum Error

ROM checksum value does not match the value encoded in BIOS.

CMOS Shutdown Register Rd/Wrt Error The shutdown register for CMOS RAM failed.

VIDEO ERROR Video Controller failure

1 LONG

3 SHORT

ERROR MESSAGES

Error Message

Explanation

8042 Gate - A20 Error

Gate A20 on the keyboard controller (8042) is not working. Replace the 8042.

Error in the address decoding circuitry on the motherboard.

Cache memory is defective. Replace it.

Address Line Short!

Cache Memory Bad, Do Not Enable Cache!

CH-2 Timer Error

Most AT systems include two timers. There is an error in timer 2.

CMOS RAM is powered by a battery. The battery power is low. Replace the battery.

After CMOS RAM values are saved, a checksum value is generated for error checking. The

previous value is different from the current value. Run AMIBIOS Setup.

The values stored in CMOS RAM are either corrupt or nonexistent. Run Setup.

The video type in CMOS RAM does not match the type detected by the BIOS. Run AMIBIOS

Setup.

CMOS Battery State Low

CMOS Checksum Failure

CMOS System Options Not Set

CMOS Display Type Mismatch

CMOS Memory Size Mismatch

The amount of memory on the motherboard is different than the amount in CMOS RAM. Run

AMIBIOS Setup.

Advanced/RH Technical Product Specification • Page 44

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ERROR MESSAGES (CONT.)

CMOS Time and Date Not Set

Run Standard CMOS Setup to set the date and time in CMOS RAM.

Diskette Boot Failure

The boot disk in floppy drive A: is corrupt. It cannot be used to boot the system. Use another boot disk

and follow the screen instructions.

Display Switch Not Proper

DMA Error

The display jumper is not implemented on this product, this error will not occur.

Error in the DMA controller.

DMA #1 Error

Error in the first DMA channel.

DMA #2 Error

Error in the second DMA channel.

FDD Controller Failure

The BIOS cannot communicate with the floppy disk drive controller. Check all appropriate connections

after the system is powered down.

HDD Controller Failure

The BIOS cannot communicate with the hard disk drive controller. Check all appropriate connections

after the system is powered down.

INTR #1 Error

Interrupt channel 1 failed POST.

INTR #2 Error

Interrupt channel 2 failed POST.

Invalid Boot Diskette

Keyboard Is Locked...Unlock It

Keyboard Error

The BIOS can read the disk in floppy drive A:, but cannot boot the system. Use another boot disk.

The keyboard lock on the system is engaged. The system must be unlocked to continue.

There is a timing problem with the keyboard. Set the Keyboard option in Standard CMOS Setup to Not

Installed to skip the keyboard POST routines.

KB/Interface Error

There is an error in the keyboard connector.

Off Board Parity Error

Parity error in memory installed in an expansion slot. The format is:

OFF BOARD PARITY ERROR ADDR (HEX) = (XXXX)

XXXX is the hex address where the error occurred.

On Board Parity Error

Parity Error ????

Parity is not supported on this product, this error will not occur.

Parity error in system memory at an unknown address.

ISA NMI MESSAGES

ISA NMI Message

Explanation

Memory failed. If the memory location can be determined, it is displayed as xxxxx. If not, the message is

Memory Parity Error ????.

Memory Parity Error at xxxxx

I/O Card Parity Error at xxxxx

DMA Bus Time-out

An expansion card failed. If the address can be determined, it is displayed as xxxxx. If not, the message is

I/O Card Parity Error ????.

A device has driven the bus signal for more than 7.8 microseconds.

Advanced/RH Technical Product Specification • Page 45

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Appendix K − Soft-off Control

The Advanced/RH design supports Soft-off control via the SMM code in the BIOS. The CS1 pin out of the National

306B Ultra I/O controller is connected to the Soft-off control line in our power supply circuit.

The registers in the Ultra I/O controller that sets the I/O address and control of the CS1 pin is NOT setup until the

SMM code is activated. The code performs the following operations:

OUT 0Ch to I/O port 2Eh

OUT 75h to I/O port 2Fh

OUT 11h to I/O port 2Eh

OUT 00h to I/O port 2Fh

OUT 0Dh to I/O port 2Eh

OUT A0h to I/O port 2Fh

After setting the above registers, any read operation to I/O location 75H will trigger the Soft-off circuit and turn the

power supply off.

Advanced/RH Technical Product Specification • Page 46

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Appendix L − Environmental Standards

MOTHERBOARD SPECIFICATIONS

Parameter

Condition

Specification

Temperature

Non-Operating

Operating

-40 C to +70 C

+0 C to +55 C

(minimum air flow of 200 LFM)

DC Voltage

Vibration

+5 V

-5 V

±5 %

+12 V

-12 V

Unpackaged

Packaged

5 Hz to 20 Hz : 0.01g² Hz sloping up to 0.02 g² Hz

20 Hz to 500 Hz : 0.02g² Hz (flat)

10 Hz to 40 Hz : 0.015g² Hz (flat)

40 Hz to 500 Hz : 0.015g² Hz sloping down to 0.00015 g² Hz

Shock

Unpackaged

Packaged

50 G trapezoidal waveform

Velocity change of 170 inches/sec.

Half Sine 2 millisecond

Product

(Weight)

< 20 lb.

21 - 40

41 - 80

81 - 100

Free Fall

Velocity

(Height in inches)

(Change (in / sec))

167

152

136

118

Table L-1. Environmental standards

Advanced/RH Technical Product Specification •

Page 47

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Appendix M − Reliability Data

The Mean-Time-Between-Failures (MTBF) data is calculated from predicted data @ 55C.

Advanced/RH motherboard

72706 Hours

Advanced/RH Technical Product Specification •

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