Intel® Desktop Board
D925XCV/D925XBC
Technical Product Specification
June 2004
Order Number: C68597-001
The Intel® Desktop Board D925XCV/D925XBC may contain design defects or errors known as errata that may cause the product to deviate from published specifications. Current
characterized errata are documented in the Intel Desktop Board D925XCV/D925XBC Specification Update.
Preface
This Technical Product Specification (TPS) specifies the board layout, components, connectors,
power and environmental requirements, and the BIOS for these Intel® Desktop Boards: D925XCV
and D925XBC. It describes the standard product and available manufacturing options.
Intended Audience
The TPS is intended to provide detailed, technical information about the Desktop Boards
D925XCV and D925XBC and their components to the vendors, system integrators, and other
engineers and technicians who need this level of information. It is specifically not intended for
general audiences.
What This Document Contains
Chapter Description
1
2
3
4
A description of the hardware used on the Desktop Boards D925XCV and D925XBC
A map of the resources of the Desktop Boards
The features supported by the BIOS Setup program
A description of the BIOS error messages, beep codes, and POST codes
Typographical Conventions
This section contains information about the conventions used in this specification. Not all of these
symbols and abbreviations appear in all specifications of this type.
Notes, Cautions, and Warnings
NOTE
✏
Notes call attention to important information.
INTEGRATOR’S NOTES
#
Integrator’s notes are used to call attention to information that may be useful to system integrators.
CAUTION
Cautions are included to help you avoid damaging hardware or losing data.
iii
Intel Desktop Board D925XCV/D925XBC Technical Product Specification
WARNING
Warnings indicate conditions, which if not observed, can cause personal injury.
Other Common Notation
#
Used after a signal name to identify an active-low signal (such as USBP0#)
(NxnX)
When used in the description of a component, N indicates component type, xn are the relative
coordinates of its location on the Desktop Boards D925XCV and D925XBC, and X is the
instance of the particular part at that general location. For example, J5J1 is a connector,
located at 5J. It is the first connector in the 5J area.
GB
Gigabyte (1,073,741,824 bytes)
Gigabytes per second
GB/sec
KB
Kilobyte (1024 bytes)
Kbit
Kilobit (1024 bits)
kbits/sec
MB
1000 bits per second
Megabyte (1,048,576 bytes)
MB/sec
Mbit
Megabytes per second
Megabit (1,048,576 bits)
Mbit/sec
xxh
Megabits per second
An address or data value ending with a lowercase h indicates a hexadecimal value.
Volts. Voltages are DC unless otherwise specified.
x.x V
*
This symbol is used to indicate third-party brands and names that are the property of their
respective owners.
iv
Contents
1 Product Description
1.1 PCI Bus Terminology Change......................................................................................11
1.2 Board Differences ........................................................................................................11
1.3 Overview ......................................................................................................................12
1.3.1
1.3.2
1.3.3
1.3.4
Feature Summary..........................................................................................12
Manufacturing Options ..................................................................................13
Board Layouts ...............................................................................................14
Block Diagram ...............................................................................................18
1.4 Online Support .............................................................................................................19
1.5 Processor.....................................................................................................................19
1.6 System Memory ...........................................................................................................20
1.6.1
Memory Configurations .................................................................................21
1.7 Intel® 925X Chipset......................................................................................................25
1.7.1
1.7.2
1.7.3
USB ...............................................................................................................25
IDE Support...................................................................................................25
Real-Time Clock, CMOS SRAM, and Battery................................................28
1.8 PCI Express Connectors..............................................................................................28
1.9 Auxiliary Power (AUX PWR) Output Connector...........................................................28
1.10 I/O Controller................................................................................................................29
1.10.1 Serial Port......................................................................................................29
1.10.2 Parallel Port...................................................................................................29
1.10.3 Diskette Drive Controller................................................................................30
1.10.4 Keyboard and Mouse Interface .....................................................................30
1.11 Audio Subsystem .........................................................................................................31
1.11.1 Audio Subsystem Software ...........................................................................31
1.11.2 Audio Connectors..........................................................................................31
1.11.3 8-Channel (7.1) Audio Subsystem.................................................................32
1.11.4 6-Channel (5.1) Audio Subsystem.................................................................34
1.12 LAN Subsystem ...........................................................................................................35
1.12.1 Marvell Yukon 88E8050 PCI Express 1.0a Integrated MAC/PHY
Gigabit Ethernet Controller............................................................................35
1.12.2 RJ-45 LAN Connector with Integrated LEDs.................................................35
1.12.3 Alert Standard Format (ASF) Support ...........................................................36
1.12.4 LAN Subsystem Software..............................................................................36
1.13 Hardware Management Subsystem.............................................................................37
1.13.1 Hardware Monitoring and Fan Control ASIC.................................................37
1.13.2 Thermal Monitoring........................................................................................38
1.13.3 Fan Monitoring...............................................................................................40
1.13.4 Chassis Intrusion and Detection....................................................................40
1.14 Power Management.....................................................................................................40
1.14.1 ACPI ..............................................................................................................40
1.14.2 Hardware Support .........................................................................................43
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Intel Desktop Board D925XCV/D925XBC Technical Product Specification
1.15 Trusted Platform Module (Optional).............................................................................47
1.15.1 System Requirements ...................................................................................47
1.15.2 Warning of Potential Data Loss.....................................................................47
1.15.3 Security Precautions......................................................................................48
1.15.4 Trusted Platform Module Ownership.............................................................49
1.15.5 Enabling the Trusted Platform Module ..........................................................50
1.15.6 Assuming Trusted Platform Module Ownership ............................................50
1.15.7 Recovery Procedures....................................................................................51
1.15.8 Clearing Trusted Platform Module Ownership...............................................52
1.15.9 Software Support...........................................................................................53
2 Technical Reference
2.1 Introduction ..................................................................................................................55
2.2 Memory Resources......................................................................................................55
2.2.1
2.2.2
Addressable Memory.....................................................................................55
Memory Map..................................................................................................57
2.3 DMA Channels.............................................................................................................57
2.4 Fixed I/O Map...............................................................................................................58
2.5 PCI Configuration Space Map......................................................................................59
2.6 Interrupts......................................................................................................................60
2.7 PCI Conventional Interrupt Routing Map .....................................................................61
2.8 Connectors...................................................................................................................63
2.8.1
2.8.2
Back Panel Connectors.................................................................................63
Component-side Connectors.........................................................................68
2.9 Jumper Block ...............................................................................................................80
2.10 Mechanical Considerations..........................................................................................81
2.10.1 D925XCV Form Factor..................................................................................81
2.10.2 D925XBC Form Factor..................................................................................82
2.10.3 I/O Shield.......................................................................................................83
2.11 Electrical Considerations..............................................................................................85
2.11.1 DC Loading....................................................................................................85
2.11.2 Add-in Board Considerations.........................................................................85
2.11.3 Fan Connector Current Capability.................................................................86
2.11.4 Power Supply Considerations .......................................................................86
2.12 Thermal Considerations...............................................................................................87
2.13 Reliability......................................................................................................................89
2.14 Environmental ..............................................................................................................90
2.15 Regulatory Compliance................................................................................................91
2.15.1 Safety Regulations ........................................................................................91
2.15.2 EMC Regulations...........................................................................................91
2.15.3 European Union Declaration of Conformity Statement..................................92
2.15.4 Product Ecology Statements .........................................................................93
2.15.5 Product Certification Markings (Board Level)................................................94
vi
Contents
3 Overview of BIOS Features
3.1 Introduction ..................................................................................................................95
3.2 BIOS Flash Memory Organization ...............................................................................96
3.3 Resource Configuration ...............................................................................................96
3.3.1
3.3.2
PCI Autoconfiguration....................................................................................96
PCI IDE Support............................................................................................96
3.4 System Management BIOS (SMBIOS) ........................................................................97
3.5 Legacy USB Support....................................................................................................97
3.6 BIOS Updates ..............................................................................................................98
3.6.1
3.6.2
Language Support.........................................................................................98
Custom Splash Screen..................................................................................98
3.7 Boot Options ................................................................................................................99
3.7.1
3.7.2
3.7.3
3.7.4
CD-ROM Boot ...............................................................................................99
Network Boot.................................................................................................99
Booting Without Attached Devices ................................................................99
Changing the Default Boot Device During POST..........................................99
3.8 Fast Booting Systems with Intel® Rapid BIOS Boot...................................................100
3.8.1
3.8.2
Peripheral Selection and Configuration.......................................................100
Intel Rapid BIOS Boot .................................................................................100
3.9 BIOS Security Features .............................................................................................101
4 Error Messages and Beep Codes
4.1 BIOS Error Messages ................................................................................................103
4.2 Port 80h POST Codes ...............................................................................................105
4.3 Bus Initialization Checkpoints ....................................................................................109
4.4 Speaker .....................................................................................................................110
4.5 BIOS Beep Codes......................................................................................................110
vii
Intel Desktop Board D925XCV/D925XBC Technical Product Specification
Figures
1.
2.
3.
4.
5.
6.
7.
8.
9.
Desktop Board D925XCV Components.......................................................................14
Desktop Board D925XBC Components.......................................................................16
Block Diagram..............................................................................................................18
Memory Channel and DIMM Configuration..................................................................21
Dual Channel (Interleaved) Mode Configuration with Two DIMMs ..............................22
Dual Channel (Interleaved) Mode Configuration with Three DIMMs............................22
Dual Channel (Interleaved) Mode Configuration with Four DIMMs..............................23
Single Channel (Asymmetric) Mode Configuration with One DIMM.............................24
Single Channel (Asymmetric) Mode Configuration with Three DIMMs........................24
10. Front/Back Panel Audio Connector Options for 8-Channel (7.1) Audio Subsystem ....32
11. 8-channel (7.1) Audio Subsystem Block Diagram........................................................33
12. Front/Back Panel Audio Connector Options for 6-Channel (5.1) Audio Subsystem ....34
13. 6-Channel (5.1) Audio Subsystem Block Diagram.......................................................34
14. LAN Connector LED Locations ....................................................................................35
15. Thermal Monitoring for D925XCV Board .....................................................................38
16. Thermal Monitoring for D925XBC Board .....................................................................39
17. Location of the Standby Power Indicator LED on the D925XCV Board.......................46
18. Detailed System Memory Address Map.......................................................................56
19. Back Panel Connectors for 8-Channel (7.1) Audio Subsystem ...................................64
20. Back Panel Connectors for 6-Channel (5.1) Audio Subsystem ...................................66
21. D925XCV Component-side Connectors ......................................................................68
22. D925XBC Component-side Connectors ......................................................................70
23. Connection Diagram for Front Panel Connector..........................................................77
24. Connection Diagram for Front Panel USB Connectors................................................78
25. Connection Diagram for IEEE 1394a Connectors........................................................79
26. Location of the Jumper Block.......................................................................................80
27. Desktop Board D925XCV Dimensions.........................................................................81
28. Desktop Board D925XBC Dimensions.........................................................................82
29. I/O Shield Dimensions for Boards with the 8-Channel (7.1) Audio Subsystem............83
30. I/O Shield Dimensions for Boards with the 6-Channel (5.1) Audio Subsystem............84
31. Processor Heatsink for Omni-directional Airflow..........................................................87
32. Localized High Temperature Zones.............................................................................88
Tables
1.
Summary of Board Differences....................................................................................11
Feature Summary ........................................................................................................12
Manufacturing Options.................................................................................................13
D925XCV Components Shown in Figure 1..................................................................15
D925XBC Components Shown in Figure 2..................................................................17
Supported Memory Configurations ..............................................................................20
LAN Connector LED States .........................................................................................35
Effects of Pressing the Power Switch ..........................................................................41
Power States and Targeted System Power .................................................................42
2.
3.
4.
5.
6.
7.
8.
9.
10. Wake-up Devices and Events......................................................................................43
11. System Memory Map ...................................................................................................57
12. DMA Channels.............................................................................................................57
13. I/O Map ........................................................................................................................58
viii
Contents
14. PCI Configuration Space Map......................................................................................59
15. Interrupts......................................................................................................................60
16. PCI Interrupt Routing Map ...........................................................................................62
17. Back Panel Connectors Shown in Figure 19................................................................65
18. Back Panel Connectors Shown in Figure 20................................................................67
19. D925XCV Component-side Connectors Shown in Figure 21. .....................................69
20. D925XBC Component-side Connectors Shown in Figure 22. .....................................71
21. ATAPI CD-ROM Connector .........................................................................................72
22. Front Panel Audio Connector.......................................................................................72
23. Front Chassis Fan and Rear Chassis Fan Connectors...............................................72
24. Processor Fan Connector and Auxiliary Rear Fan Connector....................................72
25. Chassis Intrusion Connector........................................................................................73
26. SCSI Hard Drive Activity LED Connector (Optional)....................................................73
27. Serial ATA Connectors.................................................................................................73
28. Auxiliary Power Output Connector...............................................................................73
29. Main Power Connector.................................................................................................75
30. ATX12V Power Connector...........................................................................................75
31. Alternate Power Connector..........................................................................................75
32. Auxiliary Front Panel Power/Sleep LED Connector.....................................................76
33. Front Panel Connector.................................................................................................76
34. States for a One-Color Power LED..............................................................................77
35. States for a Two-Color Power LED..............................................................................77
36. BIOS Setup Configuration Jumper Settings.................................................................80
37. DC Loading Characteristics .........................................................................................85
38. Fan Connector Current Capability................................................................................86
39. Thermal Considerations for Components ....................................................................89
40. Desktop Board D925XCV/D925XBC Environmental Specifications ............................90
41. Safety Regulations.......................................................................................................91
42. EMC Regulations .........................................................................................................91
43. Product Certification Markings .....................................................................................94
44. BIOS Setup Program Menu Bar...................................................................................96
45. BIOS Setup Program Function Keys............................................................................96
46. Boot Device Menu Options ..........................................................................................99
47. Supervisor and User Password Functions.................................................................101
48. BIOS Error Messages ................................................................................................103
49. Uncompressed INIT Code Checkpoints.....................................................................105
50. Boot Block Recovery Code Checkpoints ...................................................................105
51. Runtime Code Uncompressed in F000 Shadow RAM...............................................106
52. Bus Initialization Checkpoints ....................................................................................109
53. Upper Nibble High Byte Functions.............................................................................109
54. Lower Nibble High Byte Functions.............................................................................110
55. Beep Codes ...............................................................................................................111
ix
Intel Desktop Board D925XCV/D925XBC Technical Product Specification
x
1 Product Description
What This Chapter Contains
1.1 PCI Bus Terminology Change......................................................................................11
1.2 Board Differences ........................................................................................................11
1.3 Overview ......................................................................................................................12
1.4 Online Support .............................................................................................................19
1.5 Processor.....................................................................................................................19
1.6 System Memory ...........................................................................................................20
1.7 Intel® 925X Chipset......................................................................................................25
1.8 PCI Express Connectors..............................................................................................28
1.9 Auxiliary Power (AUX PWR) Output Connector...........................................................28
1.10 I/O Controller................................................................................................................29
1.11 Audio Subsystem .........................................................................................................31
1.12 LAN Subsystem ...........................................................................................................35
1.13 Hardware Management Subsystem.............................................................................37
1.14 Power Management.....................................................................................................40
1.1 PCI Bus Terminology Change
Previous generations of Intel® Desktop Boards used an add-in card connector referred to as PCI.
This generation of Intel Desktop Boards adds a new technology for add-in cards: PCI Express*.
The 32-bit parallel bus previously referred to as PCI is now called PCI Conventional.
1.2 Board Differences
This TPS describes these Intel Desktop Boards: D925XCV and D925XBC. The Desktop Boards
are identical with the exception of the items listed in Table 1.
Table 1.
D925XCV
Summary of Board Differences
• ATX Form Factor (10.20 inches by 9.60 inches [259.08 millimeters by
243.84 millimeters])
• Four PCI Conventional bus add-in card connectors
• Two PCI Express x1 bus add-in card connectors
• Auxiliary rear fan connector
• Option for auxiliary power output connector
• Option for SCSI hard drive indicator LED
• Option for Trusted Platform Module (TPM)
D925XBC
• microATX Form Factor (9.60 inches by 9.60 inches [243.84 millimeters by
243.84 millimeters])
• Two PCI Conventional bus add-in card connectors
• One PCI Express x1 bus add-in card connector
11
Intel Desktop Board D925XCV/D925XBC Technical Product Specification
NOTE
✏
Most of the illustrations in this document show only the Desktop Board D925XCV. When there are
significant differences between the two Desktop Boards, illustrations of both boards are provided.
1.3 Overview
1.3.1 Feature Summary
Table 2 summarizes the major features of the Desktop Boards D925XCV and D925XBC.
Table 2.
Feature Summary
Form Factor
• D925XCV: ATX (10.20 inches by 9.60 inches [259.08 millimeters by
243.84 millimeters])
• D925XBC: microATX (9.60 inches by 9.60 inches [243.84 millimeters by
243.84 millimeters])
Processor
Memory
Support for an Intel® Pentium® 4 processor in an LGA775 socket with an 800 or
533 MHz system bus
• Four 240-pin DDR2 SDRAM Dual Inline Memory Module (DIMM) sockets
• Support for DDR2 400 MHz and DDR2 533 MHz DIMMs
• Support for up to 4 GB of system memory
Intel® 925X Chipset, consisting of:
• Intel® 82925X Memory Controller Hub (MCH)
• Intel® 82801FR I/O Controller Hub (ICH6-R)
• 8 Mbit Firmware Hub (FWH)
Chipset
Video
One PCI Express x16 connector supporting PCI Express x16 graphics cards
Intel® High Definition Audio subsystem
LPC Bus I/O controller
Audio
I/O Control
USB
Support for USB 2.0 devices
Peripheral
Interfaces
• Eight USB ports
• One serial port
• One parallel port
• Four Serial ATA interfaces
• One Parallel ATA IDE interface with UDMA 33, ATA-66/100 support
• One diskette drive interface
• PS/2* keyboard and mouse ports
• Intel/AMI BIOS (resident in the 8 Mbit FWH)
BIOS
• Support for Advanced Configuration and Power Interface (ACPI), Plug and Play,
and SMBIOS
Instantly Available
PC Technology
• Support for PCI Local Bus Specification Revision 2.2
• Support for PCI Express Revision 1.0a
• Suspend to RAM support
• Wake on PCI, RS-232, front panel, PS/2 devices, and USB ports
continued
12
Product Description
Table 2.
Feature Summary (continued)
LAN Support
Gigabit (10/100/1000 Mbits/sec) LAN subsystem using the Marvell* Yukon*
88E8050 PCI Express Gigabit Ethernet Controller
Expansion
Capabilities
• D925XCV: Four PCI Conventional bus add-in card connectors (SMBus routed
to PCI Conventional bus connector 2), two PCI Express x1 bus add-in card
connectors, and one PCI Express x16 bus add-in card connector
• D925XBC: Two PCI Conventional bus add-in card connectors (SMBus routed to
PCI Conventional bus connector 2), one PCI Express x1 bus add-in card
connector, and one PCI Express x16 bus add-in card connector
Hardware Monitor
Subsystem
• Hardware monitoring and fan control ASIC
• Voltage sense to detect out of range power supply voltages
• Thermal sense to detect out of range thermal values
• Three fan connectors
• Three fan sense inputs used to monitor fan activity
• Fan speed control
1.3.2 Manufacturing Options
Table 3 describes the manufacturing options on the Desktop Boards D925XCV and D925XBC.
Not every manufacturing option is available in all marketing channels. Please contact your Intel
representative to determine which manufacturing options are available to you.
Table 3.
Manufacturing Options
Audio Subsystem
Intel High Definition Audio subsystem in one of the following configurations:
• 8-channel (7.1) audio subsystem with five analog audio outputs and two S/PDIF
digital audio outputs (coaxial and optical) using the Realtek* ALC880 audio codec
• 6-channel (5.1) audio subsystem with three analog audio outputs using the
Realtek ALC860 audio codec
Alternate (ALT)
Power Input
Connector
Provides required additional power when using a power supply with a 20-pin (2x10)
main power connector. Not required when using a power supply with a 24-pin (2x12)
main power connector.
Auxiliary (AUX)
Power Output
Connector
Provides power for internal chassis lighting (D925XCV board only)
IEEE-1394a
Interface
IEEE-1394a controller and three IEEE-1394a connectors (one back panel connector,
two front-panel connectors)
SCSI Hard Drive
Activity LED
Connector
Allows add-in hard drive controllers (SCSI or other) to use the same LED as the
onboard IDE controller. (D925XCV board only)
Trusted Platform
Module (TPM)
A component that enhances platform security (D925XCV board only)
For information about
Refer to
Available configurations for the Desktop Boards D925XCV and D925XBC
Section 1.4, page 19
13
Intel Desktop Board D925XCV/D925XBC Technical Product Specification
1.3.3 Board Layouts
Figure 1 shows the location of the major components on the Desktop Board D925XCV.
A
B
C
D
E
F
G
H
I
J
MM
K
L
M
LL
KK
JJ
II
M
O
P
HH
GG
FF
Q
EE
DD
CC
BB
Z
X
AA
Y
W
V
U
T
S
R
OM16676
Figure 1. Desktop Board D925XCV Components
Table 4 lists the D925XCV components identified in Figure 1.
14
Product Description
Table 4.
D925XCV Components Shown in Figure 1.
Item/callout from Figure 1 Description
A
B
Auxiliary rear fan connector
ATAPI CD-ROM connector
C
PCI Express x1 bus add-in card connectors
Audio codec
D
E
Front panel audio connector
PCI Conventional bus add-in card connectors
F
G
Marvell Yukon 88E8050 PCI Express Gigabit Ethernet Controller
PCI Express x16 bus add-in card connector
Rear chassis fan connector
Back panel connectors
H
I
J
K
Alternate power connector
L
+12V power connector (ATX12V)
LGA775 processor socket
M
N
Processor fan connector
O
Intel 82925X MCH
P
DIMM Channel A sockets
Q
DIMM Channel B sockets
R
I/O controller
S
Power connector
T
Diskette drive connector
U
Parallel ATE IDE connector
Battery
V
W
X
Chassis intrusion connector
BIOS Setup configuration jumper block
8 Mbit Firmware Hub (FWH)
Front chassis fan connector
Serial ATA connectors
Y
Z
AA
BB
CC
DD
EE
FF
GG
HH
II
Auxiliary front panel power LED connector
Front panel connector
SCSI hard drive indicator LED (optional)
Auxiliary power output connector (optional)
Front panel USB connector
TPM component (optional)
Front panel USB connector
Intel 82801FR I/O Controller Hub (ICH6-R)
Front panel IEEE-1394a connectors (optional)
IEEE-1394a controller (optional)
Speaker
JJ
KK
LL
MM
PCI Conventional bus add-in card connectors
15
Intel Desktop Board D925XCV/D925XBC Technical Product Specification
Figure 2 shows the location of the major components on the Desktop Board D925XBC.
A
B
C
D
E
F
G
H
I
HH
GG
FF
J
EE
DD
CC
K
L
M
BB
N
AA
Z
Y
W
U
X
V
T
S
R
Q
P
O
OM16686
Figure 2. Desktop Board D925XBC Components
Table 5 lists the D925XCV components identified in Figure 2.
16
Product Description
Table 5.
D925XBC Components Shown in Figure 2.
Item/callout from Figure 2 Description
A
B
Audio codec
Front panel audio connector
PCI Conventional bus add-in card connectors
C
D
Marvell Yukon 88E8050 PCI Express Gigabit Ethernet Controller
PCI Express x16 bus add-in card connector
Rear chassis fan connector
Back panel connectors
E
F
G
H
Alternate power connector
+12V power connector (ATX12V)
LGA775 processor socket
I
J
K
Processor fan connector
L
Intel 82925X MCH
M
N
DIMM Channel A sockets
DIMM Channel B sockets
O
I/O controller
P
Power connector
Q
Diskette drive connector
R
Parallel ATE IDE connector
Battery
S
T
Chassis intrusion connector
BIOS Setup configuration jumper block
8 Mbit Firmware Hub (FWH)
Front chassis fan connector
Serial ATA connectors
U
V
W
X
Y
Auxiliary front panel power LED connector
Front panel connector
Z
AA
BB
CC
DD
EE
FF
GG
HH
Front panel USB connector
Front panel USB connector
Intel 82801FR I/O Controller Hub (ICH6-R)
Front panel IEEE-1394a connectors (optional)
IEEE-1394a controller (optional)
Speaker
ATAPI CD-ROM connector
PCI Express x1 bus add-in card connector
17
Intel Desktop Board D925XCV/D925XBC Technical Product Specification
1.3.4 Block Diagram
Figure 3 is a block diagram of the major functional areas of the boards.
Gigabit Ethernet
Controller
LAN
Connector
PCI Express x1 Interface
PCI Express x1 Slot 1
PCI Express x1 Slot 2
Back Panel/Front Panel
USB Ports
USB
D925XCV
only
Serial Ports
Parallel Port
LPC Bus
I/O
Controller
Parallel ATA
IDE Connector
Parallel ATA
IDE Interface
PS/2 Mouse
PS/2 Keyboard
LGA775
Processor Socket
System Bus
(800/533 MHz)
Diskette Drive
Connector
LPC Bus
PCI Express
x16 Interface
Intel 82801FR
I/O Controller Hub
(ICH6-R)
8 Mbit
Firmware Hub
(FWH)
Intel 82925X
Memory Controller
Hub (MCH)
PCI Express
x16
Connector
Intel 925X Chipset
Dual-Channel
Memory Bus
TPM Component
(Optional)
Channel A
DIMMs (2)
SMBus
Serial ATA
IDE Interface
Serial ATA IDE
Connectors (4)
Channel B
DIMMs (2)
Front Panel Retasking Jack A/E
Front Panel Retasking Jack F
IEEE-1394a Connectors
(Optional)
PCI Bus
PCI Bus
Mic In/Retasking Jack B
Line In/Retasking Jack C
Line Out/Retasking Jack D
CD-ROM
PCI Slot 1
PCI Slot 2
PCI Slot 3
Audio
Codec
SMBus
D925XCV
only
S/PDIF
Hardware Monitoring
and Fan Control ASIC
PCI Slot 4
Center and LFE/Retasking Jack G
Surround Left-Right/Retasking Jack H
= connector or socket
OM16999
Figure 3. Block Diagram
18
Product Description
1.4 Online Support
To find information about…
Visit this World Wide Web site:
Intel Desktop Boards D925XCV and
D925XBC under “Desktop Board
Products” or “Desktop Board Support”
Available configurations for the Desktop http://developer.intel.com/design/motherbd/cv/cv_available.htm
Board D925XCV
Available configurations for the Desktop http://developer.intel.com/design/motherbd/bc/bc_available.htm
Board D925XBC
Processor data sheets
ICH6-R addressing
Custom splash screens
Audio software and utilities
LAN software and drivers
1.5 Processor
The boards are designed to support Intel Pentium 4 processors in an LGA775 processor socket with
an 800 or 533 MHz system bus. See the Intel web site listed below for the most up-to-date list of
supported processors.
For information about…
Refer to:
Supported processors for the D925XCV board
Supported processors for the D925XBC board
CAUTION
Use only the processors listed on web site above. Use of unsupported processors can damage the
board, the processor, and the power supply.
INTEGRATOR’S NOTES
#
Use only ATX12V-compliant power supplies.
For information about
Refer to
Power supply connectors
Section 2.8.1.1, page 64
19
Intel Desktop Board D925XCV/D925XBC Technical Product Specification
1.6 System Memory
The boards have four DIMM sockets and support the following memory features:
•
•
1.8 V (only) DDR2 SDRAM DIMMs
Unbuffered, single-sided or double-sided DIMMs with the following restriction:
Double-sided DIMMS with x16 organization are not supported.
•
4 GB maximum total system memory. Refer to Section 2.2.1 on page 55 for information on the
total amount of addressable memory.
•
•
•
•
Minimum total system memory: 128 MB
Non-ECC DIMMs
Serial Presence Detect
DDR2 533 MHz or DDR2 400 MHz SDRAM DIMMs
✏ NOTES
•
Remove the PCI Express x16 video card before installing or upgrading memory to avoid
interference with the memory retention mechanism.
•
To be fully compliant with all applicable DDR SDRAM memory specifications, the board
should be populated with DIMMs that support the Serial Presence Detect (SPD) data structure.
This allows the BIOS to read the SPD data and program the chipset to accurately configure
memory settings for optimum performance. If non-SPD memory is installed, the BIOS will
attempt to correctly configure the memory settings, but performance and reliability may be
impacted or the DIMMs may not function under the determined frequency.
Table 6 lists the supported DIMM configurations.
Table 6.
Supported Memory Configurations
DIMM
Capacity
SDRAM
Configuration Density
SDRAM Organization
Front-side/Back-side
Number of SDRAM
Devices
128 MB
256 MB
256 MB
512 MB
512 MB
512 MB
1024 MB
1024 MB
2048 MB
SS
SS
SS
DS
SS
SS
DS
SS
DS
256 Mbit
256 Mbit
512 Mbit
256 Mbit
512 Mbit
1 Gbit
16 M x 16/empty
32 M x 8/empty
4
8
32 M x 16/empty
32 M x 8/32 M x 8
64 M x 8/empty
4
16
8
64 M x 16/empty
64 M x 8/64 M x 8
128 M x 8/empty
128 M x 8/128 M x 8
4
512 Mbit
1 Gbit
16
8
1 Gbit
16
Note: In the second column, “DS” refers to double-sided memory modules (containing two rows of SDRAM) and “SS” refers
to single-sided memory modules (containing one row of SDRAM).
INTEGRATOR’S NOTE
#
Refer to Section 2.2.1, on page 55 for additional information on available memory.
20
Product Description
1.6.1 Memory Configurations
The Intel 82925X MCH supports two types of memory organization:
•
Dual channel (Interleaved) mode. This mode offers the highest throughput for real world
applications. Dual channel mode is enabled when the installed memory capacities of both
DIMM channels are equal. Technology and device width can vary from one channel to the
other but the installed memory capacity for each channel must be equal. If different speed
DIMMs are used between channels, the slowest memory timing will be used.
Single channel (Asymmetric) mode. This mode is equivalent to single channel bandwidth
operation for real world applications. This mode is used when only a single DIMM is installed
or the memory capacities are unequal. Technology and device width can vary from one
channel to the other. If different speed DIMMs are used between channels, the slowest
memory timing will be used.
•
Figure 4 illustrates the memory channel and DIMM configuration.
NOTE
✏
The DIMM0 sockets of both channels are blue. The DIMM1 sockets of both channels are black.
Channel A, DIMM 0
Channel A, DIMM 1
Channel B, DIMM 0
Channel B, DIMM 1
OM16677
Figure 4. Memory Channel and DIMM Configuration
21
Intel Desktop Board D925XCV/D925XBC Technical Product Specification
1.6.1.1 Dual Channel (Interleaved) Mode Configurations
Figure 5 shows a dual channel configuration using two DIMMs. In this example, the DIMM0
(blue) sockets of both channels are populated with identical DIMMs.
1 GB
1 GB
Channel A, DIMM 0
Channel A, DIMM 1
Channel B, DIMM 0
Channel B, DIMM 1
OM17123
Figure 5. Dual Channel (Interleaved) Mode Configuration with Two DIMMs
Figure 6 shows a dual channel configuration using three DIMMs. In this example, the combined
capacity of the two DIMMs in Channel A equal the capacity of the single DIMM in the DIMM0
(blue) socket of Channel B.
256 MB
256 MB
Channel A, DIMM 0
Channel A, DIMM 1
512 MB
Channel B, DIMM 0
Channel B, DIMM 1
OM17122
Figure 6. Dual Channel (Interleaved) Mode Configuration with Three DIMMs
22
Product Description
Figure 7 shows a dual channel configuration using four DIMMs. In this example, the combined
capacity of the two DIMMs in Channel A equal the combined capacity of the two DIMMs in
Channel B. Also, the DIMMs are matched between DIMM0 and DIMM1 of both channels.
256 MB
512 MB
Channel A, DIMM 0
Channel A, DIMM 1
256 MB
512 MB
Channel B, DIMM 0
Channel B, DIMM 1
OM17124
Figure 7. Dual Channel (Interleaved) Mode Configuration with Four DIMMs
23
Intel Desktop Board D925XCV/D925XBC Technical Product Specification
1.6.1.2 Single Channel (Asymmetric) Mode Configurations
NOTE
✏
Dual channel (Interleaved) mode configurations provide the highest memory throughput.
Figure 8 shows a single channel configuration using one DIMM. In this example, only the DIMM0
(blue) socket of Channel A is populated. Channel B is not populated.
256 MB
Channel A, DIMM 0
Channel A, DIMM 1
Channel B, DIMM 0
Channel B, DIMM 1
OM17125
Figure 8. Single Channel (Asymmetric) Mode Configuration with One DIMM
Figure 9 shows a single channel configuration using three DIMMs. In this example, the combined
capacity of the two DIMMs in Channel A does not equal the capacity of the single DIMM in the
DIMM0 (blue) socket of Channel B.
256 MB
512 MB
Channel A, DIMM 0
Channel A, DIMM 1
512 MB
Channel B, DIMM 0
Channel B, DIMM 1
OM17126
Figure 9. Single Channel (Asymmetric) Mode Configuration with Three DIMMs
24
Product Description
1.7 Intel® 925X Chipset
The Intel 925X chipset consists of the following devices:
•
•
•
Intel 82925X Memory Controller Hub (MCH) with Direct Media Interface (DMI) interconnect
Intel 82801FR I/O Controller Hub (ICH6-R) with DMI interconnect
Firmware Hub (FWH)
The MCH is a centralized controller for the system bus, the memory bus, the PCI Express bus, and
the DMI interconnect. The ICH6-R is a centralized controller for the board’s I/O paths. The FWH
provides the nonvolatile storage of the BIOS.
For information about
The Intel 925X chipset
Refer to
Chapter 2
Resources used by the chipset
1.7.1 USB
The boards support up to eight USB 2.0 ports, supports UHCI and EHCI, and uses UHCI- and
EHCI-compatible drivers.
The ICH6-R provides the USB controller for all ports. The port arrangement is as follows:
•
Four ports are implemented with dual stacked back panel connectors adjacent to the audio
connectors
•
Four ports are routed to two separate front panel USB connectors
NOTES
✏
• Computer systems that have an unshielded cable attached to a USB port may not meet FCC
Class B requirements, even if no device is attached to the cable. Use shielded cable that meets
the requirements for full-speed devices.
For information about
Refer to
The location of the USB connectors on the back panel
Figure 20, page 66
The location of the front panel USB connectors on the Desktop Board D925XCV Figure 21, page 68
The location of the front panel USB connectors on the Desktop Board D925XBC Figure 22, page 70
1.7.2 IDE Support
The board provides five IDE interface connectors:
•
•
One parallel ATA IDE connector, which supports two devices
Four serial ATA IDE connectors, which support one device per connector
1.7.2.1 Parallel ATE IDE Interface
The ICH6-R’s Parallel ATA IDE controller has one bus-mastering Parallel ATA IDE interface.
The Parallel ATA IDE interface supports the following modes:
•
•
Programmed I/O (PIO): processor controls data transfer.
8237-style DMA: DMA offloads the processor, supporting transfer rates of up to 16 MB/sec.
25
Intel Desktop Board D925XCV/D925XBC Technical Product Specification
•
•
•
Ultra DMA: DMA protocol on IDE bus supporting host and target throttling and transfer rates
of up to 33 MB/sec.
ATA-66: DMA protocol on IDE bus supporting host and target throttling and transfer rates of
up to 66 MB/sec. ATA-66 protocol is similar to Ultra DMA and is device driver compatible.
ATA-100: DMA protocol on IDE bus allows host and target throttling. The ICH6-R’s
ATA-100 logic can achieve read transfer rates up to 100 MB/sec and write transfer rates up to
88 MB/sec.
✏ NOTE
ATA-66 and ATA-100 are faster timings and require a specialized cable to reduce reflections,
noise, and inductive coupling.
The Parallel ATA IDE interface also supports ATAPI devices (such as CD-ROM drives) and ATA
devices using the transfer modes.
The BIOS supports Logical Block Addressing (LBA) and Extended Cylinder Head Sector (ECHS)
translation modes. The drive reports the transfer rate and translation mode to the BIOS.
The boards support Laser Servo (LS-120) diskette technology through the Parallel ATA IDE
interfaces. An LS-120 drive can be configured as a boot device by setting the BIOS Setup
program’s Boot menu to one of the following:
•
•
ARMD-FDD (ATAPI removable media device – floppy disk drive)
ARMD-HDD (ATAPI removable media device – hard disk drive)
For information about
Refer to
The location of the Parallel ATA IDE connector on the D925XCV board
The location of the Parallel ATA IDE connector on the D925XBC board
Figure 21, page 68
Figure 22, page 70
1.7.2.2 Serial ATA Interfaces
The ICH6-R’s Serial ATA controller offers four independent Serial ATA ports with a theoretical
maximum transfer rate of 150 MB/s per port. One device can be installed on each port for a
maximum of four Serial ATA devices. A point-to-point interface is used for host to device
connections, unlike Parallel ATA IDE which supports a master/slave configuration and two devices
per channel.
For compatibility, the underlying Serial ATA functionality is transparent to the operating system.
The Serial ATA controller can operate in both legacy and native modes. In legacy mode, standard
IDE I/O and IRQ resources are assigned (IRQ 14 and 15). In Native mode, standard PCI
Conventional bus resource steering is used. Native mode is the preferred mode for configurations
using the Windows XP and Windows 2000 operating systems.
NOTE
✏
Many Serial ATA drives use new low-voltage power connectors and require adaptors or power
supplies equipped with low-voltage power connectors.
For more information, see: http://www.serialata.org/
26
Product Description
For information about
Refer to
The location of the Serial ATA IDE connectors on the D925XCV board
The location of the Serial ATA IDE connectors on the D925XBC board
Figure 21, page 68
Figure 22, page 70
1.7.2.3 Serial ATA RAID
The ICH6-R supports RAID (Redundant Array of Independent Drives) level 0 and RAID level 1 on
the Serial ATA ports as follows:
•
RAID 0 supports data striping. Two physical drives, of identical size, can be teamed together
to create one logical drive. As data is written or retrieved from the logical drive, both drives
operate in parallel, thus increasing the throughput.
•
RAID 1 supports data mirroring. Two physical drives, of identical size, maintain duplicate sets
of all data on separate disk drives. Level 1 provides the highest data reliability because two
complete copies of all information are maintained.
1.7.2.4 RAID Boot Configuration Overview
A RAID array can be created by using the existing Serial ATA ports, correctly configuring the
BIOS, and installing drivers. The following steps are required to successfully establish a RAID
configuration.
1. Enable RAID Support in BIOS.
2. Create a RAID array using the Intel Application Accelerator (IAA) utility.
3. Install the IAA RAID driver.
4. Format the RAID array.
5. Install the IAA Companion Utility (this step is optional).
For information about
Refer to
Serial ATA RAID configuration
http://developer.intel.com/design/motherbd/cv/index.htm
1.7.2.5 SCSI Hard Drive Activity LED Connector (Optional)
The SCSI hard drive activity LED connector is a 1 x 2-pin connector that allows an add-in
hard drive controller to use the same LED as the onboard IDE controller. For proper operation, this
connector should be wired to the LED output of the add-in hard drive controller. The LED
indicates when data is being read from, or written to, either the add-in hard drive controller or the
onboard IDE controller (Parallel ATA or Serial ATA).
NOTE
✏
The SCSI Hard Drive Activity LED connector is an option available only on the D925XCV board.
It is not available on the D925XBC board.
For information about
Refer to
The location of the SCSI hard drive activity LED connector on the
D925XCV board
Figure 21, page 68
The signal names of the SCSI hard drive activity LED connector
Table 26, page 73
27
Intel Desktop Board D925XCV/D925XBC Technical Product Specification
1.7.3 Real-Time Clock, CMOS SRAM, and Battery
A coin-cell battery (CR2032) powers the real-time clock and CMOS memory. When the computer
is not plugged into a wall socket, the battery has an estimated life of three years. When the
computer is plugged in, the standby current from the power supply extends the life of the battery.
The clock is accurate to ± 13 minutes/year at 25 ºC with 3.3 VSB applied.
✏ NOTE
If the battery and AC power fail, custom defaults, if previously saved, will be loaded into CMOS
RAM at power-on.
1.8 PCI Express Connectors
The boards provide the following PCI Express connectors:
•
One PCI Express x16 connector. The x16 interface supports simultaneous (full duplex) transfer
speeds up to 8 GBytes/sec. Single-ended (half duplex) transfers are supported at up to
4 Gbytes/sec.
•
Four PCI Express x1 connectors on the D925XCV board; two PCI Express x1 connectors on
the D925XBC board. The x1 interfaces support simultaneous transfer speeds up to
500 MBytes/sec
The PCI Express interface supports the PCI Conventional bus configuration mechanism so that the
underlying PCI Express architecture is compatible with PCI Conventional compliant operating
systems. Additional features of the PCI Express interface includes the following:
•
•
•
•
•
•
Support for the PCI Express enhanced configuration mechanism
Automatic discovery, link training, and initialization
Support for Active State Power Management (ASPM)
SMBus 2.0 support
Wake# signal supporting wake events from ACPI S1, S3, S4, or S5
Software compatible with the PCI Power Management Event (PME) mechanism defined in the
PCI Power Management Specification Rev. 1.1
1.9 Auxiliary Power (AUX PWR) Output Connector
The D925XCV board includes a 1x4 power connector that can be used to provide power for
internal chassis lighting or additional fans. The use of this connector requires an ATX12V power
supply with a 24-pin (2x12) main power cable. If a power supply with a 20-pin (2x10) main power
cable is used, the auxiliary power output connector may not function.
The on/off function of this connector is controlled from within the BIOS Setup Program. The
default setting in the BIOS is for this connector to be off.
28
Product Description
INTEGRATOR’S NOTES
#
When using this connector, observe the following precautions:
•
Do not use a Y-adapter, power splitter, or SATA power adapter to attach storage devices (such
as hard disk drives or CD/DVD drives) to this connector. This connector will not provide
adequate power for storage devices.
•
Do not connect any devices to this connector that draw more than 1.5 A. The connector
circuitry includes overcurrent protection components that limit the current draw to a maximum
of 1.5 A.
For information about
Refer to
The location of the auxiliary power output connector
Figure 21, page 68
Table 28, page 73
The signal names of the auxiliary power output connector
NOTE
✏
The auxiliary power output connector is present only on the D925XCV board. It is not present on
the D925XBC board.
1.10 I/O Controller
The I/O controller provides the following features:
•
•
One serial port
One parallel port with Extended Capabilities Port (ECP) and Enhanced Parallel Port
(EPP) support
•
•
•
•
•
Serial IRQ interface compatible with serialized IRQ support for PCI Conventional bus systems
PS/2-style mouse and keyboard interfaces
Interface for one 1.44 MB or 2.88 MB diskette drive
Intelligent power management, including a programmable wake-up event interface
PCI Conventional bus power management support
The BIOS Setup program provides configuration options for the I/O controller.
1.10.1 Serial Port
The boards have one serial port connector located on the back panel. The serial port supports data
transfers at speeds up to 115.2 kbits/sec with BIOS support.
For information about
Refer to
The location of the serial port A connector
Figure 20, page 66
1.10.2 Parallel Port
The 25-pin D-Sub parallel port connector is located on the back panel. Use the BIOS Setup
program to set the parallel port mode.
29
Intel Desktop Board D925XCV/D925XBC Technical Product Specification
For information about
Refer to
The location of the parallel port connector
Figure 20, page 66
1.10.3 Diskette Drive Controller
The I/O controller supports one diskette drive. Use the BIOS Setup program to configure the
diskette drive interface.
For information about
Refer to
The location of the diskette drive connector on the D925XCV board
The location of the diskette drive connector on the D925XBC board
Figure 21, page 68
Figure 22, page 70
1.10.4 Keyboard and Mouse Interface
PS/2 keyboard and mouse connectors are located on the back panel.
NOTE
✏
The keyboard is supported in the bottom PS/2 connector and the mouse is supported in the top PS/2
connector. Power to the computer should be turned off before a keyboard or mouse is connected or
disconnected.
For information about
Refer to
The location of the keyboard and mouse connectors
Figure 20, page 66
30
Product Description
1.11 Audio Subsystem
The boards support the Intel High Definition audio subsystem based on the Realtek ALC880 or the
Realtek ALC860 audio codec. The audio subsystem supports the following features:
•
Advanced jack sense (front and rear panel) that enables the audio codec to recognize the device
that is connected to an audio port. All jacks are capable of retasking according to user’s
definition, or can be automatically switched depending on the recognized device type.
Stereo input and output for all jacks
Multi-streaming capabilities that enable different audio streams to be sent to different audio
devices. Multi-streaming also allows one audio stream to be directed out the back panel while
another audio stream can be directed out the front panel.
•
•
•
A signal-to-noise (S/N) ratio of 90 dB
INTEGRATOR’S NOTE
#
For the front panel jack sensing and automatic retasking feature to function, a front panel daughter
card that is designed for Intel High Definition Audio must be used. Otherwise, an AC ’97 style
audio front panel connector will be assumed and the Line Out and Mic In functions will be
permanent.
1.11.1 Audio Subsystem Software
Audio software and drivers are available from Intel’s World Wide Web site.
For information about
Refer to
Section 1.4, page 19
Obtaining audio software and drivers
1.11.2 Audio Connectors
The boards contain audio connectors on both the back panel and the component side of the board.
The component-side audio connectors include the following:
•
Front panel audio (a 2 x 5-pin connector that provides mic in and line out signals for front panel
audio connectors)
•
ATAPI CD-ROM (a 1 x 4-pin ATAPI-style connector for connecting an internal ATAPI
CD-ROM drive to the audio mixer)
The functions of the back panel audio connectors are dependent on which subsystem is present.
The 8-channel (7.1) audio subsystem is described in Section 1.11.3; the 6-channel (5.1) audio
subsystem is described in Section 1.11.4.
For information about
Refer to
The locations of the front panel audio connector and the ATAPI CD-ROM
connector on the Desktop Board D925XCV
Figure 21, page 68
The locations of the front panel audio connector and the ATAPI CD-ROM
connector on the Desktop Board D925XBC
Figure 22, page 70
The signal names of the front panel audio connector
The signal names of the ATAPI CD-ROM connector
The back panel audio connectors
Table 22, page 72
Table 21, page 72
Section 2.8.1, page 63
31
Intel Desktop Board D925XCV/D925XBC Technical Product Specification
1.11.3 8-Channel (7.1) Audio Subsystem
The 8-channel (7.1) audio subsystem includes the following:
•
•
•
Intel 82801FR I/O Controller Hub (ICH6-R)
Realtek ALC880 audio codec
Microphone input that supports a single dynamic, condenser, or electret microphone
The front and back panel audio connectors are configurable through the audio device drivers. The
available configurable audio ports are shown in Figure 10.
Front Panel
Audio Connectors
Mic In/
Retasking Jack A or E
[Port 1]
Line Out/
Retasking Jack F
[Port 2]
Back Panel
Audio Connectors
Surround Left and Right/
Retasking Jack H
[Black]
Line In/Retasking Jack C
[Blue]
Center channel and LFE (Subwoofer)/
Retasking Jack G
Line Out/Retasking Jack D
[Lime Green]
[Orange]
Mic In/Retasking Jack B
[Pink]
S/PDIF Digital Audio Out
Coaxial
S/PDIF Digital Audio Out
Optical
OM16993
Figure 10. Front/Back Panel Audio Connector Options for 8-Channel (7.1) Audio Subsystem
32
Product Description
Figure 11 is a block diagram of the 8-channel (7.1) audio subsystem.
Mic In/Retasking Jack B
Line In/Retasking Jack C
Line Out/Retasking Jack D
Front Panel Retasking Jack A/E [Port 1]
Front Panel Retasking Jack F [Port 2]
Center and LFE/Retasking Jack G
Surround Left-Right/Retasking Jack H
CD-ROM
82801FR
I/O Controller
Hub
Intel
High Definition
Audio Link
Realtek
ALC880
Audio Codec
(ICH6-R)
S/PDIF
OM16994
Figure 11. 8-channel (7.1) Audio Subsystem Block Diagram
For information about
The back panel audio connectors
Refer to
Section 2.8.1, page 63
33
Intel Desktop Board D925XCV/D925XBC Technical Product Specification
1.11.4 6-Channel (5.1) Audio Subsystem
The 6-channel (5.1) audio subsystem includes the following:
•
•
•
Intel 82801FB I/O Controller Hub (ICH6)
Realtek ALC860 audio codec
Microphone input that supports a single dynamic, condenser, or electret microphone
The front and back panel audio connectors are configurable through the audio device drivers. The
available configurable audio ports are shown in Figure 12.
Back Panel
Front Panel
Audio Connectors
Audio Connectors
Mic In/
Retasking Jack E
[Port 1]
Line Out/
Retasking Jack F
[Port 2]
Line In/
Retasking Jack C
Line Out/
Retasking Jack D
Mic In/
Retasking Jack B
OM16989
Figure 12. Front/Back Panel Audio Connector Options for 6-Channel (5.1) Audio Subsystem
Figure 13 is a block diagram of the 6-channel (5.1) audio subsystem.
Mic In/Retasking Jack B
Line In/Retasking Jack C
82801FR
Intel
ALC860
Audio Codec
Line Out/Retasking Jack D
I/O Controller
Hub
High Definition
Audio Link
Front Panel Mic In/Retasking Jack E [Port 1]
Front Panel Line Out/Retasking Jack F [Port 2]
(ICH6-R)
CD-ROM (optional)
OM17128
Figure 13. 6-Channel (5.1) Audio Subsystem Block Diagram
For information about
The back panel audio connectors
Refer to
Section 2.8.1, page 63
34
Product Description
1.12 LAN Subsystem
The LAN subsystem includes the Marvell Yukon 88E50 Gigabit (10/100/1000 Mbits/sec) Ethernet
Controller and an RJ-45 LAN connector with integrated status LEDs.
1.12.1 Marvell Yukon 88E8050 PCI Express 1.0a Integrated MAC/PHY
Gigabit Ethernet Controller
The Marvell Yukon 88E8050 provides the following functions:
•
•
•
•
•
•
•
•
•
•
•
•
•
x1 PCI Express link
Basic 10/100/1000 Ethernet LAN connectivity
IEEE 802.1p and 802.1q support
10/100/1000 IEEE 802.3 compliant
Compliant to 802.3x flow control support
Jumbo frame support
TCP, IP, UDP checksum offload
Automatic MDI/MDIX crossover
Full device driver compatibility
Configuration EEPROMs that contain the MAC address and ASF 2.0 support
Wake On LAN technology power management support
PCI Express Active State Power Management Support (L0s)
ASF 2.0 support
1.12.2 RJ-45 LAN Connector with Integrated LEDs
Two LEDs are built into the RJ-45 LAN connector (as shown in Figure 14). Table 7 describes the
LED states when the board is powered up and the Gigabit LAN subsystem is operating.
Green LED
Green/Yellow LED
OM16513
Figure 14. LAN Connector LED Locations
Table 7.
LED
LAN Connector LED States
Color
LED State
Off
Condition
LAN link is not established.
LAN link is established.
LAN activity is occurring.
Left
Green
On
Blinking
N/A
Off
On
On
10 Mbits/sec data rate is selected.
100 Mbits/sec data rate is selected.
1000 Mbits/sec data rate is selected.
Right
Green
Yellow
35
Intel Desktop Board D925XCV/D925XBC Technical Product Specification
1.12.3 Alert Standard Format (ASF) Support
The boards provide the following ASF support for the onboard 10/100/1000 LAN subsystem, PCI
Express x1 bus add-in LAN cards, and PCI Conventional bus add-in LAN cards installed in PCI
Conventional bus slot 2:
•
Monitoring of system firmware progress events, including:
BIOS present
Primary processor initialization
Memory initialization
Video initialization
PCI resource configuration
Hard-disk initialization
User authentication
Starting operating system boot process
•
Monitoring of system firmware error events, including:
Memory missing
Memory failure
No video device
Keyboard failure
Hard-disk failure
No boot media
•
•
Boot options to boot from different types of boot devices
Reset, shutdown, power cycle, and power up options
1.12.4 LAN Subsystem Software
LAN software and drivers are available from Intel’s World Wide Web site.
For information about
Refer to
Obtaining LAN software and drivers
Section 1.4, page 19
36
Product Description
1.13 Hardware Management Subsystem
The hardware management features enable the Desktop Boards to be compatible with the Wired for
Management (WfM) specification. The Desktop Board has several hardware management features,
including the following:
•
•
•
Fan monitoring and control (through the hardware monitoring and fan control ASIC)
Thermal and voltage monitoring
Chassis intrusion detection
1.13.1 Hardware Monitoring and Fan Control ASIC
The features of the hardware monitoring and fan control ASIC include:
•
•
Internal ambient temperature sensor
Two remote thermal diode sensors for direct monitoring of processor temperature and ambient
temperature sensing
•
•
•
Power supply monitoring of five voltages (+5 V, +12 V, +3.3 VSB, +1.5 V, and +VCCP) to
detect levels above or below acceptable values
Thermally monitored closed-loop fan control, for all three fans, that can adjust the fan speed or
switch the fans on or off as needed
SMBus interface
For information about
Refer to
The location of the fan connectors and sensors for thermal monitoring for
the D925XCV board
Figure 15, page 38
The location of the fan connectors and sensors for thermal monitoring for
the D925XBC board
Figure 16, page 39
37
Intel Desktop Board D925XCV/D925XBC Technical Product Specification
1.13.2 Thermal Monitoring
Figure 15 shows the location of the sensors and fan connectors on the D925XCV board.
4
G
1
A
B
3
1
C
D
4
1
1
3
F
E
OM16679
Item Description
A
B
C
D
E
F
Remote ambient temperature sensor
Thermal diode, located on processor die
Ambient temperature sensor, internal to hardware monitoring and fan control ASIC
Processor fan connector
Rear chassis fan connector
Front chassis fan connector
G
Auxiliary rear fan connector
Figure 15. Thermal Monitoring for D925XCV Board
38
Product Description
Figure 16 shows the location of the sensors and fan connectors on the D925XBC board.
A
B
3
1
C
D
4
1
1
3
F
E
OM16689
Item Description
A
B
C
D
E
F
Remote ambient temperature sensor
Thermal diode, located on processor die
Ambient temperature sensor, internal to hardware monitoring and fan control ASIC
Processor fan
Rear chassis fan
Front chassis fan
Figure 16. Thermal Monitoring for D925XBC Board
39
Intel Desktop Board D925XCV/D925XBC Technical Product Specification
1.13.3 Fan Monitoring
Fan monitoring can be implemented using Intel Desktop Utilities, LANDesk* software, or third-
party software. The level of monitoring and control is dependent on the hardware monitoring ASIC
used with the Desktop Board.
For information about
Refer to
The functions of the fan connectors
Section 1.14.2.2, page 44
1.13.4 Chassis Intrusion and Detection
The Desktop Boards D925XCV and D925XBC support a chassis security feature that detects if the
chassis cover is removed. The security feature uses a mechanical switch on the chassis that attaches
to the chassis intrusion connector. When the chassis cover is removed, the mechanical switch is in
the closed position.
1.14 Power Management
Power management is implemented at several levels, including:
•
•
Software support through Advanced Configuration and Power Interface (ACPI)
Hardware support:
Power connector
Fan connectors
LAN wake capabilities
Instantly Available PC technology
Resume on Ring
Wake from USB
Wake from PS/2 devices
Power Management Event signal (PME#) wake-up support
PCI Express WAKE# signal support
1.14.1 ACPI
ACPI gives the operating system direct control over the power management and Plug and Play
functions of a computer. The use of ACPI with the Desktop Boards D925XCV and D925XBC
requires an operating system that provides full ACPI support. ACPI features include:
•
•
Plug and Play (including bus and device enumeration)
Power management control of individual devices, add-in boards (some add-in boards may
require an ACPI-aware driver), video displays, and hard disk drives
Methods for achieving less than 15-watt system operation in the power-on/standby
sleeping state
•
•
•
•
A Soft-off feature that enables the operating system to power-off the computer
Support for multiple wake-up events (see Table 10 on page 43)
Support for a front panel power and sleep mode switch
Table 8 lists the system states based on how long the power switch is pressed, depending on how
ACPI is configured with an ACPI-aware operating system.
40
Product Description
Table 8.
Effects of Pressing the Power Switch
…and the power switch is
If the system is in this state…
pressed for
…the system enters this state
Off
Less than four seconds
Power-on
(ACPI G2/G5 – Soft off)
(ACPI G0 – working state)
On
Less than four seconds
More than four seconds
Less than four seconds
More than four seconds
Soft-off/Standby
(ACPI G1 – sleeping state)
(ACPI G0 – working state)
On
Fail safe power-off
(ACPI G2/G5 – Soft off)
(ACPI G0 – working state)
Sleep
Wake-up
(ACPI G0 – working state)
(ACPI G1 – sleeping state)
Sleep
Power-off
(ACPI G1 – sleeping state)
(ACPI G2/G5 – Soft off)
1.14.1.1 System States and Power States
Under ACPI, the operating system directs all system and device power state transitions. The
operating system puts devices in and out of low-power states based on user preferences and
knowledge of how devices are being used by applications. Devices that are not being used can be
turned off. The operating system uses information from applications and user settings to put the
system as a whole into a low-power state.
41
Intel Desktop Board D925XCV/D925XBC Technical Product Specification
Table 9 lists the power states supported by the Desktop Boards D925XCV and D925XBC along
with the associated system power targets. See the ACPI specification for a complete description of
the various system and power states.
Table 9.
Power States and Targeted System Power
Processor
Targeted System
Power (Note 1)
Global States
Sleeping States
States
Device States
G0 – working
state
S0 – working
C0 – working
D0 – working
state.
Full power > 30 W
G1 – sleeping
state
S1 – Processor
stopped
C1 – stop
grant
D1, D2, D3 –
device
5 W < power < 52.5 W
specification
specific.
(Note 2)
G1 – sleeping
state
S3 – Suspend to
RAM. Context
saved to RAM.
No power
No power
No power
D3 – no power
except for
wake-up logic.
Power < 5 W
(Note 2)
G1 – sleeping
state
S4 – Suspend to
disk. Context
saved to disk.
D3 – no power
except for
wake-up logic.
Power < 5 W
(Note 2)
G2/S5
S5 – Soft off.
Context not saved.
Cold boot is
D3 – no power
except for
wake-up logic.
Power < 5 W
required.
G3 –
mechanical off
No power to the
system.
No power
D3 – no power for
wake-up logic,
except when
provided by
battery or external
source.
No power to the system.
Service can be performed
safely.
AC power is
disconnected
from the
computer.
Notes:
1. Total system power is dependent on the system configuration, including add-in boards and peripherals powered
by the system chassis’ power supply.
2. Dependent on the standby power consumption of wake-up devices used in the system.
42
Product Description
1.14.1.2 Wake-up Devices and Events
Table 10 lists the devices or specific events that can wake the computer from specific states.
Table 10. Wake-up Devices and Events
These devices/events can wake up the computer…
…from this state
S1, S3, S4, S5 (Note)
S1, S3
LAN
Modem (back panel Serial Port A)
PME# signal
Power switch
PS/2 devices
RTC alarm
S1, S3, S4, S5 (Note)
S1, S3, S4, S5
S1, S3
S1, S3, S4, S5
S1, S3
USB
WAKE#
S1, S3, S4, S5
Note:
For LAN and PME# signal, S5 is disabled by default in the BIOS Setup program. Setting this option to Power On
will enable a wake-up event from LAN in the S5 state.
NOTE
✏
The use of these wake-up events from an ACPI state requires an operating system that provides full
ACPI support. In addition, software, drivers, and peripherals must fully support ACPI wake
events.
1.14.2 Hardware Support
CAUTION
Ensure that the power supply provides adequate +5 V standby current if LAN wake capabilities and
Instantly Available PC technology features are used. Failure to do so can damage the power
supply. The total amount of standby current required depends on the wake devices supported and
manufacturing options.
The Desktop Boards D925XCV and D925XBC provide several power management hardware
features, including:
•
•
•
•
•
•
•
•
•
Power connector
Fan connectors
LAN wake capabilities
Instantly Available PC technology
Resume on Ring
Wake from USB
Wake from PS/2 keyboard
PME# signal wake-up support
WAKE# signal wake-up support
LAN wake capabilities and Instantly Available PC technology require power from the +5 V
standby line.
43
Intel Desktop Board D925XCV/D925XBC Technical Product Specification
Resume on Ring enables telephony devices to access the computer when it is in a power-managed
state. The method used depends on the type of telephony device (external or internal).
NOTE
✏
The use of Resume on Ring and Wake from USB technologies from an ACPI state requires an
operating system that provides full ACPI support.
1.14.2.1 Power Connector
ATX12V-compliant power supplies can turn off the system power through system control. When
an ACPI-enabled system receives the correct command, the power supply removes all non-standby
voltages.
When resuming from an AC power failure, the computer returns to the power state it was in before
power was interrupted (on or off). The computer’s response can be set using the Last Power State
feature in the BIOS Setup program’s Boot menu.
For information about
Refer to
The location of the power connector
The signal names of the power connector
Figure 21, page 68
Table 29, page 75
1.14.2.2 Fan Connectors
The function/operation of the fan connectors is as follows:
•
•
•
The fans are on when the board is in the S0 or S1 state.
The fans are off when the board is off or in the S3, S4, or S5 state.
Each fan connector is wired to a fan tachometer input of the hardware monitoring and fan
control ASIC
•
•
All fan connectors support closed-loop fan control that can adjust the fan speed or switch the
fan on or off as needed.
All fan connectors have a +12 V DC connection
For information about
Refer to
The location of the fan connectors
Figure 21, page 68
Figure 15, page 38
Section 2.8.1.1, page 64
The location of the fan connectors and sensors for thermal monitoring
The signal names of the fan connectors
1.14.2.3 LAN Wake Capabilities
CAUTION
For LAN wake capabilities, the +5 V standby line for the power supply must be capable of
providing adequate +5 V standby current. Failure to provide adequate standby current when
implementing LAN wake capabilities can damage the power supply.
LAN wake capabilities enable remote wake-up of the computer through a network. The LAN
network adapter monitors network traffic at the Media Independent Interface. Upon detecting a
Magic Packet* frame, the LAN subsystem asserts a wake-up signal that powers up the computer.
44
Product Description
Depending on the LAN implementation, the Desktop Boards D925XCV and D925XBC support
LAN wake capabilities with ACPI in the following ways:
•
•
•
The PCI Express WAKE# signal
The PCI Conventional bus PME# signal for PCI 2.2 compliant LAN designs
The onboard LAN subsystem
1.14.2.4 Instantly Available PC Technology
CAUTION
For Instantly Available PC technology, the +5 V standby line for the power supply must be capable
of providing adequate +5 V standby current. Failure to provide adequate standby current when
implementing Instantly Available PC technology can damage the power supply.
Instantly Available PC technology enables the Desktop Boards D925XCV and D925XBC to enter
the ACPI S3 (Suspend-to-RAM) sleep-state. While in the S3 sleep-state, the computer will appear
to be off (the power supply is off, and the front panel LED is amber if dual colored, or off if single
colored.) When signaled by a wake-up device or event, the system quickly returns to its last known
wake state. Table 10 on page 43 lists the devices and events that can wake the computer from the
S3 state.
The Desktop Boards D925XCV and D925XBC support the PCI Bus Power Management Interface
Specification. Add-in boards that also support this specification can participate in power
management and can be used to wake the computer.
The use of Instantly Available PC technology requires operating system support and PCI 2.2
compliant add-in cards, PCI Express add-in cards, and drivers.
1.14.2.5 Resume on Ring
The operation of Resume on Ring can be summarized as follows:
•
•
•
Resumes operation from ACPI S1 or S3 states
Detects incoming call similarly for external and internal modems
Requires modem interrupt be unmasked for correct operation
1.14.2.6 Wake from USB
USB bus activity wakes the computer from ACPI S1 or S3 states.
NOTE
✏
Wake from USB requires the use of a USB peripheral that supports Wake from USB.
1.14.2.7 Wake from PS/2 Devices
PS/2 device activity wakes the computer from an ACPI S1 or S3 state.
1.14.2.8 PME# Signal Wake-up Support
When the PME# signal on the PCI Conventional bus is asserted, the computer wakes from an ACPI
S1, S3, S4, or S5 state (with Wake on PME enabled in BIOS).
45
Intel Desktop Board D925XCV/D925XBC Technical Product Specification
1.14.2.9 WAKE# Signal Wake-up Support
When the WAKE# signal on the PCI Express bus is asserted, the computer wakes from an ACPI
S1, S3, S4, or S5 state.
1.14.2.10 +5 V Standby Power Indicator LED
The +5 V standby power indicator LED shows that power is still present even when the computer
appears to be off. Figure 17 shows the location of the standby power indicator LED on the
D925XCV board.
CAUTION
If AC power has been switched off and the standby power indicator is still lit, disconnect the power
cord before installing or removing any devices connected to the board. Failure to do so could
damage the board and any attached devices.
CR3J1
OM16678
Figure 17. Location of the Standby Power Indicator LED on the D925XCV Board
46
Product Description
1.15 Trusted Platform Module (Optional)
The optional Trusted Platform Module (TPM) is a component on the desktop board that is
specifically designed to enhance platform security above-and-beyond the capabilities of today’s
software by providing a protected space for key operations and other security critical tasks. Using
both hardware and software, the TPM protects encryption and signature keys at their most
vulnerable stages—operations when the keys are being used unencrypted in plain-text form. The
TPM is specifically designed to shield unencrypted keys and platform authentication information
from software-based attacks.
1.15.1 System Requirements
•
•
•
•
•
Intel Desktop Board D925XCV or D925XBC
Microsoft Windows* 2000 Professional (SP4) or Microsoft Windows XP Professional (SP1)
NTFS file system required
Microsoft Internet Explorer* 5.5 or later
Adobe* Acrobat* 5.0 or later
1.15.2 Warning of Potential Data Loss
CAUTION
Failure to follow the instructions below may cause you to lose data. Read and follow these
instructions prior to Trusted Platform Module initialization.
System integrators, owners, and end users must take precautions to mitigate the chance of data loss.
Data encrypted by any program utilizing the Trusted Platform Module (TPM) may become
inaccessible or unrecoverable if any of the following occurs:
•
Lost Password: Loss of any of the passwords associated with the TPM will render encrypted
data inaccessible. No password recovery is available. Read the Security Precautions for
Password Procedures.
•
Hard Drive Failure: In the event of a failure of a hard disk (or other storage media) that
contains encrypted data, an image of the hard disk (or other storage media) must be restored
from backup before access to encrypted data may become available. The owner/user should
backup the system hard disk on a regular basis. Read the Security Precautions below for
Hard Drive Backup Procedures.
•
•
Platform Failure: In the event of a platform failure and/or replacement of the motherboard,
recovery procedures may allow migratable keys to be recovered and may restore access to
encrypted data. All non-migratable keys and their associated data will be lost. Both the
Infineon* Security Platform software and Wave Systems* EMBASSY* Trust Suite utilize
migratable keys. Please check any other software that accesses the TPM for migratability.
Read the Security Precautions for Emergency Recovery File Back Up Procedures.
Loss of Trusted Platform Module Ownership: Trusted Platform Module Ownership/contents
may be cleared (via a BIOS switch) to allow for the transfer of a system to a new owner. If
TPM ownership is cleared, either intentionally or in error, recovery procedures may allow the
migratable keys to be recovered and may restore access to encrypted data. Read the Security
Precautions for Emergency Recovery File Back Up Procedures.
47
Intel Desktop Board D925XCV/D925XBC Technical Product Specification
1.15.3 Security Precautions
Security, like any other aspect of computer maintenance requires planning. What is unique about
security has to do with understanding who "friends" and adversaries are. The TPM provides
mechanisms to enable the owner/user to protect their information from adversaries. To provide this
protection the TPM effectively puts "locks" around the data. Just like physical locks, if keys or
combinations are lost, the assets (i.e., data) may be inaccessible not only to adversaries, but also to
asset owner/user.
The TPM provides two classes of keys: migratable and non-migratable. Migratable keys are
designed to protect data that can be used (i.e., unencrypted) on more than one platform. This has
the advantage of allowing the key data to be replicated (backed-up and restored) to another
platform. This may be because of user convenience (someone uses more than one platform, or the
data needs to be available to more than one person operating on different platforms). This type of
key also has the advantage in that it can be backed-up and restored from a defective platform onto a
new platform. However, migratable keys may not be the appropriate level of protection (e.g., the
user wants the data restricted to a single platform) needed for the application. This requires a non-
migratable key. Non-migratable keys carry with them a usage deficit in that while the key may be
backed-up and restored (i.e., protected from hard disk failure) they are not protected against system
or TPM failure. The very nature of a non-migratable key is that they can be used on one and only
one TPM. In the event of a system or TPM failure, all non-migratable keys and the data associated
with them will be inaccessible and unrecoverable.
CAUTION
The following precautions and procedures may assist in recovering from any of the previously
listed situations. Failure to implement these security precautions and procedures may result in
unrecoverable data loss.
1.15.3.1 Password Procedures
The Infineon Security Platform software allows users to configure passwords from 6 to 255
characters. A good password should consist of:
•
•
•
At least one upper case letter (A to Z)
At least one numerical character (0 to 9)
At least one symbol character (!, @, &, etc.)
Example Passwords: “I wear a Brown hat 2 worK @ least once-a-month” or
“uJGFak&%)adf35a9m”
NOTE
✏
Avoid using names or dates that can be easily guessed such as: birthdays, anniversaries, family
member names, pet names, etc.
All passwords associated with the Infineon Security Platform software (Owner, Emergency
Recovery Token, and User passwords) and the Wave Systems EMBASSY Trust Suite are NOT
RECOVERABLE and cannot be reset without the original text. The system owner should document
all passwords, store them in a secured location (vault, safe deposit box, off-site storage, etc.), and
have them available for future use. These documents should be updated after any password changes.
48
Product Description
1.15.3.2 Emergency Recovery File Back Up Procedures
The Emergency Recovery Token (SPEmRecToken.xml) must be saved or moved to a removable
media (floppy, USB drive, CDR, flash media, etc). Once this is done, the removable media should
be stored in a secure location. DO NOT LEAVE ANY COPIES of the Emergency Recovery Token
on the hard drive or within any hard drive image backups. If a copy of the Emergency Recovery
Token remains on the system, it could be used to compromise the Trusted Platform Module and
platform.
After completing the Infineon Security Platform User Initialization Wizard, a copy of the
Emergency Recovery Archive (SPEmRecArchive.xml) should be copied to a removable media
and stored in a secure location. This procedure should be repeated after any password changes or
the addition of a new user.
1.15.3.3 Hard Drive Image Backup Procedures
To allow for emergency recovery from a hard drive failure, frequent images of the hard drive
should be created and stored in a secure location. In the event of a hard drive failure, the latest
image can be restored to a new hard drive and access to the encrypted data may be re-established.
NOTE
✏
All encrypted and unencrypted data that was added after the last image was created will be lost.
1.15.3.4 Clear Text Backup (Optional)
It is recommended that system owners follow the Hard Drive Image Backup Procedures. To
backup select files without creating a drive image, files can be moved from secured programs or
drive letters to an unencrypted directory. The unencrypted (clear text) files may then be backed up
to a removable media and stored in a secure location. The advantage of the clear text backup is that
no TPM key is required to restore the data. This option is not recommended because the data is
exposed during backup and restore.
1.15.4 Trusted Platform Module Ownership
The Trusted Platform Module is disabled by default when shipped and the owner/end customer of
the system assumes “ownership” of the TPM. This permits the owner of the system to control
initialization of the TPM and create all the passwords associated with the TPM that is used to
protect their keys and data.
System builders/integrators may install both the Infineon Security Platform software and the Wave
System EMBASSY Trust Suite, but SHOULD NOT attempt to use or activate the TPM or either
software package.
49
Intel Desktop Board D925XCV/D925XBC Technical Product Specification
1.15.5 Enabling the Trusted Platform Module
The Trusted Platform Module is disabled by default when shipped to insure that the owner/end
customer of the system initializes the TPM and configures all security passwords. The owner/end
customer should use the following steps to enable the TPM.
1. While the PC is displaying the splash screen (or POST screen), press the <F2> key to enter
BIOS.
2. Use the arrow keys to go to the Advanced Menu, select Peripheral Configuration, and then
press the <Enter> key.
3. Select the Trusted Platform Module, press <Enter>, and select Enabled and press <Enter> again
(display should show: Trusted Platform Module [Enabled]).
4. Press the <F10> key, select Ok and press <Enter>.
5. System should reboot and start Microsoft Windows.
1.15.6 Assuming Trusted Platform Module Ownership
Once the TPM has been enabled, ownership must be assumed by using the Infineon Security
Platform Software. The owner/end user should follow the steps listed below to take ownership of
the TPM:
1. Start the system.
2. Launch the Infineon Security Platform Initialization Wizard.
3. Create Owner password (before creating any password, review the Password Recommendations
made earlier in this document).
4. Create a new Recovery Archive (note the file name and location).
5. Specify a Security Platform Emergency Recovery Token password and location. (this password
should not match the Owner password or any other password).
6. Define where to save the Emergency Recovery Token (note the file location and name).
7. The software will then create recovery archive files and finalize ownership of the TPM.
8. After completing the Infineon Security Platform Initialization Wizard, the Emergency
Recovery Token (SPEmRecToken.xml) must be moved to a removable media (floppy, CDR,
flash media, etc) if the file was not saved to a removable media during installation. Once this is
done, the removable media should be stored in a secure location. No copies of this Emergency
Recovery Token file should remain on the system. If a copy remains on the system, it could be
used to compromise the security of the platform.
9. Launch the Infineon Security Platform User Initialization Wizard.
10. Create a Basic User password (this password is the most frequently used and should not match
any other password).
11. Select and configure Security Platform features for this user.
12. After completing the Infineon Security Platform User Initialization Wizard, a copy of the
Emergency Recovery Archive (SPEmRecArchive.xml) should be copied to a removable
media and stored in a secure location. This procedure should be repeated after any password
changes or the addition of new users.
13. Restart the system.
14. To backup the keys for the EMBASSY Trust Suite, the Key Transfer Manager software must
be configured. Launch the Key Transfer Manager from the program menu.
50
Product Description
15. Follow the instructions and create and document the locations for both the archive and
restoration key files. The key archive should be located on a removable media and stored in a
secure location when not in use.
16. Create and document the password to protect the key archive.
17. Provide the TPM Owner password to allow the Key Transfer Manager to create the archive and
restoration key files.
18. Upon completing the configuration of the Key Transfer Manager, it will place an icon in the
task bar and automatically back up all new and updated keys associated with the EMBASSY
Trust Suite. If the removable media that contains the archive file is not present when a new key
is generated, then keys will have to be manually backed up using the Key Transfer Manager
when the removable media is available.
19. All passwords associated with the Infineon Security Platform Software (Owner, Emergency
Recovery Token, and User passwords) and Wave Systems EMBASSY Trust Suite and Key
Transfer Manager are not recoverable and cannot be reset without the original text. These
passwords should be documented and stored in a secured location (vault, safe deposit box, off-
site storage, etc.) in case they are needed in the future. These documents and files should be
updated after any password changes.
1.15.7 Recovery Procedures
1.15.7.1 Recovering from Hard Disk Failure
Restore the latest hard drive image from backup to the new hard drive – no TPM specific recovery
is necessary.
1.15.7.2 Recovering from Desktop Board or TPM Failure
This procedure may restore the migratable keys from the Emergency Recovery Archive, and does
not restore any previous keys or content to the TPM. This recovery procedure may restore access
to the Infineon Security Platform software and Wave Systems EMBASSY Trust Suite that are
secured with migratable keys.
Requirements:
•
•
•
Emergency Recovery Archive (created with the Infineon Security Platform Initiation Wizard)
Emergency Recovery Token (created with the Infineon Security Platform Initiation Wizard)
Emergency Recovery Token Security Password (created with the Infineon Security Platform
Initiation Wizard)
•
•
•
Working original operating system (OS) installation, or a restored image of the hard drive
Wave Systems Key Transfer Manager archive password
TPM Ownership password
This recovery procedure only restores the migratable keys from the previously created Recovery
Archives.
1. Replace the desktop board with the same model as the failed board.
2. Start the original operating system or restore the original hard drive image.
3. Start the Infineon Security Platform Initialization Wizard and check the “I want to restore the
existing Security Platform” box.
51
Intel Desktop Board D925XCV/D925XBC Technical Product Specification
4. Follow the instructions during the Security Platform Initialization, and append the Emergency
Recovery Archive to the existing archive.
5. Provide all the necessary passwords, files, and file locations as requested. It may take up to 20
minutes for Security Platform Initialization Wizard to restore the security platform settings.
6. Start User Initialization Wizard. Select “Recover Your Basic User Key” when prompted.
Specify the original Basic User Key password and proceed with the wizard.
7. When re-configuring the Personal Secure Drive, select “I want to change my Personal Secure
Drive setting”, confirm the drive letter and name are correct, and then proceed through the rest
of the wizard.
8. Restart the system when requested.
9. To restore access to the EMBASSY Trust Suite, right mouse click on the Key Transfer
Manager icon located in the taskbar in the lower right corner of the screen, and select Restore
TPM Keys.
10. Provide all the necessary passwords, files, and file locations as requested by the Key Transfer
Manager.
11. Upon successful completion of all steps, you should be able to access previously encrypted
files.
1.15.8 Clearing Trusted Platform Module Ownership
WARNING
Disconnect the desktop board's power supply from its AC power source before you connect or
disconnect cables, or install or remove any board components. Failure to do this can result in
personal injury or equipment damage. Some circuitry on the desktop board can continue to
operate even though the front panel power switch is off.
CAUTION
DATA ENCRYPTED BY ANY PROGRAM UTILIZING THE TPM WILL BECOME
INACCESSIBLE IF TPM OWNERSHIP IS CLEARED. Recovery procedures may allow the
migratable keys to be recovered and might restore access to encrypted data. (Review the Recovery
Procedures for detailed instructions).
The TPM may be cleared to transfer ownership of the platform to a new owner.
1. Observe precautions in the above WARNING then open the system case.
2. Move the configuration jumper on the board to pins 2-3.
3. Restore power to the PC and power on.
4. System should automatically enter BIOS setup.
5. Use the arrow keys to select Clear Trusted Platform Module, press <Enter>.
6. If you agree to the warning message select Ok and press <Enter>.
7. Press the <F10> key to save and exit, select Ok and press <Enter>.
8. Power off the system.
9. Review precautions in the WARNING above.
10. Restore the configuration jumper on the board to pins 1-2.
When cleared, the TPM module is disabled by default.
52
Product Description
1.15.9 Software Support
•
•
•
For assistance with the Infineon Security Platform Software, visit the web at:
For assistance with the Wave System EMBASSY Trust Suite, visit the web at:
For additional information about TPM and enhancing PC security, visit:
https://www.trustedcomputinggroup.org/home
53
Intel Desktop Board D925XCV/D925XBC Technical Product Specification
54
2 Technical Reference
What This Chapter Contains
2.1 Introduction ..................................................................................................................55
2.2 Memory Resources......................................................................................................55
2.3 DMA Channels.............................................................................................................57
2.4 Fixed I/O Map...............................................................................................................58
2.5 PCI Configuration Space Map......................................................................................59
2.6 Interrupts......................................................................................................................60
2.7 PCI Conventional Interrupt Routing Map .....................................................................61
2.8 Connectors...................................................................................................................63
2.9 Jumper Block ...............................................................................................................80
2.10 Mechanical Considerations..........................................................................................81
2.11 Electrical Considerations..............................................................................................85
2.12 Thermal Considerations...............................................................................................87
2.13 Reliability......................................................................................................................89
2.14 Environmental ..............................................................................................................90
2.1 Introduction
Sections 2.2 - 2.6 contain several standalone tables. Table 11 describes the system memory map,
Table 12 lists the DMA channels, Table 13 shows the I/O map, Table 14 defines the PCI
Conventional bus configuration space map, and Table 15 describes the interrupts. The remaining
sections in this chapter are introduced by text found with their respective section headings.
2.2 Memory Resources
2.2.1 Addressable Memory
The board utilizes 4 GB of addressable system memory. Typically the address space that is
allocated for PCI Conventional bus add-in cards, PCI Express configuration space, BIOS (firmware
hub), and chipset overhead resides above the top of DRAM (total system memory). On a system
that has 4 GB of system memory installed, it is not possible to use all of the installed memory due
to system address space being allocated for other system critical functions. These functions include
the following:
•
•
•
•
•
•
BIOS/firmware hub (2 MB)
Local APIC (19 MB)
Digital Media Interface (40 MB)
Front side bus interrupts (17 MB)
PCI Express configuration space (256 MB)
MCH base address registers, internal graphics ranges, PCI Express ports (up to 512 MB)
55
Intel Desktop Board D925XCV/D925XBC Technical Product Specification
•
Memory-mapped I/O that is dynamically allocated for PCI Conventional and PCI Express add-
in cards
The amount of installed memory that can be used will vary based on add-in cards and BIOS
settings. Figure 18 shows a schematic of the system memory map. All installed system memory
can be used when there is no overlap of system addresses.
4 GB
Top of System Address Space
FLASH
APIC
~20 MB
Reserved
PCI Memory Range -
contains PCI, chipsets,
Direct Media Interface
(DMI), and ICH ranges
(approximately 750 MB)
1 MB
0FFFFFH
Upper BIOS
area (64 KB)
0F0000H
0EFFFFH
960 KB
Lower BIOS
area
(64 KB;
Top of usable
DRAM (memory
visible to the
operating
16 KB x 4)
0E0000H
0DFFFFH
896 KB
768 KB
640 KB
system)
Add-in Card
BIOS and
Buffer area
(128 KB;
16 KB x 8)
0C0000H
0BFFFFH
DRAM
Range
Standard PCI/
ISA Video
Memory (SMM
Memory)
1 MB
640 KB
128 KB
0A0000H
09FFFFH
DOS
Compatibility
Memory
DOS area
(640 KB)
00000H
0 MB
0 KB
OM17140
Figure 18. Detailed System Memory Address Map
56
Technical Reference
2.2.2 Memory Map
Table 11 lists the system memory map.
Table 11. System Memory Map
Address Range (decimal) Address Range (hex)
Size
Description
1024 K - 4194304 K
960 K - 1024 K
896 K - 960 K
100000 - FFFFFFFF
F0000 - FFFFF
E0000 - EFFFF
C8000 - DFFFF
4095 MB
64 KB
64 KB
96 KB
Extended memory
Runtime BIOS
Reserved
800 K - 896 K
Potential available high DOS
memory (open to the PCI
Conventional bus). Dependent on
video adapter used.
640 K - 800 K
639 K - 640 K
A0000 - C7FFF
9FC00 - 9FFFF
160 KB
1 KB
Video memory and BIOS
Extended BIOS data (movable by
memory manager software)
512 K - 639 K
0 K - 512 K
80000 - 9FBFF
00000 - 7FFFF
127 KB
512 KB
Extended conventional memory
Conventional memory
2.3 DMA Channels
Table 12. DMA Channels
DMA Channel Number
Data Width
8 or 16 bits
8 or 16 bits
8 or 16 bits
8 or 16 bits
8 or 16 bits
16 bits
System Resource
Open
0
1
2
3
4
5
6
7
Parallel port
Diskette drive
Parallel port (for ECP or EPP)
DMA controller
Open
16 bits
Open
16 bits
Open
57
Intel Desktop Board D925XCV/D925XBC Technical Product Specification
2.4 Fixed I/O Map
Table 13. I/O Map
Address (hex)
Size
Description
0000 - 00FF
256 bytes
Used by the Desktop Board D925XCV/D925XBC. Refer to
the ICH6-R data sheet for dynamic addressing information.
0170 - 0177
01F0 - 01F7
8 bytes
8 bytes
8 bytes
8 bytes
8 bytes
8 bytes
4 bytes
7 bits
Secondary Parallel ATA IDE channel command block
Primary Parallel ATA IDE channel command block
0228 - 022F (Note 1)
0278 - 027F (Note 1)
02E8 - 02EF (Note 1)
02F8 - 02FF (Note 1)
0374 - 0377
LPT3
LPT2
COM4
COM2
Secondary Parallel ATA IDE channel control block
Secondary IDE channel status port
LPT1
0377, bits 6:0
0378 - 037F
8 bytes
8 bytes
6 bytes
1 byte
03E8 - 03EF
COM3
03F0 - 03F5
Diskette channel
03F4 – 03F7
03F8 - 03FF
Primary Parallel ATA IDE channel control block
COM1
8 bytes
2 bytes
8 bytes
4 bytes
1 byte
04D0 - 04D1
Edge/level triggered PIC
LPTn + 400
0CF8 - 0CFB (Note 2)
0CF9 (Note 3)
ECP port, LPTn base address + 400h
PCI Conventional bus configuration address register
Reset control register
0CFC - 0CFF
FFA0 - FFA7
FFA8 - FFAF
Notes:
4 bytes
8 bytes
8 bytes
PCI Conventional bus configuration data register
Primary Parallel ATA IDE bus master registers
Secondary Parallel ATA IDE bus master registers
1. Default, but can be changed to another address range.
2. Dword access only.
3. Byte access only.
✏ NOTE
Some additional I/O addresses are not available due to ICH6-R address aliasing. The ICH6-R
data sheet provides more information on address aliasing.
For information about
Refer to
Obtaining the ICH6-R data sheet
Section 1.4 on page 19
58
Technical Reference
2.5 PCI Configuration Space Map
Table 14. PCI Configuration Space Map
Bus
Device
Function
Number (hex)
Number (hex)
Number (hex)
Description
00
00
00
00
00
00
00
01
1B
1C
1C
1C
00
00
00
00
01
02
Memory controller of Intel 82925X component
PCI Express x16 graphics port
Intel High Definition Audio Controller
PCI Express port 1 (PCI Express x1 bus connector 1)
PCI Express port 2 (Gigabit Ethernet controller bridge)
PCI Express port 3 (PCI Express x1 bus connector 2)
(Note 1)
00
00
00
00
00
00
00
00
00
00
1C
1D
1D
1D
1D
1D
1E
1F
1F
1F
1F
00
00
01
02
03
05
03
00
01
02
03
07
00
00
01
02
03
00
00
00
00
00
00
PCI Express port 4 (not used)
USB UHCI controller 1
USB UHCI controller 2
USB UHCI controller 3
USB UHCI controller 4
EHCI controller
PCI bridge
PCI controller
Parallel ATA IDE controller
Serial ATA controller
00
(Note 2)
SMBus controller
Gigabit Ethernet Controller
PCI Conventional bus connector 1
PCI Conventional bus connector 2
PCI Conventional bus connector 3 (Note 1)
PCI Conventional bus connector 4 (Note 1)
IEEE-1394a controller
(Note 2)
(Note 2)
(Note 2)
(Note 2)
(Note 2)
Notes:
1. Not present on the D925XBC.
2. Bus number is dynamic and can change based on add-in cards used.
59
Intel Desktop Board D925XCV/D925XBC Technical Product Specification
2.6 Interrupts
The interrupts can be routed through either the Programmable Interrupt Controller (PIC) or the
Advanced Programmable Interrupt Controller (APIC) portion of the ICH6-R component. The PIC
is supported in Windows 98 SE and Windows ME and uses the first 16 interrupts. The APIC is
supported in Windows 2000 and Windows XP and supports a total of 24 interrupts.
Table 15. Interrupts
IRQ
System Resource
NMI
I/O channel check
0
Reserved, interval timer
1
Reserved, keyboard buffer full
Reserved, cascade interrupt from slave PIC
User available
2
3
4
COM1 (Note 1)
5
LPT2 (Plug and Play option)/User available
6
Diskette drive
7
LPT1 (Note 1)
8
Real-time clock
9
User available
10
User available
11
User available
12
Onboard mouse port (if present, else user available)
Reserved, math coprocessor
Primary IDE/Serial ATA (if present, else user available)
Serial ATA (if present, else user available)
User available (through PIRQA)
User available (through PIRQB)
User available (through PIRQC)
User available (through PIRQD)
User available (through PIRQE)
User available (through PIRQF)
User available (through PIRQG)
User available (through PIRQH)
13
14
15
16 (Note 2)
17 (Note 2)
18 (Note 2)
19 (Note 2)
20 (Note 2)
21 (Note 2)
22 (Note 2)
23 (Note 2)
Notes:
1. Default, but can be changed to another IRQ.
2. Available in APIC mode only.
60
Technical Reference
2.7 PCI Conventional Interrupt Routing Map
This section describes interrupt sharing and how the interrupt signals are connected between the
PCI Conventional bus connectors and onboard PCI Conventional devices. The PCI Conventional
specification describes how interrupts can be shared between devices attached to the PCI
Conventional bus. In most cases, the small amount of latency added by interrupt sharing does not
affect the operation or throughput of the devices. In some special cases where maximum
performance is needed from a device, a PCI Conventional device should not share an interrupt with
other PCI Conventional devices. Use the following information to avoid sharing an interrupt with a
PCI Conventional add-in card.
PCI Conventional devices are categorized as follows to specify their interrupt grouping:
•
INTA: By default, all add-in cards that require only one interrupt are in this category. For
almost all cards that require more than one interrupt, the first interrupt on the card is also
classified as INTA.
•
•
INTB: Generally, the second interrupt on add-in cards that require two or more interrupts is
classified as INTB. (This is not an absolute requirement.)
INTC and INTD: Generally, a third interrupt on add-in cards is classified as INTC and a fourth
interrupt is classified as INTD.
The ICH6-R has eight Programmable Interrupt Request (PIRQ) input signals. All PCI
Conventional interrupt sources either onboard or from a PCI Conventional add-in card connect to
one of these PIRQ signals. Some PCI Conventional interrupt sources are electrically tied together
on the board and therefore share the same interrupt. Table 16 shows an example of how the
PIRQ signals are routed.
For example, using Table 16 as a reference, assume an add-in card using INTA is plugged into PCI
Conventional bus connector 3. In PCI bus connector 3, INTA is connected to PIRQB, which is
already connected to the ICH6-R audio controller. The add-in card in PCI Conventional bus
connector 3 now shares an interrupt with the onboard interrupt source.
61
Intel Desktop Board D925XCV/D925XBC Technical Product Specification
Table 16. PCI Interrupt Routing Map
ICH6-R PIRQ Signal Name
PCI Interrupt Source
IEEE-1394a controller
PCI bus connector 1
PIRQA PIRQB PIRQC PIRQD PIRQE PIRQF PIRQG PIRQH
INTA
INTD
INTC
INTA
INTB
INTB
INTA
INTC
INTD
PCI bus connector 2
PCI bus connector 3 (Note)
PCI bus connector 4 (Note)
INTD
INTC
INTA
INTB
INTB
INTA
INTC
INTD
Note:
Not present on the D925XBC.
NOTE
✏
In PIC mode, the ICH6-R can connect each PIRQ line internally to one of the IRQ signals (3, 4, 5,
6, 7, 9, 10, 11, 12, 14, and 15). Typically, a device that does not share a PIRQ line will have a
unique interrupt. However, in certain interrupt-constrained situations, it is possible for two or
more of the PIRQ lines to be connected to the same IRQ signal. Refer to Table 15 for the
allocation of PIRQ lines to IRQ signals in APIC mode.
PCI interrupt assignments to the USB ports, Serial ATA ports, and PCI Express ports are dynamic.
62
Technical Reference
2.8 Connectors
CAUTION
Only the following connectors have overcurrent protection: back panel USB, front panel USB, and
PS/2.
The other internal connectors are not overcurrent protected and should connect only to devices
inside the computer’s chassis, such as fans and internal peripherals. Do not use these connectors
to power devices external to the computer’s chassis. A fault in the load presented by the external
devices could cause damage to the computer, the power cable, and the external devices themselves.
This section describes the board’s connectors. The connectors can be divided into these groups:
•
•
Back panel I/O connectors
Component-side I/O connectors (see page 68)
NOTE
✏
When installing the D925XBC board in a microATX chassis, make sure that peripheral devices are
installed at least 1.5 inches above the main power connector, the diskette drive connector, the
Parallel ATA IDE connector, and the DIMM sockets.
2.8.1 Back Panel Connectors
The back panel configuration is dependent upon which audio subsystem is present. The
configurations are as follows:
•
•
8-channel (7.1) audio subsystem (five analog audio output connectors and two digital audio
output connectors), described on page 64
6-channel (5.1) audio subsystem (three analog audio output connectors), described on page 66
63
Intel Desktop Board D925XCV/D925XBC Technical Product Specification
2.8.1.1 Back Panel Connectors For 8-Channel (7.1) Audio Subsystem
Figure 19 shows the location of the back panel connectors for boards equipped with the 8-channel
(7.1) audio subsystem. The back panel connectors are color-coded. The figure legend (Table 17)
lists the colors used (when applicable).
H
J
D
N
A
B
C
M
E
F
G
I
K
L
O
OM16680
Figure 19. Back Panel Connectors for 8-Channel (7.1) Audio Subsystem
Table 17 lists the back panel connectors identified in Figure 19.
NOTE
✏
The back panel audio line out connector is designed to power headphones or amplified speakers
only. Poor audio quality occurs if passive (non-amplified) speakers are connected to this output.
64
Technical Reference
Table 17. Back Panel Connectors Shown in Figure 19.
Item/callout from
Figure 19
Description
A
B
C
D
E
F
PS/2 mouse port [Green]
PS/2 keyboard port [Purple]
Serial port A [Teal]
Parallel port [Burgundy]
Digital audio out coaxial [Orange]
Digital audio out optical
G
Front left/right channel audio out/Two channel audio line out/Retasking Jack D
[Lime green]
H
I
Surround left/right channel audio out/Retasking Jack H [Black]
Center channel and LFE (subwoofer) audio out/ Retasking Jack G
[Orange]
J
K
L
Audio line in/Retasking Jack C [Blue]
Mic in/Retasking Jack B [Pink]
USB ports (two)
M
N
O
IEEE-1394a connector (optional)
LAN
USB ports (two)
65
Intel Desktop Board D925XCV/D925XBC Technical Product Specification
2.8.1.2 Back Panel Connectors For 6-Channel (5.1) Audio Subsystem
Figure 20 shows the location of the back panel connectors for boards equipped with the 6-channel
(5.1) audio subsystem. The back panel connectors are color-coded. The figure legend (Table 18)
lists the colors used (when applicable).
E
D
J
A
B
C
I
F
G
H
K
OM17127
Figure 20. Back Panel Connectors for 6-Channel (5.1) Audio Subsystem
Table 18 lists the back panel connectors identified in Figure 20.
NOTE
✏
The back panel audio line out connector is designed to power headphones or amplified speakers
only. Poor audio quality occurs if passive (non-amplified) speakers are connected to this output.
66
Technical Reference
Table 18. Back Panel Connectors Shown in Figure 20.
Item/callout from
Figure 20
Description
A
B
C
D
E
F
PS/2 mouse port [Green]
PS/2 keyboard port [Purple]
Serial port A [Teal]
Parallel port [Burgundy]
Audio line in/Retasking Jack C [Blue]
Front left/right channel audio out/Two channel audio line out/Retasking Jack D
[Lime green]
G
H
I
Mic in/Retasking Jack B [Pink]
USB ports (two)
IEEE-1394a connector (optional)
LAN
J
K
USB ports (two)
67
Intel Desktop Board D925XCV/D925XBC Technical Product Specification
2.8.2 Component-side Connectors
Figure 21 shows the locations of the component-side connectors of the D925XCV board.
E
F
G
I
K
M
O
A
B
C
D
H
J
L
N
4
1
4
1
9
2
1
4
4
10
1
3
1
3
1
1
2
1
1
1
1
10
1
2
1
3
2
9
1
1
1
10
2
2
10
1
4
1
1
2
10
1
24
2
23
40
1
2
1
34
33
2
1
39
DD
EE
CC
BB
Z
X
V
T
S
R
Q
P
AA Y
W
U
OM16681
Figure 21. D925XCV Component-side Connectors
Table 19 lists the D925XCV component-side connectors identified in Figure 21.
68
Technical Reference
Table 19. D925XCV Component-side Connectors Shown in Figure 21.
Item/callout from Figure 21 Description
A
B
PCI Conventional bus add-in card connector 4
Auxiliary rear fan connector
C
PCI Conventional bus add-in card connector 3
ATAPI CD-ROM connector
D
E
PCI Express x1 bus add-in card connector 2
PCI Express x1 bus add-in card connector 1
Front panel audio connector
F
G
H
PCI Conventional bus add-in card connector 2
Front panel IEEE-1394a connector (optional)
PCI Conventional bus add-in card connector 1
Front panel IEEE-1394a connector (optional)
PCI Express x16 bus add-in card connector
Rear chassis fan connector
I
J
K
L
M
N
Alternate power connector
O
P
+12V power connector (ATX12V)
Processor fan connector
Q
R
Power connector
Diskette drive connector
S
Parallel ATA IDE connector
T
Chassis intrusion connector
U
Front chassis fan connector
V
Serial ATA connector 1
W
X
Serial ATA connector 3
Serial ATA connector 2
Y
Serial ATA connector 0
Z
Auxiliary front panel power LED connector
Front panel connector
AA
BB
CC
DD
EE
SCSI hard drive indicator LED (optional)
Auxiliary power output connector
Front panel USB connector
Front panel USB connector
69
Intel Desktop Board D925XCV/D925XBC Technical Product Specification
Figure 22 shows the locations of the component-side connectors of the D925XBC board.
A
B
D
G
I
C
E
F
H
1
9
2
1
4
4
3
10
3
1
1
1
2
1
Y
1
1
1
1
4
10
1
3
2
9
1
1
10
2
1
2
10
1
4
1
X
1
2
W
10
1
V
U
24
2
23
40
1
2
1
34
33
2
39
1
T
R
P
N
M
L
K
J
S
Q
O
OM16691
Figure 22. D925XBC Component-side Connectors
Table 20 lists the D925XBC component-side connectors identified in Figure 22.
70
Technical Reference
Table 20. D925XBC Component-side Connectors Shown in Figure 22.
Item/callout from Figure 22 Description
A
B
C
D
E
F
PCI Express x1 bus add-in card connector
Front panel audio connector
PCI Conventional bus add-in card connector 2
Front panel IEEE-1394a connector (optional)
PCI Conventional bus add-in card connector 1
PCI Express x16 bus add-in card connector
Rear chassis fan connector
G
H
I
Alternate power connector
+12V power connector (ATX12V)
Processor fan connector
J
K
L
Power connector
Diskette drive connector
M
N
O
P
Q
R
S
T
Parallel ATA IDE connector
Chassis intrusion connector
Front chassis fan connector
Serial ATA connector 1
Serial ATA connector 3
Serial ATA connector 2
Serial ATA connector 0
Auxiliary front panel power LED connector
Front panel connector
U
V
W
X
Y
Front panel USB connector
Front panel USB connector
Front panel IEEE-1394a connector (optional)
ATAPI CD-ROM connector
71
Intel Desktop Board D925XCV/D925XBC Technical Product Specification
Table 21. ATAPI CD-ROM Connector
Pin
1
Signal Name
Left audio input from CD-ROM
CD audio differential ground
CD audio differential ground
Right audio input from CD-ROM
2
3
4
Table 22. Front Panel Audio Connector
Pin
1
Signal Name
Pin
2
Signal Name
Port E [Port 1] Left Channel
Port E [Port 1] Right Channel
Port F [Port 2] Right Channel
Ground
3
4
Presence# (dongle present)
5
6
Port E [Port 1] Sense return
(jack detection)
7
9
Port E [Port 1] and Port F [Port 2]
Sense send (jack detection)
8
Key
Port F [Port 2] Left Channel
10
Port F [Port 2] Sense return
(jack detection)
INTEGRATOR’S NOTE
#
The front panel audio connector is colored yellow.
Table 23. Front Chassis Fan and Rear Chassis
Fan Connectors
Pin
1
Signal Name
Control
+12 V
2
3
Tach
Table 24. Processor Fan Connector and Auxiliary
Rear Fan Connector
Pin
1
Signal Name
Ground
2
+12 V
3
FAN_TACH
FAN_CONTROL
4
NOTE
✏
The auxiliary rear fan connector is present only on the D925XCV board. It is not present on the
D925XBC board.
72
Technical Reference
Table 25. Chassis Intrusion Connector
Pin
1
Signal Name
Intruder
2
Ground
Table 26. SCSI Hard Drive Activity LED
Connector (Optional)
Pin
1
Signal Name
SCSI_ACT#
No connect
2
Table 27. Serial ATA Connectors
Pin
1
Signal Name
Ground
TXP
2
3
TXN
4
Ground
RXN
5
6
RXP
7
Ground
Table 28. Auxiliary Power Output Connector
Pin
1
Signal Name
+12 V
2
Ground
Ground
+5 V
3
4
NOTE
✏
The auxiliary power output connector is present only on the D925XCV board. It is not present on
the D925XBC board.
73
Intel Desktop Board D925XCV/D925XBC Technical Product Specification
2.8.2.1 Power Supply Connectors
The board has three power supply connectors:
•
Main power – a 2 x 12 connector. This connector is compatible with 2 x 10 connectors
previously used on Intel Desktop boards. The board supports the use of ATX12V power
supplies with either 2 x 10 or 2 x 12 main power cables. When using a power supply with a
2 x 10 main power cable, attach that cable on the rightmost pins of the main power connector,
leaving pins 11, 12, 23, and 24 unconnected.
•
•
ATX12V power – a 2 x 2 connector. This connector provides power directly to the processor
voltage regulator and must always be used. Failure to do so will prevent the board from
booting.
Alternate power – a 1 x 4 connector. This connector provides additional power when using
high wattage PCI Express x16 graphics cards.
INTEGRATOR’S NOTE
#
When using high wattage PCI Express x16 graphics cards, use one of the following power supply
configurations to avoid system instability:
•
The preferred method of power delivery is to use a power supply with a 2 x 12 main power
cable. In this configuration, use two connectors to provide power to the board:
The main power connector
The ATX12V connector
In this configuration, the alternate power connector is not required. The 2 x 12 main power
cable can provide up to 144 W of power from the +12 V rail.
•
An alternate method of power delivery is to use a power supply has a 2 x 10 main power cable.
In this configuration, use three connectors to provide power to the board:
The main power connector
The ATX12V connector
The alternate power connector
The combination of the 2 x 10 main power cable and the alternate power cable can provide up
to 144 W of power from the +12 V rail (72 W each).
74
Technical Reference
Table 29. Main Power Connector
Pin
1
Signal Name
+3.3 V
Pin
13
14
15
16
17
18
19
20
21
22
23
24
Signal Name
+3.3 V
2
+3.3 V
-12 V
3
Ground
Ground
4
+5 V
PS-ON# (power supply remote on/off)
5
Ground
Ground
Ground
Ground
No connect
+5 V
6
+5 V
7
Ground
8
PWRGD (Power Good)
+5 V (Standby)
+12 V
9
10
11
12
+5 V
+12 V
+5 V
2x12 connector detect
Ground
Table 30. ATX12V Power Connector
Pin
1
Signal Name
Ground
Pin
2
Signal Name
Ground
3
+12 V
4
+12 V
Table 31. Alternate Power Connector
Pin
1
Signal Name
+12 V
2
Ground
Ground
+5 V
3
4
2.8.2.2 Add-in Card Connectors
The board has the following add-in card connectors:
•
•
PCI Express x16: one connector supporting simultaneous transfer speeds up to 8 GBytes/sec
PCI Express x1: the D925XCV board has two PCI Express x1 connectors; the D925XBC
board has one PCI Express x1 connector. The x1 interfaces support simultaneous transfer
speeds up to 500 MBytes/sec.
•
PCI Conventional (rev 2.2 compliant) bus: the D925XCV board has four PCI Conventional
bus add-in card connectors; the D925XBC board has two PCI Conventional add-in card
connectors. The SMBus is routed to PCI Conventional bus connector 2 only (ATX expansion
slot 6). PCI Conventional bus add-in cards with SMBus support can access sensor data and
other information residing on the Desktop Board.
75
Intel Desktop Board D925XCV/D925XBC Technical Product Specification
Note the following considerations for the PCI Conventional bus connectors (for both Desktop
Boards):
•
•
All of the PCI Conventional bus connectors are bus master capable.
SMBus signals are routed to PCI Conventional bus connector 2. This enables PCI
Conventional bus add-in boards with SMBus support to access sensor data on the Desktop
Board. The specific SMBus signals are as follows:
The SMBus clock line is connected to pin A40.
The SMBus data line is connected to pin A41.
2.8.2.3 Auxiliary Front Panel Power/Sleep LED Connector
Pins 1 and 3 of this connector duplicate the signals on pins 2 and 4 of the front panel connector.
Table 32. Auxiliary Front Panel Power/Sleep LED Connector
Pin
1
Signal Name
In/Out
Description
HDR_BLNK_GRN
Not connected
HDR_BLNK_YEL
Out
Front panel green LED
2
3
Out
Front panel yellow LED
2.8.2.4 Front Panel Connector
This section describes the functions of the front panel connector. Table 33 lists the signal names of
the front panel connector. Figure 23 is a connection diagram for the front panel connector.
Table 33. Front Panel Connector
Pin
Signal
In/Out Description
Pin
Signal
In/Out Description
Power LED
[Green]
Hard Drive Activity LED
[Yellow]
1
3
HD_PWR
Out
Hard disk LED pull-up
(750 Ω) to +5 V
2
4
HDR_BLNK_ Out
GRN
Front panel green
LED
HAD#
Out
Hard disk active LED
HDR_BLNK_ Out
YEL
Front panel yellow
LED
Reset Switch
[Purple]
On/Off Switch
[Red]
5
7
Ground
Ground
6
8
FPBUT_IN
Ground
In
Power switch
Ground
FP_RESET# In
Power
Reset switch
Not Connected
Not connected
9
+5 V
Power
10
N/C
76
Technical Reference
N/C
+5 V DC
9
8
6
4
7
5
3
Reset
Switch
Power
Switch
Dual-colored
Power LED
Single-colored
Power LED
−
+
Hard Drive
Activity LED
+
−
2
1
−
+
OM17000
Figure 23. Connection Diagram for Front Panel Connector
2.8.2.4.1 Hard Drive Activity LED Connector [Yellow]
Pins 1 and 3 [Yellow] can be connected to an LED to provide a visual indicator that data is being
read from or written to a hard drive. Proper LED function requires one of the following:
•
•
A Serial ATA hard drive connected to an onboard Serial ATA connector
An IDE hard drive connected to an onboard IDE connector
2.8.2.4.2 Reset Switch Connector [Purple]
Pins 5 and 7 [Purple] can be connected to a momentary single pole, single throw (SPST) type
switch that is normally open. When the switch is closed, the board resets and runs the POST.
2.8.2.4.3 Power/Sleep LED Connector [Green]
Pins 2 and 4 [Green] can be connected to a one- or two-color LED. Table 34 shows the possible
states for a one-color LED. Table 35 shows the possible states for a two-color LED.
Table 34. States for a One-Color Power LED
LED State
Off
Description
Power off/sleeping
Running
Steady Green
Table 35. States for a Two-Color Power LED
LED State
Off
Description
Power off
Running
Steady Green
Steady Yellow
Sleeping
77
Intel Desktop Board D925XCV/D925XBC Technical Product Specification
✏ NOTE
The colors listed in Table 34 and Table 35 are suggested colors only. Actual LED colors are
product- or customer-specific.
2.8.2.4.4 Power Switch Connector [Red]
Pins 6 and 8 [Red] can be connected to a front panel momentary-contact power switch. The switch
must pull the SW_ON# pin to ground for at least 50 ms to signal the power supply to switch on or
off. (The time requirement is due to internal debounce circuitry on the board.) At least two
seconds must pass before the power supply will recognize another on/off signal.
2.8.2.5 Front Panel USB Connectors
Figure 24 is a connection diagram for the front panel USB connectors.
INTEGRATOR’S NOTES
#
•
•
•
•
The +5 V DC power on the USB connector is fused.
Pins 1, 3, 5, and 7 comprise one USB port.
Pins 2, 4, 6, and 8 comprise one USB port.
Use only a front panel USB connector that conforms to the USB 2.0 specification for high-
speed USB devices.
Power
(+5 V DC)
Power
(+5 V DC)
1
2
D−
D−
3
5
7
4
6
8
One
USB
Port
One
USB
Port
D+
D+
Ground
No Connect
Ground
10
Key (no pin)
OM15963
Figure 24. Connection Diagram for Front Panel USB Connectors
78
Technical Reference
2.8.2.6 Front Panel IEEE 1394a Connectors (Optional)
Figure 25 is a connection diagram for the IEEE 1394a connectors.
TPA+
1
2
TPA−
Ground
TPB−
3
5
7
4
6
8
Ground
TPB+
+12 V DC
+12 V DC
10
Key (no pin)
Ground
OM16107
Figure 25. Connection Diagram for IEEE 1394a Connectors
INTEGRATOR’S NOTES
#
•
•
•
The IEEE 1394a connectors are colored blue.
The +12 V DC power on the IEEE 1394a connectors is fused.
Each IEEE 1394a connector provides one IEEE 1394a port.
79
Intel Desktop Board D925XCV/D925XBC Technical Product Specification
2.9 Jumper Block
CAUTION
Do not move the jumper with the power on. Always turn off the power and unplug the power cord
from the computer before changing a jumper setting. Otherwise, the board could be damaged.
Figure 26 shows the location of the jumper block. The 3-pin jumper block determines the BIOS
Setup program’s mode. Table 36 describes the jumper settings for the three modes: normal,
configure, and recovery. When the jumper is set to configure mode and the computer is powered-
up, the BIOS compares the processor version and the microcode version in the BIOS and reports if
the two match.
1
3
J6J3
OM16682
Figure 26. Location of the Jumper Block
Table 36. BIOS Setup Configuration Jumper Settings
Function/Mode
Jumper Setting
Configuration
Normal
The BIOS uses current configuration information and
passwords for booting.
1
3
3
3
1-2
Configure
Recovery
After the POST runs, Setup runs automatically. The
maintenance menu is displayed.
1
2-3
The BIOS attempts to recover the BIOS configuration. A
recovery diskette is required.
1
None
80
Technical Reference
2.10 Mechanical Considerations
2.10.1 D925XCV Form Factor
The Desktop Board D925XCV is designed to fit into an ATX-form-factor chassis. Figure 27
illustrates the mechanical form factor for the Desktop Board D925XCV. Dimensions are given in
inches [millimeters]. The outer dimensions are 10.20 inches by 9.60 inches [259.08 millimeters by
243.84 millimeters]. Location of the I/O connectors and mounting holes are in compliance with the
ATX specification.
1.800
[45.72]
6.500
[165.10]
6.100
[154.94]
5.200
[132.08]
0.00
2.850
[72.39]
3.100
6.450
[163.83]
[78.74]
6.200
[157.48]
3.750
[95.25]
0.00
2.600
[66.04]
4.900
[124.46]
OM16684
Figure 27. Desktop Board D925XCV Dimensions
81
Intel Desktop Board D925XCV/D925XBC Technical Product Specification
2.10.2 D925XBC Form Factor
The Desktop Board D925XBC is designed to fit into either a microATX or an ATX-form-factor
chassis. Figure 28 illustrates the mechanical form factor for the Desktop Board D925XBC.
Dimensions are given in inches [millimeters]. The outer dimensions are 9.60 inches by 9.60 inches
[243.84 millimeters by 243.84 millimeters]. Location of the I/O connectors and mounting holes are
in compliance with the ATX specification.
NOTE
✏
When installing the Desktop Board in a microATX chassis, make sure that peripheral devices are
installed at least 1.5 inches above the main power connector, the diskette drive connector, and the
IDE connector, and the DIMM sockets.
1.800
[45.72]
6.500
[165.10]
6.100
[154.94]
5.200
[132.08]
0.00
2.850
[72.39]
3.100
6.450
[163.83]
[78.74]
6.200
[157.48]
3.150
[80.01]
0.00
2.600
[66.04]
OM16694
Figure 28. Desktop Board D925XBC Dimensions
82
Technical Reference
2.10.3 I/O Shield
The back panel I/O shield for the Desktop Boards D925XCV and D925XBC must meet specific
dimension and material requirements. Systems based on these Desktop Boards need the back panel
I/O shield to pass certification testing. Figure 29 shows the I/O shield for boards with the
8-channel (7.1) audio subsystem. Figure 30 shows the I/O shield for boards with the 6-channel
(5.1) audio subsystem. Dimensions are given in inches to a tolerance of 0.02 inches. The figures
also indicate the position of each cutout. Additional design considerations for I/O shields relative
to chassis requirements are described in the ATX specification.
NOTE
✏
The I/O shield drawings in this document are for reference only. I/O shields compliant with the
ATX chassis specification 2.03 are available from Intel.
162.3 REF
[6.390]
1.6 0.12
[0.063 0.005]
20. 0.254 TYP
[0.787 0.10]
159.2 0.12
[6.268 0.005]
1.55 REF
[0.061]
22.45
[0.884]
8x R 0.5 MIN
7.012
[0.276]
Ø 1.00
[0.039]
6.02
[0.237]
A
A
0.00
[0.00]
11.81
[0.465]
11.811
[0.465]
14.4
[0.567]
12.00
[0.472]
16.84
[0.663]
12.81
[0.504]
Pictorial
View
OM17164
Figure 29. I/O Shield Dimensions for Boards with the 8-Channel (7.1) Audio Subsystem
83
Intel Desktop Board D925XCV/D925XBC Technical Product Specification
162.3 REF
[6.390]
1.6 0.12
[0.063 0.005]
20. 0.254 TYP
[0.787 0.10]
159.2 0.12
[6.268 0.005]
1.55 REF
[0.061]
22.45
[0.884]
8x R 0.5 MIN
7.012
[0.276]
Ø 1.00
[0.039]
A
A
0.00
[0.00]
11.81
[0.465]
11.811
[0.465]
14.4
[0.567]
12.00
[0.472]
Pictorial
View
OM17165
Figure 30. I/O Shield Dimensions for Boards with the 6-Channel (5.1) Audio Subsystem
84
Technical Reference
2.11 Electrical Considerations
2.11.1 DC Loading
Table 37 lists the DC loading characteristics of the board. This data is based on a DC analysis of
all active components within the board that impact its power delivery subsystems. The analysis
does not include PCI add-in cards. Minimum values assume a light load placed on the board that is
similar to an environment with no applications running and no USB current draw. Maximum
values assume a load placed on the board that is similar to a heavy gaming environment with a
500 mA current draw per USB port. These calculations are not based on specific processor values
or memory configurations but are based on the minimum and maximum current draw possible from
the board’s power delivery subsystems to the processor, memory, and USB ports.
Use the datasheets for add-in cards, such as PCI, to determine the overall system power
requirements. The selection of a power supply at the system level is dependent on the system’s
usage model and not necessarily tied to a particular processor speed.
Table 37. DC Loading Characteristics
DC Current at:
Mode
DC Power +3.3 V
+5 V
+12 V
-12 V
+5 VSB
0.80 A
1.40 A
Minimum loading
Maximum loading
200.00 W
300.00 W
3.30 A
6.00 A
10.00 A
14.00 A
9.00 A
16.00 A
0.03 A
0.10 A
2.11.2 Add-in Board Considerations
The boards are designed to provide 2 A (average) of +5 V current for each add-in board. The total
+5 V current draw for add-in boards for the boards is as follows:
•
A fully loaded Desktop Board D925XCV (all six expansion slots and the PCI Express x16 slot
filled) must not exceed 14 A.
•
A fully loaded Desktop Board D925XBC (all three expansion slots and the PCI Express x16
slot filled) must not exceed 8 A.
85
Intel Desktop Board D925XCV/D925XBC Technical Product Specification
2.11.3 Fan Connector Current Capability
CAUTION
The processor fan must be connected to the processor fan connector, not to a chassis fan
connector. Connecting the processor fan to a chassis fan connector may result in onboard
component damage that will halt fan operation.
Table 38 lists the current capability of the fan connectors.
Table 38. Fan Connector Current Capability
Fan Connector
Processor fan
Maximum Available Current
1000 mA
800 mA
800 mA
800 mA
Front chassis fan
Rear chassis fan
Auxiliary rear fan
NOTE
✏
The auxiliary rear fan is available only on the D925XCV board. It is not available on the
D925XBC board.
2.11.4 Power Supply Considerations
CAUTION
The +5 V standby line for the power supply must be capable of providing adequate +5 V standby
current. Failure to do so can damage the power supply. The total amount of standby current
required depends on the wake devices supported and manufacturing options.
System integrators should refer to the power usage values listed in Table 37 when selecting a power
supply for use with the board.
Additional power required will depend on configurations chosen by the integrator.
The power supply must comply with the following recommendations found in the indicated
sections of the ATX form factor specification.
•
•
•
•
The potential relation between 3.3 VDC and +5 VDC power rails (Section 4.2)
The current capability of the +5 VSB line (Section 4.2.1.2)
All timing parameters (Section 4.2.1.3)
All voltage tolerances (Section 4.2.2)
86
Technical Reference
2.12 Thermal Considerations
CAUTION
A chassis with a maximum internal ambient temperature of 38 oC at the processor fan inlet is a
requirement. Use a processor heatsink that provides omni-directional airflow (as shown in
Figure 31) to maintain required airflow across the processor voltage regulator area.
OM16996
Figure 31. Processor Heatsink for Omni-directional Airflow
CAUTION
Failure to ensure appropriate airflow may result in reduced performance of both the processor
and/or voltage regulator or, in some instances, damage to the desktop board. For a list of chassis
that have been tested with Intel desktop boards please refer to the following website:
All responsibility for determining the adequacy of any thermal or system design remains solely with
the reader. Intel makes no warranties or representations that merely following the instructions
presented in this document will result in a system with adequate thermal performance.
87
Intel Desktop Board D925XCV/D925XBC Technical Product Specification
CAUTION
Ensure that the ambient temperature does not exceed the Desktop Board’s maximum operating
temperature. Failure to do so could cause components to exceed their maximum case temperature
and malfunction. For information about the maximum operating temperature, see the
environmental specifications in Section 2.14.
CAUTION
Ensure that proper airflow is maintained in the processor voltage regulator circuit. Failure to do
so may result in damage to the voltage regulator circuit. The processor voltage regulator area
(item A in Figure 32) can reach a temperature of up to 85 oC in an open chassis.
Figure 32 shows the locations of the localized high temperature zones.
A
B
D
C
OM16683
Item
A
Description
Processor voltage regulator area
Processor
B
C
Intel 82925X MCH
D
Intel 82801FR ICH6-R
Figure 32. Localized High Temperature Zones
88
Technical Reference
Table 39 provides maximum case temperatures for the Desktop Board D925XCV/D925XBC
components that are sensitive to thermal changes. The operating temperature, current load, or
operating frequency could affect case temperatures. Maximum case temperatures are important
when considering proper airflow to cool the Desktop Board D925XCV/D925XBC.
Table 39. Thermal Considerations for Components
Component
Maximum Case Temperature
Intel Pentium 4 processor
For processor case temperature, see processor datasheets and
processor specification updates
Intel 82925X MCH
99 oC (under bias)
110 oC (under bias)
Intel 82801FR ICH6-R
For information about
Refer to
Intel Pentium 4 processor datasheets and specification updates
Section 1.4, page 19
2.13 Reliability
The Mean Time Between Failures (MTBF) prediction is calculated using component and
subassembly random failure rates. The calculation is based on the Bellcore Reliability Prediction
Procedure, TR-NWT-000332, Issue 4, September 1991. The MTBF prediction is used to estimate
repair rates and spare parts requirements.
The MTBF data is calculated from predicted data at 55 ºC. The MTBF for the D925XCV and
D925XBC boards is 105,577 hours.
89
Intel Desktop Board D925XCV/D925XBC Technical Product Specification
2.14 Environmental
Table 40 lists the environmental specifications for the Desktop Boards D925XCV and D925XBC.
Table 40. Desktop Board D925XCV/D925XBC Environmental Specifications
Parameter
Specification
Temperature
Non-Operating
Operating
Shock
-40 °C to +70 °C
0 °C to +55 °C
Unpackaged
50 g trapezoidal waveform
Velocity change of 170 inches/second
Half sine 2 millisecond
Packaged
Product Weight (pounds)
Free Fall (inches)
Velocity Change (inches/sec)
<20
36
30
24
18
167
152
136
118
21-40
41-80
81-100
Vibration
Unpackaged
5 Hz to 20 Hz: 0.01 g² Hz sloping up to 0.02 g² Hz
20 Hz to 500 Hz: 0.02 g² Hz (flat)
Packaged
5 Hz to 40 Hz: 0.015 g² Hz (flat)
40 Hz to 500 Hz: 0.015 g² Hz sloping down to 0.00015 g² Hz
90
Technical Reference
2.15 Regulatory Compliance
This section describes the Desktop Boards’ compliance with U.S. and international safety and
electromagnetic compatibility (EMC) regulations.
2.15.1 Safety Regulations
Table 41 lists the safety regulations the Desktop Boards D925XCV and D925XBC comply with
when correctly installed in a compatible host system.
Table 41. Safety Regulations
Regulation
Title
UL 60950-1:2003/
CSA C22.2 No. 60950-1-03
EN 60950-1:2002
Information Technology Equipment - Safety - Part 1: General
Requirements (USA and Canada)
Information Technology Equipment - Safety - Part 1: General
Requirements (European Union)
IEC 60950-1:2001, First Edition
Information Technology Equipment - Safety - Part 1: General
Requirements (International)
2.15.2 EMC Regulations
Table 42 lists the EMC regulations the Desktop Boards D925XCV and D925XBC comply with
when correctly installed in a compatible host system.
Table 42. EMC Regulations
Regulation
Title
FCC (Class B)
Title 47 of the Code of Federal Regulations, Parts 2 and 15, Subpart B,
Radio Frequency Devices. (USA)
ICES-003 (Class B)
Interference-Causing Equipment Standard, Digital Apparatus. (Canada)
EN55022: 1998 (Class B)
Limits and methods of measurement of Radio Interference
Characteristics of Information Technology Equipment.
(European Union)
EN55024: 1998
Information Technology Equipment – Immunity Characteristics Limits
and methods of measurement. (European Union)
AS/NZS 3548 (Class B)
CISPR 22, 3rd Edition (Class B)
CISPR 24: 1997
Australian Communications Authority, Standard for Electromagnetic
Compatibility. (Australia and New Zealand)
Limits and methods of measurement of Radio Disturbance
Characteristics of Information Technology Equipment. (International)
Information Technology Equipment – Immunity Characteristics – Limits
and Methods of Measurements. (International)
VCCI (Class B)
Voluntary Control for Interference by Information Technology Equipment.
(Japan)
91
Intel Desktop Board D925XCV/D925XBC Technical Product Specification
2.15.2.1 FCC Compliance Statement (USA)
Product Type: D925XCV Desktop Board and D925XBC Desktop Board
This device complies with Part 15 of the FCC Rules. Operation is subject to the following two
conditions: (1) This device may not cause harmful interference, and (2) this device must accept any
interference received, including interference that may cause undesired operation.
This equipment has been tested and found to comply with the limits for a Class B digital device,
pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable protection
against harmful interference in a residential environment. This equipment generates, uses, and can
radiate radio frequency energy and, if not installed and used in accordance with the instructions,
may cause harmful interference to radio communications. However, there is no guarantee that
interference will not occur in a particular installation. If this equipment does cause harmful
interference to radio or television reception, which can be determined by turning the equipment off
and on, the user is encouraged to try to correct the interference by one or more of the following
measures:
•
•
•
Reorient or relocate the receiving antenna.
Increase the separation between the equipment and the receiver.
Connect the equipment to a different electrical branch circuit from that to which the receiver is
connected.
•
Consult the dealer or an experienced radio/TV technician for help.
Any changes or modifications to the equipment not expressly approved by Intel Corporation could
void the user’s authority to operate the equipment.
2.15.2.2 Canadian Compliance Statement
This Class B digital apparatus complies with Canadian ICES-003.
Cet appereil numérique de la classe B est conforme à la norme NMB-003 du Canada.
2.15.3 European Union Declaration of Conformity Statement
We, Intel Corporation, declare under our sole responsibility that the product: Intel® Desktop
Boards D925XCV and D925XBC are in conformity with all applicable essential requirements
necessary for CE marking, following the provisions of the European Council Directive 89/336/EEC
(EMC Directive) and Council Directive 73/23/EEC (Safety/Low Voltage Directive).
The product is properly CE marked demonstrating this conformity and is for distribution within all
member states of the EU with no restrictions.
This product follows the provisions of the European Directives 89/336/EEC and 73/23/EEC.
Dansk Dette produkt er i overensstemmelse med det europæiske direktiv 89/336/EEC &
73/23/EEC.
Dutch Dit product is in navolging van de bepalingen van Europees Directief 89/336/EEC &
73/23/EEC.
92
Technical Reference
Suomi Tämä tuote noudattaa EU-direktiivin 89/336/EEC & 73/23/EEC määräyksiä.
Français Ce produit est conforme aux exigences de la Directive Européenne 89/336/EEC &
73/23/EEC.
Deutsch Dieses Produkt entspricht den Bestimmungen der Europäischen Richtlinie 89/336/EEC &
73/23/EEC.
Icelandic Þessi vara stenst reglugerð Evrópska Efnahags Bandalagsins númer 89/336/ EEC &
73/23/EEC.
Italiano Questo prodotto è conforme alla Direttiva Europea 89/336/EEC & 73/23/EEC.
Norsk Dette produktet er i henhold til bestemmelsene i det europeiske direktivet 89/336/ EEC &
73/23/EEC.
Portuguese Este produto cumpre com as normas da Diretiva Européia 89/336/EEC &
73/23/EEC.
Español Este producto cumple con las normas del Directivo Europeo 89/336/EEC & 73/23/EEC.
Svenska Denna produkt har tillverkats i enlighet med EG-direktiv 89/336/EEC & 73/23/EEC.
2.15.4 Product Ecology Statements
The following information is provided to address worldwide product ecology concerns and
regulations.
2.15.4.1 Disposal Considerations
This product contains the following materials that may be regulated upon disposal: lead solder on
the printed wiring board assembly.
2.15.4.2 Recycling Considerations
Intel encourages its customers to recycle its products and their components (e.g., batteries, circuit
boards, plastic enclosures, etc.) whenever possible. In the U.S., a list of recyclers in your area can
be found at:
In the absence of a viable recycling option, products and their components must be disposed of in
accordance with all applicable local environmental regulations.
93
Intel Desktop Board D925XCV/D925XBC Technical Product Specification
2.15.5 Product Certification Markings (Board Level)
Table 43 lists the board’s product certification markings.
Table 43. Product Certification Markings
Description
Marking
UL joint US/Canada Recognized Component mark. Includes adjacent
UL file number for Intel Desktop Boards: E210882 (component side).
FCC Declaration of Conformity logo mark for Class B equipment;
includes Intel name and D925XCV or D925XBC model designation
(component side).
CE mark. Declares compliance to European Union (EU) EMC directive
(89/336/EEC) and Low Voltage directive (73/23/EEC) (component side).
The CE mark should also be on the shipping container.
Australian Communications Authority (ACA) C-Tick mark. Includes
adjacent Intel supplier code number, N-232. The C-tick mark should
also be on the shipping container.
Printed wiring board manufacturer’s recognition mark: consists of a
unique UL recognized manufacturer’s logo, along with a flammability
rating (solder side).
V-0 or 94V-0
94
3 Overview of BIOS Features
What This Chapter Contains
3.1 Introduction ..................................................................................................................95
3.2 BIOS Flash Memory Organization ...............................................................................96
3.3 Resource Configuration ...............................................................................................96
3.4 System Management BIOS (SMBIOS) ........................................................................97
3.5 Legacy USB Support....................................................................................................97
3.6 BIOS Updates ..............................................................................................................98
3.7 Boot Options ................................................................................................................99
3.8 Fast Booting Systems with Intel® Rapid BIOS Boot...................................................100
3.9 BIOS Security Features .............................................................................................101
3.1 Introduction
The Desktop Boards D925XCV and D925XBC use an Intel/AMI BIOS that is stored in the
Firmware Hub (FWH) and can be updated using a disk-based program. The FWH contains the
BIOS Setup program, POST, the PCI auto-configuration utility, and Plug and Play support.
The BIOS displays a message during POST identifying the type of BIOS and a revision code. The
initial production BIOSs are identified as CV92510A.86A.
When the BIOS Setup configuration jumper is set to configure mode and the computer is powered-
up, the BIOS compares the CPU version and the microcode version in the BIOS and reports if the
two match.
The BIOS Setup program can be used to view and change the BIOS settings for the computer. The
BIOS Setup program is accessed by pressing the <F2> key after the Power-On Self-Test (POST)
memory test begins and before the operating system boot begins. The menu bar is shown below.
Maintenance Main
Advanced Security Power
Boot
Exit
NOTE
✏
The maintenance menu is displayed only when the Desktop Board is in configure mode. Section 2.9
on page 80 shows how to put the Desktop Board in configure mode.
95
Intel Desktop Board D925XCV/D925XBC Technical Product Specification
Table 44 lists the BIOS Setup program menu features.
Table 44. BIOS Setup Program Menu Bar
Maintenance
Main
Advanced
Security
Power
Boot
Exit
Clears
passwords and
displays
processor
information
Displays
processor
and memory features
configuration available
through the
Configures
advanced
Sets
passwords
and security management
features
Configures
power
Selects boot Saves or
options
discards
changes to
Setup
features and
power supply
controls
program
options
chipset
Table 45 lists the function keys available for menu screens.
Table 45. BIOS Setup Program Function Keys
BIOS Setup Program Function Key Description
<←> or <→>
<↑> or <↓>
<Tab>
Selects a different menu screen (Moves the cursor left or right)
Selects an item (Moves the cursor up or down)
Selects a field (Not implemented)
<Enter>
<F9>
Executes command or selects the submenu
Load the default configuration values for the current menu
Save the current values and exits the BIOS Setup program
Exits the menu
<F10>
<Esc>
3.2 BIOS Flash Memory Organization
The Firmware Hub (FWH) includes a 8 Mbit (1024 KB) symmetrical flash memory device.
3.3 Resource Configuration
3.3.1 PCI Autoconfiguration
The BIOS can automatically configure PCI devices. PCI devices may be onboard or add-in cards.
Autoconfiguration lets a user insert or remove PCI cards without having to configure the system.
When a user turns on the system after adding a PCI card, the BIOS automatically configures
interrupts, the I/O space, and other system resources. Any interrupts set to Available in Setup are
considered to be available for use by the add-in card.
3.3.2 PCI IDE Support
If you select Auto in the BIOS Setup program, the BIOS automatically sets up the
PCI IDE connector with independent I/O channel support. The IDE interface supports hard drives
up to ATA-66/100 and recognizes any ATAPI compliant devices, including CD-ROM drives, tape
drives, and Ultra DMA drives. The BIOS determines the capabilities of each drive and configures
them to optimize capacity and performance. To take advantage of the high capacities typically
available today, hard drives are automatically configured for Logical Block Addressing (LBA) and
96
Overview of BIOS Features
to PIO Mode 3 or 4, depending on the capability of the drive. You can override the auto-
configuration options by specifying manual configuration in the BIOS Setup program.
To use ATA-66/100 features the following items are required:
•
•
•
An ATA-66/100 peripheral device
An ATA-66/100 compatible cable
ATA-66/100 operating system device drivers
NOTE
✏
Do not connect an ATA device as a slave on the same IDE cable as an ATAPI master device. For
example, do not connect an ATA hard drive as a slave to an ATAPI CD-ROM drive.
3.4 System Management BIOS (SMBIOS)
SMBIOS is a Desktop Management Interface (DMI) compliant method for managing computers in
a managed network.
The main component of SMBIOS is the Management Information Format (MIF) database, which
contains information about the computing system and its components. Using SMBIOS, a system
administrator can obtain the system types, capabilities, operational status, and installation dates for
system components. The MIF database defines the data and provides the method for accessing this
information. The BIOS enables applications such as third-party management software to use
SMBIOS. The BIOS stores and reports the following SMBIOS information:
•
•
•
•
BIOS data, such as the BIOS revision level
Fixed-system data, such as peripherals, serial numbers, and asset tags
Resource data, such as memory size, cache size, and processor speed
Dynamic data, such as event detection and error logging
Non-Plug and Play operating systems, such as Windows NT*, require an additional interface for
obtaining the SMBIOS information. The BIOS supports an SMBIOS table interface for such
operating systems. Using this support, an SMBIOS service-level application running on a
non-Plug and Play operating system can obtain the SMBIOS information.
3.5 Legacy USB Support
Legacy USB support enables USB devices to be used even when the operating system’s USB
drivers are not yet available. Legacy USB support is used to access the BIOS Setup program, and
to install an operating system that supports USB. By default, Legacy USB support is set to
Enabled.
Legacy USB support operates as follows:
1. When you apply power to the computer, legacy support is disabled.
2. POST begins.
3. Legacy USB support is enabled by the BIOS allowing you to use a USB keyboard to enter and
configure the BIOS Setup program and the maintenance menu.
4. POST completes.
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Intel Desktop Board D925XCV/D925XBC Technical Product Specification
5. The operating system loads. While the operating system is loading, USB keyboards and mice
are recognized and may be used to configure the operating system. (Keyboards and mice are
not recognized during this period if Legacy USB support was set to Disabled in the BIOS Setup
program.)
6. After the operating system loads the USB drivers, all legacy and non-legacy USB devices are
recognized by the operating system, and Legacy USB support from the BIOS is no longer used.
To install an operating system that supports USB, verify that Legacy USB support in the BIOS
Setup program is set to Enabled and follow the operating system’s installation instructions.
3.6 BIOS Updates
The BIOS can be updated using either of the following utilities, which are available on the Intel
World Wide Web site:
•
Intel® Express BIOS Update utility, which enables automated updating while in the Windows
environment. Using this utility, the BIOS can be updated from a file on a hard disk, a 1.44 MB
diskette, or a CD-ROM, or from the file location on the Web.
•
Intel® Flash Memory Update Utility, which requires creation of a boot diskette and manual
rebooting of the system. Using this utility, the BIOS can be updated from a file on a 1.44 MB
diskette (from a legacy diskette drive or an LS-120 diskette drive) or a CD-ROM.
Both utilities verify that the updated BIOS matches the target system to prevent accidentally
installing an incompatible BIOS.
NOTE
✏
Review the instructions distributed with the upgrade utility before attempting a BIOS update.
For information about
Refer to
The Intel World Wide Web site
Section 1.4, page 19
3.6.1 Language Support
The BIOS Setup program and help messages are supported in US English. Additional languages
are available in the Integrator’s Toolkit utility. Check the Intel website for details.
3.6.2 Custom Splash Screen
During POST, an Intel® splash screen is displayed by default. This splash screen can be augmented
with a custom splash screen. The Integrator’s Toolkit that is available from Intel can be used to
create a custom splash screen.
NOTE
✏
If you add a custom splash screen, it will share space with the Intel branded logo.
For information about
Refer to
The Intel World Wide Web site
Section 1.4, page 19
98
Overview of BIOS Features
3.7 Boot Options
In the BIOS Setup program, the user can choose to boot from a diskette drive, hard drives,
CD-ROM, or the network. The default setting is for the diskette drive to be the first boot device,
the hard drive second, and the ATAPI CD-ROM third. The fourth device is disabled.
3.7.1 CD-ROM Boot
Booting from CD-ROM is supported in compliance to the El Torito bootable CD-ROM format
specification. Under the Boot menu in the BIOS Setup program, ATAPI CD-ROM is listed as a
boot device. Boot devices are defined in priority order. Accordingly, if there is not a bootable CD
in the CD-ROM drive, the system will attempt to boot from the next defined drive.
3.7.2 Network Boot
The network can be selected as a boot device. This selection allows booting from the onboard LAN
or a network add-in card with a remote boot ROM installed.
Pressing the <F12> key during POST automatically forces booting from the LAN. To use this key
during POST, the User Access Level in the BIOS Setup program's Security menu must be
set to Full.
3.7.3 Booting Without Attached Devices
For use in embedded applications, the BIOS has been designed so that after passing the POST, the
operating system loader is invoked even if the following devices are not present:
•
•
•
Video adapter
Keyboard
Mouse
3.7.4 Changing the Default Boot Device During POST
Pressing the <F10> key during POST causes a boot device menu to be displayed. This menu
displays the list of available boot devices (as set in the BIOS setup program’s Boot Device Priority
Submenu). Table 46 lists the boot device menu options.
Table 46. Boot Device Menu Options
Boot Device Menu Function Keys
Description
<↑> or <↓>
<Enter>
<Esc>
Selects a default boot device
Exits the menu, saves changes, and boots from the selected device
Exits the menu without saving changes
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Intel Desktop Board D925XCV/D925XBC Technical Product Specification
3.8 Fast Booting Systems with Intel® Rapid BIOS Boot
These factors affect system boot speed:
•
•
Selecting and configuring peripherals properly
Using an optimized BIOS, such as the Intel® Rapid BIOS
3.8.1 Peripheral Selection and Configuration
The following techniques help improve system boot speed:
•
•
•
•
Choose a hard drive with parameters such as “power-up to data ready” less than eight seconds,
that minimize hard drive startup delays.
Select a CD-ROM drive with a fast initialization rate. This rate can influence POST
execution time.
Eliminate unnecessary add-in adapter features, such as logo displays, screen repaints, or mode
changes in POST. These features may add time to the boot process.
Try different monitors. Some monitors initialize and communicate with the BIOS more
quickly, which enables the system to boot more quickly.
3.8.2 Intel Rapid BIOS Boot
Use of the following BIOS Setup program settings reduces the POST execution time.
In the Boot Menu:
•
•
•
Set the hard disk drive as the first boot device. As a result, the POST does not first seek a
diskette drive, which saves about one second from the POST execution time.
Disable Quiet Boot, which eliminates display of the logo splash screen. This could save several
seconds of painting complex graphic images and changing video modes.
Enable Intel Rapid BIOS Boot. This feature bypasses memory count and the search for a
diskette drive.
In the Peripheral Configuration submenu, disable the LAN device if it will not be used. This can
reduce up to four seconds of option ROM boot time.
NOTE
✏
It is possible to optimize the boot process to the point where the system boots so quickly that the
Intel logo screen (or a custom logo splash screen) will not be seen. Monitors and hard disk drives
with minimum initialization times can also contribute to a boot time that might be so fast that
necessary logo screens and POST messages cannot be seen.
This boot time may be so fast that some drives might be not be initialized at all. If this condition
should occur, it is possible to introduce a programmable delay ranging from three to 30 seconds
(using the Hard Disk Pre-Delay feature of the Advanced Menu in the Drive Configuration Submenu
of the BIOS Setup program).
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Overview of BIOS Features
3.9 BIOS Security Features
The BIOS includes security features that restrict access to the BIOS Setup program and who can
boot the computer. A supervisor password and a user password can be set for the BIOS Setup
program and for booting the computer, with the following restrictions:
•
•
•
•
The supervisor password gives unrestricted access to view and change all the Setup options in
the BIOS Setup program. This is the supervisor mode.
The user password gives restricted access to view and change Setup options in the BIOS Setup
program. This is the user mode.
If only the supervisor password is set, pressing the <Enter> key at the password prompt of the
BIOS Setup program allows the user restricted access to Setup.
If both the supervisor and user passwords are set, users can enter either the supervisor password
or the user password to access Setup. Users have access to Setup respective to which password
is entered.
•
Setting the user password restricts who can boot the computer. The password prompt will be
displayed before the computer is booted. If only the supervisor password is set, the computer
boots without asking for a password. If both passwords are set, the user can enter either
password to boot the computer.
•
•
For enhanced security, use different passwords for the supervisor and user passwords.
Valid password characters are A-Z, a-z, and 0-9. Passwords may be up to 16 characters in
length.
Table 47 shows the effects of setting the supervisor password and user password. This table is for
reference only and is not displayed on the screen.
Table 47. Supervisor and User Password Functions
Supervisor
Password Set Mode
Password to
Enter Setup
Password
During Boot
User Mode
Setup Options
Neither
Can change all Can change all None
None
None
(Note)
(Note)
options
options
Supervisor
only
Can change all Can change a Supervisor Password
Supervisor
None
options
N/A
limited number
of options
User only
Can change all Enter Password
User
User
options
Clear User Password
Supervisor
and user set
Can change all Can change a Supervisor Password
Supervisor or
user
Supervisor or
user
options
limited number Enter Password
of options
Note:
If no password is set, any user can change all Setup options.
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Intel Desktop Board D925XCV/D925XBC Technical Product Specification
102
4 Error Messages and Beep Codes
What This Chapter Contains
4.1 BIOS Error Messages ................................................................................................103
4.2 Port 80h POST Codes ...............................................................................................105
4.3 Bus Initialization Checkpoints ....................................................................................109
4.4 Speaker .....................................................................................................................110
4.5 BIOS Beep Codes......................................................................................................110
4.1 BIOS Error Messages
Table 48 lists the error messages and provides a brief description of each.
Table 48. BIOS Error Messages
Error Message
Explanation
GA20 Error
An error occurred with Gate A20 when switching to protected
mode during the memory test.
Pri Master HDD Error
Pri Slave HDD Error
Could not read sector from corresponding drive.
Pri Master Drive - ATAPI Incompatible
Pri Slave Drive - ATAPI Incompatible
Corresponding drive in not an ATAPI device. Run Setup to make
sure device is selected correctly.
A: Drive Error
No response from diskette drive.
Cache Memory Bad
An error occurred when testing L2 cache. Cache memory may be
bad.
CMOS Battery Low
The battery may be losing power. Replace the battery soon.
CMOS Display Type Wrong
The display type is different than what has been stored in CMOS.
Check Setup to make sure type is correct.
CMOS Checksum Bad
CMOS Settings Wrong
CMOS Date/Time Not Set
The CMOS checksum is incorrect. CMOS memory may have
been corrupted. Run Setup to reset values.
CMOS values are not the same as the last boot. These values
have either been corrupted or the battery has failed.
The time and/or date values stored in CMOS are invalid. Run
Setup to set correct values.
DMA Error
Error during read/write test of DMA controller.
Error occurred trying to access diskette drive controller.
Error occurred trying to access hard disk controller.
NVRAM is being checked to see if it is valid.
FDC Failure
HDC Failure
Checking NVRAM.....
continued
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Intel Desktop Board D925XCV/D925XBC Technical Product Specification
Table 48. BIOS Error Messages (continued)
Error Message
Update OK!
Explanation
NVRAM was invalid and has been updated.
NVRAM was invalid but was unable to be updated.
Updated Failed
Keyboard Error
Error in the keyboard connection. Make sure keyboard is
connected properly.
KB/Interface Error
Keyboard interface test failed.
Memory Size Decreased
Memory size has decreased since the last boot. If no memory was
removed then memory may be bad.
Memory Size Increased
Memory Size Changed
Memory size has increased since the last boot. If no memory was
added there may be a problem with the system.
Memory size has changed since the last boot. If no memory was
added or removed then memory may be bad.
No Boot Device Available
Off Board Parity Error
System did not find a device to boot.
A parity error occurred on an off-board card. This error is followed
by an address.
On Board Parity Error
Parity Error
A parity error occurred in onboard memory. This error is followed
by an address.
A parity error occurred in onboard memory at an unknown
address.
NVRAM/CMOS/PASSWORD cleared by NVRAM, CMOS, and passwords have been cleared. The system
Jumper
should be powered down and the jumper removed.
<CTRL_N> Pressed
CMOS is ignored and NVRAM is cleared. User must enter Setup.
104
Error Messages and Beep Codes
4.2 Port 80h POST Codes
During the POST, the BIOS generates diagnostic progress codes (POST-codes) to I/O port 80h. If
the POST fails, execution stops and the last POST code generated is left at port 80h. This code is
useful for determining the point where an error occurred.
Displaying the POST-codes requires a PCI bus add-in card, often called a POST card. The POST
card can decode the port and display the contents on a medium such as a seven-segment display.
NOTE
✏
The POST card must be installed in PCI bus connector 1.
The tables below offer descriptions of the POST codes generated by the BIOS. Table 49 defines
the uncompressed INIT code checkpoints, Table 50 describes the boot block recovery code
checkpoints, and Table 51 lists the runtime code uncompressed in F000 shadow RAM. Some codes
are repeated in the tables because that code applies to more than one operation.
Table 49. Uncompressed INIT Code Checkpoints
Code
Description of POST Operation
D0
NMI is Disabled. Onboard KBC, RTC enabled (if present). Init code Checksum verification
starting.
D1
D3
D4
D5
D6
Keyboard controller BAT test, CPU ID saved, and going to 4 GB flat mode.
Do necessary chipset initialization, start memory refresh, and do memory sizing.
Verify base memory.
Init code to be copied to segment 0 and control to be transferred to segment 0.
Control is in segment 0. To check recovery mode and verify main BIOS checksum. If either it is
recovery mode or main BIOS checksum is bad, go to check point E0 for recovery else go to check
point D7 for giving control to main BIOS.
D7
D8
D9
Find Main BIOS module in ROM image.
Uncompress the main BIOS module.
Copy main BIOS image to F000 shadow RAM and give control to main BIOS in F000
shadow RAM.
Table 50. Boot Block Recovery Code Checkpoints
Code
Description of POST Operation
E0
Onboard Floppy Controller (if any) is initialized. Compressed recovery code is uncompressed in
F000:0000 in Shadow RAM and give control to recovery code in F000 Shadow RAM. Initialize
interrupt vector tables, initialize system timer, initialize DMA controller and interrupt controller.
E8
E9
EA
EB
EC
EF
Initialize extra (Intel Recovery) Module.
Initialize floppy drive.
Try to boot from floppy. If reading of boot sector is successful, give control to boot sector code.
Booting from floppy failed, look for ATAPI (LS-120, Zip) devices.
Try to boot from ATAPI. If reading of boot sector is successful, give control to boot sector code.
Booting from floppy and ATAPI device failed. Give two beeps. Retry the booting procedure again
(go to check point E9).
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Intel Desktop Board D925XCV/D925XBC Technical Product Specification
Table 51. Runtime Code Uncompressed in F000 Shadow RAM
Code
03
Description of POST Operation
NMI is Disabled. To check soft reset/power-on.
BIOS stack set. Going to disable cache if any.
POST code to be uncompressed.
05
06
07
CPU init and CPU data area init to be done.
08
CMOS checksum calculation to be done next.
Any initialization before keyboard BAT to be done next.
KB controller I/B free. To issue the BAT command to keyboard controller.
Any initialization after KB controller BAT to be done next.
Keyboard command byte to be written.
0B
0C
0E
0F
10
Going to issue Pin-23,24 blocking/unblocking command.
Going to check pressing of <INS>, <END> key during power-on.
11
12
To init CMOS if "Init CMOS in every boot" is set or <END> key is pressed. Going to disable DMA
and Interrupt controllers.
13
14
19
1A
23
Video display is disabled and port-B is initialized. Chipset init about to begin.
8254 timer test about to start.
About to start memory refresh test.
Memory Refresh line is toggling. Going to check 15 µs ON/OFF time.
To read 8042 input port and disable Megakey GreenPC feature. Make BIOS code segment
writeable.
24
25
27
28
2A
To do any setup before Int vector init.
Interrupt vector initialization to begin. To clear password if necessary.
Any initialization before setting video mode to be done.
Going for monochrome mode and color mode setting.
Different buses init (system, static, output devices) to start if present. (See Section 4.3 for details
of different buses.)
2B
2C
2D
2E
2F
30
31
32
34
37
38
To give control for any setup required before optional video ROM check.
To look for optional video ROM and give control.
To give control to do any processing after video ROM returns control.
If EGA/VGA not found then do display memory R/W test.
EGA/VGA not found. Display memory R/W test about to begin.
Display memory R/W test passed. About to look for the retrace checking.
Display memory R/W test or retrace checking failed. To do alternate Display memory R/W test.
Alternate Display memory R/W test passed. To look for the alternate display retrace checking.
Video display checking over. Display mode to be set next.
Display mode set. Going to display the power-on message.
Different buses init (input, IPL, general devices) to start if present. (See Section 4.3 for details of
different buses.)
39
3A
Display different buses initialization error messages. (See Section 4.3 for details of different
buses.)
New cursor position read and saved. To display the Hit <DEL> message.
continued
106
Error Messages and Beep Codes
Table 51. Runtime Code Uncompressed in F000 Shadow RAM (continued)
Code
40
Description of POST Operation
To prepare the descriptor tables.
42
To enter in virtual mode for memory test.
To enable interrupts for diagnostics mode.
To initialize data to check memory wrap around at 0:0.
43
44
45
Data initialized. Going to check for memory wrap around at 0:0 and finding the total system
memory size.
46
Memory wrap around test done. Memory size calculation over. About to go for writing patterns to
test memory.
47
48
49
Pattern to be tested written in extended memory. Going to write patterns in base 640k memory.
Patterns written in base memory. Going to find out amount of memory below 1M memory.
Amount of memory below 1M found and verified. Going to find out amount of memory above 1M
memory.
4B
Amount of memory above 1M found and verified. Check for soft reset and going to clear memory
below 1M for soft reset. (If power on, go to check point # 4Eh).
4C
4D
Memory below 1M cleared. (SOFT RESET) Going to clear memory above 1M.
Memory above 1M cleared. (SOFT RESET) Going to save the memory size. (Go to check
point # 52h).
4E
4F
Memory test started. (NOT SOFT RESET) About to display the first 64k memory size.
Memory size display started. This will be updated during memory test. Going for sequential and
random memory test.
50
Memory testing/initialization below 1M complete. Going to adjust displayed memory size for
relocation/shadow.
51
52
53
54
57
Memory size display adjusted due to relocation/ shadow. Memory test above 1M to follow.
Memory testing/initialization above 1M complete. Going to save memory size information.
Memory size information is saved. CPU registers are saved. Going to enter in real mode.
Shutdown successful, CPU in real mode. Going to disable gate A20 line and disable parity/NMI.
A20 address line, parity/NMI disable successful. Going to adjust memory size depending on
relocation/shadow.
58
59
Memory size adjusted for relocation/shadow. Going to clear Hit <DEL> message.
Hit <DEL> message cleared. <WAIT...> message displayed. About to start DMA and interrupt
controller test.
60
62
65
66
7F
80
DMA page register test passed. To do DMA#1 base register test.
DMA#1 base register test passed. To do DMA#2 base register test.
DMA#2 base register test passed. To program DMA unit 1 and 2.
DMA unit 1 and 2 programming over. To initialize 8259 interrupt controller.
Extended NMI sources enabling is in progress.
Keyboard test started. Clearing output buffer, checking for stuck key, to issue keyboard reset
command.
81
82
83
Keyboard reset error/stuck key found. To issue keyboard controller interface test command.
Keyboard controller interface test over. To write command byte and init circular buffer.
Command byte written, global data init done. To check for lock-key.
continued
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Intel Desktop Board D925XCV/D925XBC Technical Product Specification
Table 51. Runtime Code Uncompressed in F000 Shadow RAM (continued)
Code
84
Description of POST Operation
Lock-key checking over. To check for memory size mismatch with CMOS.
Memory size check done. To display soft error and check for password or bypass setup.
Password checked. About to do programming before setup.
85
86
87
Programming before setup complete. To uncompress SETUP code and execute CMOS setup.
Returned from CMOS setup program and screen is cleared. About to do programming after setup.
Programming after setup complete. Going to display power-on screen message.
88
89
8B
First screen message displayed. <WAIT...> message displayed. PS/2 Mouse check and
extended BIOS data area allocation to be done.
8C
8D
8F
91
95
Setup options programming after CMOS setup about to start.
Going for hard disk controller reset.
Hard disk controller reset done. Floppy setup to be done next.
Floppy setup complete. Hard disk setup to be done next.
Init of different buses optional ROMs from C800 to start. (See Section 4.3 for details of different
buses.)
96
97
Going to do any init before C800 optional ROM control.
Any init before C800 optional ROM control is over. Optional ROM check and control will be
done next.
98
99
Optional ROM control is done. About to give control to do any required processing after optional
ROM returns control and enable external cache.
Any initialization required after optional ROM test over. Going to setup timer data area and printer
base address.
9A
9B
9C
9D
9E
Return after setting timer and printer base address. Going to set the RS-232 base address.
Returned after RS-232 base address. Going to do any initialization before Coprocessor test.
Required initialization before Coprocessor is over. Going to initialize the Coprocessor next.
Coprocessor initialized. Going to do any initialization after Coprocessor test.
Initialization after Coprocessor test is complete. Going to check extended keyboard, keyboard ID
and num-lock.
A2
A3
A4
A5
A7
Going to display any soft errors.
Soft error display complete. Going to set keyboard typematic rate.
Keyboard typematic rate set. To program memory wait states.
Going to enable parity/NMI.
NMI and parity enabled. Going to do any initialization required before giving control to optional
ROM at E000.
A8
A9
Initialization before E000 ROM control over. E000 ROM to get control next.
Returned from E000 ROM control. Going to do any initialization required after E000 optional ROM
control.
AA
AB
AC
AD
Initialization after E000 optional ROM control is over. Going to display the system configuration.
Put INT13 module runtime image to shadow.
Generate MP for multiprocessor support (if present).
Put CGA INT10 module (if present) in Shadow.
continued
108
Error Messages and Beep Codes
Table 51. Runtime Code Uncompressed in F000 Shadow RAM (continued)
Code
Description of POST Operation
AE
Uncompress SMBIOS module and init SMBIOS code and form the runtime SMBIOS image in
shadow.
B1
00
Going to copy any code to specific area.
Copying of code to specific area done. Going to give control to INT-19 boot loader.
4.3 Bus Initialization Checkpoints
The system BIOS gives control to the different buses at several checkpoints to do various tasks.
Table 52 describes the bus initialization checkpoints.
Table 52. Bus Initialization Checkpoints
Checkpoint
Description
2A
38
39
95
Different buses init (system, static, and output devices) to start if present.
Different buses init (input, IPL, and general devices) to start if present.
Display different buses initialization error messages.
Init of different buses optional ROMs from C800 to start.
While control is inside the different bus routines, additional checkpoints are output to port 80h as
WORD to identify the routines under execution. In these WORD checkpoints, the low byte of the
checkpoint is the system BIOS checkpoint from which the control is passed to the different bus
routines. The high byte of the checkpoint is the indication of which routine is being executed in the
different buses. Table 53 describes the upper nibble of the high byte and indicates the function that
is being executed.
Table 53. Upper Nibble High Byte Functions
Value
Description
0
1
2
3
4
5
6
7
func#0, disable all devices on the bus concerned.
func#1, static devices init on the bus concerned.
func#2, output device init on the bus concerned.
func#3, input device init on the bus concerned.
func#4, IPL device init on the bus concerned.
func#5, general device init on the bus concerned.
func#6, error reporting for the bus concerned.
func#7, add-on ROM init for all buses.
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Intel Desktop Board D925XCV/D925XBC Technical Product Specification
Table 54 describes the lower nibble of the high byte and indicates the bus on which the routines are
being executed.
Table 54. Lower Nibble High Byte Functions
Value
Description
0
1
2
3
4
5
Generic DIM (Device Initialization Manager)
On-board System devices
ISA devices
EISA devices
ISA PnP devices
PCI devices
4.4 Speaker
A 47 Ω inductive speaker is mounted on the Desktop Board D925XCV and the Desktop Board
D925XBC. The speaker provides audible error code (beep code) information during POST.
For information about
Refer to
The location of the onboard speaker on the Desktop Board D925XCV
The location of the onboard speaker on the Desktop Board D925XBC
Figure 1, on page 14
Figure 2, on page 16
4.5 BIOS Beep Codes
Whenever a recoverable error occurs during POST, the BIOS displays an error message describing
the problem (see Table 55). The BIOS also issues a beep code (one long tone followed by two
short tones) during POST if the video configuration fails (a faulty video card or no card installed)
or if an external ROM module does not properly checksum to zero.
An external ROM module (for example, a video BIOS) can also issue audible errors, usually
consisting of one long tone followed by a series of short tones. For more information on the beep
codes issued, check the documentation for that external device.
There are several POST routines that issue a POST terminal error and shut down the system if they
fail. Before shutting down the system, the terminal-error handler issues a beep code signifying the
test point error, writes the error to I/O port 80h, attempts to initialize the video and writes the error
in the upper left corner of the screen (using both monochrome and color adapters).
110
Error Messages and Beep Codes
If POST completes normally, the BIOS issues one short beep before passing control to the
operating system.
Table 55. Beep Codes
Beep
Description
CPU error
1
3
6
7
8
Memory error
System failure
System failure
Video error
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Intel Desktop Board D925XCV/D925XBC Technical Product Specification
112
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