Philips TEA5880TS User Manual

TEA5880TS  
Integrated FM stereo radio IC for host processor tuning in  
handheld applications  
Rev. 02 — 26 April 2004  
Preliminary data sheet  
1. General description  
The TEA5880TS stereo FM radio IC dramatically reduces the printed-circuit board area  
(only 100 mm2) needed to integrate FM radio functionality into portable devices. This  
makes it invaluable for any application where space is at a premium.  
Relying on a system host processor for radio tuning, the TEA5880TS is ideally suited for  
powerful devices such as PDAs, notebooks, portable CD and MP3 players.  
2. Features  
No alignments necessary  
Complete adjustment-free stereo decoder; no external crystal required  
Fully integrated MPX VCO circuit  
Fully integrated low IF selectivity and demodulation  
The full integration level means no or few external components required  
No external FM discriminator needed due to full integration  
Built-in adjacent channel interference total reduction (no 114 kHz, no 190 kHz)  
The level of the incoming signal at which the radio must lock is software programmable  
Due to new tuning concept, the tuning is independent of the channel spacing  
Very high sensitivity due to integrated low noise RF input amplifier  
RF Automatic Gain Control (AGC) circuit  
Standby mode for power-down, no power switch circuitry required  
2.7 V minimum supply voltage  
MPX output for RDS  
3-wire bus  
In combination with the host, fast, low power operation of preset mode, manual search,  
automatic search and automatic store are possible  
Host can be in Sleep mode after tuning; a minute retuning is recommended to  
compensate for temperature and voltage fluctuations  
Covers all Japanese, European and US bands.  
   
TEA5880TS  
Philips Semiconductors  
Integrated FM stereo radio IC for host processor tuning  
Table 1:  
Quick reference data …continued  
VCCA = VCCD  
Symbol Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
THD  
total harmonic distortion VRF = 1 mV; left = right; f = 75 kHz;  
mod = 1 kHz; BAF = 300 Hz to 15 kHz  
-
0.7  
1.5  
%
f
VRF = 1 mV; left = right; f = 22.5 kHz;  
mod = 1 kHz; BAF = 300 Hz to 15 kHz  
-
-
0.2  
0.7  
-
%
f
integrated de-emphasis  
50/75  
µs  
DEEM  
4. Ordering information  
Table 2:  
Ordering information  
Type number Package  
Name  
Description  
plastic shrink small outline package; 24 leads; body width 5.3 mm  
Version  
SOT340-1  
TEA5880TS  
SSOP24  
9397 750 13022  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Preliminary data sheet  
Rev. 02 — 26 April 2004  
3 of 27  
 
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MICROCONTROLLER  
reserved  
LR1  
17  
V
V
LL1  
20  
R/W  
6
CLOCK  
8
DATA  
7
CC1  
CC1  
18  
19  
21  
QUADRATURE  
OSCILLATOR  
TUNING  
SYSTEM  
DIGITAL  
INTERFACE  
LEVEL VOLTAGE  
GENERATOR  
1
2
RFIN  
10  
11  
AUDL  
AUDR  
QUADRATURE  
MIXER  
STEREO  
DECODER  
DE-EMPHASIS  
DE-EMPHASIS  
15 kHz  
SELECTIVITY  
DEMODULATOR  
MIXER  
50/75 µs  
RFGND  
9
MPX  
TEA5880TS  
POWER  
SWITCH  
STABILISATOR  
5
4
3, 13, 24  
GND  
12  
LED  
14, 15, 16, 22, 23  
001aaa665  
V
V
n.c.  
CCA  
CCD  
Fig 1. Block diagram.  
Depending on the antenna design the filter components at pins 1 and 2 may not be necessary. The only two remaining coils connected to pin  
17 to 20 can be replaced by printed-circuit board traces that will fit underneath the TEA5880TS resulting in a design without any external  
components; see Section 14 for details on the printed-circuit board coils.  
 
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MICROCONTROLLER  
reserved  
LR1  
17  
V
V
LL1  
20  
R/W  
6
CLOCK  
8
DATA  
7
CC1  
CC1  
18  
19  
21  
QUADRATURE  
OSCILLATOR  
TUNING  
SYSTEM  
DIGITAL  
INTERFACE  
LEVEL VOLTAGE  
GENERATOR  
10  
11  
AUDL  
AUDR  
RFIN  
QUADRATURE  
MIXER  
STEREO  
DECODER  
DE-EMPHASIS  
DE-EMPHASIS  
15 kHz  
SELECTIVITY  
DEMODULATOR  
MIXER  
50/75 µs  
RFGND  
9
MPX  
TEA5880TS  
POWER  
SWITCH  
STABILISATOR  
5
4
3, 13, 24  
GND  
12  
LED  
14, 15, 16, 22, 23  
001aaa666  
V
V
n.c.  
CCA  
CCD  
Fig 2. Block diagram (no external components).  
TEA5880TS  
Philips Semiconductors  
Integrated FM stereo radio IC for host processor tuning  
6. Pinning information  
6.1 Pin description  
Table 3:  
Symbol  
RFIN  
RFGND  
GND  
VCCD  
VCCA  
R/W  
Pin description  
Pin  
1
Description  
RF input  
2
RF ground  
3
ground  
4
digital supply voltage  
analog supply voltage  
digital read/write command input  
bidirectional digital data line  
digital data clock line input  
FM MPX signal output  
audio left channel output  
audio right channel output  
stereo LED output  
ground  
5
6
DATA  
CLOCK  
MPX  
AUDL  
AUDR  
LED  
7
8
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
GND  
n.c.  
not connected  
n.c.  
not connected  
n.c.  
not connected  
LR1  
coil right  
VCC1  
VCC1  
LL1  
internal analog voltage  
internal analog voltage  
coil left  
reserved  
n.c.  
reserved for testing use  
not connected  
n.c.  
not connected  
GND  
ground  
9397 750 13022  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Preliminary data sheet  
Rev. 02 — 26 April 2004  
6 of 27  
   
TEA5880TS  
Philips Semiconductors  
Integrated FM stereo radio IC for host processor tuning  
RFIN  
RFGND  
GND  
1
2
3
4
5
6
7
8
9
24 GND  
23 n.c.  
22 n.c.  
V
21 reserved  
20 LL1  
CCD  
V
CCA  
R/W  
DATA  
CLOCK  
MPX  
19  
18  
V
V
CC1  
CC1  
TEA5880TS  
17 LR1  
16 n.c.  
15 n.c.  
14 n.c.  
13 GND  
AUDL 10  
AUDR 11  
LED 12  
001aaa667  
Fig 3. Pin configuration.  
7. Functional description  
7.1 FM quadrature mixer  
The FM quadrature mixer converts FM RF (76 MHz to 108 MHz) to an IF of 110 kHz. The  
FM quadrature mixer provides inherent image rejection.  
7.2 Quadrature oscillator  
The internally tuned LC VCO provides the Local Oscillator (LO) signal for the FM  
quadrature mixer. The VCO frequency range is 150 MHz to 217 MHz.  
7.3 Selectivity  
Fully integrated I and Q channel IF filter.  
7.4 Demodulator  
The FM quadrature demodulator is an integrated PLL demodulator.  
7.5 Level voltage generator and analog-to-digital converter  
The level voltage is analog-to-digital converted with 3 bits and output via the data line.  
7.6 IF counter  
The IF counter outputs a 16-bit count result via the data line.  
7.7 Mute  
The digital interface controls the audio mute and output level.  
9397 750 13022  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Preliminary data sheet  
Rev. 02 — 26 April 2004  
7 of 27  
               
TEA5880TS  
Philips Semiconductors  
Integrated FM stereo radio IC for host processor tuning  
7.8 Stereo decoder  
The PLL stereo decoder is adjustment free. The stereo decoder can be switched to mono  
via the digital interface.  
8. Digital interface (3-wire bus)  
The TEA5880TS has a 3-wire bus with read/write, clock and data line.  
The register set of the TEA5880TS can be accessed via the digital interface.  
The pins given in Table 4 are defined for the digital interface of the TEA5880TS.  
Table 4:  
Digital interface pins  
Pin number Name  
Type  
Description  
Remark  
Pin 6  
R/W  
input  
LOW is read from TEA5880TS;  
HIGH is write to TEA5880TS  
Pin 8  
Pin 7  
CLOCK  
DATA  
input  
clock  
rising edge  
input/output bidirectional data  
R/W  
stereo LED  
OUTPUT  
SOURCE  
stereo clock  
IF OSC  
SELECTOR  
FM OSC  
CLOCK  
R/W  
15 BITS SIPO (SERIAL IN PARALLEL OUT)  
4 bits data 11 bits data  
CONTROL  
REGISTER A  
control bits  
control bits  
control bits  
DATA  
ADDRESS  
DECODER  
CONTROL  
REGISTER B  
CONTROL  
REGISTER C  
REST OF THE  
REGISTERS  
control bits  
R/W  
COUNTER 1 (16 bits)  
16 bits data  
STATUS REGISTER  
16 bits data  
1-bit data  
enable  
counter 1  
16 BITS PISO (PARALLEL IN SERIAL OUT)  
CLOCK R/W  
001aaa668  
Fig 4. Digital interface block diagram.  
9397 750 13022  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Preliminary data sheet  
Rev. 02 — 26 April 2004  
8 of 27  
     
TEA5880TS  
Philips Semiconductors  
Integrated FM stereo radio IC for host processor tuning  
8.1 Register description  
Table 5:  
Address  
0000b  
TEA5880TS registers description  
Register name  
VADC  
Access  
Operation  
Data width  
11 bits  
Clocks  
15  
write only  
write only  
write only  
write only  
VADC register  
control register C  
control register A  
0001b  
CTRL_C  
11 bits  
15  
0010b  
CTRL_A  
11 bits  
15  
0011b  
OSC_STEREO  
oscillator stereo  
decoder clock  
11 bits  
15  
0100b  
0101b  
0110b  
0111b  
-
CTRL_B  
CAP_FM  
OSC_IF  
write only  
write only  
write only  
write only  
read only  
read only  
control register B  
capacitor bank FM  
oscillator IF  
11 bits  
11 bits  
11 bits  
11 bits  
16 bits  
16 bits  
15  
15  
15  
15  
15  
15  
OSC_FM  
STATUS  
COUNTER  
oscillator FM  
status register  
counter register  
-
Table 6:  
Bit  
VADC - (address 0h) bit description  
Symbol  
Description  
14 to 11  
10 to 6  
5
-
address bits  
VADC2[4:0] controls the width filter  
-
not applicable; should be written to logic 0  
4 to 0  
VADC1[4:0] controls the center filter  
Table 7:  
Bit  
CTRL_C - (address 1h) bit description [1]  
Symbol  
Description  
14 to 11  
10 and 9  
8
-
-
-
-
-
address bits  
reserved for production test; should be written to logic 0  
reserved for swapping counters1 and 2; should be written to logic 0  
not applicable; should be written to logic 0  
7 to 4  
3 to 1  
reserved for time delay selection (counter 2); application should keep  
bits 3 to 1 at logic 0; see Table 8  
0
-
reserved for enable counter 2; should be written to logic 0  
[1] The application should write logic 0 to this register at start-up to ensure that the device functions correctly.  
Table 8:  
Value  
000b  
001b  
010b  
011b  
100b  
101b  
110b  
111b  
Time delay selection  
Decimal  
Stop value  
count 2  
0
1
2
3
4
5
6
7
count 8  
count 32  
count 128  
count 512  
count 2048  
count 8192  
count 32768  
9397 750 13022  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Preliminary data sheet  
Rev. 02 — 26 April 2004  
9 of 27  
     
TEA5880TS  
Philips Semiconductors  
Integrated FM stereo radio IC for host processor tuning  
Table 9:  
Bit  
CTRL_A - (address 2h) bit description  
Symbol  
Description  
14 to 11  
10 to 7  
-
address bits  
OUTPUT_  
SELECT[3:0]  
selects an internal circuit as output for measurement purpose;  
6
5
STE_PMUTE  
mutes the stereo PLL when set to logic 1; this bit should be  
set during calibration of the stereo decoder clock and should be  
cleared during normal operation  
DEM_PMUTE  
mutes the demodulator PLL when set to logic 1; this bit  
should be set during calibration of the IF frequency and should  
be cleared during normal operation  
4
3
2
1
0
STE_INT_OFF#  
turns off the stereo integrator loop when set to logic 0  
enables measurement when set to logic 0  
mutes the audio when set to logic 1  
EN_MEAS#  
AMUTE  
FM  
-
enables the FM circuitry when set to logic 1  
reserved for AM circuitry; should be written to logic 0  
Table 10: Description of OUTPUT_SELECT bits  
Symbol  
Value  
0000b  
0001b  
0010b  
0011b  
0100b  
0101b  
0110b  
0111b  
1000b  
1001b  
Decimal Output selected  
OS-NONE  
0
no output selected  
FM oscillator  
OS_FM_OSC  
OS_NA2  
1
2
not defined  
OS_CNT2_RDY_NA  
OS_NA4  
3
reserved for counter 2 ready output  
not defined  
4
OS_STEREO_DEC  
OS_NA6  
5
stereo decoder clock  
not defined  
6
OS_STEREO_LED  
OS_NA8  
7
stereo LED  
8
not defined  
OS_IF_OSC  
9
IF oscillator  
OS_INTERRUPT_NA 1010b  
10  
11  
reserved for interrupt output  
OS_PISO  
1011b  
PISO output (reading STATUS / COUNTER  
register)  
OS_NA12  
OS_RDS_NA  
OS_NA14  
OS_NA15  
1100b  
1101b  
1110b  
1111b  
12  
13  
14  
15  
not defined  
reserved for RDS output  
not defined  
not defined  
Table 11: OSC_STEREO - (address 3h) bit description[1]  
Bit  
Symbol Description  
address bits  
SO[10:0] 11-bit digital-to-analog converter for adjusting the stereo decoder clock  
14 to 11  
10 to 0  
-
[1] The frequency is decreased when increasing the content of this register.  
9397 750 13022  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Preliminary data sheet  
Rev. 02 — 26 April 2004  
10 of 27  
   
TEA5880TS  
Philips Semiconductors  
Integrated FM stereo radio IC for host processor tuning  
Table 12: CTRL_B - (address 4h) bit description  
Bit Symbol Description  
14 to 11 -  
address bits  
10  
L_CNT  
latch counter: a transition from logic 1 to logic 0 will latch the  
COUNTER register into the PISO (reading the PISO hereafter will read  
the COUNTER register)  
9
L_STS  
-
latch status: a transition from logic 1 to logic 0 will latch the STATUS  
register into the PISO (reading the PISO hereafter will read the STATUS  
register)  
8 to 6  
reserved for output level control; should be written with 4 (100b);  
5
4
DEEMP  
de-emphasis: logic 1 is 75 µs (USA), logic 0 is 50 µs (Europe, Japan)  
PISO_CLR  
a transition from logic 1 to logic 0 will clear the PISO; the PISO should  
be clear before reading the STATUS/COUNTER register  
3
2
1
0
CNT_RST  
CNT1_EN  
-
a transition from logic 1 to logic 0 will clear both counter 1 and counter 2  
counter 1 enabled (counting mode) when set to logic 1  
should be written to logic 0  
MONO  
mono mode when set to logic 1, stereo mode when set to logic 0  
Table 13: Description of output level control register bits  
Value  
0000b  
0001b  
0010b  
0011b  
0100b  
0101b  
0110b  
Decimal  
Output level  
12 mV  
0
1
2
3
4
5
6
20 mV  
35 mV  
60 mV  
100 mV  
170 mV  
200 mV  
Table 14: CAP_FM - (address 5h) bit description[1]  
Bit  
Symbol  
Description  
14 to 11 -  
address bits  
10  
-
reserved for capacitor extra current; this bit should be written to logic 1  
by any access to the CAP_FM to ensure that the device functions  
properly  
9 to 8  
7 to 0  
-
reserved, should be written to logic 0  
FC[7:0]  
FM capacitor bank switches for adjusting the FM (RF) frequency in big  
steps. Every bit, when set, will switch on a capacitor with a weight  
according to its position i.e. bit 0 has weight 1, bit 1 has weight 2, bit 2  
has weight 4 etc, bit 6 has weight 64, except for bit 7, which also has the  
same weight as bit 6; there is thus only 712 effective bits; this means  
that the value range 0 to 127 will switch on different capacitors the value  
range 128 to 191 switches on the same capacitors as range 64 to 127,  
the value range 192 to 255 will switch on different capacitors (an  
overlapped range of 64 values caused when FC[7:6] = 01b or 10b)  
[1] The frequency is decreased when increasing the content of this register (more capacitors).  
9397 750 13022  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Preliminary data sheet  
Rev. 02 — 26 April 2004  
11 of 27  
   
TEA5880TS  
Philips Semiconductors  
Integrated FM stereo radio IC for host processor tuning  
Table 15: OSC_IF - (address 6h) bit description[1]  
Bit Symbol Description  
14 to 11 - address bits  
10 to 0 IFO[10:0] 11-bit digital-to-analog converter for adjusting the IF frequency  
[1] The frequency is decreased when increasing the content of this register.  
Table 16: OSC_FM - (address 7h) bit description[1]  
Bit  
Symbol Description  
address bits  
14 to 11 -  
10 to 0 FO[10:0] 11-bit digital-to-analog converter for adjusting the FM frequency in fine steps;  
this register is used in combination with the CAP_FM register to set a FM  
frequency  
[1] The frequency is increased when increasing the content of this register.  
Table 17: STATUS - bit description[1]  
Bit  
Symbol Description  
15 to 9 FS[6:0]  
field strength, indicated by the amount of bits set:  
0 bits set = < 10 dBµV  
1 bit set = 10 dBµV to 20 dBµV  
2 bits set = 20 dBµV to 30 dBµV  
3 bits set = 30 dBµV to 40 dBµV  
4 bits set = 40 dBµV to 50 dBµV  
5 bits set = 50 dBµV to 60 dBµV  
6 bits set = 60 dBµV to 70 dBµV  
7 bits set = > 70 dBµV  
8
-
not applicable; always read as logic 1  
chip revision; the revision for TEA5880TS is 100b  
not applicable; always read as logic 1  
reserved for production test  
7 to 5  
R[2:0]  
4 to 3  
-
-
-
-
2
1
0
not applicable; always read as logic 1  
reserved for production test  
[1] This register does not have an address. To read the status register, latch its content into the PISO (using  
L_STS bit in control register B) then read out the PISO.  
Table 18: COUNTER - bit description[1]  
Bit  
Symbol  
Description  
15 to 0 CNT[15:0] pulses counted during the period that the counter is enabled and the NR/W  
line the 3 wire bus is low  
[1] This register does not have an address. To read the counter register, latch its content into the PISO (using  
L_CNT bit in control register B) then read out the PISO.  
9397 750 13022  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Preliminary data sheet  
Rev. 02 — 26 April 2004  
12 of 27  
     
TEA5880TS  
Philips Semiconductors  
Integrated FM stereo radio IC for host processor tuning  
8.2 Accessing the TEA5880TS  
Access to the TEA5880TS can be achieved via the 3-wire bus. At the host side, the R/W  
and CLOCK are output signals, while the DATA signal is bidirectional.  
When powered up, the host should initialize the 3-wire bus in the host read mode as  
follows:  
1. Set (at host side) the DATA line into input mode  
2. R/W set to LOW  
3. CLOCK set to LOW.  
Note: Use the following sequence for changing read/write mode:  
1. To change from host read mode to host write mode proceed as follows:  
a. Keep the CLOCK signal LOW  
b. Set the R/W signal to HIGH (write mode)  
c. Set the DATA pin (of the application controller) into output mode.  
2. To change from host write mode to host read mode proceed as follows:  
a. Keep the CLOCK signal LOW  
b. Set the DATA pin (of the application controller) into input mode  
c. Set R/W to LOW (input mode).  
8.3 Writing to the TEA5880TS  
Writing to the TEA5880TS is achieved with a 15-bit data pattern:  
D[14:11]: 4-bit register address  
D[10:0]: 11-bit register data.  
The data pattern is sent serially to the TEA5880TS as follows:  
1. Drive R/W pin HIGH to set the TEA5880TS in input mode  
2. Drive the DATA pin to correct level  
3. Generate positive edge of CLOCK (driving CLOCK into LOW-to-HIGH transition)  
4. Delay some time to meet the data hold time requirement  
5. Driving CLOCK into HIGH-to-LOW transition  
6. Repeat step (2) to (5) 15 times to shift the 15-bit data pattern into the TEA5880TS  
7. Drive R/W pin LOW; this signals the TEA5880TS to latch the data into the correct  
register.  
Note: The application should shift the LSB out first.  
9397 750 13022  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Preliminary data sheet  
Rev. 02 — 26 April 2004  
13 of 27  
   
TEA5880TS  
Philips Semiconductors  
Integrated FM stereo radio IC for host processor tuning  
8.4 Reading from the TEA5880TS  
Only the status or the counter register can be read from the TEA5880TS.  
These are 16-bit registers and can be read serially as follow:  
1. Select OS_PISO (parallel in, serial out) as output (control register A,  
OUTPUT_SELECT bits)  
2. Clear the PISO (control register B, PISO_CLR bit, pulse HIGH-to-LOW transition)  
3. Latch the counter register (control register B, L_CNT bit, pulse HIGH-to-LOW  
transition) or the status register (control register B, L_STS bit, pulse HIGH-to-LOW  
transition) into the PISO  
4. Drive R/W pin LOW to set the TEA5880TS in output mode  
5. Read the first bit at pin DATA  
6. Generate positive CLOCK pulse (LOW-to-HIGH transition)  
7. Delay for a period of time to meet the data set-up time requirement  
8. Read the data bit at pin DATA  
9. Drive CLOCK into HIGH-to-LOW transition  
10.Repeat step (6) to (9) 15 times to shift the remaining 15 bits of data out of the chip  
Note: The TEA5880TS will shift the MSB out first.  
8.5 Measuring frequency with the TEA5880TS  
The three frequencies: IF, stereo decoder clock and FM can be measured by using the  
counter register and a software timing window. This is achieved as follows:  
1. Select the output to be measured (control register A, OUTPUT_SELECT bits, select  
OS_STEREO_DEC, OS_IF_OSC or OS_FM_OSC output)  
2. Enable measure mode (clear EN_MEAS# bit of control register A)  
3. Reset the counter (control register B, CNT_RST bit, pulse HIGH-to-LOW transition)  
4. Start the counter on the TEA5880TS (control register B, set CNT1_EN bit); at the  
moment the R/W signal goes LOW the counter starts  
5. Wait time t  
6. To stop the counter, first set the R/W signal HIGH, then disable the counter in the  
TEA5880TS (control register B, clear CNT1_EN bit)  
7. Read the pulse count n from the counter register of the TEA5880TS  
8. Restore the measure mode  
9. Restore the output select bits.  
Note: The measuring window begins at the moment the R/W signal is driven LOW (point  
4) and ends when the R/W signal is driven HIGH (point 6).  
9397 750 13022  
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Preliminary data sheet  
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TEA5880TS  
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Integrated FM stereo radio IC for host processor tuning  
The IF and stereo decoder frequency can be calculated using the equation f = n/t, and the  
FM frequency can be calculated using the equation f = (n/t) x 256.  
Note: The precision of ‘f’ depends on the following:  
The duration of t. 1 pulse wrong at t = 1 ms results in more deviation than at t = 32 ms  
The precision of the measuring window: calculate with t = 32 ms gives other ‘f’ values  
than with t = 32 ms. In the application care should be taken to have an accurate  
measuring window t.  
8.6 Initialize the TEA5880TS  
After power-up, the TEA5880TS needs to be initialized as follows:  
Control register A: STE_PMUTE = 1; DEM_PMUTE = 1; AMUTE = 1; FM = 1; other  
bits = 0  
Control register B: CNT_RST = 1; PISO_CLR = 1; MONO = 1; DEEMP = 1 (for  
Europe); Bit [8:6] = 100b; other bits = 0  
Control register C: All bits = 0  
VADC register: VADC1 = 26 (decimal), this value should not be changed hereafter;  
VADC2 = 18 (decimal), this value should not be changed hereafter  
Calibrate the IF frequency at 110 kHz  
Calibrate the stereo decoder clock at 37.5 kHz (to reduce the initialization time,  
calibration of the stereo decoder clock can be postponed until the stereo mode is  
selected).  
9. Timing diagrams  
R/W  
CLOCK  
1
11  
15  
LSB  
MSB LSB  
MSB  
DATA  
11-bit data  
4-bit address  
001aaa669  
Fig 5. Writing data.  
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Preliminary data sheet  
Rev. 02 — 26 April 2004  
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TEA5880TS  
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Integrated FM stereo radio IC for host processor tuning  
R/W  
CLOCK  
0
15  
DATA LSB  
MSB  
16-bit data  
001aaa670  
Fig 6. Reading data.  
enable FM OSC at output source selector  
enable internet clock  
set 16-bit counter clear  
reset 16-bit counter clear  
enable 16-bit counter to count  
timing width 8 ms to 100 ms  
disable 16-bit counter  
enable PISO at output source  
001aaa671  
Fig 7. Measuring sequence.  
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Preliminary data sheet  
Rev. 02 — 26 April 2004  
16 of 27  
TEA5880TS  
Philips Semiconductors  
Integrated FM stereo radio IC for host processor tuning  
10. Limiting values  
Table 19: Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134).  
Symbol  
VCCD  
VCCA  
Tstg  
Parameter  
Conditions  
Min  
Max  
+5  
Unit  
V
digital supply voltage  
analog supply voltage  
storage temperature  
ambient temperature  
0.3  
0.3  
55  
+8  
V
+150  
+75  
°C  
°C  
°C  
V
Tamb  
VCCA = VCC(VCO) = VCCD = 3 V  
VCCA = VCC(VCO) = VCCD = 5 V  
10  
40  
+85  
Vesd  
electrostatic discharge voltage  
for all pins  
200  
2000  
+200  
+2000  
V
[1] Machine model (R = 10 , C = 200 pF, 75 µH).  
[2] Human body model (R = 1.5 k, C = 100 pF).  
11. Thermal characteristics  
Table 20: Thermal characteristics  
Symbol  
Parameter  
Conditions  
Typ  
<tbd>  
Unit  
K/W  
Rth(j-a)  
thermal resistance from junction to ambient in free air  
12. Characteristics  
Table 21: Digital input AC values  
Symbol  
Digital inputs  
VIH  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
HIGH-level input voltage  
LOW-level input voltage  
IOH = 500 µA  
1.4  
-
-
-
-
V
V
VIL  
0.6  
Digital outputs  
Isink (L)  
LOW-level sink current  
500  
-
-
-
-
µA  
VOL  
LOW-level output voltage  
IOL = 500 µA  
0.6  
V
Timing  
fclk  
clock input  
-
-
-
-
1
-
MHz  
ns  
tCLK(H)  
clock HIGH time  
clock LOW time  
495  
495  
tCLK(L)  
-
ns  
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Preliminary data sheet  
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TEA5880TS  
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Integrated FM stereo radio IC for host processor tuning  
001aaa673  
20  
dB  
(1)  
0
20  
40  
60  
(2)  
(3)  
(4)  
(5)  
10  
30  
70  
110  
RFIN (dBµV)  
(1) Mono signal.  
(2) Mono noise.  
(3) Stereo left.  
(4) Stereo right.  
(5) Stereo noise.  
Fig 8. Signal characteristics.  
001aaa674  
5
THD  
(%)  
4
3
2
1
0
10  
30  
70  
110  
RFIN (dBµV)  
THD = 30 %.  
Fig 9. Total harmonic distortion.  
13. Components list  
No external components necessary.  
9397 750 13022  
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Preliminary data sheet  
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TEA5880TS  
Philips Semiconductors  
Integrated FM stereo radio IC for host processor tuning  
14. Printed-circuit board layout for SSOP24 package  
The printed-circuit board traces from LL1 to VCC1 and from VCC1 to LR1 as shown in  
Figure 10, are to create two inductors, each of approximately 38 nH. These inductors,  
together with internal capacitors, form part of the LC oscillator to determine the FM tuning  
band. If the value of the inductors becomes much greater than 38 nH, the whole FM  
tuning band (normally from 76 MHz to 108 MHz) will be shifted lower. If the value of the  
inductors becomes much smaller than 38 nH, the whole FM tuning band (normally from  
76 MHz to 108 MHz) will be shifted higher.  
If the layout of the two inductance traces is not preferred, two SMD inductors can be used  
to replace the two printed-circuit board inductance traces as an alternative. The layout of  
the two SMD inductors should be as close to the pins as possible.  
RFIN  
GND  
n.c.  
RFGND  
GND  
n.c.  
V
V
CCD  
reserved  
LL1  
CCA  
R/W  
V
CC1  
V
DATA  
CLOCK  
MPX  
CC1  
LR1  
n.c.  
3.5 mm  
AUDL  
AUDR  
LED  
n.c.  
n.c.  
GND  
3.5 mm  
001aaa675  
(1) Width of printed-circuit board trace = 0.15 mm; spacing between printed-circuit board  
trace = 0.15 mm.  
(2) Pins 14, 15, 16, 21, 22 and 23 are not connected.  
Fig 10. Printed-circuit board layout.  
9397 750 13022  
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Preliminary data sheet  
Rev. 02 — 26 April 2004  
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TEA5880TS  
Philips Semiconductors  
Integrated FM stereo radio IC for host processor tuning  
15. Application information  
FM antenna  
RFIN  
1
2
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
3
V
CCD  
4
(1)  
100 nF  
V
LL1  
V
5
CCA  
R/W  
DATA  
CLOCK  
MPX  
V
6
CC1  
(1)  
TEA5880FM  
100 nF  
7
CC1  
LR1  
8
9
10  
11  
12  
AUDL  
AUDR  
LED  
001aaa672  
(1) optional.  
Fig 11. Application diagram.  
9397 750 13022  
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Preliminary data sheet  
Rev. 02 — 26 April 2004  
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Philips Semiconductors  
Integrated FM stereo radio IC for host processor tuning  
16. Package outline  
SSOP24: plastic shrink small outline package; 24 leads; body width 5.3 mm  
SOT340-1  
D
E
A
X
v
c
H
M
A
y
E
Z
24  
13  
Q
A
2
A
(A )  
3
A
1
pin 1 index  
θ
L
p
L
1
12  
detail X  
w
M
b
p
e
0
2.5  
5 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
A
(1)  
(1)  
(1)  
UNIT  
A
A
A
b
c
D
E
e
H
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
E
max.  
8o  
0o  
0.21  
0.05  
1.80  
1.65  
0.38  
0.25  
0.20  
0.09  
8.4  
8.0  
5.4  
5.2  
7.9  
7.6  
1.03  
0.63  
0.9  
0.7  
0.8  
0.4  
mm  
2
0.65  
1.25  
0.25  
0.2  
0.13  
0.1  
Note  
1. Plastic or metal protrusions of 0.2 mm maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
JEITA  
99-12-27  
03-02-19  
SOT340-1  
MO-150  
Fig 12. Package outline.  
9397 750 13022  
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Preliminary data sheet  
Rev. 02 — 26 April 2004  
21 of 27  
 
TEA5880TS  
Philips Semiconductors  
Integrated FM stereo radio IC for host processor tuning  
17. Soldering  
17.1 Introduction to soldering surface mount packages  
This text gives a very brief insight to a complex technology. A more in-depth account of  
soldering ICs can be found in our Data Handbook IC26; Integrated Circuit Packages  
(document order number 9398 652 90011).  
There is no soldering method that is ideal for all surface mount IC packages. Wave  
soldering can still be used for certain surface mount ICs, but it is not suitable for fine pitch  
SMDs. In these situations reflow soldering is recommended.  
17.2 Reflow soldering  
Reflow soldering requires solder paste (a suspension of fine solder particles, flux and  
binding agent) to be applied to the printed-circuit board by screen printing, stencilling or  
pressure-syringe dispensing before package placement. Driven by legislation and  
environmental forces the worldwide use of lead-free solder pastes is increasing.  
Several methods exist for reflowing; for example, convection or convection/infrared  
heating in a conveyor type oven. Throughput times (preheating, soldering and cooling)  
vary between 100 and 200 seconds depending on heating method.  
Typical reflow peak temperatures range from 215 to 270 °C depending on solder paste  
material. The top-surface temperature of the packages should preferably be kept:  
below 225 °C (SnPb process) or below 245 °C (Pb-free process)  
for all BGA, HTSSON..T and SSOP..T packages  
for packages with a thickness 2.5 mm  
for packages with a thickness < 2.5 mm and a volume 350 mm3 so called  
thick/large packages.  
below 240 °C (SnPb process) or below 260 °C (Pb-free process) for packages with a  
thickness < 2.5 mm and a volume < 350 mm3 so called small/thin packages.  
Moisture sensitivity precautions, as indicated on packing, must be respected at all times.  
17.3 Wave soldering  
Conventional single wave soldering is not recommended for surface mount devices  
(SMDs) or printed-circuit boards with a high component density, as solder bridging and  
non-wetting can present major problems.  
To overcome these problems the double-wave soldering method was specifically  
developed.  
If wave soldering is used the following conditions must be observed for optimal results:  
Use a double-wave soldering method comprising a turbulent wave with high upward  
pressure followed by a smooth laminar wave.  
For packages with leads on two sides and a pitch (e):  
larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be  
parallel to the transport direction of the printed-circuit board;  
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Preliminary data sheet  
Rev. 02 — 26 April 2004  
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TEA5880TS  
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Integrated FM stereo radio IC for host processor tuning  
smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the  
transport direction of the printed-circuit board.  
The footprint must incorporate solder thieves at the downstream end.  
For packages with leads on four sides, the footprint must be placed at a 45° angle to  
the transport direction of the printed-circuit board. The footprint must incorporate  
solder thieves downstream and at the side corners.  
During placement and before soldering, the package must be fixed with a droplet of  
adhesive. The adhesive can be applied by screen printing, pin transfer or syringe  
dispensing. The package can be soldered after the adhesive is cured.  
Typical dwell time of the leads in the wave ranges from 3 to 4 seconds at 250 °C or  
265 °C, depending on solder material applied, SnPb or Pb-free respectively.  
A mildly-activated flux will eliminate the need for removal of corrosive residues in most  
applications.  
17.4 Manual soldering  
Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage  
(24 V or less) soldering iron applied to the flat part of the lead. Contact time must be  
limited to 10 seconds at up to 300 °C.  
When using a dedicated tool, all other leads can be soldered in one operation within  
2 to 5 seconds between 270 and 320 °C.  
17.5 Package related soldering information  
Table 22: Suitability of surface mount IC packages for wave and reflow soldering methods  
Package [1]  
Soldering method  
Wave  
Reflow[2]  
BGA, HTSSON..T[3], LBGA, LFBGA, SQFP,  
SSOP..T[3], TFBGA, USON, VFBGA  
not suitable  
suitable  
DHVQFN, HBCC, HBGA, HLQFP, HSO, HSOP,  
HSQFP, HSSON, HTQFP, HTSSOP, HVQFN,  
HVSON, SMS  
not suitable[4]  
suitable  
PLCC[5], SO, SOJ  
suitable  
suitable  
LQFP, QFP, TQFP  
not recommended[5] [6]  
not recommended[7]  
not suitable  
suitable  
SSOP, TSSOP, VSO, VSSOP  
CWQCCN..L[8], PMFP[9], WQCCN..L[8]  
suitable  
not suitable  
[1] For more detailed information on the BGA packages refer to the (LF)BGA Application Note (AN01026);  
order a copy from your Philips Semiconductors sales office.  
[2] All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the  
maximum temperature (with respect to time) and body size of the package, there is a risk that internal or  
external package cracks may occur due to vaporization of the moisture in them (the so called popcorn  
effect). For details, refer to the Drypack information in the Data Handbook IC26; Integrated Circuit  
Packages; Section: Packing Methods.  
[3] These transparent plastic packages are extremely sensitive to reflow soldering conditions and must on no  
account be processed through more than one soldering cycle or subjected to infrared reflow soldering with  
peak temperature exceeding 217 °C ± 10 °C measured in the atmosphere of the reflow oven. The package  
body peak temperature must be kept as low as possible.  
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Preliminary data sheet  
Rev. 02 — 26 April 2004  
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Integrated FM stereo radio IC for host processor tuning  
[4] These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the  
solder cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink  
on the top side, the solder might be deposited on the heatsink surface.  
[5] If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave  
direction. The package footprint must incorporate solder thieves downstream and at the side corners.  
[6] Wave soldering is suitable for LQFP, QFP and TQFP packages with a pitch (e) larger than 0.8 mm; it is  
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.  
[7] Wave soldering is suitable for SSOP, TSSOP, VSO and VSOP packages with a pitch (e) equal to or larger  
than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.  
[8] Image sensor packages in principle should not be soldered. They are mounted in sockets or delivered  
pre-mounted on flex foil. However, the image sensor package can be mounted by the client on a flex foil by  
using a hot bar soldering process. The appropriate soldering profile can be provided on request.  
[9] Hot bar soldering or manual soldering is suitable for PMFP packages.  
9397 750 13022  
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Preliminary data sheet  
Rev. 02 — 26 April 2004  
24 of 27  
TEA5880TS  
Philips Semiconductors  
Integrated FM stereo radio IC for host processor tuning  
18. Revision history  
Table 23: Revision history  
Document ID  
Release date Data sheet status  
20040426 Preliminary data sheet  
Change notice Order number  
9397 750 13022  
Supersedes  
TEA5880_2  
-
-
9397 750 13022  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Preliminary data sheet  
Rev. 02 — 26 April 2004  
25 of 27  
 
TEA5880TS  
Philips Semiconductors  
Integrated FM stereo radio IC for host processor tuning  
19. Data sheet status  
Level Data sheet status[1] Product status[2] [3]  
Definition  
I
Objective data  
Development  
This data sheet contains data from the objective specification for product development. Philips  
Semiconductors reserves the right to change the specification in any manner without notice.  
II  
Preliminary data  
Qualification  
This data sheet contains data from the preliminary specification. Supplementary data will be published  
at a later date. Philips Semiconductors reserves the right to change the specification without notice, in  
order to improve the design and supply the best possible product.  
III  
Product data  
Production  
This data sheet contains data from the product specification. Philips Semiconductors reserves the  
right to make changes at any time in order to improve the design, manufacturing and supply. Relevant  
changes will be communicated via a Customer Product/Process Change Notification (CPCN).  
[1]  
[2]  
Please consult the most recently issued data sheet before initiating or completing a design.  
The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at  
[3]  
For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.  
20. Definitions  
21. Disclaimers  
Short-form specification The data in a short-form specification is  
extracted from a full data sheet with the same type number and title. For  
detailed information see the relevant data sheet or data handbook.  
Life support — These products are not designed for use in life support  
appliances, devices, or systems where malfunction of these products can  
reasonably be expected to result in personal injury. Philips Semiconductors  
customers using or selling these products for use in such applications do so  
at their own risk and agree to fully indemnify Philips Semiconductors for any  
damages resulting from such application.  
Limiting values definition Limiting values given are in accordance with  
the Absolute Maximum Rating System (IEC 60134). Stress above one or  
more of the limiting values may cause permanent damage to the device.  
These are stress ratings only and operation of the device at these or at any  
other conditions above those given in the Characteristics sections of the  
specification is not implied. Exposure to limiting values for extended periods  
may affect device reliability.  
Right to make changes — Philips Semiconductors reserves the right to  
make changes in the products - including circuits, standard cells, and/or  
software - described or contained herein in order to improve design and/or  
performance. When the product is in full production (status ‘Production’),  
relevant changes will be communicated via a Customer Product/Process  
Change Notification (CPCN). Philips Semiconductors assumes no  
responsibility or liability for the use of any of these products, conveys no  
license or title under any patent, copyright, or mask work right to these  
products, and makes no representations or warranties that these products are  
free from patent, copyright, or mask work right infringement, unless otherwise  
specified.  
Application information Applications that are described herein for any  
of these products are for illustrative purposes only. Philips Semiconductors  
make no representation or warranty that such applications will be suitable for  
the specified use without further testing or modification.  
22. Contact information  
For additional information, please visit: http://www.semiconductors.philips.com  
For sales office addresses, send an email to: [email protected]  
9397 750 13022  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Preliminary data sheet  
Rev. 02 — 26 April 2004  
26 of 27  
       
TEA5880TS  
Philips Semiconductors  
Integrated FM stereo radio IC for host processor tuning  
23. Contents  
packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22  
converter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7  
14  
Printed-circuit board layout for SSOP24  
package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19  
© Koninklijke Philips Electronics N.V. 2004  
All rights are reserved. Reproduction in whole or in part is prohibited without the prior  
written consent of the copyright owner. The information presented in this document does  
not form part of any quotation or contract, is believed to be accurate and reliable and may  
be changed without notice. No liability will be accepted by the publisher for any  
consequence of its use. Publication thereof does not convey nor imply any license under  
patent- or other industrial or intellectual property rights.  
Date of release: 26 April 2004  
Document order number: 9397 750 13022  
Published in The Netherlands  

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