TC9457F
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC9457F
Firmware Built In Digital Servo
The TC9457F is a firmware incorporating CD digital servo
system. In addition to an LCD/LED driver, 4-channel 6-bit AD
converters, and 2-wire/3-wire serial interface, it has a buzzer
function, interrupt function, and 8-bit timer/counter. The CPU
allows selection of the operating clock from three types of crystal
oscillators (16.9344 MHz, 4.5 MHz, and 75 kHz), making
interfacing with a CD easy. The CD digital servo incorporates
various functions and circuits required for CD systems. These
include sync separation protection and interpolation, EFM
demodulation, error correction, digital equalizer for servoing, and
a servo control circuit. Furthermore, it contains a 1-bit DA
converter, so that when combined with the digital servo head
amp TA2109F, it allows you to create a maintenance-free,
extremely simple CD player system.
Weight: 1.6 g (typ.)
Features
·
·
CMOS−technology DTS microcontroller LSI incorporating a CD digital servo and LCD/LED driver
Operating supply voltage:
When CD is operating, V
= 4.5 to 5.5 V (5.0 V typ.)
DD
When CD is turned off, V
= 2.7 to 5.5 V (CPU operating)
DD
·
Current consumption:
When CD is operating, I
= 55 mA (typ.)
DD
When CD is turned off, I
When CD is turned off, I
= 2 mA (typ.) (using 4.5 MHz crystal; CPU operating)
= 0.1 mA (using 75 kHz crystal; CPU operating)
DD
DD
·
·
Operating temperature range: Ta = −40 to 85 °C
Firmware
· Instruction execution time: 1.89/1.78/107 µs
· Crystal oscillator frequency: 16.9344 MHz/4.5 MHz/75 kHz
· AD converter: 6 bits, 4 channels
· LCD driver: 1/4 duty, 1/2 biased, maximum 72 segments
· LED driver: 4 digits × maximum 14 segments (shared with LCD driver in software)
· Timer/counter: 8 bits (timer clock selectable from INTR1, INTR2, instruction cycle, or 1 kHz)
· Serial interface: 3-wire/2-wire interface (data length: 4 or 8 bits)
· Buzzer: 0.625 to 3 kHz (8 types) ; 4 modes available-continuous, single, 10 Hz intermittent, and 10 Hz
intermittent at 1 Hz interval
· Interrupt: 1 external, 3 internal (CD subing synchronous, serial interface, 8 bits timer)
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TC9457F
Block Diagram
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TC9457F
Description Of Pin Function
Pin No.
1~10
Symbol
Pin Name
Function And Operation
Remarks
S1/OT5
~
S10/OT14
LCD segment Segment signal outputs to the LCD panel.
outputs
/Output ports be displayed.
Up to 72 segments in a matrix with COM1 to COM4 can
―
―
All of the S1 to S18 pins can be switched for output ports
by a program (Note 1). Also, the S15 to S18 pins each
can be switched for I/O ports individually. When set for I/O
ports, these pins become Nch open-drain outputs.
Furthermore, the S11 to S14 and the P8-0 to P8-3 pins
can be switched for use as CD signal (CLCK to IPF)
input/output pins by a program.
S11/OT15
/CLCK
11
12
13
14
15
16
17
S12/OT16
/DATA
·
CLCK
:
Subcodes P thru W data readout clock
input/output.
Selected between input and output by
a command.
―
―
―
―
―
―
LCD segment
outputs
/Output ports
/CD signals
·
·
DATA
SFSY
:
:
Subcodes P thru W data output.
S13/OT17
/SFSY
Playback system frame sync
signal output.
·
LRCK
:
Channel clock (44.1 kHz) output. It
outputs a low for L channel and a high
for R channel. Polarity can be inverted
by a command.
S14/OT18
/LRCK
·
·
·
BCK
: Bit clock (1,4112 MHz) output.
S8-0/S15
/BCK
AOUT : Audio data output.
MBOV : Buffer memory-over signal output.
It outputs a high when buffer overflows.
·
IPF
: Correction flag output. When AOUT is
C2 correction output, it outputs a high
indicating that correction is impossible.
P8-1/S16
/AOUT
I/O ports
/LCD segment
outputs
For CD signal output, set parameters OT for output and
LEDon = 1.
Furthermore, when set for output ports, the buffer
capability can be increased by setting the LEDon bit to 1,
so that it can be used as an LED driver. These pins
normally are used for LED segment outputs. Since the
output ports can increment OT1 through OT18 by an
instruction, data in external RAM/ROM can be accessed
easily.
P8-2/S17
/MBOV
/CD signals
P8-3/S18
/IPF
18
―
―
Note 1: After a system reset, the output port shared pins
are set for LCD output and the I/O port shared
pins are set for I/O port input.
4-bit CMOS I/O ports.
These ports can be set for input or output bit for bit by a
program.
I/O port 1
/Key input
ports
P1-0~P1-3
/K0~K3
These pins can be pulled up to V
or down to GND by a
DD
21~24
program. Therefore, they can be used as key input pins.
Also, when they are set for I/O port input, a change of
state in this input can be used to clear the clock stop or
wait mode.
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TC9457F
Pin No.
Symbol
Pin Name
Function And Operation
5-bit CMOS I/O ports.
Remarks
These ports can be set for input or output bit for bit by a
program.
The P3-0 to P4-0 pins serve dual purposes as analog
inputs for the internal 6-bit 4-channel AD converters.
The internal AD converters can complete conversion in 6
instruction cycles using a successive approximation
25
26~28
29
P3-0/DCREF
I/O port 3
/AD analog
reference
voltage input method. The required pins can be set for AD analog input
bit for bit by a program. P3-0 can be set for reference
P3-1/ADIN1
~
P3-3/ADIN3
I/O port 3
/AD analog
voltage input, and the internal power supply (MV ) can
DD
be used for this reference voltage.
voltage input The P4-0 pin serves dual purposes as a buzzer output
―
pin.
The buzzer output can be selected from 8 frequencies,
0.625 to 3 kHz. Each selected frequency can be output in
one of four modes: continuous, single, 10 Hz intermittent,
P4-0/ADIN4/
BUZR
I/O port 4
/AD analog
voltage inputs and 10 Hz intermittent at 1 Hz interval.
/Buzzer output Whether or not to use and how to control the AD converter
and buzzer all can be set by a program.
Note 2: If P3-0 is set for reference voltage input, note that
although normally in a high-impedance state, this
input during AD conversion becomes a 10 kΩ
load, typ. Therefore, pay careful attention to the
output impedance that is input to this pin.
3-bit CMOS I/O ports.
These ports can be set for input or output bit for bit by a
program.
These pins serve dual purposes as input or output pins for
the serial interface circuit (SI0).
The SI0 is a 2-wire/3-wire compatible serial interface.
4 or 8 bits of serial data, beginning with the MSB or LSB,
are serially output from the SO/SDA pin at each clock
edge on the SCK/SCL pin, and the data on SI1 or SI2 pin
is serially input to the device. The serial clock (SCK/SCL)
allows selection between the internal (450/225/150/75
kHz) and external sources and a selection of the active
edge, rise or fall. Moreover, since the clock and data can
be output via Nch open-drain outputs, various device
controls and communication between controllers can be
greatly facilitated.
I/O port 4
30
31
32
P4-1/S12
/Serial data
input
―
/Serial data
input /output
P4-2/S0/SI1
/SDA
/Serial clock
input /output
When an SI0 interrupt is enabled, an interrupt is
generated at completion of SI0 execution and the program
jumps to address 4. This is effective when high-speed
serial communication is desired.
P4-3/SCK
/SCL
All inputs to SI0 contain a Schmitt trigger circuit.
Whether or not to use SI0 and how to control it all can be
set by a program.
Test mode control input pins.
The test mode is selected when these pins are set high
and normal operation is selected when they are low.
control inputs These pins normally must be held low or left open (NC)
when used for this purpose. (Pulldown resistors are
built-in).
TEST0
~
TEST5
Test mode
33~38
―
CD control output pins.
· /HSO : Playback speed mode output.
High = normal speed;
Low = double speed.
/HSO/OT19
SPCK/OT20
SPDA/OT21
COFS/OT22
CD control
signal outputs
/output ports
·
SPCK : Processor status signal readout
clock output (176.4 kHz)
―
39~42
·
·
SPDA : Processor status signal output.
COFS : Correction system frame clock output
(7.35 kHz).
These pins can be switched for output ports by a program.
Digital output pin.
43
44
DOUT
SBSY
―
―
CD control
input/outputs
Subcode block sync output pin. It outputs a high at the S1
position when subcode sync is detected.
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TC9457F
Pin No.
45
Symbol
SBOK
Pin Name
Function And Operation
Remarks
Subcode Q data CRCC determination result output pin. It
outputs a high when CRCC check is found OK.
―
―
CD unit's digital block power supply pins.
Normally, apply 5 V to V
.
DD
46, 75
47, 76
V
DD
When not using a CD (CD off), this power supply can be
turned off, with only the controller power supply kept
active, so that the controller alone is operating. In this
case, the CDoff bit must be set to 1. When this bit is set to
1, pins 11 through 18 and pins 39 through 42 all are
changed for output ports if they have been set for CD
control signal input/output pins.
V
―
SS
48
49
P2V
PLL block-2 V
pin.
REF
―
―
REF
This pin outputs a phase error between EFM and PLCK
signals.
PDO
TMAX detection result output pin. Selected by command
bit TMPS.
50
TMAX
Longer than preset period : Outputs P2V
.
―
REF
Shorter than preset period : Low level (V ).
SS
Within preset period
: High impedance.
51
52
53
54
55
56
LPFN
LPFO
Inverted input of low-pass filter amp.
Output of low-pass filter amp.
Analog input
Analog output
PVREF
VCOF
PLL block V
pin.
―
REF
VCO filter pin.
Analog block ground pin.
Analog output
AV
―
SS
SLCO
RFI
DAC output pin for data slice level generation.
RF signal input pin.
Analog output
Analog input
(Zin : command select)
57
CD control
input/outputs
58
59
60
61
62
63
AV
Analog block power supply pin.
RFRP signal center level input pin.
RFRP zero-cross input pin.
RF ripple signal input pin.
―
Analog input (Zin = 50 kΩ)
Analog input
DD
RFCT
RFZI
RFRP
FEI
Analog input
Focus error signal input pin.
Subbeam add signal input pin.
Analog input
SBAD
Analog input
Tracking error input pin. This input is read when tracking
servo is on.
64
65
66
TEI
Analog input
TEZI
FOO
Tracking error zero-cross input pin.
Focus equalizer output pin.
Analog input (Zin = 10 kΩ)
Analog output
(2V
to AV
)
)
REF
SS
Analog output
(2V to AV
67
68
69
TRO
Tracking equalizer output pin.
REF
SS
V
Analog reference power supply pin.
―
REF
RF amplitude adjusting control signal output pin. It outputs
3-level PWM signals. (PWM carrier = 88.2 kHz)
RFGC
TEBC
―
―
Tracking balance control signal output pin. It outputs
3-level PWM signals.
(PWM carrier = 88.2 kHz)
70
71
Focus equalizer output pin. It outputs 3-level PWM
signals.
(PWM carrier = 88.2 kHz)
FMO
DMO
―
Disc equalizer output pin. It outputs 3-level PWM signals.
(PWM carrier = DSP block 88.2 kHz, synchronized to
PXO)
72
73
―
―
2V
Analog reference power supply pin. (2 × V
)
REF
REF
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TC9457F
Pin No.
74
Symbol
SEL
Pin Name
Function And Operation
Remarks
APC circuit on/off signal output pin. When laser is on, this
pin goes to a high-impedance state when UHS = low and
outputs a high when UHS = high.
―
77
80
XV
XV
CD's crystal oscillator power supply pins. Normally,
connect these pins to the power supply lines that are used
―
―
SS
in common for the V
and V pins.
DD
DD
SS
CD's crystal oscillator input/output pins. Normally, connect
16.9344 MHz here. This clock is used as the system clock
for the CD. After a system reset, it also is used as the
system clock on the controller side. Therefore, all of the
CD power supplies must be fed with power after a reset.
78
79
XI
―
―
XO
81
82
83
84
85
86
87
DVSR
RO
R-channel DA converter unit ground pin.
R-channel data forward output pin.
R-channel reference voltage pin.
DA converter unit power supply pin.
L-channel reference voltage pin.
―
―
―
―
―
―
―
CD control
input/outputs
DVRR
DV
DD
DVRL
LO
L-channel data forward output pin.
L-channel DA converter unit ground pin.
DVSL
NC pins. Normally, connect these pins to ground or leave
them open. Pin 89 serves dual purposes as the V pin of
pp
88, 89
NC
―
2
an E PROM product. Therefore, when this pin is left open,
2
it can be shared with an E PROM product.
Device's system reset signal input pin.
The device remains reset while RESET is held low and
when RESET is released back high, the CD unit
becomes operational and the program starts from address
0. Normally, a system reset is asserted when a voltage of
90
RESET
Reset input
―
2.7 V or more is applied to V
when it is at 0 V
DD
(power-on reset). Therefore, this pin must be pulled high
when used for this purpose.
This pin is used to input a signal that requests or clears
the hold mode.
Normally, use this pin for CD mode select signal input or
battery detection signal input.
There are two hold modes : clock stop mode (crystal
oscillator turned off) and a wait mode (CPU stopped).
These modes are entered by executing the CKSTP and
WAIT instructions, respectively.
The clock stop mode can be requested by a programmed
input: low level detection on HOLD pin or forced
execution, and can be cleared by detecting a high on the
HOLD pin or a change of state in its input signal. When
the CKSTP instruction is executed, the clock generator
and the CPU stop operating and the device is placed in a
memory backup state. During this state, the device's
Hold mode
91
HOLD
―
control input current consumption is reduced to 1µA or less. At the
same time, the display output and CMOS output ports are
automatically set low, and the Nch open-drain outputs are
turned off.
The wait mode is executed regardless of the input state
on the HOLD pin, with the device's current consumption
reduced. In this mode, the user can choose to keep only
the crystal oscillator operating or have the CPU paused by
programming.
If the former is selected, all display outputs are set low
and other pins retain their state ; if the latter is selected, all
states are retained except that the CPU is temporarily
stopped.
This mode is cleared by a change of state in the HOLD
input.
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TC9457F
Pin No.
Symbol
Pin Name
External
Function And Operation
External interrupt input pin.
When the interrupt facility is enabled and a pulse of 1.11
to 2.22 µs in duration is applied to this pin, an interrupt is
generated and the program jumps to address 1.
Input logic and the active edge (rise or fall) can be
selected for each interrupt input.
Remarks
92
INTR
―
interrupt input Also, the internal 8-bit timer clock can be chosen for this
interrupt input, in which case it is possible to count pulses
or generate an interrupt at a given pulse count
(address 3).
Since this pin is a Schmitt trigger type, it can be used as
an input port for receiving remote control signals, etc.
Crystal oscillator pins for the controller.
The oscillator clock is used as the timebase for the clock
facility or as the controller's system clock. Connect a
4.5 MHz or 75 kHz crystal resonator to the MXO and MXI
pins. Since these pins do not contain internal feedback
resistors, etc, an amp resistor or output resistor must be
added external to the chip.
93
MXO
―
·
75 kHz··· ROUT = 100 kΩ, Rf = 10 MΩ
Ci = Co = 15 pF (typ.)
·
4.5 MHz··· ROUT = 0 Ω, Rf = 1 MΩ
Ci = Co = 15 pF (typ.)
Controller's
crystal
oscillator pins
When using the clock generated by the CD unit's crystal
oscillator for clocking the entire device operation, fix the
MXI pin to the GND level.
Oscillation is stopped by executing a CKSTP instruction.
Select the crystal oscillator and control its operation by a
program.
Note 3: When after turning on the CD unit's power supply,
the controller system clock is switched from the
crystal oscillator on the controller side to that on
the CD side, provide an allowance time of several
10 ms for the CD unit's crystal oscillator to
94
MXI
―
stabilize after it is powered on. This is necessary
to prevent the controller from operating erratically.
Power supply pins.
Normally, apply a voltage of 4.5 to 5.5 V to V
.
DD
In a backup state (when the CKSTP instruction executed),
the device's current consumption is reduced to 1 µA or
less, allowing for the supply voltage to be lowered to
2.0 V.
The device is reset and the program starts from address 0
when a voltage of 2.7 V or more is applied to this pin
when it is at 0 V (power-on reset).
19, 96
20, 95
MV
MV
―
―
DD
Controller unit
power supply
pins
SS
Note 4: For reason of this power-on reset, make sure the
device's power supply rise time is between 10 to
100 ms.
Common signal outputs to the LCD panel. Up to 72
segments in a matrix with S1 to S18 can be displayed.
97
98
COM1/OT1
COM2/OT2
COM3/OT3
COM4/OT4
―
―
―
―
Three voltage levels MV , V (1/2 MV ), and GND
DD EE
DD
are output for 83 Hz period at 2 ms intervals.
After a system reset and after deassertion of a clock stop
LCD common
outputs
/Output ports
instruction, the V voltage is output and the DISP OFF
EE
bit is set to 0 before common signals are output.
These pins can be switched for output ports by a program
(Note1). In this case, the buffer capacity can be increased
by setting the LEDon bit to 1, so that it can be used as an
LED driver. These four pins normally are used for LED
digit outputs.
99
100
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TC9457F
Maximum Ratings (Ta = 25°C)
Characteristics
Symbol
Rating
Unit
Power supply voltage
Input voltage
V
−0.3~6.0
V
V
DD
V
−0.3~V
+ 0.3
DD
IN
Power dissipation
Operating temperature
Storage temperature
P
1400
mW
°C
°C
D
T
−40~85
opr
T
−65~150
stg
Electrical Characteristics (Ta = 25°C, V = MV = AV = DV = XV = 5 V,
DD
DD
DD
DD
DD
2V
= P2V
= 4.2 V, V
= PV
= 2.1 V, unless otherwise specified)
REF
REF
REF
REF
MV
(CPU unit power supply)
DD
Test
Circuit
Characteristics
Symbol
Test Condition
Min
4.5
Typ.
5.0
Max
5.5
Unit
When CPU and CD operating.
However,
MV
MV
MV
―
DD1
DD2
DD3
MV
≥ V
(Note 5)
DD
DD
When CPU operating
(CD powered off, 4.5 MHz
crystal connected)
Operating supply voltage
V
―
―
―
―
4.5
2.7
2.0
―
5.0
5.0
~
5.5
5.5
5.5
2.0
(Note 5)
When CPU operating (CD
powered off, 75 kHz crystal
connected)
(Note 5)
When crystal oscillator stopped
(CKSTP instruction executed)
(Note 5)
Memory retention voltage range
MVHD
V
When CPU operating
(XI = 16.9344 MHz crystal
connected)
MV
1.0
DD1
When CPU operating(MXI =
4.5 MHz crystal connected)
MV
MV
―
―
―
―
2.0
4.0
2.0
DD2
DD3
Operating supply current
mA
When CPU operating (MXI =
75 kHz crystal connected)
0.75
Standby mode (only crystal
oscillating, 4.5 MHz or 75 kHz
crystal connected)
MV
―
―
0.5
15
DD4
When crystal oscillator stopped
(CKSTP instruction executed)
Memory retention current
Crystal oscillation frequency
Crystal oscillation start time
MIHD
―
―
―
―
0.1
4.5
1.0
µA
Rf = 1 MΩ, Rout = 0 Ω,
f MXT1
―
MHz
Ci = Co = 30 pF
(Note 5, 6)
Rf = 10 MΩ, Rout = 100 kΩ,
Ci = Co = 15 pF,
f MXT2
tst
―
―
―
―
75
―
kHz
s
MV
= 2.7~5.5 V (Note 5, 6)
DD
Crystal oscillation fmxt = 75
kHz
―
1.0
Note 5: Guaranteed at V = MV = 4.5 to 5.5 V and Ta = −40 to 85°C
DD DD
Note 6: Consider the crystal resonator used in your system when determining constants, etc.
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TC9457F
V
DD
(CD unit power supply)
Test
Circuit
Characteristics
Symbol
Test Condition
MV ≥ V
Min
Typ.
5.0
50
Max
5.5
60
Unit
V
Operating supply voltage
Operating supply current
V
―
―
(Note 5) 4.5
DD
DD
DD
DD
When 16.9344 MHz crystal
connected
I
―
―
mA
Rout = 0 Ω, Ci = Co = 15 pF
Crystal oscillation frequency
f
―
16.9344
―
MHz
XT
(Note 5, 6)
Note 5: Guaranteed at V = MV = 4.5 to 5.5 V and Ta = −40 to 85°C
DD DD
Note 6: Consider the crystal resonator used in your system when determining constants, etc.
LCD Common Output (COM1/OT1 to COM4/OT4)
Test
Circuit
Characteristics
Symbol
Test Condition
Min
−0.1
−20
0.1
Typ.
−0.2
−40
0.2
Max
―
Unit
mA
V
= 4.5 V (When LCD
output, settings OT output,
LEDon = 0)
OH
I
I
―
OH2
OH5
High level
V
= 4.5 V (Settings OT
output, LEDon = 1)
OH
―
―
―
Output current
V
= 0.5 V (When LCD
output, settings OT output,
LEDon = 0)
OL
I
―
OL2
OL5
Low level
V
= 0.5 V (Settings OT
output, LEDon = 1)
OL
I
―
―
4
10
―
Output voltage 1/2 level
V
Nonloaded (when LCD output)
2.1
2.3
2.5
V
BS
Segment Output (S1/OT4 to S10/OT14, S11/OT15 to P8-0/S14 to P8-3/S18)
Test
Circuit
Characteristics
Symbol
Test Condition
Min
Typ.
Max
Unit
V
= 4.5 V
OH
I
I
―
(When LCD output, settings
OT output, LEDon = 0)
−0.05
−0.1
―
OH1
OH4
High level
V
= 4.5 V
OH
―
―
―
(Settings OT output,
LEDon = 1, I/O port)
−2
−4
0.1
10
―
―
Output current
mA
V
= 0.5 V
OL
I
(When LCD output, settings
OT output, LEDon = 0)
0.05
OL1
OL5
Low level
V
= 0.5 V
OL
I
(Settings OT output,
LEDon = 1, I/O port)
5
―
V
= 5.0 V, V = 0 V
IL
IH
Input leakage current
Input voltage
I
―
―
―
―
―
~
±1.0
µA
V
LI
(P8-0 to P8-3)
MV
DD
High level
Low level
V
(P8-0 to P8-3)
MV
IH
DD
DD
× 0.8
MV
V
(P8-0 to P8-3)
0
~
IL
× 0.2
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TC9457F
I/O Ports (P1-0 to P4-3)
Test
Circuit
Characteristics
High level
Symbol
Test Condition
= 4.5 V
Min
−1
Typ.
−2
Max
―
Unit
mA
I
―
―
V
V
OH3
OH
OL
= 0.5 V
(exclude P4-1, 2, 3 pin)
Output current
Low level
I
1.5
3.0
―
OL3
OL5
I
―
―
V
V
= 0.5 V (P4-1, 2, 3 pin)
4
10
―
OL
IH
Input leakage current
I
= 5.0 V, V = 0 V
IL
―
―
±1.0
µA
V
LI
MV
DD
High level
Input voltage
V
―
―
―
―
―
~
~
MV
IH
DD
× 0.8
MV
DD
Low level
V
0
IL
× 0.2
(P1-0 to P1-3) When pulldown,
pullup are set.
Input pullup/down resistance
R
IN1
25
50
120
kΩ
, INTR Input Port,
Input
RESET
HOLD
Test
Circuit
Characteristics
Symbol
Test Condition
Min
Typ.
―
Max
±1.0
Unit
µA
Input leakage current
I
―
―
V
= 5.0 V, V = 0 V
IH IL
―
LI
MV
DD
High level
Low level
V
―
―
~
MV
IH3
DD
× 0.8
Input voltage
V
MV
DD
V
―
0
~
IL3
× 0.2
Max
A/D Converter (AD
to AD
)
IN4
IN1
Test
Circuit
Characteristics
Symbol
Test Condition
Min
Typ.
Unit
Analog input voltage range
Resolution
V
―
―
―
AD to AD
0
~
6
MV
DD
V
AD
IN
IN4
V
―
―
―
―
―
bit
RES
Overall conversion error
―
±0.5
±4.0
±1.0
LSB
V
= 5.0 V, V = 0 V
IL
IH
Analog input leakage
I
―
―
―
µA
LI
(AD
to AD
)
IN1
IN4
DATA, SFSY, LRCK, BCK, AOUT, MBOV, IPF Outputs and CLCK Input/Output
Test
Circuit
Characteristics
Symbol
Test Condition
Min
Typ.
Max
Unit
mA
V
= 4.5 V
(Settings OT for output,
LEDon = 0)
OH
High level
I
―
−2.0
−4.0
―
OH4
Output current
V
= 0.5 V
OL
Low level
I
―
(Settings OT for output,
LEDon = 0)
5
10
―
OL5
V
= 5.0 V, V = 0 V
IL
IH
Input leakage current
Input voltage
I
―
―
―
―
―
~
±1.0
µA
V
LI
(CLCK)
MV
DD
High level
Low level
V
(CLCK)
MV
IH
DD
DD
× 0.8
MV
V
(CLCK)
0
~
IL
× 0.2
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TC9457F
DOUT, SBSY, SBOK, SEL, HSO, SPCK, SPDA, COFS Outputs
Test
Circuit
Characteristics
Symbol
Test Condition
= 4.5 V
Min
Typ.
Max
Unit
mA
High level
Low level
I
―
V
V
−2
−4
―
―
OH4
OH
OL
Output voltage
I
―
= 0.5 V
2
4
OL4
PDO, TMAX, RFGC, TEBC, DMO Outputs
Test
Circuit
Characteristics
Symbol
Test Condition
Min
Typ.
Max
Unit
mA
High level
Low level
I
―
―
V
V
= 3.8 V
= 0.5 V
−1.0
−2.0
―
―
OH6
OH
OL
Output voltage
I
3.0
6.0
OL4
Propagation Delay Time
(AOUT, SPDA, DATA, SBSY, SBOK)
Test
Circuit
Characteristics
Symbol
Test Condition
Min
Typ.
Max
Unit
ns
High level
t
t
―
―
―
―
―
10
10
―
―
pLH
pHL
Propagation
delay time
Low level
―
1bit DA Converter
Test
Circuit
Characteristics
Symbol
Test Condition
Min
Typ.
Max
Unit
1 kHz sine-wave,
full-scale input
Noise distortion
S/N ratio
THD + N
S/N
―
―
―
―
90
85
−85
98
−78
―
dB
dB
dB
―
1 kHz sine-wave,
−60 dB input conversion
Dynamic range
DR
90
―
1 kHz sine-wave,
full-scale input
Crosstalk
CT
―
―
―
−90
−85
dB
1 kHz sine-wave,
full-scale input
Analog output level
DACout
1200
1250
1300 mVrms
Other
Test
Circuit
Characteristics
Symbol
Test Condition
Min
Typ.
Max
Unit
Input pulldown resistance
XI amp feedback resistance
R
R
―
―
(TEST0 to TEST5)
―
10
2
―
kΩ
IN2
(XI−XO)
1
4
MΩ
fXT
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TC9457F
Package Dimensions
Weight: 1.6 g (typ.)
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TC9457F
RESTRICTIONS ON PRODUCT USE
000707EBA
· TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor
devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical
stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of
safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of
such TOSHIBA products could cause loss of human life, bodily injury or damage to property.
In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as
set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and
conditions set forth in the “Handling Guide for Semiconductor Devices,” or “TOSHIBA Semiconductor Reliability
Handbook” etc..
· The TOSHIBA products listed in this document are intended for usage in general electronics applications
(computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances,
etc.). These TOSHIBA products are neither intended nor warranted for usage in equipment that requires
extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or
bodily injury (“Unintended Usage”). Unintended Usage include atomic energy control instruments, airplane or
spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments,
medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in this
document shall be made at the customer’s own risk.
· The products described in this document are subject to the foreign exchange and foreign trade laws.
· The information contained herein is presented only as a guide for the applications of our products. No
responsibility is assumed by TOSHIBA CORPORATION for any infringements of intellectual property or other
rights of the third parties which may result from its use. No license is granted by implication or otherwise under
any intellectual property or other rights of TOSHIBA CORPORATION or others.
· The information contained herein is subject to change without notice.
15
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