Texas Instruments Stereo Amplifier THS4141 User Manual

User’s Guide  
February 2001  
Mixed-Signal Products  
SLOU107  
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Preface  
About This Manual  
This manual is written to provide information about the evaluation module of  
the fully differential amplifier under test. Additionally, this document provides  
a good example of PCB design for high speed applications. The user should  
keep in mind the following points.  
The design of the high-speed amplifier PCB is an elegant and sensitive  
process. Therefore, the user must approach the PCB design with care and  
awareness. It is recommend that the user initially review the datasheet of the  
device under test. It is also helpful to review the schematic and layout of the  
THS4141 EVM to determine the design techniques used in the evaluation  
board. In addition, it is recommended that the user review the application note  
Fully-Differential Amplifiers (literature number SLOA054B) to gain more  
insight about differential amplifiers. This application note reviews the  
differential amplifiers and presents calculations for various filters.  
How to Use This Manual  
Chapter 1—Introduction and Description  
Chapter 2—Using the THS4141 EVM  
Chapter 3—General High-Speed Amplifier Design Considerations  
Read This First  
iii  
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Related Documentation From Texas Instruments  
Information About Cautions and Warnings  
This book may contain cautions and warnings.  
This is an example of a caution statement.  
A caution statement describes a situation that could potentially  
damage your software or equipment.  
This is an example of a warning statement.  
A warning statement describes a situation that could potentially  
cause harm to you.  
The information in a caution or a warning is provided for your protection.  
Please read each caution and warning carefully.  
Related Documentation From Texas Instruments  
THS4141 data sheet (literature number SLOS320)  
THS4141 application report (literature number SLOA054A),  
Fully-Differential Amplifiers  
FCC Warning  
This equipment is intended for use in a laboratory test environment only. It  
generates, uses, and can radiate radio frequency energy and has not been  
tested for compliance with the limits of computing devices pursuant to subpart  
J of part 15 of FCC rules, which are designed to provide reasonable protection  
against radio frequency interference. Operation of this equipment in other  
environments may cause interference with radio communications, in which  
case the user at his own expense will be required to take whatever measures  
may be required to correct this interference.  
Trademarks  
PowerPAD is a trademark of Texas Instruments.  
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Contents  
1
Introduction and Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1  
1.1  
1.2  
1.3  
1.4  
1.5  
1.6  
1.7  
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2  
Evaluation Module Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2  
THS4141 EVM Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3  
Schematic of the Populated Circuit (Default Configuration) . . . . . . . . . . . . . . . . . . . . . . . 1-3  
THS4141 EVM Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4  
Additional Sample Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-5  
THS4141 EVM Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-7  
2
Using the THS4141 EVM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1  
2.1  
2.2  
2.3  
2.4  
2.5  
2.6  
2.7  
2.8  
Required Equipment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2  
Power Supply Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2  
Input and Output Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3  
Testing the EVM Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-4  
Power Down Verification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-5  
Measuring the Frequency Response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-5  
Butterworth Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-6  
THS4141 EVM Bill of Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-7  
3
General High-Speed Amplifier Design Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1  
v
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Figures  
1–1  
1–2  
1–3  
1–4  
1–5  
1–6  
1–7  
1–8  
1–9  
Schematic of the Populated Circuit on the EVM (Default Configuration) . . . . . . . . . . . . . . 1-3  
Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4  
Fully-Differential In/Fully-Differential Out, Without Transformer . . . . . . . . . . . . . . . . . . . . . . 1-5  
Fully-Differential In/Fully-Differential Out, Utilizing Transformer . . . . . . . . . . . . . . . . . . . . . . 1-5  
VICR Level Shifter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-6  
Butterworth Filter With Multiple Feedback . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-6  
Top Layer (Silkscreen) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-7  
Top (Layer 1) (Signals) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-7  
Internal Plane (Layer 2) (Ground Plane) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-8  
1–10 Internal Plane (Layer 3) (+ VCC Plane) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-8  
1–11 Bottom (Layer 4) (Ground and Signal) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-9  
2–1  
2–2  
2–3  
2–4  
2–5  
Power Supply Connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2  
Signal Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3  
Driver 1 Output Signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-4  
Multiple Feedback Filter Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-6  
Gain vs Phase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-7  
Tables  
2–1  
THS4141 EVM Bill of Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-7  
vi  
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Chapter 1  
Introduction and Description  
The Texas Instruments THS4141 evaluation module (EVM) helps designers  
evaluate the performance of the THS4141 operational amplifier. Also, this  
EVM is a good example of high-speed PCB design.  
This document details the Texas Instruments THS4141 high-speed  
operational amplifier evaluation module (EVM). It includes a list of EVM  
features, a brief description of the module illustrated with a series of schematic  
diagrams, EVM specifications, details on connecting and using the EVM, and  
a discussion of high-speed amplifier design considerations.  
This EVM enables the user to implement various circuits to clarify the available  
configurations presented by the schematic of the EVM. In addition, the  
schematic of the default circuit has been added to depict the components  
mounted on the EVM when it is received by the customer. This configuration  
correlates to the single input/differential output signal.  
Othersamplecircuitsarepresentedtoshowhowtheusercanimplementother  
circuit configurations such as differential input/differential output signal,  
transformer utilization on the input and output terminals, VICR level shifter,  
and Butterworth filter with multiple feedback. The user may be able to create  
and implement circuit configurations in addition to those presented in this  
document using the THS4141 EVM.  
Topic  
Page  
1.1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2  
1.2 Evaluation Module Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2  
1.3 THS4141 EVM Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3  
1.4 Schematic of the Populated Circuit (Default Configuration) . . . . . . . 1-3  
1.5 THS4141 EVM Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4  
1.6 Additional Sample Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-5  
1.7 THS4141 EVM Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-7  
1-1  
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Description  
1.1 Description  
The THS4141 EVM is a good example of PCB design and layout for  
high-speed operational amplifier applications. It is a complete circuit for the  
high-speed operational amplifier. The EVM is made of the THS4141  
high-speed operational amplifier, a number of passive components, and  
various features and footprints that enable the user to experiment, test, and  
verify various operational amplifier circuit implementations. The board  
measures 4.5 inches in length by 2.5 inches in width. Initially, this board is  
populated for a single-ended input amplifier (see Figure 1-2 for populated  
circuits). The outputs (V  
and V ) can be tested differentially or single  
O+  
O–  
ended. Gain is set to one and can be changed by changing the ratios of the  
feedback and gain resistors (see the device datasheet for recommended  
resistor values). The user may populate various footprints on the evaluation  
module board to verify filter designs or perform other experiments. Each input  
is terminated with a 50-resistor to provide correct line-impedance matching.  
1.2 Evaluation Module Features  
THS4141 high-speed operational amplifier EVM features include:  
Voltage supply operation range: 5-V to ±15-V operation (see the  
device data sheet)  
Single and differential input and output capability  
Nominal 50-input and output termination resistors. They can be  
configured according to the application requirement.  
V
direct input control (see schematic and the device data sheet)  
OCM  
OCM  
V
pin can be controlled via transformer center-tap (see  
schematic)  
Shutdown pin control, JU1 (if applicable to the device, see the device  
data sheet)  
Input and output transformer footprints for changing single-ended  
signals to differential signals  
Footprint for high-precision, balanced feedback and gain resistors  
(0.01% or better)  
Footprints for low-pass filter implementation (see application note  
SLOA054A)  
Footprints for antialiasing filter implementation (see application note  
SLOA054A)  
Differential probe terminals on input and output nodes for differential  
probe insertion  
Various GND and signal test points on the PCB  
Circuit schematic printed on the back of the EVM  
A good example of high-speed amplifier PCB design and layout  
1-2  
Introduction and Description  
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THS4141 EVM Specifications  
1.3 THS4141 EVM Specifications  
Supply voltage range, ±V  
. . . . 5 V to ±15 V (see the device data sheet)  
CC  
Supply current, I  
. . . . . . . . . . . . . . . . . . . . . . . . (see the device data sheet)  
CC  
Output drive, I  
V
= ±15 . . . . . . . . . . . . . . . . . (see the device data sheet)  
O, CC  
For complete THS4141 amplifier IC specifications, parameter measurement  
information, and additional application information, see the THS4141 data  
sheet, TI literature number SLOS320.  
1.4 Schematic of the Populated Circuit (Default Configuration)  
For verification of jumper locations and other bypass components, see the  
complete EVM schematic in Figure 1–2.  
Figure 1–1. Schematic of the Populated Circuit on the EVM (Default Configuration)  
R6B  
402  
RX3  
49.9 Ω  
C4  
CC  
V
50 Ω  
RX1  
R1b  
R3b  
R4b  
Rx4 R10  
Source  
JU4  
+
0 Ω  
R4a  
0 49.9 Ω  
Rx5 Rx6  
V
0 Ω  
0 374 Ω  
R1a  
IN  
THS4141  
R3a  
AC  
+
JU3  
374 Ω  
0 Ω  
0 Ω  
0 49.9 Ω  
V
C1  
C6  
CC–  
Rx0  
24.9 Ω  
V
OCM  
R6a  
402 Ω  
Note: Default populated footprints on the EVM from the input nodes to the output terminals Gain = 1  
1-3  
Introduction and Description  
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THS4141 EVM Schematic  
1.5 THS4141 EVM Schematic  
Figure 1–2. Schematic  
1-4  
Introduction and Description  
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Additional Sample Schematics  
1.6 Additional Sample Schematics  
For verification of jumper locations and other bypass components, see the  
complete EVM schematic in Figure 1–2.  
Figure 1–3. Fully-Differential In/Fully-Differential Out, Without Transformer  
R6b  
R3B  
C4  
V
CC  
RX1  
0 Ω  
R1b  
50 Ω  
0 Ω  
R4b Rx4  
R10  
Rx6  
Source  
+
V
IN  
0 0 Ω  
R4a Rx5  
R16 Termination  
Resistor  
THS4141  
+
AC  
RX2  
0 Ω  
R1a  
0 Ω  
0 0 Ω  
V
C1  
C6  
CC–  
V
OCM  
R6a  
R3a  
Note: Fully-differential in / fully-differential out signal path. See the Texas Instruments February 2001 Analog Applications  
Journal for the information on the termination resistors.  
Figure 1–4. Fully-Differential In/Fully-Differential Out, Utilizing Transformer  
R6b  
C4  
V
CC  
50 Ω  
R5  
R9  
R1B R3b  
R1A R3a  
R4b R14  
R10  
Rx6  
Source  
T1  
T2  
+
V
IN  
0 0 Ω  
R4a R15  
AC  
THS4141  
+
0 0 Ω  
C1  
C6  
GND  
V
OCM  
R6a  
Note: Utilizingtheinputandoutputtransformerstocreateafully-differentialsignalinput/differentialor singleoutputandisolate  
the amplifier from the rest of the front-end and back-end circuits.  
1-5  
Introduction and Description  
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Additional Sample Schematics  
Figure 1–5. VICR Level Shifter  
R6B  
402 Ω  
V
CC  
RPU1  
RX3  
C4  
49.9 Ω  
V
CC  
50 Ω  
RX1  
R1b  
R3b  
R4b Rx4  
R10  
Source  
+
0 0 Ω  
R4a Rx5  
49.9 Ω  
Rx6  
V
0 Ω  
0 374 Ω  
Rx0  
IN  
THS4141  
R3a  
AC  
+
374 Ω  
24.9 Ω  
0 0 Ω  
49.9 Ω  
C6  
V
CC–  
C1  
V
OCM  
RPU2  
R6a  
402 Ω  
Note: ShiftingtheVICRwithinthespecifiedrangeinthedatasheetviaRPU1andRPU2iftheVICRisoutofthespecifiedrange.  
See the Application section of the data sheet for the THS4141 for more information.  
Figure 1–6. Butterworth Filter With Multiple Feedback.  
R2B  
C1B  
RX3  
V
CC  
RX1  
R1B  
R1A  
R10  
RX7  
5 V  
R3B  
R3A  
+
1 dBm  
AC  
C2  
THS4141  
R7  
RX2  
+
–5 V  
V
CC–  
C1A  
R2A  
Note:  
Butterworth filter implemented with multiple feedback architecture  
1-6  
Introduction and Description  
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THS4141 EVM Layout  
1.7 THS4141 EVM Layout  
Figure 1–7. Top Layer (Silkscreen)  
TEXAS INSTRUMENTS  
THS4141 EVM  
REV_B  
Figure 1–8. Top (Layer 1) (Signals)  
TEXAS INSTRUMENTS  
THS4141 EVM  
REV_B  
1-7  
Introduction and Description  
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THS4141 EVM Layout  
Figure 1–9. Internal Plane (Layer 2) (Ground Plane)  
Figure 1–10. Internal Plane (Layer 3) (± V  
Plane)  
CC  
1-8  
Introduction and Description  
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THS4141 EVM Layout  
Figure 1–11. Bottom (Layer 4) (Ground and Signal)  
1-9  
Introduction and Description  
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1-10  
Introduction and Description  
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Chapter 2  
Using the THS4141 EVM  
It is recommended that the user perform the following exercises to learn the  
usage of the EVM. This practice helps the user learn about the various  
terminals on the EVM and their function. In addition, it suggests the  
components and equipment needed to operate the EVM.  
Topic  
Page  
2.1 Required Equipment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–2  
2.2 Power Supply Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–2  
2.3 Input and Output Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–3  
2.4 Testing the EVM Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–4  
2.5 Power Down Verification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–5  
2.6 Measuring the Frequency Response . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–5  
2.7 Butterworth Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–6  
2.8 THS4141 EVM Bill of Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–7  
2-1  
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2.1 Required Equipment  
One double-output dc power supply (±5 V, 100 mA output minimum)  
Two dc current meters with resolution to 1 mA and capable of the  
maximum current the dc power supply can supply. If available, set the  
current limit on the dc power supply to 100 mA.  
Note: Some power supplies incorporate current meters which may be  
applicable to this test.  
50-source impedance function generator (1 MHz, 10 V sine wave)  
PP  
Oscilloscope (50-MHz bandwidth minimum, 50-input impedance).  
2.2 Power Supply Setup  
1) Set the dc power supply to ±5 V.  
2) Make sure the dc power supply is turned off before proceeding to the next  
step.  
3) Connect the positive (+) terminal of the power supply to the positive (+)  
terminal of the current meter number 1.  
4) Connect the negative (–) terminal of the current meter number 1 to the  
V
of the EVM (J7).  
CC+  
5) Connect the common ground terminal of the power supply to the ground  
GND on the EVM (J9).  
6) Connect the negative (–) terminal of the power supply to the negative (–)  
terminal of the second current meter.  
7) Connectthepositive(+)terminalofthecurrentmeternumber2totheV  
of the EVM (J8).  
CC–  
Figure 2–1. Power Supply Connection  
CURRENT  
METER 2  
CURRENT  
METER 1  
POWER SUPPLY  
–5V  
GND  
+5V  
+
+
J8 V  
J7 V  
J9 GND  
CC–  
J6 V  
CC+  
OCM  
EVM  
THS4141  
Figures are not drawn to scale.  
2-2  
Using the THS4141 EVM  
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2.3 Input and Output Setup  
1) Ensure that JU3, JU4, and JU1 are not installed (open circuit).  
2) Set the function generator to generate a 1 MHz, ±0.5 V (1 V ) sine wave  
PP  
with no dc offset.  
3) Turn off the function generator before proceeding to the next step.  
4) Using a BNC-to-SMA cable, connect the function generator to J1 (V ) on  
I+  
the EVM.  
5) Using a BNC-to-SMA cable, connect the oscilloscope to J3 (V ) on the  
O–  
EVM.  
6) Using a BNC-to-SMA cable, connect the oscilloscope to J4 (V ) on the  
O+  
EVM. Set the oscilloscope to 0.5 V/division and a time-base of 0.2  
µs/division.  
Note: The oscilloscope must be set to use a 50-input impedance for  
proper results.  
Figure 2–2. Signal Connections  
OSCILLOSCOPE  
50 Impedance  
FUNCTION  
GENERATOR  
1 MHz  
1 V  
0 V Offset  
OUT  
PP  
CH-1  
CH-2  
J1 V  
J3 V  
J4 V  
in+  
out–  
50 Source  
Impedance  
THS4141 EVM  
out+  
Figures are not drawn to scale.  
2-3  
Using the THS4141 EVM  
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2.4 Testing the EVM Setup  
1) Turn on the dc power supply.  
2) Verify that both the +5 V (current meter 1) and the –5 V (current meter 2)  
currents are below 20 mA.  
Caution:  
Currents above 20 mA indicate a possible short or a wrong resistor value  
on the PCB. Do not proceed until this situation is corrected.  
3) Turn on the function generator.  
4) Verify the oscilloscope is showing two 1 MHz sine waves with amplitude  
of ±0.125 V. The dc offset of the signal must be below 50 mV.  
Note:V  
andV  
shouldbe180degreesoutofphase.Theinternal  
OUT+  
OUT–  
attenuation of the scope should be set to 6 dB for a gain of one. Otherwise,  
the output will show a gain of one-half due to the voltage division occurring  
at the 50-termination resistor.  
Use Figure 3 as a reference for the input and output signals.  
Figure 2–3. Driver 1 Output Signal  
THS4141  
C1  
C2  
C3  
2-4  
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2.5 Power Down Verification  
This EVM is used to evaluate devices with and without the shutdown function.  
Therefore, this step is only applicable if the device has a shutdown function.  
Please see the data sheet for power-down verification.  
1) Insert the jumper JU1 to power down the device. The current consumption  
(dc current meters) should drop to less than 1.5 mA. Remember to dis-  
count the current flow through the 10-kpullup resistor on the EVM when  
calculating the device current consumption in the shutdown mode.  
2) Turn off the power supply and disconnect the wiring.  
3) Turn off the function generator and disconnect the wiring.  
4) Basic operation of the operational amplifier and its EVM is complete.  
2.6 Measuring the Frequency Response  
This EVM is designed to easily interface with network analyzers. Jumpers J3  
and J4 facilitate the use and insertion of the differential probes at the input and  
output nodes. It is important to consider the following steps to ensure optimal  
performance in terms of bandwidth, phase margin, gain, and peaking  
1) Connect the power supply according to the power supply set up (section  
2.2)  
2) Use proper load values. Loads directly effect the performance of the  
differential operational amplifier (the suggested value is 200 Ω  
differentially, 100 on each output node).  
Caution:  
Incorrect connections cause excessive current flow and may damage  
the device.  
3) Place the GND connection of the probe as close as possible to the output  
nodes. Use the GND holes on the EVM. The GND holes create a shorter  
route to the GND plane and output nodes.  
4) Place the probe at the input nodes, set the power level of the network  
analyzer to the proper level (information in the data sheet typically is  
produced at –20 dBm power level), and calibrate the network analyzer.  
Note:  
If a differential probe is used, verify that resistors R1a, R1b, R4b, and R4a  
are in place. The resistors are 0 values providing the path to the differential  
probe terminals.  
5) Place the probe at the output nodes (if a differential probe is used, insert  
the probe into the provided jumper), and measure the frequency  
response.  
2-5  
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Butterworth Filter  
Note:  
Transformers are used to change the single ended signals to differential  
signal or vice versa. On this EVM, they can be populated according to the  
applicationortheexperiment. TheV  
pinofthedevicemaybeconnected  
OCM  
to the center-tap of the transformer, or maybe set via an external sourcesuch  
as V of a data converter. If the V pin is not connected to an external  
ref  
OCM  
source, it will be set at the center point of the power supply. For example, if  
±5 sources are used, the V level will be set to zero.  
OCM  
2.7 Butterworth Filter  
An example of a Butterworth filter implemented with multiple feedback archi-  
tecture is provided. The following circuit is implemented on the EVM board.  
The following figures represent the circuit configuration and the component  
values. The corner frequency of the filter (–3dB) is set at 1 MHz.  
For verification of jumper locations and other bypass components, see the  
complete EVM schematic in Figure 1–2.  
Figure 2–4. Multiple Feedback Filter Circuit  
787 Ω  
100 pF  
V
CC  
732 Ω  
100 Ω  
787 Ω  
220 pF  
787 Ω  
5 V  
+
–1 dBm  
AC  
THS4141  
732 Ω  
+
100 Ω  
–5 V  
V
EE  
100 pF  
787 Ω  
2-6  
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THS4141 EVM Bill of Materials  
Figure 2–5. Gain vs Phase  
Butterworth filter with multiple feedback frequency response.  
10  
8
6
Phase  
4
2
0
Gain  
–2  
–4  
–8  
–10  
V
R
= –1 dBm  
= 200 Diff  
= ±15  
IN  
L
V
CC  
0.1  
1
10  
f – Frequency – MHz  
100  
500  
2.8 THS4141 EVM Bill of Materials  
Table 2–1. THS4141 EVM Bill of Materials  
Ref.  
Description  
Size  
Qty.  
Manufacturer  
Murata  
Part Number  
C1, C4,  
C5, C6  
Capacitor, 0.1 µF, ceramic  
0805  
4
GRM40–X7R104K25  
C7, C8  
Capacitor, 6.8 µF, 35 V, 20%  
7343  
0805  
2
5
Sprague  
293D685X9035D2T  
tantalum, SM  
C1A, C1B, Open  
C2, C3A,  
C3B  
J1, J2, J3, SMT_PCB_MT  
J4  
SMA jack  
4
4
4
2
Amphenol  
Newark  
901-144-8RFX  
35F865  
J6, J7, J8, Banana jack  
J9  
JU1, JU2,  
JU3, JU4  
2 pos jumper header, 0.1 ctrs.,  
0.025” sq pins  
2 pos  
jump  
JU1, JU2  
Shorting jumpers header, 0.1  
ctrs., 0.025” sq pins  
L1, L2  
Inductor, 0.22 µH SM  
0805  
0805  
2
5
Digi-Key  
Digi-Key  
PCD1176CT–ND  
P0.0ACT–ND  
R1a, R1b, Resistor, 0 , 1%  
RX1, RX4,  
RX5  
R2a, R2b, Open  
R5, R12,  
0805  
11  
R13, R14,  
R15, RX2,  
RX7, RX8,  
RX9  
2-7  
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THS4141 EVM Bill of Materials  
Table 2–1. THS4141 EVM Bill of Materials (continued)  
Ref.  
R3a, R3b  
R4a, R4b  
R6a, R6b  
R11  
Description  
Resistor, 374 , 1%  
Resistor, 0 , 1%  
Size  
0805  
1206  
0805  
0805  
1206  
Qty.  
2
Manufacturer  
Digi-Key  
Part Number  
P374CTR-ND  
2
Digi-Key  
Digi-Key  
Digi-Key  
Digi-Key  
P0.0ECT-ND  
P402CTR-ND  
P10.KCTR-ND  
P49.9FTR-ND  
Resistor, 402 , 1%  
Resistor, 10 k, 1%  
2
1
R10, RX3, Resistor, 49.9 , 1%  
RX6  
3
R16, R7  
Open  
1206  
2
2
R36aA,  
R36aB,  
R36bA,  
R36bB  
High precision resistor  
RPU1,  
RPU2  
Open  
0805  
2
RX0  
Resistor, 24.9 , 1%  
0805  
1
2
3
Digi–Key  
P24.9CTR-ND  
T1, T2  
Open  
MC KK81  
TP .025  
TP1, TP2, Test point 2  
TP3  
Farnell  
Farnell  
240-345  
240-333  
TP4, TP5, Test point 2  
TP6, TP7  
TP .025  
4
1
U1  
IC, THS4141  
8 Pin  
DGN  
Texas Instruments THS4141CDGN  
2-8  
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Chapter 3  
General High-Speed Amplifier Design  
Considerations  
The THS4141 EVM layout has been designed for use with high-speed signals  
and can be used as an example when designing PCBs incorporating the  
THS4141. Careful attention has been given to component selection,  
grounding, power supply bypassing, and signal path layout. Disregarding  
these basic design considerations could result in less than optimum  
performance of the THS4141 high-speed operational amplifier.  
Surface-mount components were selected because of the extremely low lead  
inductance associated with this technology. This helps minimize both stray  
inductance and capacitance. Also, because surface-mount components are  
physically small, the layout can be very compact.  
Tantalum power supply bypass capacitors at the power input pads help supply  
currents needed for rapid, large signal changes at the amplifier output. The  
0.1-µF power supply bypass capacitors were placed as close as possible to  
the IC power input pins in order to minimize the return path impedance. This  
improves high frequency bypassing and reduces harmonic distortion.  
A proper ground plane on both sides of the PCB should be used with  
high-speed circuit design. This provides low-inductive ground connections for  
return current paths. In the area of the amplifier input pins, however, the  
ground plane should be removed to minimize stray capacitance and reduce  
ground plane noise coupling into these pins. This is especially important for  
the inverting pin while the amplifier is operating in the noninverting mode.  
Because the voltage at this pin swings directly with the noninverting input  
voltage, any stray capacitance would allow currents to flow into the ground  
plane. This could cause possible gain error and/or oscillation. Capacitance  
variations at the amplifier input pin of greater than 1 pF can significantly affect  
the response of the amplifier.  
In general, it is best to keep signal lines as short and as straight as possible.  
Incorporation of microstrip or stripline techniques is also recommended when  
signal lines are greater than 1 inch in length. These traces must be designed  
with a characteristic impedance of either 50 or 75 , as required by the  
application. Such a signal line must also be properly terminated with an  
appropriate resistor.  
3-1  
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Finally, proper termination of all inputs and outputs must be incorporated into  
the layout. Unterminated lines, such as coaxial cable, can appear to be a  
reactive load to the amplifier. By terminating a transmission line with its  
characteristic impedance, the amplifier’s load then appears to be purely  
resistive, and reflections are absorbed at each end of the line. Another  
advantage of using an output termination resistor is that capacitive loads are  
isolated from the amplifier output. This isolation helps minimize the reduction  
in the amplifier’s phase-margin and improves the amplifier stability resulting  
in reduced peaking and settling times.  
3-2  
General High-Speed Amplifier Design Considerations  
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