Texas Instruments Network Card DAC7741EVM User Manual

DAC7741EVM  
User’s Guide  
October 2002  
DAP EVMs  
SLAU093  
Download from Www.Somanuals.com. All Manuals Search And Download.  
EVM IMPORTANT NOTICE  
Texas Instruments (TI) provides the enclosed product(s) under the following conditions:  
This evaluation kit being sold by TI is intended for use for ENGINEERING DEVELOPMENT OR EVALUATION  
PURPOSES ONLY and is not considered by TI to be fit for commercial use. As such, the goods being provided  
may not be complete in terms of required design-, marketing-, and/or manufacturing-related protective  
considerations, including product safety measures typically found in the end product incorporating the goods.  
As a prototype, this product does not fall within the scope of the European Union directive on electromagnetic  
compatibility and therefore may not meet the technical requirements of the directive.  
Should this evaluation kit not meet the specifications indicated in the EVM Users Guide, the kit may be returned  
within 30 days from the date of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE  
WARRANTY MADE BY SELLER TO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED,  
IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY  
PARTICULAR PURPOSE.  
The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user  
indemnifies TI from all claims arising from the handling or use of the goods. Please be aware that the products  
received may not be regulatory compliant or agency certified (FCC, UL, CE, etc.). Due to the open construction  
of the product, it is the users responsibility to take any and all appropriate precautions with regard to electrostatic  
discharge.  
EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH ABOVE, NEITHER PARTY SHALL BE LIABLE  
TO THE OTHER FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES.  
TI currently deals with a variety of customers for products, and therefore our arrangement with the user is not  
exclusive.  
TI assumes no liability for applications assistance, customer product design, software performance, or  
infringement of patents or services described herein.  
Please read the EVM Users Guide and, specifically, the EVM Warnings and Restrictions notice in the EVM  
Users Guide prior to handling the product. This notice contains important safety information about temperatures  
and voltages. For further safety concerns, please contact the TI application engineer.  
Persons handling the product must have electronics training and observe good laboratory practice standards.  
No license is granted under any patent right or other intellectual property right of TI covering or relating to any  
machine, process, or combination in which such TI products or services might be or are used.  
Mailing Address:  
Texas Instruments  
Post Office Box 655303  
Dallas, Texas 75265  
Copyright 2002, Texas Instruments Incorporated  
Download from Www.Somanuals.com. All Manuals Search And Download.  
EVM WARNINGS AND RESTRICTIONS  
It is important to operate this EVM within the input voltage range of 15 V and the output  
voltage range of 10 V.  
Exceeding the specified input range may cause unexpected operation and/or irreversible  
damage to the EVM. If there are questions concerning the input range, please contact a TI  
field representative prior to connecting the input power.  
Applying loads outside of the specified output range may result in unintended operation and/or  
possible permanent damage to the EVM. Please consult the EVM Users Guide prior to  
connecting any load to the EVM output. If there is uncertainty as to the load specification,  
please contact a TI field representative.  
During normal operation, some circuit components may have case temperatures greater than  
xxx°C. The EVM is designed to operate properly with certain components above xxx°C as  
long as the input and output ranges are maintained. These components include but are not  
limited to linear regulators, switching transistors, pass transistors, and current sense  
resistors. These types of devices can be identified using the EVM schematic located in the  
EVM Users Guide. When placing measurement probes near these devices during operation,  
please be aware that these devices may be very warm to the touch.  
Mailing Address:  
Texas Instruments  
Post Office Box 655303  
Dallas, Texas 75265  
Copyright 2002, Texas Instruments Incorporated  
Download from Www.Somanuals.com. All Manuals Search And Download.  
Preface  
Read This First  
About This Manual  
This users guide describes the characteristics, operation, and the use of the  
DA7741 evaluation module. It covers all pertinent areas involved to properly  
use this EVM board along with the devices that it supports. The physical PCB  
layout, schematic diagram and circuit descriptions are included.  
How to Use This Manual  
This document contains the following chapters:  
- Chapter 1EVM Overview  
- Chapter 2Physical Description  
- Chapter 3EVM Operation  
Information About Cautions and Warnings  
This book may contain cautions and warnings.  
This is an example of a caution statement.  
A caution statement describes a situation that could potentially  
damage your software or equipment.  
This is an example of a warning statement.  
A warning statement describes a situation that could potentially  
cause harm to you.  
The information in a caution or a warning is provided for your protection.  
Please read each caution and warning carefully.  
iii  
Download from Www.Somanuals.com. All Manuals Search And Download.  
Trademarks  
Related Documentation From Texas Instruments  
To obtain a copy of any of the following TI documents, call the Texas Instru-  
ments Literature Response Center at (800) 477 8924 or the Product Informa-  
tion Center (PIC) at (972) 644 5580. When ordering, identify this manual by  
its title and literature number. Updated documents can also be obtained  
through our website at www.ti.com.  
Data Sheets:  
DAC7741  
REF102  
Literature Number:  
SBAS248  
PDS-900E  
OPA627  
PDS-998H  
Questions about this or other Data Converter EVM’s?  
If you have questions about this or other Texas Instruments Data Converter  
evaluation modules, please feel free to e-mail the Data Converter Application  
Team at [email protected]. Please include in the subject heading the  
product you have questions or concerns with.  
FCC Warning  
This equipment is intended for use in a laboratory test environment only. It gen-  
erates, uses, and can radiate radio frequency energy and has not been tested  
for compliance with the limits of computing devices pursuant to subpart J of  
part 15 of FCC rules, which are designed to provide reasonable protection  
against radio frequency interference. Operation of this equipment in other en-  
vironments may cause interference with radio communications, in which case  
the user at his own expense will be required to take whatever measures may  
be required to correct this interference.  
Trademarks  
TI Logo is a trademark of Texas Instruments Incorporated. SPI and QSPI are  
trademarks of Motorola, Inc.  
iv  
Download from Www.Somanuals.com. All Manuals Search And Download.  
Contents  
1
EVM Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1  
1.1  
1.2  
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2  
Power Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2  
1.2.1 Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2  
1.2.2 Reference Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2  
EVM Basic Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3  
1.3  
2
3
Physical Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1  
2.1  
2.2  
PCB Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2  
Bill of Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-7  
EVM Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1  
3.1  
3.2  
Factory Default Setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2  
Host Processor Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-3  
3.2.1 Unity Gain Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-3  
3.2.2 Output Gain of Two . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-4  
3.2.3 Capacitive Load Drive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-4  
Jumper Setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-5  
Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-7  
3.3  
3.4  
Figures  
1-1  
2-1  
2-2  
2-3  
2-4  
2-5  
EVM Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4  
Layer One (Top Silkscreen) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2  
Layer Two (Ground Plane) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3  
Layer 3 (Power Plane) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-4  
Layer 4 (Bottom Plane) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-5  
Drill Drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-6  
v
Download from Www.Somanuals.com. All Manuals Search And Download.  
Tables  
2-1  
3-1  
3-2  
3-3  
3-4  
3-5  
Parts List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-7  
Factory Default Jumper Setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2  
Unity Gain Output Jumper Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-3  
Gain of Two Output Jumper Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-4  
Capacitive Load Drive Output Jumper Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-4  
Jumper Setting Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-5  
vi  
Download from Www.Somanuals.com. All Manuals Search And Download.  
Chapter 1  
EVM Overview  
This chapter gives a general overview of the DAC7741 evaluation module  
(EVM), and describes some of the factors that must be considered in using this  
module.  
Topic  
Page  
1.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2  
1.2 Power Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2  
1.3 EVM Basic Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3  
1-1  
Download from Www.Somanuals.com. All Manuals Search And Download.  
Features  
1.1 Features  
This EVM features the DAC7741 digital-to-analog converter. The DAC7741  
EVM is a simple evaluation module designed for a quick and easy way to  
evaluate the functionality of the high resolution, single-channel, and parallel  
input DAC. This EVM features a parallel interface to communicate to any host  
processor base system.  
1.2 Power Requirements  
The following sections describe the power requirements of this EVM.  
1.2.1 Supply Voltage  
The dc power supply requirement for the digital section of this EVM is typically  
5 V connected to the J11-2 or via J6-2 terminal (when plugged in with another  
EVM board or interface card) and is referenced to ground through the J11-1  
and J6-1 terminal. The dc power supply requirement for the analog section  
(V and V ) of this EVM range from 15.75 V to -15.75 V maximum and  
CC  
SS  
connects through J10-4 and J12-1 or through J7-6 and J7-8 terminals and  
is referenced to analog ground through J10-2, J12-2 and J7-1 terminals.  
A dc source of 15 V supply is required to provide the rails for the external  
output op-amp provided for output signal conditioning or boost capacitive load  
drive and for other output modes of application. The 15 V supply connects  
through J10-1 or J7-2 terminal, and the 15 V supply connects through J10-3  
or J7-4 terminals. The 15 V supply is referenced to ground through J10-2  
or J7-3 terminals. The supply source for V and V can also be used as the  
CC  
SS  
supply source for 15 V and -15 V respectively.  
To avoid potential damage to the EVM board, make sure that the  
correct cables are connected to their respective terminals as  
labeled on the EVM board.  
Stresses above the maximum listed voltage ratings may cause  
permanent damage to the device.  
1.2.2 Reference Voltage  
Although the DAC7741 has a built-in 10-V voltage reference, an external  
reference circuit is provided in the EVM board. The external reference circuit  
can be isolated if the internal reference voltage is selected.  
The 10-V precision voltage reference is provided to supply the external voltage  
reference for the DAC through REF102, U3, via jumper W4 by shorting pins  
1 and 2. An adjustable 100-kpotentiometer, R11, is installed in series with  
20 k, R10, to allow the user to adjust the reference voltage to its desired  
settings. TP1 and TP2 are also provided, as well as J4-20, to allow the user  
to connect other external reference source if the onboard reference circuit is  
not desired. The external voltage reference should not exceed 10-V dc.  
1-2  
Download from Www.Somanuals.com. All Manuals Search And Download.  
EVM Basic Functions  
The REF102 precision reference derives its power of 15-V supply through  
J10 or J7 terminal. The (plus) 15 V connects through J10-1 or J7-2 terminals,  
while the (minus) -15 V connects through J10-3 or J7-4 terminals. They are  
both referenced to analog ground through J10-2 and J7-1.  
The DAC7741 has a REFEN pin to enable the internal reference circuit or  
disable it and select an external reference source. The REFEN pin can be  
hardware driven through W2 jumper. Likewise, it can also be software driven  
through J2-11 terminal via W2 jumper by shorting pins 1 and 2. The REF  
OUT  
pin of the DAC7741 must be connected to the REF pin to use the internal  
IN  
voltage reference. This can be done through W3 jumper by shorting pins 1 and  
2. Shorting pins 2 and 3 of W3 selects the external voltage reference source.  
The on-chip reference buffer output is channeled out through V  
REF  
pin which  
is used to set up the DAC7741 output amplifier into one of three voltage output  
modes. V can also be used to drive other system components that require  
REF  
external voltage reference.  
When applying an external voltage reference through TP1 or J4-20,  
make sure that it does not exceed 10 V maximum. Otherwise, this  
can permanently damage the DAC7741, U11, device under test.  
1.3 EVM Basic Functions  
The DAC7741 EVM is a functional evaluation platform to test certain functional  
characteristics of the DAC7741 digital-to-analog converter. Functional  
evaluation of the DAC device can be accomplished with the use of any  
microprocessor, TMS320VC33DSP, or some sort of a waveform generator.  
The headers, J1, J2 and J3 are provided to channel in the necessary control  
signals and data needed to interface a microprocessor/microcontroller, TIs  
DSP starter kit or waveform generator to the DAC7741 EVM, through a custom  
cable.  
A specific adapter interface card is also available for most of TIs DSP starter  
kit (DSK) and the card model depend on the type of the DSP starter kit to be  
used. The user must specify the DSP used as an interface to acquire the right  
adapter interface card. Call or email TI for more information regarding the  
adapter interface card.  
The output of the DAC can be monitored through two different access points  
which are as follows; a BNC connector (J5, if installed), and also a header  
through pin 2 of J4. The 6-pin header, W13, provides different options of the  
DAC output, but requires the output op-amp, U2, to be configured correctly first  
for the desired waveform characteristic. Shorting pins 1 and 2 of W13 allows  
the user to monitor the raw output of the DAC7741.  
EVM Overview  
1-3  
Download from Www.Somanuals.com. All Manuals Search And Download.  
EVM Basic Functions  
A block diagram of the EVM is shown below in the Figure 1-1.  
Figure 1-1. EVM Block Diagram  
+15 V  
-15 V  
+15 V  
GND  
-15 V  
GND  
VCC  
VDD  
VSS  
(J6)  
(J7)  
VCC  
VDD  
VSS  
External  
Reference  
Module  
W14  
Output  
Buffer  
Module  
TP1  
W4  
REFEN  
LDAC  
RST  
W3  
+REF  
DAC Out  
IN  
Ext Ref  
Input  
RSTSEL  
(J2)  
(J3)  
W13  
(J4)  
REF  
REF  
IN  
out  
(J5)  
DAC Module  
CS  
R/W  
TP2  
DB15 (MSB)  
DB1 (LSB)  
(J1)  
1-4  
Download from Www.Somanuals.com. All Manuals Search And Download.  
Chapter 2  
Physical Description  
This chapter describes the physical characteristics and PCB layout of the EVM  
and lists the components used on the module.  
Topic  
Page  
2.1 PCB Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2  
2.2 Bill of Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-7  
2-1  
Download from Www.Somanuals.com. All Manuals Search And Download.  
PCB Layout  
2.1 PCB Layout  
The EVM is constructed on a four-layer printed-circuit board using a  
copper-clad FR-4 laminate material. The printed-circuit board has a dimension  
of 99,06 mm (3.90 inch) × 104,14 mm (4.10 inch), and the board thickness is  
1,57 mm (0.062 inch). Figures 2-1 through 2-6 show the individual artwork  
layers.  
Figure 2-1. Layer One (Top Silkscreen)  
2-2  
Download from Www.Somanuals.com. All Manuals Search And Download.  
PCB Layout  
Figure 2-2. Layer Two (Ground Plane)  
Physical Description  
2-3  
Download from Www.Somanuals.com. All Manuals Search And Download.  
PCB Layout  
Figure 2-3. Layer 3 (Power Plane)  
2-4  
Download from Www.Somanuals.com. All Manuals Search And Download.  
PCB Layout  
Figure 2-4. Layer 4 (Bottom Plane)  
Physical Description  
2-5  
Download from Www.Somanuals.com. All Manuals Search And Download.  
PCB Layout  
Figure 2-5. Drill Drawing  
2-6  
Download from Www.Somanuals.com. All Manuals Search And Download.  
Bill of Materials  
2.2 Bill of Materials  
Table 2-1.Parts List  
Item # Qty Designator  
Manufacturer  
Part Number  
Description  
1
2
3
4
5
1
2
5
1
5
C8  
Panasonic  
ECJ3VB1C105K  
1 µF, 1206 multilayer ceramic  
capacitor  
C9 C10  
Panasonic  
Panasonic  
Panasonic  
ECUV1H103KBM  
ECJ3VB1C104K  
ECUV1H102JCH  
C1210C106K8PAC  
0.01 µF, 1206 multilayer ceramic  
capacitor  
C1 C2 C3 C7  
C13  
0.1 µF, 1206 multilayer ceramic  
capacitor  
C12  
1 nF, 1206 multilayer ceramic  
capacitor  
C4 C5 C6 C11 Kemet  
C14  
10 µF, 1210 multilayer ceramic X5R  
capacitor  
6
7
8
1
2
6
R8  
Panasonic  
Panasonic  
ERJ-8GEY0R00V  
ERJ-8ENF2002V  
ERJ-8ENF1002V  
0 , 1/4W 1206 chip resistor  
20 k, 1/4W 1206 chip resistor  
10 k, 1/4W 1206 chip resistor  
R7 R10  
R4 R5 R6 R12 Panasonic  
R13 R14  
9
2
1
R1 R2  
Bourns  
3214W-103E  
3214W-104E  
10 k, BOURNS_32X4W Series 5T  
pot  
10  
R11  
Bourns  
100 k, BOURNS_32X4W Series 5T  
pot  
11  
12  
1
2
R3  
Panasonic  
Samtec  
ERJ-8ENF1003V  
100 k, 1/4W 1206 chip resistor  
5X2X0.1  
J6 J7  
IPT1-105-01-S-D-VS  
10-pin 3A isolated power socket  
13  
14  
15  
16  
3
1
2
1
J2 J3 J4  
J1  
Samtec  
TSM-110-01-S-DV-M  
TSM-116-01-S-DV-M  
KRMZ2  
10X2X.1, 20-pin 0.025sq SMT socket  
16X2X.1, 32-pin 0.025sq SMT socket  
2-pin Terminal screw connector  
Samtec  
J11 J12  
Lumberg  
AMP (TYCO)  
J5 (Not  
227699-2  
PCB Mounted BNC - Amphenol  
Installed)  
17  
18  
19  
20  
1
1
1
1
J10  
U1  
U2  
U3  
Lumberg  
KRMZ4  
4-pin Terminal screw connector  
16-bit, 48-LQFP DAC  
Texas Instruments  
Texas Instruments  
Texas Instruments  
DAC7741  
OPA627AU  
REF102AU  
8-SOP(D) Precision op amp  
10 V, 8-SOP(D) Precision voltage  
reference  
21  
22  
23  
2
1
3
TP1 TP2  
W13  
Cambion  
Samtec  
Samtec  
180-7337-02-05  
Turret terminal test point  
TSW-103-07-L-D  
3X2X 0.1 6-Pin IDC header  
20-pin 0.025sq SMT terminal strips  
P2 P3 P4  
SSW-110-22-S-D-VS-P  
(see Note)  
24  
25  
1
2
P1 (see Note) Samtec  
SSW-116-22-S-D-VS-P  
IPS1-105-01-S-D-VS  
32-pin 0.025sq SMT Terminal Strips  
P6 P7  
Samtec  
3A Isolated power header  
(see Note)  
26  
10 W6 W7 W8  
W9 W10 W11  
W14 W15  
Samtec  
TSW-102-07-L-S  
2 Position jumper_ 0.1spacing  
W16 W17  
27  
28  
6
1
W1 W2 W3  
W4 W5 W12  
Samtec  
Bourns  
TSW-103-07-L-S  
3214W-203E  
3 Position Jumper_ 0.1spacing  
R9  
20 k, BOURNS_32X4W Series 5T  
pot  
Note: P1, P2, P3, P4, P8, & P9 parts are not shown in the schematic diagram. All the P designated parts are installed in the  
bottom side of the PC Board opposite the J designated counterpart. Example, J1 is installed on the topside while P1 is  
installed in the bottom side opposite of J1.  
Physical Description  
2-7  
Download from Www.Somanuals.com. All Manuals Search And Download.  
Bill of Materials  
(This page has been left blank intentionally.)  
2-8  
Download from Www.Somanuals.com. All Manuals Search And Download.  
Chapter 3  
EVM Operation  
This chapter covers in detail the operation of the EVM to provide guidance to  
the user in evaluating the onboard DAC and how to interface the EVM to a  
specific host processor.  
Refer to the DAC7741 data sheet, SBAS248, for information about its parallel  
interface and other related topics.  
The EVM board is factory tested and configured to operate in the bipolar output  
mode.  
Topic  
Page  
3.1 Factory Default Setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2  
3.2 Host Processor Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-3  
3.3 Jumper Setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-5  
3.4 Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-7  
3-1  
Download from Www.Somanuals.com. All Manuals Search And Download.  
Factory Default Setting  
3.1 Factory Default Setting  
The EVM board is set to its default configuration from factory as described on  
the table below to operate in bipolar 10V mode of operation using the internal  
reference.  
Table 3-1.Factory Default Jumper Setting  
Jumper  
Position  
Reference  
W1  
Function  
V output pin is floated and not used for offset adjustment.  
OPEN  
2-3  
REF  
REFEN pin is tied to AGND to enable 10 V internal reference.  
REF pin is strapped to REF to provide 10 V internal voltage reference.  
W2  
W3  
1-2  
OUT  
IN  
W4  
OPEN  
1-2  
Onboard external reference through U3 is disconnected.  
Negative supply rail of U2 op-amp is supplied with -15 V.  
REFADJ pin is floated.  
W5  
W6  
OPEN  
W7  
CLOSE RFB2 pin is strapped to V  
pin for DAC output feedback.  
OUT  
CLOSE TEST pin is tied to DGND.  
W8  
W9  
OPEN  
OPEN  
SJ pin is floated.  
RFB1 is floated.  
W10  
W11  
W12  
W13  
W14  
CLOSE AGND and DGND are tied together to a common point.  
1-2  
3-4  
Positive supply rail of U2 op-amp is supplied with 15 V.  
Buffered output of DAC is channeled through to J5 and J4-2.  
OPEN  
External reference is disconnected from the negative input of U2 to configure U2 for  
unity gain.  
W15  
W16  
W17  
OPEN  
OPEN  
OPEN  
Configure U2 op-amp for unity gain.  
RSTSEL pin is tied high to set DAC reset value to midscale.  
RST pin is tied high by default.  
3-2  
Download from Www.Somanuals.com. All Manuals Search And Download.  
Host Processor Operation  
3.2 Host Processor Operation  
The host processor basically drives the DAC, so the DACs proper operation  
depends on the successful configuration between the host processor and the  
EVM board. In addition, a properly written code is also required to operate the  
DAC.  
A custom cable can be made specific to the host interface platform. The EVM  
allows interface to the host processor through J2 and J3 header connectors  
for the control signals, and J1 header connector for the data input. The output  
can be monitored through the J5 BNC connector (if installed) or J4 header  
connector. An interface adapter card is also available for specific DSP starter  
kits as mentioned in Chapter 1 of this manual.  
The EVM includes an optional signal conditioning circuit for the DAC output  
through an external operational amplifier, U2. This is set to a unity gain  
configuration by default. Regardless, the raw output of the DAC can be probed  
through W13 pin 2 so that it can be compared with the output of U2 if  
necessary. The output terminals J5 and J4 are provided to monitor the desired  
output of the DAC by shorting the respective pins of W13.  
The following sections describe the different configurations of the output  
amplifier, U2.  
3.2.1 Unity Gain Output  
The buffered output configuration is used to prevent loading the DAC7741 and  
should closely match the raw output of the DAC with maybe some slight  
distortion because of the feedback resistor and capacitor. The user can tailor  
the feedback circuit to closely match their desired wave shape by simply  
desoldering R7 and C11 and replacing them with the desired values. You can  
also simply get rid of R7 and C11 altogether and just solder a zero-resistor  
in replacement of R7, if desired.  
Table 3-2 shows the jumper setting for the unity gain configuration of the DAC  
external output buffer in unipolar or bipolar mode.  
Table 3-2.Unity Gain Output Jumper Settings  
Jumper Setting  
Reference  
Function  
Unipolar  
Bipolar  
W5  
2-3  
2-3  
1-2  
1-2  
Supplies the voltage for the negative rail of op-amp.  
Supplies the voltage for the positive rail of op-amp.  
DAC output is channeled to the output terminals.  
exREFin is disconnected from the negative input of op-amp.  
Disconnect negative input of op-amp from GND  
W12  
W13  
W14  
W15  
3-4  
3-4  
Open  
Open  
Open  
Open  
EVM Operation  
3-3  
Download from Www.Somanuals.com. All Manuals Search And Download.  
Host Processor Operation  
3.2.2 Output Gain of Two  
This configuration allows the DAC output with a gain of two, but is limited to  
the effective rails of the operational amplifier. When the DAC7741 is  
configured to operate in bipolar mode, the DAC output must be within the  
range of 12 V  
or less. Anywhere above the range of 12 V  
would clip the  
P- P  
P- P  
output of the op-amp. Likewise, when operating the DAC in unipolar mode, the  
DAC output must not exceed 6 V  
.
P- P  
Table 3-3 shows the proper jumper settings of the EVM for the 2× gain output  
of the DAC.  
Table 3-3.Gain of Two Output Jumper Settings  
Reference  
Jumper Setting  
Function  
W5  
1-2 (Bipolar)  
2-3 (Unipolar)  
Negative rail of the op-amp tied to -15 V for bipolar operation or AGND  
for unipolar operation.  
W12  
W13  
W14  
W15  
1-2  
Positive rail supply of the op-amp tied to 15 V  
Amplified output of DAC is channeled to the output terminals  
Disconnect exREFin from negative input of op-amp  
Configures op-amp for a 2× gain output  
3-4  
Open  
Close  
3.2.3 Capacitive Load Drive  
Another output configuration option is to drive a wide range of capacitive load  
requirement. However, all op-amps under certain conditions may become  
unstable depending on the op-amp configuration, gain, and load value. These  
are just few factors that can affect op-amps stability performance and should  
be considered when implementing.  
In unity gain, the OPA627 op-amp, U2, performs very well with very large  
capacitive loads. Increasing the gain enhances the amplifiers ability to drive  
even more capacitance, and by adding a load resistor would even improve the  
capacitive load drive capability.  
Table 3-4 shows the jumper setting configuration for a capacitive load drive.  
Table 3-4.Capacitive Load Drive Output Jumper Settings  
Reference  
Jumper Setting Function  
W5  
1-2 (Bipolar)  
2-3 (Unipolar)  
Negative rail of the op-amp tied to -15 V for bipolar operation or AGND  
for unipolar operation.  
W12  
W13  
W14  
W15  
1-2  
Positive rail supply of the op-amp tied to 15 V  
Capacitive load drive output of DAC is channeled to the output terminals  
Disconnect exREFin from negative input of op-amp  
Disconnect R12 (see note)  
5-6  
Open  
Open  
Note:  
If there is a need to incrementally adjust the capacitive load output, replace R12 with a capacitor with the desired capaci-  
tance value and CLOSE W15.  
3-4  
Download from Www.Somanuals.com. All Manuals Search And Download.  
Jumper Setting  
3.3 Jumper Setting  
The figures in Table 3-5 will show the function of each jumper on the  
EVM.  
Table 3-5.Jumper Setting Function  
Jumper  
Setting  
Reference  
Function  
is strapped to V  
1
1
1
1
1
1
1
1
1
3
3
3
3
3
3
3
3
3
R
to set V (summing junction) to V  
/2. Refer to the data  
OFFSET  
REF  
SJ  
REF  
sheet for offset adjustment.  
is not connected to set V (summing junction) to V /3. Refer to the data  
REF  
R
OFFSET  
SJ  
W1  
sheet for offset adjustment.  
is strapped to AGND to set V (summing junction) to V /6. Refer to the  
REF  
R
OFFSET  
SJ  
data sheet for osset adjustment.  
Disables the internal reference voltage.  
W2  
W3  
W4  
Enables the internal reference voltage of +10V.  
REF is strapped to REF  
to allow the internal 10 V to supply the DAC reference  
IN  
OUT  
voltage.  
REF is strapped to exREFin to allow either the onboard adjustable reference or user  
supplied reference to supply the DAC reference voltage.  
IN  
Routes the onboard 10 V reference through the adjustable pot to W3 and W14.  
Routes the user supplied reference from TP1 or J4-20 through the adjustable pot to  
W3 and W14.  
1
3
Negative supply rail of op-amp is powered by -15 V.  
Negative supply rail of op-amp is tied to AGND.  
REFADJ pin is not connected.  
W5  
W6  
1
3
REFADJ pin is connected to R1 pot for gain adjustment input when internal reference  
is used.  
RFB2 pin is not connected to the V  
pin.  
OUT  
W7  
W8  
RFB2 pin is strapped to the V  
pin for feedback.  
OUT  
TEST pin not connected to DGND.  
TEST pin connected to DGND (default mode).  
SJ (summing junction) pin of the DAC output amplifier is not connected.  
W9  
SJ (summing junction) pin of the DAC output amplifier is connected to R2 pot to allow  
small amount of current for offset adjustment.  
RFB1 pin is not connected.  
W10  
RFB1 pin is strapped to RFB2 pin for DAC V  
feedback.  
OUT  
EVM Operation  
3-5  
Download from Www.Somanuals.com. All Manuals Search And Download.  
Jumper Setting  
Table 3-5. Jumper Setting Function (Continued)  
Jumper  
Setting  
Reference  
Function  
Disconnects AGND from DGND.  
W11  
Connects AGND and DGND together.  
Positive supply rail of op-amp is powered by +15V.  
1
1
3
3
W12  
Positive supply rail of op-amp is powered by V  
.
CC  
2 4 6  
Routes the raw output of the DAC7741 to J4-2 and J5 output terminals.  
1 3 5  
2 4 6  
Routes the output of U2 to J4-2 and J5 output terminals. Used for unipolar and bipolar  
modes of operation.  
W13  
1 3 5  
2 4 6  
Routes the output of U2 to J4-2 and J5 output terminals. Used for capacitive load  
driving.  
1 3 5  
Disconnects exREFin from the negative input terminal of U2.  
W14  
W15  
Allows exREFin to be routed to the negative input terminal of U2 used for  
experimentation purposes only.  
Disconnect the negative terminal of U2 to AGND and disable 2x gain.  
Configures U2 for a 2× gain output.  
RSTSEL pin is pulled high and configures the DAC to midscale when POR or reset is  
initiated.  
W16  
RSTSEL pin is pulled low and configures the DAC to minscale when POR or reset is  
initiated.  
RST pin is pulled high and configures the DAC not to reset (default state).  
W17  
RST pin is pulled low and holds the DAC to reset state.  
Legend:  
Indicates the corresponding pins that are shorted or closed.  
3-6  
Download from Www.Somanuals.com. All Manuals Search And Download.  
Schematic  
3.4 Schematic  
A schematic of the DAC7741 is found on the following page.  
EVM Operation  
3-7  
Download from Www.Somanuals.com. All Manuals Search And Download.  
1
2
3
4
5
6
Revision History  
REV  
ECN Number  
Approved  
VCC  
J1  
32 31  
VSS  
D15  
D14  
D13  
D12  
D11  
D10  
D9  
D8  
D7  
D6  
D5  
C7  
C5  
30 29  
28 27  
26 25  
24 23  
22 21  
20 19  
18 17  
16 15  
14 13  
12 11  
U1  
DB15  
0.1µF 10µF  
D15  
D14  
D13  
D12  
D11  
D10  
D9  
D8  
D7  
D6  
D5  
35  
34  
33  
32  
31  
30  
29  
28  
27  
22  
21  
20  
19  
18  
17  
16  
41  
42  
40  
CS  
R/W  
LDAC  
CS  
R/W  
LDAC  
C1  
C4  
10µF  
DB14  
DB13  
DB12  
DB11  
DB10  
DB9  
DB8  
DB7  
DB6  
DB5  
DB4  
DB3  
DB2  
DB1  
DB0  
D
C
B
A
D
C
B
A
VDD  
0.1µF  
39  
43  
3
RST  
RSTSEL  
RST  
RSTSEL  
VCC  
J3  
J2  
R13  
10k  
CS  
R/W  
R14  
10k  
1
2
4
6
8
1
2
4
6
8
10  
D4  
D3  
D2  
D1  
2
3
5
7
9
10  
8
6
4
2
9
7
5
3
1
VSS  
REFadj  
Vref  
3
5
7
9
R1  
10K  
LDAC  
RST  
RSTSEL  
REF_en  
W6  
46  
4
D4  
D3  
D2  
D1  
10  
D0  
11 12  
13 14  
15 16  
17 18  
19 20  
11 12  
13 14  
15 16  
17 18  
19 20  
W1  
W16  
W17  
D0  
5
Roffset  
REFout  
REFin  
Vout  
VDD  
38  
R7  
0/5K/20K  
VDD  
R3  
45  
47  
11  
44  
100K  
W9  
10  
9
Sum_Junc  
SJ  
C8  
1µF  
W3  
C14  
C13  
RFB1  
R2  
W10  
C6  
10µF  
C2  
0.1µF  
0.1µF  
10µF  
DAC_VOUT  
Sum_Junc  
8
W7  
W8  
RFB2  
TEST  
10K  
DAC_VOUT  
26  
REFEN  
exREFin  
6
7
AGND  
AGND  
R4  
37  
REF_en  
DGND  
VDD  
10K  
W2  
+15V  
VCC  
DAC7741  
J5  
W12  
C9  
0.01µF  
R8  
3
2
U2  
DAC_VOUT  
W13  
2
4
6
A1  
B3  
C5  
J4  
0
6
2
4
6
8
1
3
5
7
9
+15V  
W14  
R5  
R9  
20K  
Op Amp  
exREFin  
2
10K  
10  
U3  
12 11  
14 13  
16 15  
18 17  
20 19  
5
2
8
7
6
3
1
TRIM OUT  
V+ TEMP  
NC  
NC  
-15V  
W4  
+REFin  
1
3
NC  
C11  
10µF  
Tantalum  
R11  
2
REF102AU(8)  
W5  
C10  
TP1  
TP2  
C3  
0.1µF  
+REFin  
EXTERNAL  
REFERENCE  
(exREFin)  
100K  
0.01µF  
R6  
10K  
C12  
R10  
20K  
VDD  
+15V -15V VCC VSS  
1nF  
W15  
J6  
J7  
1
2
4
6
8
1
2
4
6
8
10  
3
5
7
9
3
5
7
9
J10  
J12  
J11  
10  
R12  
10K  
+15V  
-15V VCC  
VSS  
VDD  
CLD_OUT  
W11  
ti  
6443168  
12500 TI Boulevard. Dallas, Texas 75243  
Title:  
DAC7741  
Engineer:  
J. PARGUIAN  
DOCUMENTCONTROL #  
REV:  
A
Drawn By:  
FILE:  
DATE:  
SIZE:  
27-Sep-2002  
SHEET:  
OF:  
1
1
DAC7741.Sch  
1
2
3
4
5
6
Download from Www.Somanuals.com. All Manuals Search And Download.  

Tektronix Printer Accessories 016 1130 00 User Manual
Topcom Telephone MIRA 200 User Manual
Trane Thermostat BAS SVP10A EN User Manual
Transition Networks Network Card CPSMC0800 100 User Manual
Tripp Lite Air Conditioner SRXCOOL33K User Manual
Ultra electronic Printer Prima 2e User Manual
Uniden Cordless Telephone ELBT 585 User Manual
Uniden Two Way Radio 3689 2CK User Manual
Vizio Flat Panel Television E370VP User Manual
VTech Cordless Telephone VT 9115 User Manual