SUPER MICRO Computer Computer Hardware SUPER X5DL8 GG User Manual |
®
SUPER
SUPER X5DL8-GG
SUPER X5DLR-8G2+
SUPER X5DLR-8G2
USER’S MANUAL
Revision 1.0c
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Preface
Preface
About This Manual
This manual is written for system integrators, PC technicians and
knowledgeable PC users. It provides information for the installation and use
of the SUPER X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 serverboard. At launch,
the SUPER X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 supported single or dual
Intel XeonTM 1.50 - 3.20 GHz processors at a 533/400 MHz front side bus. Refer
®
to the motherboard specifications pages on our web site (http://
ported processors. This product is intended to be professionally installed.
Manual Organization
Chapter 1 begins with a checklist of what should be included in your
mainboard box, describes the features, specifications and performance of
the motherboard and provides detailed information about the chipset.
Chapter 2 begins with instructions on handling static-sensitive devices.
Read this chapter when you want to install the processor and DIMM memory
modules and when mounting the mainboard in the chassis. Also refer to
this chapter to connect the floppy and hard disk drives, SCSI drives, the IDE
interfaces, the parallel and serial ports, the front control panel functions,
the speaker and the keyboard.
If you encounter any problems, see Chapter 3, which describes trouble-
shooting procedures for the video, the memory and the setup configuration
stored in CMOS. For quick reference, a general FAQ (Frequently Asked Ques-
tions) section is provided. Instructions are also included for contacting technical
techsupport.htm for more detailed information.
Chapter 4 includes an introduction to BIOS and provides detailed information on
running the CMOS Setup utility.
Appendix A gives information on BIOS error beep codes.
Appendix B provides POST BIOS checkpoint codes.
iii
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SUPER X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 User’s Manual
Table of Contents
Preface
About This Manual ...................................................................................................... iii
Manual Organization ................................................................................................... iii
Chapter 1: Introduction
1-1 Overview ......................................................................................................... 1-1
Checklist .................................................................................................... 1-1
Contacting Supermicro ............................................................................ 1-2
Super X5DL8-GG Image ......................................................................... 1-4
Super X5DLR-8G2 Image ........................................................................ 1-5
Super X5DL8-GG Layout ........................................................................ 1-6
Super X5DL8-GG Quick Reference ...................................................... 1-7
Super X5DLR-8G2 Layout...................................................................... 1-8
Super X5DLR-8G2/X5DLR-8G2+ Quick Reference ............................ 1-9
Motherboard Features ........................................................................... 1-10
ServerWorks GC - LE Chipset System Block Diagram ................... 1-12
1-2 Chipset Overview......................................................................................... 1-13
1-3 Special Features........................................................................................... 1-13
ATI Graphics Controller ........................................................................ 1-13
BIOS Recovery ....................................................................................... 1-13
Recovery from AC Power Loss ......................................................... 1-13
1-4 PC Health Monitoring .................................................................................... 1-14
1-5 ACPI Features ............................................................................................... 1-15
1-6 Power Supply ............................................................................................... 1-17
1-7 Super I/O......................................................................................................... 1-17
Chapter 2: Installation
2-1 Static-Sensitive Devices ............................................................................... 2-1
Precautions ............................................................................................... 2-1
Unpacking.................................................................................................. 2-1
2-2 PGA Processor and Heatsink Installation .................................................. 2-2
2-3 Installing DIMMs ............................................................................................... 2-5
2-4 IO Ports/Control Panel Connectors.............................................................. 2-6
2-5 Connecting Cables .......................................................................................... 2-8
ATX Power Connector ............................................................................ 2-8
Processor Power Connector .................................................................. 2-8
NMI Button .................................................................................................. 2-8
Power LED ................................................................................................. 2-8
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Table of Contents
HDD LED .................................................................................................... 2-9
NIC1 LED ................................................................................................... 2-9
NIC2 LED ................................................................................................... 2-9
Overheat LED ........................................................................................... 2-9
Power Fail LED ...................................................................................... 2-10
Reset ........................................................................................................ 2-10
PWR_ON .................................................................................................. 2-10
Universal Serial Bus (USB0/1) ............................................................ 2-10
Serial Ports ............................................................................................. 2-11
PS/2 Keyboard and Mouse Ports ......................................................... 2-11
Fan Headers ........................................................................................... 2-11
GLAN1/GLAN2 (Ethernet Ports) ........................................................... 2-11
HD LED Indicator .................................................................................... 2-12
Power LED .............................................................................................. 2-12
Speaker .................................................................................................... 2-12
Third Power Supply Fail Header ......................................................... 2-12
Wake-On-LAN ......................................................................................... 2-13
Chassis Intrusion ................................................................................... 2-13
Extra Universal Serial Bus Connection (USB2/3) ............................ 2-13
IPMB .......................................................................................................... 2-13
SMB .......................................................................................................... 2-13
2-6 Onboard Indicators ...................................................................................... 2-14
GLAN1/GLAN2 LEDs ............................................................................. 2-14
Debug LEDs ............................................................................................ 2-14
CR5 LED .................................................................................................. 2-15
2-7 DIP Switch Settings ..................................................................................... 2-15
DIP Switch 4: Processor Speed ......................................................... 2-15
2-8 Jumper Settings ............................................................................................ 2-16
Explanation of Jumpers ........................................................................ 2-16
CMOS Clear............................................................................................. 2-16
Speaker Enable/Disable .................................................................. 2-16,17
Fan Detection Select .............................................................................. 2-17
Chassis/Overheat Fan Select ............................................................... 2-17
Watch Dog ............................................................................................... 2-17
GLAN1 Enable/Disable ........................................................................... 2-18
GLAN2 Enable/Disable ........................................................................... 2-18
SCSI Enable/Disable................................................................................ 2-18
SCSI Termination Enable/Disable .......................................................... 2-18
PCI-X Bus Speed Setting (X5DL8-GG)................................................ 2-19
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SUPER X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 User’s Manual
PCI-X Bus Speed Setting (X5DLR-8G2/X5DLR-8G2+) ...................... 2-19
33 MHz PCI Enable/Disable ................................................................... 2-19
Front Side Bus Speed ........................................................................... 2-20
Spread Spectrum .................................................................................... 2-20
PCI 3.3V Standby Enable/Disable ........................................................ 2-20
VGA Enable/Disable ............................................................................... 2-20
Main Power Override ............................................................................. 2-21
2-9 Parallel Port, Floppy/Hard Disk Drive and SCSI Connections ............... 2-21
Parallel Port Connector ......................................................................... 2-21
Floppy Connector................................................................................... 2-22
IDE Connectors ...................................................................................... 2-22
Ultra320 SCSI Connector ....................................................................... 2-23
2-10 Installing Software Drivers ......................................................................... 2-24
Chapter 3: Troubleshooting
3-1 Troubleshooting Procedures ........................................................................ 3-1
Before Power On .................................................................................... 3-1
No Power .................................................................................................. 3-1
No Video ................................................................................................... 3-1
Memory Errors .......................................................................................... 3-2
Losing the System’s Setup Configuration ........................................... 3-2
3-2 Technical Support Procedures .................................................................... 3-2
3-3 Frequently Asked Questions ........................................................................ 3-3
3-4 Returning Merchandise for Service ............................................................ 3-5
Chapter 4: AMIBIOS
4-1 Introduction ....................................................................................................... 4-1
4-2 BIOS Features .................................................................................................. 4-2
4-3 Running Setup .................................................................................................. 4-2
4-4 Advanced BIOS Setup .................................................................................... 4-4
4-5 Chipset Setup ................................................................................................. 4-15
4-6 PCI / PnP Setup.............................................................................................. 4-16
4-7 Power Setup .................................................................................................. 4-18
4-8 Boot Setup ...................................................................................................... 4-20
4-9 Security Setup ............................................................................................... 4-22
4-10 Exit Setup ....................................................................................................... 4-24
Appendices:
Appendix A: BIOS Error Beep Codes .................................................................. A-1
Appendix B: BIOS POST Checkpoint Codes ......................................................... B-1
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Chapter 1: Introduction
Chapter 1
Introduction
1-1
Overview
Checklist
Congratulations on purchasing your computer motherboard from an ac-
knowledged leader in the industry. Supermicro boards are designed with
the utmost attention to detail to provide you with the highest standards in
quality and performance.
Please check that the following items have all been included with your
motherboard. If anything listed here is damaged or missing, contact your
retailer.
One (1) Supermicro Mainboard
One (1) ribbon cable for IDE devices
One (1) floppy ribbon cable
One (1) COM port cable
One (1) USB cable
One (1) I/O backpanel shield
Two (2) fan/heatsink assemblies (Fan-042 - retail only)
Two (2) sets of heatsink retention clips (SKT-095-604, 4 total)
One (1) Supermicro CD or diskettes containing drivers and utilities
One (1) User's/BIOS Manual
SCSI Accessories
One (1) 68-pin LVD SCSI cable (retail only)
One (1) set of SCSI driver diskettes
One (1) SCSI manual
1-1
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SUPER X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 User’s Manual
Contacting Supermicro
Headquarters
Address:
SuperMicro Computer, Inc.
980 Rock Ave.
San Jose, CA 95131 U.S.A.
+1 (408) 503-8000
Tel:
Fax:
+1 (408) 503-8008
Email:
[email protected] (General Information)
[email protected] (Technical Support)
Web Site:
Europe
Address:
SuperMicro Computer B.V.
Het Sterrenbeeld 28, 5215 ML
's-Hertogenbosch, The Netherlands
+31 (0) 73-6400390
Tel:
Fax:
+31 (0) 73-6416525
Email:
[email protected] (General Information)
[email protected] (Technical Support)
[email protected] (Customer Support)
Asia-Pacific
Address:
SuperMicro, Taiwan
4F, No. 232-1, Liancheng Rd.
Chung-Ho 235, Taipei, Taiwan, R.O.C.
+886-(2) 8226-3990
Tel:
Fax:
+886-(2) 8226-3991
Web Site:
Technical Support:
Email:
Tel:
886-2-8228-1366, ext.132 or 139
1-2
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Chapter 1: Introduction
Notes
1-3
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SUPER X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 User’s Manual
Figure 1-1. SUPER X5DL8-GG Image
1-4
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Chapter 1: Introduction
Figure 1-2. SUPER X5DLR-8G2 Image
Note: the X5DLR-8G2+ has the same layout but has 1) no parallel (printer)
port and 2) a standard PCI-X slot.
1-5
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SUPER X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 User’s Manual
Figure 1-3. SUPER X5DL8-GG Layout
(not drawn to scale)
JP48
JP7
Keyboard/Mouse
ATX POWER
J56
J11
Bank 1A
Bank 1B
Bank 2A
OH/CHS FAN
USB0/1
CPU1/CHS FAN
J66
CPU1
COM1
Bank 2B
Bank 3A
Bank 3B
JF1
J65
Parallel
Port
SUPER ® X5DL8-GG
J55
VGA
Bank 4A
Bank 4B
CPU1 FAN
JF2
JP12
J35
GLAN1
GLAN2
Rage XL
CPU2
BATTERY
North
Bridge
CPU2 FAN
CR5
JP3
D1-D4
D5-D8
CPU2/CHS FAN
COM2
JP58
JBT1
J18
J19
J12
JP57
J20
PCI-X #6
PCI-X #5
PCI-X #4
Broadcom
Controller
IO Bridge
South
Bridge
J21
WOL
P2
S2
P1
JA4
PCI-X #3
S1
J29
AIC-7902
IO Bridge
JA2
PCI-X #2
PCI-X #1
JP2
JPA1
JP54
JA1
Ultra III LVD/SE ChA
JPA2
J1
BIOS
CHS FAN
SW4
Note:DIP Switch 4 sets the CPU Core/Bus Ratio (see Section 2-7).
CR5 is a power LED indicator (see Section 2-6).
Jumpers not noted are for test purposes only.
IPMI is optional.
Also see Chapter 2 for the locations of the I/O ports and Front Control Panel
(JF1/JF2) connectors and for details on jumper settings and pin definitions.
1-6
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Chapter 1: Introduction
X5DL8-GG Quick Reference
Jumper
J29
J35
JA4
JBT1
JP2
Description
33 MHz PCI Enable/Disable
Spread Spectrum
SCSI Enable/Disable
CMOS Clear
PCI 3.3V Standby En/Dis
Watch Dog
Default Setting
Open (Disabled)
Open (Disabled)
Pins 1-2 (Enabled)
See Chapter 2
Pins 1-2 (Disabled)
Pins 2-3 (NMI)
JP3
JP4
JP7
GLAN2 Enable/Disable
Main Power Override
System Bus Speed
Chassis/Overheat Fan Select
GLAN1 Enable/Disable
VGA Enable/Disable
Fan Detection Select
Pins 1-2 (Enabled)
Open (Normal)
Pins 1-2 (Auto)
Open (Overheat)
Pins 1-2 (Enabled)
Pins 1-2 (Enabled)
Open (CPU Fan)
JP12
JP48
JP54
JP56
JP58
JPA1/A2
SCSI Channel A/B Termination Open (Terminated)
See Section 2-8
P1/2, S1/2 PCI-X Speed Settings
Connector
Description
ATX POWER
BANK1A-BANK4B
COM1/COM2
CPU1/CPU2
Primary ATX Power Connector
Memory (RAM) Slots
COM1/COM2 Serial Port Connector/Header
CPU 1 and CPU2 Sockets
CPU/CHS/OH FAN CPU/Chassis/Overheat Fan Headers
D1-D8
GLAN1/GLAN2
J1
Debug LEDs
Ethernet Ports
USB2/3 Headers
J11
J12
J18, J19
J20/J21
J56
PS/2 Keyboard/Mouse Ports
Floppy Disk Drive Connector
IDE #1/#2 Hard Disk Drive Connectors
IPMB/SMB Headers
Processor Power Connector
Parallel Printer Port
J65
J219
JA1/JA2
JF1
JF2
JP46
JP57
USB0/1
VGA
IPMI Slot (for IPMI daughter card)
Ultra320 LVD SCSI CH A/B Connector
Front Control Panel Connector
Speaker/HD LED Connectors
Third Power Supply Fail Header
Chassis Intrusion Header
Universal Serial Bus Ports
VGA Display (Monitor) Port
Wake-on-LAN Header
WOL
1-7
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SUPER X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 User’s Manual
Figure 1-4. SUPER X5DLR-8G2 Layout*
(not drawn to scale)
Keyboard/Mouse
ATX POWER
J56
J11
JP46
Bank 2B
Bank 2A
Bank 1B
OH/CHS FAN
USB0/1
JP48
J66
CPU1
COM1
Bank 1A
Bank 0B
Bank 0A
CPU1/CHS FAN
JF1
J65
Parallel
Port
JP12
SUPER ® X5DLR-8G2
J55
VGA
CPU1 FAN
J35
GLAN1
GLAN2
CPU2
CIOB-E
North
Bridge
D1-D4
D5-D8
CR5
CPU2/CHS FAN
JP58
J12
P2
JP4
J18
J19
CPU2 FAN
PCI-X
J51
J64
SCSI RAID
Rage XL
JP56
BATTERY
JP2
Speaker
JA4
JA1
JA5
South
Bridge
BIOS
JA2
JP3
AIC-7902
JBT1
JPA2
JPA1
USB2/3
COM2
SW4
CHS FAN
Note: the X5DLR-8G2+ has the same layout but has 1) no parallel (printer)
port and 2) a standard PCI-X slot.
1-8
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Chapter 1: Introduction
X5DLR-8G2+/X5DLR-8G2 Quick Reference
Jumper
J35
JA4
JBT1
JP2
JP3
Description
Default Setting
Open (Disabled)
Pins 1-2 (Enabled)
See Chapter 2
Closed (Enabled)
Pins 2-3 (NMI)
Spread Spectrum
SCSI Enable/Disable
CMOS Clear
Speaker Enable/Disable
Watch Dog
JP12
JP48
JP56
JP58
JPA1/A2
P2
System Bus Speed
Chassis/Overheat Fan Select
VGA Enable/Disable
Fan Detection Select
SCSI Channel A/B Termination Open (Terminated)
PCI-X Speed Settings
Pins 1-2 (Auto)
Open (Overheat)
Pins 1-2 (Enabled)
Open (CPU Fan)
See Section 2-8
Connector
Description
ATX POWER
Primary ATX Power Connector
BANK1A-BANK3B
COM1/COM2
CPU1/CPU2
Memory (RAM) Slots
COM1/COM2 Serial Port Connector/Header
CPU 1 and CPU2 Sockets
CPU/CHS/OH FAN CPU/Chassis/Overheat Fan Headers
D1-D8
GLAN1/GLAN2
J1
Debug LEDs
Ethernet Ports
USB2/3 Headers
J11
J12
J18, J19
J51
PS/2 Keyboard/Mouse Ports
Floppy Disk Drive Connector
IDE #1/#2 Hard Disk Drive Connectors
SMB Header
J56
J64
Processor Power Connector
SCSI RAID Card Slot
J65
Parallel Printer Port
JA1/JA2
JF1
JP46
Ultra320 LVD SCSI CH A/B Connector
Front Control Panel Connector
Third Power Supply Fail Header
Chassis Intrusion Header
Universal Serial Bus Ports
Universal Serial Bus Headers
VGA Display (Monitor) Port
JP57
USB0/1
USB2/3
VGA
1-9
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SUPER X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 User’s Manual
Motherboard Features
CPU
TM
®
•
Single or dual Intel Xeon 1.50 - 3.20 GHz 604/603-pin processors with a
1 MB cache at a front side (system) bus speed of 533/400 MHz.
Note: Please refer to the motherboard specifications pages on our web site for updates
on supported processors (http://www.supermicro.com/Product_page/product-m.htm).
Memory
•
X5DL8-GG: Eight 184-pin DIMM sockets supporting up to 16 GB of
registered ECC DDR-266/200 (PC2100/1600) SDRAM
•
X5DLR-8G2+/X5DLR-8G2: Six 184-pin DIMM sockets supporting up to 12
GB of registered ECC DDR-266/200 (PC2100/1600) SDRAM
Note: Memory is 2-way interleaved meaning DIMM modules must be installed two at a time.
Chipset
•
ServerWorks Grand Champion LE
Expansion Slots
•
X5DL8-GG
• X5DLR-8G2+/X5DLR-8G2
One 64-bit 133 MHz
One 64-bit 133 MHz
Five 64-bit 100 MHz PCI-X
Note: These are the default settings. Most PCI slots share a bus, which may impose speed
limitations. See the PCI-X Bus Speed jumper setting in Chapter 2 for details.
BIOS
4 Mb AMI Flash ROM
®
•
PC Health Monitoring
•
Onboard voltage monitors for 2 CPU cores, chipset voltage, +5V, +12V,
+3.3V and 5V standby
•
•
•
•
•
•
•
Fan status monitor with firmware/software on/off control
Environmental temperature monitor and control
CPU fan auto-off in sleep mode
Power-up mode control for recovery from AC power loss
System overheat LED and control
System resource alert
IPMI 1.5 compliant (IPMI socket on board, daughter card required,
X5DL8-GG only)
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Chapter 1: Introduction
ACPI Features
•
•
•
•
Microsoft OnNow
Slow blinking LED for suspend state indicator
Main switch override mechanism
External modem ring-on
Onboard I/O
•
•
•
•
•
•
•
AIC-7902 for dual channel Ultra320 SCSI
Adaptec 2010S SCSI RAID support (X5DL8-GG)
Adaptec 2015S SCSI RAID support (X5DLR-8G2+/X5DLR-8G2)
Integrated ATI Rage XL Graphics Controller
Intel 82540EM Gb Ethernet controller (X5DL8-GG - LAN1)
Broadcom BCM5703 Gb Ethernet controller (X5DL8-GG - LAN2)
Broadcom BCM5704 dual Gb Ethernet controller (X5DLR-8G2+/X5DLR-
8G2)
•
•
•
•
2 EIDE bus master interfaces support Ultra DMA/100
1 floppy port interface (up to 2.88 MB)
2 Fast UART 16550A compatible serial ports
1 EPP/ECP (Enhanced Parallel Port/Extended Capabilities Port, not on
X5DLR-8G2)
•
•
PS/2 mouse and PS/2 keyboard ports
4 USB (Universal Serial Bus) ports (USB 1.1)
Other
•
•
•
•
•
Internal/external modem ring-on
Recovery from AC power loss control
Wake-on-LAN (WOL)
Console redirection
APM 1.2, DMI 2.1, PCI 2.2, ACPI 1.0, Plug and Play (PnP), SMBIOS 2.3
CD/Diskette Utilities
•
•
BIOS flash upgrade utility
Device Drivers
Dimensions
•
Extended ATX: 12.05" x 13" (306 x 330 mm)
1-11
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SUPER X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 User’s Manual
ATIXL
VGA
PCIBus
PCI-X Slots#4,5
Processor1
ThinIMB
Processor0
LAN1
S2
ATA 100
Ports
533/400MHzHostBus
IMB BUS
CSB5
(South
Bridge)
North Bridge
(C M IC-WS)
CIOBX2
(IO Bridge)
P2
LAN2
USB Ports
SMBus
PCI-X Slot#6
IMB BUS
LPC Bus
266/200MHz
MemoryBus
S1
CIOBX2
(IO Bridge)
SerialPort
SIO
SCSI
Parallel
Port
PCI-X Slot#1
P1
FloppyPort
DDR-266SDRAM
PCI-X Slots#2,3
Figure 1-5 . ServerWorks Grand Champion LE Chipset:
System Block Diagram
Note: This is a general block diagram. Please see the previous Motherboard
Features Section for details.
1-12
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Chapter 1: Introduction
1-2 Chipset Overview
The ServerWorks Grand Champion LETM is a high-performance work station
SystemSet core logic chipset that consists of a North Bridge, a South Bridge
and an IO bridge.
The North Bridge interfaces directly to the processor bus and integrates the
functions of the main memory subsystem and the IMB bus interface unit.
The memory subsystem consists of an 8-DIMM configuration accessed over
a 144-bit memory bus (most chipsets have a 72-bit memory bus), which
provides a significant boost in performance.
The South Bridge provides various integrated functions, including the PCI to
ISA bridge and support for UDMA100, security (passwords and system
protection), Plug & Play, USBs, power management, interrupt controllers
and the SMBus.
The CIOBX2 is an integrated IO bridge that provides high-performance data
flow between the IMB interface and the dual peer PCI-X bus interfaces.
The X5DL8-GG has two CIOBX2 bridges (four buses).
1-3 Special Features
ATI Graphics Controller
The X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 has an integrated ATI video con-
troller based on the Rage XL graphics chip. The Rage XL fully supports
sideband addressing and AGP texturing. This onboard graphics package
can provide a bandwidth of up to 512 MB/sec over a 32-bit graphics memory
bus.
BIOS Recovery
The BIOS Recovery function allows you to recover your BIOS image file if
the BIOS flashing procedure fails (see Section 3-3).
Recovery from AC Power Loss
BIOS provides a setting for you to determine how the system will respond
when AC power is lost and then restored to the system. You can choose
for the system to remain powered off (in which case you must hit the
power switch to turn it back on) or for it to automatically return to a power
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SUPER X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 User’s Manual
on state. See the Power Lost Control setting in the Advanced BIOS Setup
section (Peripheral Device Configuration) to change this setting. The de-
fault setting is Always On.
1-4 PC Health Monitoring
This section describes the PC health monitoring features of the SUPER
X5DL8-GG/X5DLR-8G2+/X5DLR-8G2. It has an onboard System Hardware
Monitor chip that supports PC health monitoring.
Onboard Voltage Monitors for the CPU Cores, Chipset
Voltage, +5V, +12V and 5V Standby
An onboard voltage monitor will scan these voltages continuously. Once a
voltage becomes unstable, a warning is given or an error message is sent
to the screen. Users can adjust the voltage thresholds to define the
sensitivity of the voltage monitor.
Fan Status Monitor with Firmware/Software On/Off Control
The PC health monitor can check the RPM status (tachometer reading) of the
cooling fans. The onboard 3-pin CPU and chassis fans are controlled by the
power management functions. The thermal fan is controlled by the over-
heat detection logic.
Environmental Temperature Control
The thermal control sensor monitors the CPU temperature in real time and
will turn on the thermal control fan whenever the CPU temperature exceeds
a user-defined threshold. The overheat circuitry runs independently from
the CPU. It can continue to monitor for overheat conditions even when the
CPU is in sleep mode. Once it detects that the CPU temperature is too high,
it will automatically turn on the thermal control fan to prevent any overheat
damage to the CPU. The onboard chassis thermal circuitry can monitor the
overall system temperature and alert users when the chassis temperature
is too high.
CPU Fan Auto-Off in Sleep Mode
The CPU fan activates when the power is turned on. It can be turned off
when the CPU is in sleep mode. When in sleep mode, the CPU will not run
at full power, thereby generating less heat.
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Chapter 1: Introduction
System Resource Alert
This feature is available when used with Intel's LANDesk Client Manager
(optional). LDCM is used to notify the user of certain system events. For
example, if the system is running low on virtual memory and there is insuf-
ficient hard drive space for saving the data, you can be alerted of the
potential problem.
Hardware BIOS Virus Protection
The system BIOS is protected by hardware that prevents viruses from
infecting the BIOS area. The user can only change the BIOS content
through the flash utility provided by Supermicro. This feature can prevent
viruses from infecting the BIOS area and destroying valuable data.
Auto-Switching Voltage Regulator for the CPU Core
The auto-switching voltage regulator for the CPU core can support up to
20A current and auto-sense voltage IDs ranging from 1.4V to 3.5V. This
will allow the regulator to run cooler and thus make the system more stable.
1-5 ACPI Features
ACPI stands for Advanced Configuration and Power Interface. The ACPI
specification defines a flexible and abstract hardware interface that pro-
vides a standard way to integrate power management features throughout
a PC system, including its hardware, operating system and application soft-
ware. This enables the system to automatically turn on and off peripherals
such as CD-ROMs, network cards, hard disk drives and printers. This also
includes consumer devices connected to the PC such as VCRs, TVs, tele-
phones and stereos.
In addition to enabling operating system-directed power management, ACPI
provides a generic system event mechanism for Plug and Play and an oper-
ating system-independent interface for configuration control. ACPI lever-
ages the Plug and Play BIOS data structures while providing a processor
architecture-independent implementation that is compatible with both Win-
dows 2000 and Windows NT 5.0.
1-15
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SUPER X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 User’s Manual
Microsoft OnNow
The OnNow design initiative is a comprehensive, system-wide approach to
system and device power control. OnNow is a term for a PC that is always
on but appears to be off and responds immediately to user or other re-
quests.
Slow Blinking LED for Suspend-State Indicator
When the CPU goes into a suspend state, the chassis power LED will start
blinking to indicate that the CPU is in suspend mode. When the user presses
any key, the CPU will wake-up and the LED will automatically stop blinking
and remain on.
Main Switch Override Mechanism
When an ATX power supply is used, the power button can function as a
system suspend button to make the system enter a SoftOff state. The
monitor will be suspended and the hard drive will spin down. Depressing
the power button again will cause the whole system to wake-up. During
the SoftOff state, the ATX power supply provides power to keep the re-
quired circuitry in the system alive. In case the system malfunctions and
you want to turn off the power, just depress and hold the power button for
4 seconds. This option can be set in the Power section of the BIOS Setup
routine.
External Modem Ring-On
Wake-up events can be triggered by a device such as the external modem
ringing when the system is in the SoftOff state. Note that external modem
ring-on can only be used with an ATX 2.01 (or above) compliant power
supply.
Wake-On-LAN (WOL)
Wake-On-LAN is defined as the ability of a management application to re-
motely power up a computer that is powered off. Remote PC setup, up-
dates and asset tracking can occur after hours and on weekends so that
daily LAN traffic is kept to a minimum and users are not interrupted. The
motherboards have a 3-pin header (WOL) to connect to the 3-pin header on
a Network Interface Card (NIC) that has WOL capability. Note that Wake-
On-LAN can only be used with an ATX 2.01 (or above) compliant power
1-16
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Chapter 1: Introduction
supply.
1-6 Power Supply
As with all computer products, a stable power source is necessary for
proper and reliable operation. It is even more important for processors that
have high CPU clock rates.
The SUPER X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 accommodates ATX power
supplies. Although most power supplies generally meet the specifications
required by the CPU, some are inadequate. You should use one that will
supply at least 400W of power - an even higher wattage power supply is
recommended for high-load configurations. Also your power supply must
provide a +5V standby voltage that supplies at least 720 mA of current. In
addition, 1.5A is needed for LAN1 and LAN2.
NOTE: Auxiliary 12v power (Processor Power) is necessary to sup-
port Intel Xeon CPUs. Failure to provide this extra power will re-
sult in the CPUs becoming unstable after only a few minutes of
operation. See Section 2-5 for details on connecting the power
supply cables.
It is strongly recommended that you use a high quality power supply that
meets ATX power supply Specification 2.02 or above. Additionally, in ar-
eas where noisy power transmission is present, you may choose to install
a line filter to shield the computer from noise. It is recommended that you
also install a power surge protector to help avoid problems caused by
power surges.
1-7 Super I/O
The disk drive adapter functions of the Super I/O chip include a floppy disk
drive controller that is compatible with industry standard 82077/765, a data
separator, write pre-compensation circuitry, decode logic, data rate selec-
tion, a clock generator, drive interface control logic and interrupt and DMA
logic. The wide range of functions integrated onto the Super I/O greatly
reduces the number of components required for interfacing with floppy disk
drives. The Super I/O supports 360 K, 720 K, 1.2 M, 1.44 M or 2.88 M disk
drives and data transfer rates of 250 Kb/s, 500 Kb/s or 1 Mb/s.It also
provides two high-speed, 16550 compatible serial communication ports
(UARTs), one of which supports serial infrared communication. Each UART
includes a 16-byte send/receive FIFO, a programmable baud rate generator,
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SUPER X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 User’s Manual
complete modem control capability and a processor interrupt system.
Each UART includes a 16-byte send/receive FIFO, a programmable baud
rate generator, complete modem control capability and a processor inter-
rupt system. Both UARTs provide legacy speed with baud rate of up to
115.2 Kbps as well as an advanced speed with baud rates of 250 K, 500 K,
or 1 Mb/s, which support higher speed modems.
The Super I/O supports one PC-compatible printer port (SPP), Bi-directional
Printer Port (BPP) , Enhanced Parallel Port (EPP) or Extended Capabilities
Port (ECP).
The Super I/O provides functions that comply with ACPI (Advanced Con-
figuration and Power Interface), which includes support of legacy and ACPI
power management through an SMI or SCI function pin. It also features
auto power management to reduce power consumption.
The IRQs, DMAs and I/O space resources of the Super I/O can flexibly
adjust to meet ISA PnP requirements, which suppport ACPI and APM (Ad-
vanced Power Management).
1-18
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Chapter 2: Installation
Chapter 2
Installation
2-1 Static-Sensitive Devices
Electric-Static-Discharge (ESD) can damage electronic components. To pre-
vent damage to your system board, it is important to handle it very carefully.
The following measures are generally sufficient to protect your equipment
from ESD.
Precautions
•
•
Use a grounded wrist strap designed to prevent static discharge.
Touch a grounded metal object before removing the board from the anti-
static bag.
•
Handle the board by its edges only; do not touch its components, periph-
eral chips, memory modules or gold contacts.
•
•
When handling chips or modules, avoid touching their pins.
Put the motherboard and peripherals back into their antistatic bags when
not in use.
•
For grounding purposes, make sure your computer chassis provides ex-
cellent conductivity between the power supply, the case, the mounting
fasteners and the motherboard.
Unpacking
The motherboard is shipped in antistatic packaging to avoid static damage.
When unpacking the board, make sure the person handling it is static protected.
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2-2 PGA Processor and Heatsink Installation
When handling the processor package, avoid placing direct
pressure on the label area of the fan. Also, do not place the
motherboard on a conductive surface, which can damage the
BIOS battery and prevent the system from booting up.
!
IMPORTANT: Always connect the power cord last and always remove it
before adding, removing or changing any hardware components. Make
sure that you install the processor into the CPU socket before you install
the CPU heat sink. Note: pictures show 603-pin socket.
1. Locate the following components, which are included in the shipping
package.
Clips (2)
Screws* (4)
Retention brackets
(2)
Black anchors (4)
White pegs (4)
*These screws are for mounting the
motherboard to the back panel of a
chassis that has four mounting holes
(as shown on right).
For chassis that do not have four
mounting holes, use the anchor/peg
assemblies:
2. Insert the white pegs into the
black anchors. Do not force the
white pegs all the way in - only
about 1/3 of the way into the black
anchors.
Anchor/peg
assemblies
Two pegs in
position
3. Place a retention bracket in the
proper position and secure it by
pressing pegs into two of the retention
holes until you hear a *click*. The
clicking sound indicates that the peg is
locked and secured.
One retention bracket in
position
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Chapter 2: Installation
4. Secure the other retention
bracket into position by
repeating Step 3.
5. Lift the lever on the CPU socket:
lift the the lever completely or you
will damage the CPU socket when
power is applied. (Install CPU1
first.)
Socket lever
6. Install the CPU in the socket. Make sure
that pin 1 of the CPU is seated on pin 1 of
the socket (both corners are marked with a
triangle). When using only one CPU, install it
into CPU socket #1 (CPU socket #2 is auto-
matically disabled if only one CPU is used).
Pin 1
7. Press the lever down until
you hear it *click* into the
locked position.
Socket lever in
locked position
Heatsink
8. Apply the proper amount of thermal
glue to the CPU die and place the
heatsink and fan on top of the CPU.
CPU
9. Secure the heatsink by locking the
retention clips into their proper
position.
Retention clip
CPU fan
wires
10. Connect the three wires of
the CPU fan to the respective CPU
fan connector.
CPU fan
connector
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Figure 2-1. PGA604 Socket: Empty and with Processor Installed
Empty socket
Lever
!
Warning! Make
sure you lift the
lever completely
when installing the
CPU. If the lever is
only partly raised,
damage to the
Triangle
Processor
socket or CPU may
result.
(installed)
Triangle
Mounting the Motherboard in the Chassis
All motherboards have standard mounting holes to fit different types of
chassis. Make sure the location of all the mounting holes for both the
motherboard and the chassis match. Although a chassis may have both
plastic and metal mounting fasteners, metal ones are highly recommended
because they ground the motherboard to the chassis. Make sure the metal
standoffs click in or are screwed in tightly. Then use a screwdriver to
secure the motherboard onto the motherboard tray.
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Chapter 2: Installation
2-3 Installing DIMMs
Note: Check the Supermicro web site for recommended memory modules:
CAUTION
Exercise extreme care when installing or removing DIMM
modules to prevent any possible damage.
DIMM Installation (See Figure 2-2)
1. Insert an even number of memory modules. Interleaved memory requires
you to install two modules at a time. With the X5DL8-GG, begin from
the two slots of the last bank and working your way toward the two
slots of Bank 1. With the X5DLR-8G2+/X5DLR-8G2, you may begin
populating the slots two at a time (a full bank) from either end.
2. Insert each DIMM module into its slot. Note the notch at the bottom of the
module to prevent inserting the module incorrectly.
3. Gently press down on the DIMM module until it snaps into place in the
slot. Repeat for all modules (see step 1 above).
Support
The X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 supports ECC registered DDR-266/
200 (PC2100/1600) SDRAM memory. An interleaved memory configuration
is used (see step 1 above).
The interleaved memory scheme also employs an additional performance-
enhancing feature. This feature works best when four DIMM slots are
populated, is slightly reduced when all eight slots are populated, and is
reduced slightly more with a two-slot configuration. In a six-slot configura-
tion, this performance enhancing feature is not utilized, resulting in standard
interleaved memory performance.
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Figure 2-2. Installing and Removing DIMMs
To Install:
Insert the module vertically
and press down until it
snaps into place. Pay atten-
tion to the notch on the bot-
tom of the module.
To Remove:
Use your thumbs to
gently push near the
edge of both ends of
the module.
This
should release it from
the slot.
2-4 IOPorts/Control Panel Connectors
The IO ports are color coded in conformance with the PC 99 specification.
See Figure 2-3 below for the colors and locations of the various IO ports.
Figure 2-3. IO Port Locations and Definitions
Mouse
Parallel Port (Burgundy)
(Green)
Keyboard
(Purple)
COM1 Port
(Turquoise)
VGA (Monitor)
Port (Blue)
USB Ports
LAN1
LAN2
Note: COM2 is a header on the motherboard (see motherboard layout for loca-
tion). The X5DLR-8G2+/X5DLR-8G2 does not have a parallel port.
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Chapter 2: Installation
Front Control Panel
JF1 contains header pins for various front control panel connectors. These
connectors are designed for use with Supermicro server chassis. See
Figure 2-4 for the pin locations of the various front control panel buttons
and LED indicators. Refer to the following section for descriptions and pin
definitions. JF2 is an additional row of headers that provides connectors
for additional functions, as noted below.
Figure 2-4. JF1/JF2 Header Pins
JF1
20
19
Ground
X
NMI
X
Vcc
Power LED
HDD LED
Vcc
Vcc
Vcc
NIC1 LED
NIC2 LED
Overheat LED
Power Fail LED
Vcc
Vcc
Reset
Reset Button
Power Button
Ground
Ground
Pwr
2
1
JF2
(X5DL8-GG only)
16
15
Chassis Intrusion
Speaker
X
HD LED
Power LED
2
1
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2-5 Connecting Cables
ATX Power Supply 24-pin Connector
ATX Power Connector
Pin Definitions
Pin Number Definition Pin Number Definition
1
2
3
4
5
6
7
8
9
+3.3V
+3.3V
COM
+5V
COM
13
14
15
16
17
18
19
20
21
22
23
24
+3.3V
-12V
The power supply connector
meets the SSI (Superset ATX) 24-
pin specification, however it also
supports a 20-pin power supply
connector. Make sure that the ori-
entation of the PS connector is
correct. See the table on the right
for pin definitions.
COM
PS_ON#
COM
COM
COM
Res(NC)
+5V
+5V
+5V
COM
+5V
COM
PWR_OK
5VSB
+12V
+12V
+3.3V
10
11
12
Processor Power
Connector
8-Pin +12v Processor
Power Connector (J56)
In addition to the Primary ATX
power connector (above), the 12v
8-pin Processor Power Connector
must also be connected to your
power supply. See the table on
the right for pin definitions.
Pins Definition
1 thru 4 Ground
5 thru 8
+12v
NMI Button
NMI Button Pin
The non-maskable interrupt button
header is located on pins 19 and
20 of JF1. Refer to the table on
the right for pin definitions.
Definitions (JF2)
Pin
Number
19
Definition
Control
20
Ground
Power LED
PWR_LED Pin Definitions
(JF1)
Pin
Number
15
The Power LED connection is lo-
cated on pins 15 and 16 of JF1.
Refer to the table on the right for
pin definitions.
Definition
+5V
Control
16
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Chapter 2: Installation
HDD LED
(IDE) HDD LED Pin
Definitions
(JF1)
The HDD LED (for IDE and SCSI
disk drives) connection is located
on pins 13 and 14 of JF1. Attach
the IDE hard drive LED cable to
these pins to display disk activity.
Refer to the table on the right for
pin definitions.
Pin
Number Definition
13
14
+5V
HD Active
NIC/LAN1 LED
Pin Definitions
(JF1)
NIC1 LED
The NIC1 (LAN1) LED connection
is located on pins 11 and 12 of
JF1. Attach the NIC1 LED cable to
display network activity. Refer to
the table on the right for pin defini-
tions.
Pin
Number Definition
11
12
+5V
GND
NIC/LAN2 LED
Pin Definitions
(JF1)
NIC2 LED
The NIC2 (LAN2) LED connection
is located on pins 9 and 10 of JF1.
Attach the NIC2 LED cable to dis-
play network activity. Refer to the
table on the right for pin defini-
tions.
Pin
Number Definition
9
10
+5V
GND
Overheat LED (OH)
Overheat (OH) LED
Pin Definitions
(JF1)
Connect an LED to the OH connec-
tion on pins 7 and 8 of JF1 to pro-
vide advanced warning of chassis
overheating. Refer to the table on
the right for pin definitions.
Pin
Number Definition
7
8
+5V
GND
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Power Fail LED
Power Fail LED Pin
Definitions
(JF1)
The Power Fail LED connection is
located on pins 5 and 6 of JF1.
Refer to the table on the right for
pin definitions.
Pin
Number Definition
5
6
Control
GND
Reset
Reset Pin
Definitions
(JF1)
The Reset connection is located
on pins 3 and 4 of JF1. Attach it
to the hardware reset switch on
the computer case. Refer to the
table on the right for pin defini-
tions.
Pin
Number Definition
3
4
Reset
Ground
PWR_ON
PWR_ON Connector
Pin Definitions
(JF1)
The PWR_ON connection is lo-
cated on pins 1 and 2 of JF1. Mo-
mentarily contacting both pins will
power on/off the system. This
button can also be configured to
function as a suspend button (see
the Power Button Mode setting in
BIOS). To turn off the power
when set to suspend mode, de-
press the button for at least 4
seconds. Refer to the table on the
right for pin definitions.
Pin
Number Definition
1
2
PW _ON
Ground
Universal Serial Bus
(USB0/1)
Universal Serial Bus Pin Definitions
USB0
USB1
Pin
Number
Pin
Definition Number
Definition
+5V
P0-
P0+
Ground
Key
Two Universal Serial Bus ports
are located beside the keyboard/
mouse ports. USB0 is the bottom
connector and USB1 is the top
connector. See the table on the
right for pin definitions.
1
2
3
4
5
+5V
P0-
P0+
Ground
N/A
1
2
3
4
5
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Chapter 2: Installation
Serial Ports
Serial Port Pin Definitions
(COM1, COM2)
The COM1 serial port is located
under the parallel port (see Figure
2-3). See the table on the right for
Pin Number Definition Pin Number Definition
1
2
3
4
5
CD
RD
TD
DTR
Ground
6
7
8
9
10
DSR
RTS
CTS
RI
pin definitions.
See the
NC
motherboard layout diagrams for
the location of the COM2 connec-
tor, which is a header.
PS/2 Keyboard
and Mouse Port
Pin Definitions
(J11)
PS/2 Keyboard and Mouse
Ports
Pin
The ATX PS/2 keyboard and the
PS/2 mouse are located on J11.
See the table on the right for pin
definitions. (The mouse port is
above the keyboard port. See Fig-
ure 2-3.)
Number Definition
1
2
3
4
5
6
Data
NC
Ground
VCC
Clock
NC
Fan Headers*
Fan Header Pin Definitions
(CPU/CHS/OH Fans)
Pin
Number
1
2
3
The motherboard has fan headers
for CPU, chassis and overheat
fans. See the table on the right
for pin definitions.
Definition
Ground (black)
+12V (red)
Tachometer
Caution: These fan headers
are DC power.
GLAN1/GLAN2 Ethernet
Ports
Two gigabit Ethernet ports are lo-
cated beside the VGA port on the
IO backplane. These ports accept
RJ45 type cables. See the next
section for a description of the
LEDs on the LAN ports.
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HD LED Indicator (JF2)
The HD LED connector located at
JF2 is used to indicate activity on
any hard drive (IDE, SCSI or CD-
ROM).
Power LED (JF2)
The Power LED connection located
at JF2 is used to inform you that
power is being supplied to the
motherboard. There is also an
onboard LED for this function (see
CR5 in Section 2-6).
Speaker (X5DL8-GG)
A speaker header/jumper is lo-
cated on JF2. You may enable the
onboard speaker by jumping pins
13 & 15 of JF2. To use an exter-
nal speaker, connect the speaker
header to pins 9 through 15.
Third Power Supply Fail
Header
Third Power Supply Fail Header
Pin Definitions (JP46)
Connect a cable from your power
supply to the JP46 header to pro-
vide warning of power supply fail-
ure. The warning signal is passed
through the PWR_LED pin on JF1
to provide indication of a power
failure on the chassis. Note: This
feature is only available when us-
ing Supermicro power supplies.
See the table on the right for pin
definitions.
Pin
Number
Definition
1
2
3
4
P/S 1 Fail Signal
P/S 2 Fail Signal
P/S 3 Fail Signal
Reset (from MB)
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Chapter 2: Installation
Wake-On-LAN (X5DL8-GG)
Wake-On-LAN Pin
Definitions (WOL)
Pin
Number
1
2
3
The Wake-On-LAN header is des-
ignated as WOL. See the table on
the right for pin definitions. You
must have a LAN card with a
Wake-on-LAN connector and cable
to use this feature.
Definition
+5V Standby
Ground
Wake-up
Chassis Intrusion
A Chassis Intrusion header is lo-
cated at JP57. Attach the correct
connector here to inform you of a
chassis intrusion condition.
Extra Universal Serial Bus
Headers (USB2/3)
USB3 Pin
USB2 Pin
Definitions (J1)
Definitions (J1)
Two USB headers are located at
J1. The odd numbered pins are
for USB2 and the even numbered
pins at the edge of the board) are
for USB3. A USB cable (not in-
cluded) is needed for use. See
the tables on the right.
Pin
Pin
Number Definition
Number Definition
2
4
6
8
Power
-
+
1
3
5
7
Power
-
+
Ground
Ground
IPMB (X5DL8-GG)
IPMB Header
Pin Definitions (J20)
An IPMB (IPMI Bus) header is lo-
cated at J20 to support IPMI, a
server management standard.
Connect the appropriate cable
from the IPMI daughter board to
J20 to utilize IPMI on your system.
Pin
Number
Definition
Data
Ground
Clock
No Connection
1
2
3
4
SMB Header
Pin Definitions (J21)
SMB
Pin
A
System Management Bus
Number
Definition
Data
Ground
Clock
No Connection
1
2
3
4
header is located at J21. Connect
the appropriate cable here to uti-
lize SMB on your system.
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2-6 Onboard Indicators
GLAN1/GLAN2 LEDs
Each of the Ethernet ports (located beside the VGA port) has a yellow and
a green LED. See the tables below for the functions associated with these
LEDs. On each Gb LAN port, the yellow LED indicates activity while the
other LED may be green, orange or off to indicate the speed of the connec-
tion (as specified in the tables below).
Gb LAN Right LED
Indicator
Gb LAN Left LED
Indicator
LED
LED
Color
Off
Green
Orange
Definition
No Connection
100 MHz
Color
Off
Yellow
Definition
Not Active
Active
1 GHz
Debug LEDs
Two sets of surface-mounted debug LEDs are located beside the LAN2 port
and are each composed of four individual LEDs (D1 through D8) , which are
used to provide POST code information. See the diagrams below for read-
ing the debug LEDs and refer to Appendix B for a complete list of POST
codes (a partial listing of the most common codes are given below).
Back of motherboard
Reading the Debug LEDs:
Common POST Codes:
The following is a list of the most
common POST codes that you may see.
When on, each of the eight separate
LEDs represent the value of the
number shown beside it in the
8
4
2
1
8
4
diagram. Add up the numerical values
of each illuminated LED in the D5-D8
row to get the high digit (left) and
those in the D1-D4 row to get the low
(right) digit of the corresponding
hexidecimal POST code.
POST Code
01
Meaning
Displayed while in
BIOS Setup
2
1
31
40
No video card
Displayedwhile
counting memory
Displayed when
memory count is
finished
CMOS Clear
Displayedwhile
detecting IDE
devices
D5-D8 D1-D4
83
8
4
2
1
Example:
8
The example on the left indicates a
hexidecimal POST code of C6. This is
determined in the following manner:
D1-D4 (right digit): 4 + 2 = 6
D5-D8 (left digit): 8 + 4 = 12
(decimal 12 = hexidecimal C)
4
2
1
85
95
DE
DE
No memory
D5-D8 D1-D4
Wrong type of
memory installed
One memory
module (two
Decimal
0-9
10
Hexidecimal Equivalent
0-9
A
DE
= Unilluminated LED
= Illuminated LED (1)
11
B
minimum required)
12
C
13
D
14
E
15
F
2-14
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Chapter 2: Installation
CR5 LED
Onboard LED Power
Indicator (CR5)
LED
CR5 is an onboard LED that serves
as a power indicator. See the
table on the right for the meaning
of each of the three colors dis-
played by CR5.
Color
Green
Yellow
Red
Definition
Power On
Standby Mode
W rong CPU
2-7 DIP Switch Settings
Processor Speed Selection
(DIP Switch 4)
DIP Switch 4:
Processor Speed
CPU
SW SW SW SW
#1 #2 #3 #4
1.3 GHz ON
1.4 GHz
1.5 GHz ON ON ON
1.6 GHz
1.7 GHz ON
1.8 GHz
1.9 GHz ON ON
2.0 GHz
2.1 GHz ON
2.2 GHz
2.4 GHz ON ON ON ON
ON
ON ON
The red "DIP" switch labeled SW4
has four individual switches,
which are used to set the speed
of the processor.
ON
ON
ON
ON
ON
ON ON
ON ON
ON ON ON
The table on the right shows you
the switch settings for the various
speeds your processor may be
able to run at. (This table is also
silkscreened on the motherboard.)
Note: Most Intel processors have
a fixed Core/Bus ratio that over-
writes the setting of DIP Switch 4.
In most cases you do not need to
make any changes to SW4.
2-15
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SUPER X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 User’s Manual
2-8 Jumper Settings
Explanation of
Jumpers
Connector
Pins
3
2
1
To modify the operation of the
motherboard, jumpers can be
used to choose between
Jumper
Cap
optional settings.
Jumpers
3
2
1
create shorts between two pins
to change the function of the
connector. Pin 1 is identified
with a square solder pad on
the printed circuit board. See
the motherboard layout pages
for jumper locations.
Setting
Pin 1-2 short
Note: On two pin jumpers,
"Closed" means the jumper is
on and "Open" means the
jumper is off the pins.
CMOS Clear
JBT1 is used to clear CMOS (which will also clear any passwords). Instead of
pins, this jumper consists of contact pads to prevent accidentally clearing the
contents of CMOS.
To clear CMOS, first power down the system, then
1) Unplug the power cord(s)
2) With the power disconnected, short the CMOS pads with a metal object such
as a small screwdriver
3) Remove the screwdriver (or shorting device)
4) Reconnect the power cord(s) and power on the system.
Note: Do not use the PW_ON connector to clear CMOS.
SpeakerEnable/Disable
(X5DL8-GG)
To enable use of the onboard
speaker, put a jumper on pins 13
and 15 of JF2. Removing the
jumper will disable the onboard
speaker.
2-16
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Chapter 2: Installation
SpeakerEnable/Disable
Speaker Enable/Disable
Jumper Settings
(JP2)
(X5DLR-8G2+, X5DLR-8G2)
Jumper
To disable the onboard speaker,
remove the jumper from JP2 (see
the table on the right).
Position
Closed
Open
Definition
Enabled
Disabled
Fan Detection Select
Fan Detection Select
Jumper Settings (JP58)
JP58 allows you to select which fan
speed to have displayed in the
Hardware Monitors section of BIOS
(the CPU1/2 fans or the CPU1/CPU2
Chassis fans). The default position
is open to select the CPU1/2 fans.
See the table on the right for jumper
settings.
Jumper
Position
Open
Definition
CPU1/2 Fans
Closed CPU1/2 Ch Fans
Chassis/Overheat Fan Select
Chassis/Overheat Fan
Select Jumper Settings
(JP48)
JP48 allows you to select to use ei-
ther the chassis fan or the overheat
fan. The default position is closed to
select the chassis fan. See the table
on the right for jumper settings.
Jumper
Position
Open
Definition
Overheat Fan
Chassis Fan
Closed
Watch Dog
Watch Dog
Jumper Settings (JP3)
JP3 controls the Watch Dog function.
Watch Dog is a system monitor that
takes action when a software appli-
cation freezes the system. Pins 1-2
will have WD reset the system if a
program freezes. Pins 2-3 will gener-
ate a non-maskable interrupt for the
program that has frozen (requires
software implementation). See the
table on the right for jumper settings.
Watch Dog must also be enabled in
BIOS.
Jumper
Position
Pins 1-2
Pins 2-3
Open
Definition
W D to Reset
WD to NMI
Disabled
2-17
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SUPER X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 User’s Manual
GLAN1 Enable/Disable
(X5DL8-GG)
LAN1
Enable/Disable
Jumper Settings
(JP54)
Jumper
Change the setting of jumper JP54
to enable or disable the onboard
LAN1 port on the motherboard.
See the table on the right for
jumper settings. The default set-
ting is pins 1-2.
Position
Pins 1-2
Pins 2-3
Definition
Enabled
Disabled
GLAN2 Enable/Disable
(X5DL8-GG)
LAN2
Enable/Disable
Jumper Settings
(JP4)
Change the setting of jumper JP4
to enable or disable the onboard
LAN2 port on the motherboard.
See the table on the right for
jumper settings. The default set-
ting is pins 1-2.
Jumper
Position
Pins 1-2
Pins 2-3
Definition
Enabled
Disabled
SCSI Enable/Disable
SCSI Enable/Disable
Jumper Settings
(JA4)
The SCSI Enable/Disable jumper at
JA4 allows you to enable or dis-
able the onboard SCSI. The nor-
mal (default) position is on pins 1-
2 to enable SCSI. See the table on
the right for jumper settings.
Jumper
Position
Pins 1-2
Pins 2-3
Definition
Enabled
Disabled
SCSI Termination Enable/
Disable
SCSI Channel Termination
Enable/Disable
Jumper Settings
(JPA1, JPA2)
Jumpers JPA1 and JPA2 allow you
to enable or disable termination for
the SCSI connectors. Jumper JPA1
controls SCSI channel A and JPA2
is for SCSI channel B. The default
setting is open to enable (teminate)
both SCSI channels. See the table
on the right for jumper settings.
Jumper
Position
Open
Definition
Enabled
Disabled
Closed
2-18
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Chapter 2: Installation
PCI-X Bus Speed Setting
(X5DL8-GG)
PCI-X Slot Bus Speed Settings
Pin Definitions
(P1, P2, S1, S2)
Jumpers P1, P2, S1 and S2 are
used to change the speeds for the
four PCI-X buses. See the table on
the right for jumper settings.
Pin
Setting
Pins 1-2
Pins 2-3
Pins 3-4
Pins 4-5
Speed
PCI 33/66 MHz
PCI-X 66 MHz
PCI-X 100 MHz
PCI-X 133 MHz
PCI-X Buses:
Default setting is PCI-X 100 MHz for all
slots.
S1: Bus for PCI-X slot #1 and SCSI
P1: Bus for PCI-X slots #2 and #3
S2: Bus for PCI-X slots #4 and #5
P2: Bus for PCI-X slot #6 and LAN2
Note: If two cards are used in slots
that share a bus, both slots will run
at 100 MHz (maximum).
PCI-X Bus Speed Setting
(X5DLR-8G2+, X5DLR-8G2)
PCI-X Slot Bus Speed Settings
Pin Definitions
(P2)
Jumper P2 is used to change the
speed of the single PCI-X bus on
the motherboard. See the table on
the right for jumper settings.
Pin
Setting
Pins 1-2
Pins 2-3
Pins 3-4
Pins 4-5
Speed
PCI 33/66 MHz
PCI-X 66 MHz
PCI-X 100 MHz
PCI-X 133 MHz
Note: The PCI-X bus is also tied to
the SCSI controller. If using a 33/66
MHz PCI card in this slot, you will
slow the SCSI speed down to 33 or
66 MHz.
This slot was designed for use with
PCI-X cards - some PCI cards may work
in the slot.
33 MHz PCI
Enable/Disable
Jumper Settings
(J29)
33 MHz PCI Enable/Disable
(X5DL8-GG)
Jumper
Position
Open
Closed
Definition
Normal
33 MHz PCI
If you wish to use 33 MHz PCI
cards, close J29 to force the P1
bus (slots 2 & 3) to run at 33 MHz.
See the table on the right for jumper
settings.
Note: if you force the slots(s) to 33
MHz, you must set the P1 bus
speed jumpers (above) to the low-
est speed.
2-19
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SUPER X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 User’s Manual
Front Side Bus Speed
Front Side Bus Speed
Jumper Settings (JP12)
JP12 is used to set the system
(front side) bus speed for the pro-
cessors. It is best to keep this
jumper set to Auto. See the table
on the right for jumper settings.
Jumper
Position
Pins 1-2
Pins 2-3
Open
Definition
Auto
400 MHz
533 Mhz
Spread Spectrum
Spread Spectrum
Enable/Disable
Jumper Settings
(J35)
J35 is used to enable or disable
the Spread Spectrum feature.
Spread Spectrum is a technique
used to stabilize operations when
a system is being affected by
electromagnetic interference. The
normal (default) position is open to
disable Spread Spectrum. See
table at right for jumper settings.
Jumper
Position
Open
Closed
Definition
Disabled
Enabled
PCI 3.3V Standby Enable/
Disable (X5DL8-GG)
PCI 3.3V Standby Enable/
Disable Jumper Settings
(JP2)
JP2 is used to enable or disable a
3.3V standby voltage on pin A14
of the PCI-X slots. If you have a
LAN or modem add-on card in-
serted into a PCI-X slot that you
wish to "wake" the system up
with, you should enable this
jumper. Otherwise, leave this
jumper on pins 1-2 (disabled).
The normal (default) position is
disabled. See the table on the
right for jumper settings.
Jumper
Position
Pins 1-2
Pins 2-3
Definition
Disabled
Enabled
VGA Enable/Disable
VGA Enable/Disable
Jumper Settings
(JP56)
JP56 allows you to enable or dis-
able the VGA port. The default
position is on pins 1 and 2 to en-
able VGA. See the table on the
right for jumper settings.
Jumper
Position
1-2
Definition
Enabled
Disabled
2-3
2-20
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Chapter 2: Installation
Main Power Override
(X5DL8-GG)
Power On
Jumper Settings
(JP1)
Instead of using the chassis
power on switch, you may close
jumper JP7 to apply power to the
system. This effectively disables
the power button from turning off
the system. See the table on the
right for jumper settings. The de-
fault setting is Open (normal).
Jumper
Position
Open
Definition
Normal
Closed Force Power On
2-9 Parallel Port, Floppy/Hard Disk Drive and SCSI
Connections
Note the following when connecting the floppy and hard disk drive cables:
•
•
•
The floppy disk drive cable has seven twisted wires.
A red mark on a wire typically designates the location of pin 1.
A single floppy disk drive ribbon cable has 34 wires and two connectors to
provide for two floppy disk drives. The connector with twisted wires always
connects to drive A, and the connector that does not have twisted wires
always connects to drive B.
Parallel Port Connector
Parallel (Printer) Port Pin Definitions
(J65)
Pin Number Function Pin Number Function
The parallel port is located on J65.
See the table below right for pin
definitions.
1
3
5
7
Strobe-
Data Bit 0
Data Bit 1
Data Bit 2
Data Bit 3
Data Bit 4
Data Bit 5
Data Bit 6
Data Bit 7
ACK
2
4
6
8
10
12
14
16
18
20
22
24
26
Auto Feed-
Error-
Init-
SLCT IN-
GND
GND
GND
GND
GND
9
11
13
15
17
19
21
23
25
GND
BUSY
GND
PE
GND
SLCT
NC
2-21
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Floppy Connector
The floppy connector is located
on J12. See the table below for
pin definitions.
Floppy Connector Pin Definitions (JP12)
Pin Number Function Pin Number
Function
FDHDIN
Reserved
1
GND
GND
Key
2
3
4
5
6
FDEDIN
7
9
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
8
Index-
10
12
14
16
18
20
22
24
26
28
30
32
34
Motor Enable
Drive Select B-
Drive Select A-
Motor Enable
DIR-
11
13
15
17
19
21
23
25
27
29
31
33
STEP-
W rite Data-
W rite Gate-
Track 00-
W rite Protect-
Read Data-
Side 1 Select-
Diskette
IDE Connectors
IDE Connector Pin Definitions
(J18, J19)
There are no jumpers to
configure the onboard IDE#1
and #2 connectors (J18 and
J19, respectively). See the
table on the right for pin
definitions.
Pin Number
1
3
5
7
9
Function
Reset IDE
Host Data 7
Host Data 6
Host Data 5
Host Data 4
Host Data 3
Host Data 2
Host Data 1
Host Data 0
GND
Pin Number
2
4
6
Function
GND
Host Data 8
Host Data 9
Host Data 10
Host Data 11
Host Data 12
Host Data 13
Host Data 14
Host Data 15
Key
GND
GND
GND
BALE
GND
IOCS16-
GND
Addr 2
Chip Select 1-
GND
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
DRQ3
I/O W rite-
I/O Read-
IOCHRDY
DACK3-
IRQ14
Addr 1
Addr 0
Chip Select 0
Activity
2-22
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Chapter 2: Installation
Ultra320 SCSI
Connector
Refer to the table below for
the pin definitions of the Ul-
tra320 SCSI connectors lo-
cated at JA1 and JA2.
68-pin Ultra320 SCSI Connectors (JA1 and JA2)
Connector
Contact
Connector
Contact
Number
Signal Names
Number
Signal Names
1
2
3
4
5
6
7
8
+DB(12)
+DB(13)
+DB(14)
+DB(15)
+DB(P1)
+DB(0)
+DB(1)
+DB(2)
+DB(3)
+DB(4)
+DB(5)
+DB(6)
+DB(7)
+DB(P)
GROUND
DIFFSENS
TERMPW R
TERMPW R
RESERVED
GROUND
+ATN
GROUND
+BSY
+ACK
+RST
+MSG
+SEL
+C/D
+REQ
+I/O
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
-DB(12)
-DB(13)
-DB(14)
-DB(15)
-DB(P1)
-DB(0)
-DB(1)
-DB(2)
-DB(3)
-DB(4)
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
-DB(5)
-DB(6)
-DB(7)
-DB(P)
GROUND
GROUND
TERMPW R
TERMPW R
RESERVED
GROUND
-ATN
GROUND
-BSY
-ACK
-RST
-MSG
-SEL
-C/D
-REQ
-I/O
-DB(8)
-DB(9)
-DB(10)
-DB(11)
+DB(8)
+DB(9)
+DB(10)
+DB(11)
2-23
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2-10 Installing Software Drivers
After all the hardware has been installed you must install the software
drivers. The necessary drivers are all included on the Supermicro CD that
came packaged with your motherboard. After inserting this CD into your
CDROM drive, the display shown in Figure 2-5 should appear. (If this dis-
play does not appear, click on the My Computer icon and then on the icon
representing your CDROM drive. Finally, double click on the S "Setup" icon.)
Figure 2-5. Driver/Tool Installation Display Screen
Click the icons showing a hand writing on paper to view the readme files
for each item. The bottom icon with a CD on it allows you to view the
entire contents of the CD.
2-24
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Chapter 3: Troubleshooting
Chapter 3
Troubleshooting
3-1 Troubleshooting Procedures
Use the following procedures to troubleshoot your system. If you have
followed all of the procedures below and still need assistance, refer to the
‘Technical Support Procedures’ and/or ‘Returning Merchandise for Service’
section(s) in this chapter.
Note: Always disconnect the power cord before adding, changing
or installing any hardware components.
Before Power On
1. Make sure no short circuits exist between the motherboard and chassis.
2. Disconnect all ribbon/wire cables from the motherboard, including those
for the keyboard and mouse.
3. Remove all add-on cards.
4. Install one CPU (making sure it is fully seated) and connect the chassis
speaker and the power LED to the motherboard. (Check all jumper
settings as well.)
No Power
1. Make sure no short circuits exist between the motherboard and the chas-
sis.
2. Verify that all jumpers are set to their default positions.
3. Check that the 115V/230V switch on the power supply is properly set.
4. Turn the power switch on and off to test the system.
5. The battery on your motherboard may be old. Check to verify that it still
supplies ~3VDC. If it does not, replace it with a new one.
No Video
1. If the power is on but you have no video, remove all the add-on cards
and cables.
2. Use the speaker to determine if any beep codes exist. Refer to Appendix
A for details on beep codes.
3-1
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NOTE
If you are a system integrator, VAR or OEM, a POST diagnos-
tics card is recommended. For I/O port 80h codes, refer to
App. B.
Memory Errors
1. Make sure the DIMM modules are properly and fully installed.
2. Determine if different speeds of DIMMs have been installed and verify
that the BIOS setup is configured for the fastest speed of RAM used.
It is recommended to use the same RAM speed for all DIMMs in the
system.
3. Make sure you are using registered ECC, PC2100 or 1600 (DDR-266 or
200) SDRAM. EDO SDRAM and PC100/133 SDRAM are not supported.
4. Check for bad DIMM modules or slots by swapping a single module be-
tween two slots and noting the results.
5. Make sure all memory modules are fully seated in their slots.
6. Check the power supply voltage 115V/230V switch.
Losing the System’s Setup Configuration
1. Ensure that you are using a high quality power supply. A poor quality
power supply may cause the system to lose the CMOS setup informa-
tion. Refer to Section 1-6 for details on recommended power supplies.
2. The battery on your motherboard may be old. Check to verify that it still
supplies ~3VDC. If it does not, replace it with a new one.
3. If the above steps do not fix the Setup Configuration problem, contact
your vendor for repairs.
3-2 Technical Support Procedures
Before contacting Technical Support, please take the following steps. Also,
note that as a motherboard manufacturer, Super Micro does not sell directly
to end-users, so it is best to first check with your distributor or reseller for
troubleshooting services. They should know of any possible problem(s)
with the specific system configuration that was sold to you.
1. Please go through the ‘Troubleshooting Procedures’ and 'Frequently
Asked Question' (FAQ) sections in this chapter or see the FAQs on our
3-2
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Chapter 3: Troubleshooting
tacting Technical Support.
2. BIOS upgrades can be downloaded from our web site at
Note: Not all BIOS can be flashed depending on the modifications
to the boot block code.
3. If you still cannot resolve the problem, include the following information
when contacting Super Micro for technical support:
•Motherboard model and PCB revision number
•BIOS release date/version (this can be seen on the initial display when
your system first boots up)
•System configuration
An example of a Technical Support form is on our web site at
4. Distributors: For immediate assistance, please have your account number
ready when placing a call to our technical support department. We can
be reached by e-mail at [email protected], by fax at (408) 503-
8019 or by phone at (408) 503-8000, option 2.
3-3 Frequently Asked Questions
Question: What are the various types of memory that the X5DL8-
GG/X5DLR-8G2+/X5DLR-8G2 motherboard can support?
Answer: The X5DL8-GG has eight and the X5DLR-8G2+/X5DLR-8G2 has
six 184-pin DIMM slots, which support registered ECC DDR-266 and DDR-
200 (PC2100 and PC1600) DIMMs only. Unbuffered SDRAM, non-ECC
memory and PC100/133 SDRAM modules are not supported. Important:
The memory employs a two-way interleaved scheme, which requires you to
install memory modules in pairs (see Chapter 2 Section 3 for details.)
Question: How do I update my BIOS?
Answer: It is recommended that you do not upgrade your BIOS if you are
experiencing no problems with your system. Updated BIOS files are located
warning message and the info on how to update your BIOS on our web
site. Also, check the current BIOS revision and make sure it is newer than
your BIOS before downloading. Select your motherboard model and down-
load the BIOS file to your computer. Unzip the BIOS update file and you will
3-3
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SUPER X5DL8-GG/X5DLR-8G2+/X5DLR-8G2 User’s Manual
find the readme.txt (flash instructions), the flash.bat (BIOS flash utility) and
the BIOS image (xxxxxx.rom) files. Copy these files onto a bootable floppy
and reboot your system. It is not necessary to set BIOS boot block protec-
tion jumpers on the motherboard. At the DOS prompt, enter the command
"flash." This will start the flash utility and give you an opportunity to save
your current BIOS image. Flash the boot block and enter the name of the
update BIOS image file.
Note: It is important to save your current BIOS and rename it
"super.rom" in case you need to recover from a failed BIOS update.
Select flash boot block, then enter the update BIOS image. Select "Y" to
start the BIOS flash procedure and do not disturb your system until the
flash utility displays that the procedure is complete. After updating your
BIOS, please clear the CMOS then load Optimal Values in the BIOS.
Question: After flashing the BIOS my system does not have video.
How can I correct this?
Answer: If the system does not have video after flashing your new BIOS,
it indicates that the flashing procedure failed. To remedy this, first clear
CMOS per the instructions in this manual and retry the BIOS flashing proce-
dure. If you still do not have video, please use the following BIOS Recov-
ery Procedure. First, turn your system off and place the floppy disk with
the saved BIOS image file (see above FAQ) in drive A. Press and hold
<CTRL> and <Home> at the same time, then turn on the power with these
keys pressed until your floppy drive starts reading. Your screen will re-
main blank until the BIOS program is done. If the system reboots correctly,
then the recovery was successful. The BIOS Recovery Procedure will not
update the boot block in your BIOS.
Question: What's on the CD that came with my motherboard?
Answer: The supplied compact disc has quite a few drivers and programs
that will greatly enhance your system. We recommend that you review the
CD and install the applications you need. Applications on the CD include
chipset drivers for Windows and security drivers.
Question: Why can't I turn off the power using the momentary
power on/off switch?
Answer: The instant power off function is controlled in BIOS by the Power
Button Mode setting. When the On/Off feature is enabled, the motherboard
will have instant off capabilities as long as the BIOS has control of the
system. When the Standby or Suspend feature is enabled or when the
3-4
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Chapter 3: Troubleshooting
BIOS is not in control such as during memory count (the first screen that
appears when the system is turned on), the momentary on/off switch must
be held for more than four seconds to shut down the system. This feature
is required to implement the ACPI features on the motherboard.
3-4 Returning Merchandise for Service
A receipt or copy of your invoice marked with the date of purchase is
required before any warranty service will be rendered. You can obtain
service by calling your vendor for a Returned Merchandise Authorization
(RMA) number. When returning to the manufacturer, the RMA number
should be prominently displayed on the outside of the shipping carton, and
mailed prepaid or hand-carried. Shipping and handling charges will be ap-
plied for all orders that must be mailed when service is complete.
This warranty only covers normal consumer use and does not cover dam-
ages incurred in shipping or from failure due to the alternation, misuse,
abuse or improper maintenance of products.
During the warranty period, contact your distributor first for any product
problems.
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Notes
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Chapter 4: AMIBIOS
Chapter 4
AMIBIOS
4-1 Introduction
This chapter describes the AMIBIOS for the X5DL8-GG/X5DLR-8G2+/X5DLR-
8G2. The AMI ROM BIOS is stored in a Flash EEPROM and can be easily
upgraded using a floppy disk-based program.
Note: Due to periodic changes to BIOS, some settings may have been
added or deleted and might not yet be recorded in this manual. Refer to the
Manual Download area of our web site for any changes to BIOS that are
not reflected in this manual.
System BIOS
The BIOS is the Basic Input Output System used in all IBM® PC, XT™, AT®,
and PS/2® compatible computers. The BIOS ROM stores the system param-
eters, such as amount of memory, type of disk drives and video displays,
etc. BIOS ROM requires very little power. When the computer is turned off,
a back-up battery provides power to the BIOS ROM, enabling it to retain the
system parameters. Each time the computer is powered-on, the computer is
then configured with the values stored in the BIOS ROM by the system
BIOS, which gains control when the computer is powered on.
How To Change the Configuration Data
The configuration data that determines the system parameters may be
changed by entering the BIOS Setup utility. This Setup utility can be ac-
cessed by pressing <Del> at the appropriate time during system boot.
Starting the Setup Utility
Normally, the only visible POST (Power On Self Test) routine is the memory
test. As the memory is being tested, press the <Delete> key to enter the
main menu of the BIOS Setup utility. From the main menu, you can access
the other setup screens, such as the Chipset and Power menus. Section 4-
3 gives detailed descriptions of each parameter setting in the Setup utility.
An AMIBIOS identification string is displayed at the left bottom corner of the
screen, below the copyright message.
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4-2 BIOS Features
•
•
Supports Plug and Play V1.0A and DMI 2.3
Supports Intel PCI (Peripheral Component Interconnect) (PME) local bus
specification 2.2
•
•
•
Supports Advanced Power Management (APM) specification v 1.1
Supports ACPI
Supports Flash ROM
AMIBIOS supports the LS120 drive made by Matsushita-Kotobuki Electronics
Industries Ltd. The LS120:
•
•
Can be used as a boot device
Is accessible as the next available floppy drive
AMIBIOS supports PC Health Monitoring chips. When a failure occurs in a
monitored activity, AMIBIOS can sound an alarm and display a message.
The PC Health Monitoring chips monitor:
•
•
•
•
CPU temperature
Chassis intrusion detector
Five positive voltage inputs
Four fan speed monitor inputs
4-3 Running Setup
*Optimal default settings are in bold text unless otherwise noted.
The BIOS setup options described in this section are selected by choosing
the appropriate text from the Standard Setup screen. All displayed text is
described in this section, although the screen display is often all you need
to understand how to set the options (see on next page).
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Chapter 4: AMIBIOS
The Main BIOS Setup Menu
Press the <Delete> key during the POST (Power On Self Test) to enter the Main Menu
of the BIOS Setup Utility. All Main Setup options are described in this section. The
Main BIOS Setup screeen is displayed below.
BIOS SETUP UTILITY
Main Advanced Chipset PCIPnP Power Boot Security Exit
AMIBIOS Version:
BIOS Build Date:
BIOS ID:
07.00xx
11/16/02
5DL81119
Processor Type:
Processor Speed:
Intel®Xeon®
2.4 GHz
System Memory:
8128 MB
↔
Select Screen
System Date
System Time
[12:31:57]
[11/20/02]
↑↓ Select Item
+- Change Option
F1 General Help
F10 Save and Exit
ESC Exit
V07.00 (C)Copyright 1985-2002, American Megatrends, Inc.
Use the Up/Down arrow keys or the <Tab> key to move between the different
settings in the above menu.
When the items "System Time", and "System Date" are highlighted, type in the
correct time/date in the time field, and then press "Enter". The date must be entered
in MM/DD/YY format. The time is entered in HH:MM:SS format. The time is in also 24-
hour format. For example, 5:30 a.m. appears as 05:30:00 and 5:30 p.m. as 17:30:00.
Press the <ESC> key to exit the Main Menu and use the Left/Right arrow keys to
enter the the other categories of BIOS settings. The next section is described in
detail to illustrate how to navigate through the menus.
Note: Items displayed in gray are preset and cannot be selected. Items
with a blue arrow are commands, not options (i.e. Discard Changes).
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4-4 Advanced BIOS Setup
Choose Advanced BIOS Setup from the AMIBIOS Setup Utility main menu with the
Left/Right arrow keys. You should see the following display. Select one of the items
in the left frame of the screen, such as SuperIO Configuration, to go to the sub screen
for that item. Advanced BIOS Setup options are displayed by highlighting the option
using the arrow keys. All Advanced BIOS Setup options are described in this
section.
BIOS SETUP UTILITY
Main
Advanced
Chipset
PCIPnP Power Boot Security Exit
Setup Warning
Setting items on this screen to incorrect values
Configure SuperIO
Chipset Winbond627F
may cause the system to malfunction!
> SuperIO Configuration
> IDE Configuration
> Floppy Configuration
> Boot Settings Configuration
> Event Log Configuration
> Peripheral Device Configuration
> System Health Monitor
> Remote Access Configuration
↔ Select Screen
↑↓ Select Item
Enter Go to Sub Screen
F1 General Help
F10 Save and Exit ESC
Exit
V7.00 (C)Copyright 1985-2001, American Megatrends, Inc.
Use the Up/Down arrow keys to select the "Super I/O Configuration line.
When the "Super IO Configuration" line is highlighted, hit "ENTER" to display its menu.
The following Super IO Configuration screen will appear. Here you can select your
options for the your computer's I/O (Input/Output) devices.
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Chapter 4: AMIBIOS
Super IO Configuration
BIOS SETUP UTILITY
Advanced
Configure Winbond627F Serial Port(s) and Parallel P
Serial Port1 Address
Serial Port1 IRQ
Serial Port2 Address
Serial Port2 IRQ
[3F8]
[4]
[2F8]
[3]
Serial Port2 Mode
Parallel Port Address
Parallel Port IRQ
Parallel Port Mode
ECP Mode DMA Channel
[Normal]
[378]
[7]
[ECP]
[3]
↔ Select Screen
↑↓
Select Item
+- Change Option
F1 General Help
F10 Save and Exit
ESC Exit
V07.00 (C)Copyright 1985-2001, American Megatrends, Inc.
The Super IO Configuration includes the following items:
Serial Port 1 Address
This option specifies the base I/O port address of serial port 1. The set-
tings for this item include Disabled, 3F8 and 3E8 and 2E8. Select the de-
sired setting and then press "Enter".
Serial Port 1 IRQ
This option specifies the Interrupt Request address of serial port 1. The
settings for this item include Disabled, 4 and 3.
Serial Port 2 Address
This option specifies the base I/O port address of serial port 2. The settings
for this item include Disabled, 2F8, 3E8 and 2E8.
Serial Port 2 IRQ
This option specifies the Interrupt Request address of serial port 2. The
settings for this item include Disabled, 4 and 3.
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Serial Port 2 Mode
Use this option to choose the Serial Port 2 Mode. The settings are
Normal, Sharp-IR, SIR and consumer.
Parallel Port Address
This option specifies the I/O address used by the parallel port. The settings
for this item include Disabled, 378, 278 and 3BC. Select your setting and
then press "Enter".
Parallel Port IRQ
This option allows the user to set the Parallel Port IRQ. The settings
for this item include 5 and 7.
Parallel Port Mode
This option specifies the parallel port mode. The settings for this item
include Normal, Bi-directional, EPP and ECP.
ECP Mode DMA Channel
This option allows the user to set the setting for the ECP
Mode of the DMA Channel. The settings for this item include
0, 1 and 3.
IDE Configuration
Onboard PCI IDE Controller
This option allows the user to enable or disable the integrated IDE Control-
ler. The settings include Disabled, Primary, Second and Both. Select "Dis-
abled" to disable the Integrated IDE Controller. Select "Primary" to enable
the Primary IDE ontroller only. Select "Secondary" to enable the Secondary
IDE Controller only. Select "Both" to enable both Primary and Secondary
IDE Controllers.
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Chapter 4: AMIBIOS
Primary IDE Master
When entering "Setup", BIOS automatically detects the presence of
IDE devices. This displays the auto detection status of the IDE de-
vices. You can also manually configure the IDE drives by providing the
following information:
This option allows the user to configure the IDE devices. When the desired
item is highlighted (selected), press "Enter" and the following screen will be
displayed:
Type
This option sets the type of device that the AMIBIOS attempts
to boot from after AMIBIOS POST is completed. The settings
include Not installed, Auto, CDROM and ARMD. The "Auto"
setting allows BIOS to automatically detect the presence of
the IDE controller.
LBA/Large Mode
LBA (Logical Block Addressing) is a method of addressing
data on a disk drive. In LBA mode, the maximum drive capac
ity is 137 GB. The settings are Disabled and Auto. Select
"Disabled" to disable LBA mode. Select "Auto" to enable LBA
mode if your device supports it and is not already formatted
with the LBA mode.
Block (Multi-Sector Transfer) Mode
This option sets the block mode multi sector transfers option
The settings include Disabled and Auto. Disabled: This op
tion prevents the BIOS from using Multi-Sector Transfer on
the specified channel. The data to and from the device will
occur one sector at a time. Auto: This option allows the
BIOS to auto detect device support for Multi-Sector Trans
fers on the specified channel. If supported, this option al
lows the BIOS to auto detect the number of sectors per block
for transfer from the hard disk drive to memory. The data
transfer to and from the device will occur multiple sectors at
a time (if the device supports it).
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PIO Mode
IDE PIO (Programmable I/O) mode programs timing cycles between the
IDE drive and the programmable IDE controller. As the PIO mode in-
creases, the cycle time decreases. The settings are: Auto, 0, 1, 2, 3
and 4.
DMA Mode
This item allows the users to select the DMA mode. The
settings are: Auto, SWDMA0, SWDMA1, SWDMA2,
MWDMA0, MWDMA1, MWDM2, UWDMA0, UWDMA1,
UWDMA2, UWDMA3 and UWDMA4. Select Auto to auto de-
tect the DMA Mode. Select SWDMA0 through SWDMA2 to
set single word DMA0 through DMA2. Select MWDMA0
through MWDMA2 to set Multi-word DMA0 through DMA2.
Select UDMA0 trhough UDMA4 to set Ultra DMA0 through
Ultra DMA4.
S.M.A.R.T.
S.M.A.R.T stands for Self-Monitoring Analysis and Reporting
Technology, a feature that can help predict impending drive
failures. The settings are Auto, Disabled and Enabled.
Select "Enabled" or "Disabled" to enable or disable the
S.M.A.R.T. Select "Auto" to auto detect S.M.A.R.T.
32Bit Data Transfer
The settings are Auto, Disabled and Enabled. Select "En-
abled" or "Disabled" to enable or disable the 32-bit Data
Transfer function. Select "Auto" to auto detect the 32-bit
Data Transfer function.
ARMD Emulation Type
This option is used to select the ARMD emulation type used when
configuring an LS120, MO (Magneto-Optical), or Iomega Zip drive.
The settings are Auto, Floppy and HardDisk. (ARMD stands for
ATA(PI) Removable Media Disk).
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Chapter 4: AMIBIOS
Primary IDE Slave
When the system enters "Setup", BIOS automatically detects the presence
of IDE devices. This option displays the auto detection status of IDE de-
vices. The settings for "Primary IDE Slave" are the same as those for the
"Primary IDE Master".
Secondary IDE Master
This displays the status of auto detection of IDE devices. The settings for
"Secondary IDE Master" are the same as those for the "Primary IDE Master".
Secondary IDE Slave
This displays the status of auto detection of IDE devices. The settings for
"Secondary IDE Slave" are the same as those for the "Primary IDE Master".
Hard Disk Write Protect
This item allows the user to prevent the hard disk from being overwritten.
The options are Enabled or Disabled. Enabled allows the drive to be used
normally; read, write and erase functions can all be performed. Disabled
prevents the hard disk from being erased. This function is effective only
when the device is accessed through BIOS.
ATA(PI) Detect Timeout (Seconds)
Set this option to stop the system search for ATAPI devices within the
specified number of seconds. The options are 0, 5, 10, 15, 20, 25, 30 and
35 (seconds). Most ATA disk drives can be detected within 5 seconds.
ATA(PI) 80pin Cable Detection
This option allows you to select the mechanism used to detect the 80-pin
ATA(PI) cable. The settings are Host, Device and Host & Device.
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Floppy Configuration
Floppy A
Use this option to specify which of floppy drive you have installed in the A
drive. The settings are Disabled, 360 KB 5 1/4", 1.2 MB 5 1/4", 720 KB 3 1/
2", 1.44 MB 3 1/2" and 2.88 MB 3 1/2".
Floppy B
Use this option to specify which of floppy drive you have installed in the B
drive. The settings are Disabled, 360 KB 5 1/4", 1.2 MB 5 1/4", 720 KB 3 1/
2", 1.44 MB 3 1/2" and 2.88 MB 3 1/2".
Diskette Write Protect
This option allows you to prevent any writing to your floppy diskette. The
settings are Disabled, 360 KB 5 1/4", 1.2 MB 5 1/4", 720 KB 3 1/2", 1.44
MB 3 1/2" and 2.88 MB 3 1/2". The Enabled setting is effective only if the
device is accessed through BIOS.
Floppy Drive Seek
Use this option to Enable or Disable the floppy seek routine on bootup.
Boot Settings Configuration
Quick Boot
This option allows the BIOS to skip certain tests that are normally perfomred
on boot up. You can disable the option to speed up boot time. The settings
are Disabled and Enabled.
Quiet Boot
If Disabled, this option will cause the normal POST messages to be dis-
played upon setup. When Enabled, the OEM logo is displayed instead of the
POST messages. The settings are Enabled and Disabled.
Add-On ROM Display Mode
Set this option to display add-on ROM (read-only memory) messages. The
settings for this option are Force BIOS and Keep Current. Force BIOS
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Chapter 4: AMIBIOS
allows the computer to force a third party BIOS to display during system
boot. Keep Current has the system display AMIBIOS information on bootup.
BootUp Num Lock
This option is used to select the status of the Number Lock function on your
keyboard on bootup. The settings are On and Off.
BootUp CPU Speed
This option is used set the CPU speed to either High or Low.
PS/2 Mouse Support
This option specifies whether a PS/2 Mouse will be supported. Settings are
Enabled and Disabled.
Typematic Rate
Set this option to select the rate at which the computer repeats a key that
is held down. Settings are Fast and Slow. Fast: This sets the rate the
computer repeats a key to over 20 times per second. Under normal opera-
tions, this setting should not be changed. Slow: This sets the rate the
computer repeats a key to under 8 times per second.
Primary Display
This option specifies the type of monitor display you have installed on the
system. The settings are Absent, VGA/EGA, Color 40 x 25, Color 80 x 25
and monochrome.
Parity Check
Use this option to either Enable or Disable the use of memory parity check-
ing.
Boot to OS/2
This option can be used to boot the system to an OS/2 operating system.
The settings are No and Yes.
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Wait for F1 if Error
This settings for this option are Enabled and Disabled. Disabled: This
prevents the AMIBIOS to wait on an error for user intervention. This setting
should be used if there is a known reason for a BIOS error to appear. An
example would be a system administrator must remote boot the system.
The computer system does not have a keyboard currently attached. If this
setting is set, the system will continue to bootup in to the operating system.
If ‘F1’ is enabled, the system will wait until the BIOS setup is entered.
Enabled: This option allows the system BIOS to wait for any error. If an
error is detected, pressing <F1> will enter Setup and the BIOS setting can
be adjusted to fix the problem. This normally happens when upgrading the
hardware and not setting the BIOS to recognize it.
Hit "Delete" Message Display
This option tells the system to display or not display the "Hit Delete to Enter
Setup" message. The settings are Enabled and Disabled.
Cache
This option is for enabling or disabling the internal CPU L1 cache. Settings
include Disabled, Write-Thru, Write-Back and Reserved. Disabled: This
option prevents the system from using the internal CPU L1 cache. This
setting should be used to slow the computer system down or to trouble-
shoot error messages. Write-Thru: This option allows the computer system
to use the internal CPU L1 cache as Write-Though cache. Write-Through
cache is slower than Write-Back cache. It performs write operations to the
internal L1 CPU cache and system memory simultaneously. Write-Back:
This option allows the computer system to use the internal CPU L1 cache as
Write-Back cache. Write-Back cache is faster than Write-Through cache.
Write-Back cache is a caching method in which modifications to data in the
cache aren’t copied to the cache source until absolutely necessary. Write-
back caching is available on all CPUs supported by this BIOS. With these
CPUs, write operations stored in the L1 cache aren’t copied to main memory
until absolutely necessary. This is the default setting.
System BIOS Cacheable
This option enables you to move the system BIOS to the memory cache to
improve performance. Settings are Enabled and Disabled.
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Chapter 4: AMIBIOS
Event Log Configuration
Event Logging
This option Enables or Disables the logging of events. You can use this
screen to select options for the Event Log Configuration Settings. You can
access sub screens to view the event log and mark all events as read. Use
the up and down arrow keys to select an item, and the plus (+) and minus
(-) keys to change the option setting. The settings are described on the
following pages. The screen is shown below.
ECC Event Logging
This option Enables or Disables the logging of ECC events. The events
logged by AMIBIOS are post errors such as a bad BIOS, floppy errors, or
hard drive errors.
Clear All Event Logs
This option can be used to tell the system to clear the event log on the next
boot up. The settings are No and Yes.
View Event Log
Highlighting this and pressing <Enter> will allow you to view the unread
events from the event log area.
Mark All Events As Read
Highlighting [OK] and pressing <Enter> will mark all events in the log area as
having been read. The settings are OK and Cancel.
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Peripheral Device Configuration
Power Lost Control
This option determines how the system will respond when power is reap-
plied after a power loss condition. Choose Always On to automatically
start up the system when power is reapplied. Always Off means you must
push the main power button to restart the system after power is restored.
System Health Monitor
The BIOS continuously monitors the health of your system by measuring
certain voltage levels and temperatures.
CPU1 Current Temperature/CPU2 Current Temperature
This reading displays the real-time temperatures of CPU1 and CPU2.
System Current Temperature1/System Current Temperature2
This reading displays two real-time temperatures of the system.
Remote Access Configuration
This option allows the user to redirect the console (display) through the
COM port when enabled. This is useful when two computers are hooked
up to a single monitor. When enabled, the user can toggle the display from
one system to the other using the <Tab> key. The function keys are dis-
abled when this setting is enabled. The settings are "Serial ANSI" and
"Disabled."
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Chapter 4: AMIBIOS
4-5 Chipset Setup
Choose Chipset Setup from the AMIBIOS Setup Utility main menu. The screen
is shown below. All Chipset Setup options are described following the
screen.
BIOS SETUP UTILITY
Main
Advanced
Chipset
PCIPnP Power Boot Security Exit
Memory Timing Control
SDRAM CAS Latency
MPS 1.4 Support
Hyper-threading
Auto DQS Setting Support
[Auto]
Options for MCH
[CAS Latency 2.5]
[Enabled]
[Enabled]
[Disabled]
[36]
DQS Selection
Watch Dog Timer
[Disabled]
↔
↑↓
Select Screen
Select Item
Enter Go to Sub Screen
F1 General Help
F10 Save and Exit ESC
Exit
V07.00 (C)Copyright 1985-2002, American Megatrends, Inc.
Memory Timing Control
Determines how the memory timing is controlled. Auto lets BIOS program
the memory timing from SPD data. Manual allows the user to select the
appropriate memory timing.
SDRAM CAS Latency
This sets the CAS latency for system memory. The default setting is CAS
Latency 2.5.
MPS 1.4 Support
The settings for this option are Enabled and Disabled.
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Hyper-threading
Enables hyper-threading if supported by the operating system. Hyper-
threading is a method of creating an additional "virtual" processor by using
parallelism to process mulitple instructions simultaneously. The settings for
this option are Enabled and Disabled.
Auto DQS Setting Support
The settings for this option are Disabled and Enabled.
DQS Selection
This setting is preset.
Watchdog Timer
This option is used to configure the Watchdog timer. Settings are Dis-
abled, 2 minutes, 5 minutes, 10 minutes and 15 minutes.
4-6 PCI PnP Setup
Choose PCI/PnP Setup from the AMIBIOS Setup main menu. All PCI/PnP
options are described in this section. The PCI/PnP Setup screen is shown
below.
BIOS SETUP UTILITY
Main Advanced Chipset PCIPnP Power Boot Security Exit
Plug & Play O/S
[No]
Reset Config Data
Allocate IRQ to VGA
PCI IDE BusMaster
[No]
[Yes]
[Disabled]
USB Function
Legacy USB Support
ARMD Emulation Type
[Enabled]
[Auto]
[Hard Disk]
↔
Select Screen
↑↓ Select Item
+- Change Option
F1 General Help
F10 Save and Exit
ESC Exit
V07.00 (C)Copyright 1985-2002, American Megatrends, Inc.
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Chapter 4: AMIBIOS
Plug & Play OS
This option specifies how Plug and Play devices will be configured. The
settins are Yes and No. No lets BIOS configure all devices in the system.
Yes lets the operating system (if supported) configure PnP devices not
required for bootup.
Reset Configuration Data
Choosing the Yes setting will cause the PnP configuration data in the BIOS
to be cleared on the next boot up. Choosing the No setting does not force
PnP data to be cleared on the next boot.
Allocate IRQ to VGA
This option lets you allocate an interrupt request (IRQ) to the PCI VGA
adapter card (if used). The settings are Yes and No.
PCI IDE BusMaster
The settings for this option are Disabled and Enabled. Enable to specify
that the IDE controller on the PCI bus has bus mastering capabilities.
USB Function
The settings for this option are Disabled and Enabled. Disabled prevents
the use of the USB ports and Enabled allows the use of the USB ports.
Legacy USB Support
This option allows you to enable support for Legacy USB. The settings are
Auto, Enabled and Disabled.
ARMD Emulation Type
This settings for this option are Hard Disk, Auto and Floppy.
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4-7 Power Setup
Choose Power Setup from the AMIBIOS Setup main menu. All Power Setup
options are described in this section. The Power Setup screen is shown
below.
BIOS SETUP UTILITY
Main Advanced Chipset PCIPnP Power Boot Security Exit
ACPI Aware O/S
[Yes]
Power Management
[Disabled]
↔ Select Screen
↑↓ Select Item
+- Change Option
F1 General Help
F10 Save and Exit
ESC Exit
V02.03 (C)Copyright 1985-2002, American Megatrends, Inc.
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Chapter 4: AMIBIOS
ACPI Aware O/S
This option allows the system to utilize Intel's ACPI (Advanced Configuration
and Power Interface) specification. Settings are No and Yes. DOS®,
Windows 3.x®, and Windows NT® are examples of non-ACPI aware oper-
ating systems. Windows 95®, Windows 98®, Windows ME® and Windows
2000® are examples of ACPI aware operating systems.
Power Management
When enabled, this option displays the following four options relating to
power management. The settings are Disabled and Enabled.
Power Button Mode
This option allows you to change the function of the chassis power
button. The settings are On/Off and Suspend. When set to Suspend,
depressing the power button when the system is up will cause it to
enter a suspend state.
Suspend Timeout
This option specifies the length of hard disk inactivity time that should
expire before entering the power conserving state. The settings are
Off, 1, 2, 3, 4, 5, 6, 7, 8, 9 and 10 (minutes).
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4-8 Boot Setup
Choose Boot Setup from the AMIBIOS Setup main menu. All Boot Setup
options are described in this section. The Boot Setup screen is shown
below.
BIOS SETUP UTILITY
Main Advanced Chipset PCIPnP Power Boot Security Exit
>
>
>
>
Boot Device Priority
Hard Disk Drives
Removable Devices
ATAPI CDROM Drives
↔
↑↓
Select Screen
Select Item
Enter Go to Sub Screen
F1
F10
ESC
General Help
Save and Exit
Exit
V02.03 (C)Copyright 1985-2000, American Megatrends, Inc.
Boot Device Priority
1st Boot Device
This option is used to specify the order of the boot sequence that will
be followed from the available system devices. The settings for the
1st Boot Device are Removable Device, ATAPI CDROM, Hard Drive,
Onboard LAN2 Option-ROM and IBA 4.0.1.9 Slot 0102.
2nd Boot Device
The settings for the 2nd Boot Device are Removable Device, ATAPI
CDROM, Hard Drive, Onboard LAN2 Option-ROM and IBA 4.0.1.9 Slot
0102.
4-20
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Chapter 4: AMIBIOS
3rd Boot Device
The settings for the 3rd Boot Device are Removable Device, ATAPI
CDROM, Hard Drive, Onboard LAN2 Option-ROM and IBA 4.0.1.9 Slot
0102.
4th Boot Device
The settings for the 4th Boot Device are Removable Device, ATAPI
CDROM, Hard Drive, Onboard LAN2 Option-ROM and IBA 4.0.1.9
Slot 0102.
5th Boot Device
The settings for the 5th Boot Device are Removable Device, ATAPI
CDROM, Hard Drive, Onboard LAN2 Option-ROM and IBA 4.0.1.9 Slot
0102.
Hard Disk Drives
Use this screen to view the boot sequency of hard drives that have been
auto-detected or entered manually on your system.
Removable Devices
Use this screen to view the boot sequency of the removeable devices that
have been auto-detected or entered manually on your system.
ATAPI CDROM Drives
Use this screen to view the boot sequency ofthe ATAPI CDROM drives that
have been auto-detected or entered manually on your system.
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4-9 Security Setup
Choose Security Setup from the AMIBIOS Setup main menu. All Security
Setup options are described in this section. The Security Setup screen is
shown below.
BIOS SETUP UTILITY
Main Advanced Chipset PCIPnP Power Boot Security Exit
Install or Change the
Supervisor Password :
User Password
Not Installed
Not Installed
password.
:
>
>
>
Change Supervisor Password
Change User Password
Clear User Password
Boot Sector Virus Protection
[Disabled]
↔
↑↓
Select Screen
Select Item
Enter Go to Sub Screen
F1
F10
ESC
General Help
Save and Exit
Exit
V02.03 (C)Copyright 1985-2000, American Megatrends, Inc.
Supervisor Password
User Password
AMIBIOS provides both Supervisor and User password functions. If you
use both passwords, the Supervisor password must be set first. The sys-
tem can be configured so that all users must enter a password every time
the system boots or when AMIBIOS Setup is executed, using either or both
the Supervisor password or User password. The Supervisor and User
passwords activate two different levels of password security. If you select
password support, you are prompted for a 1 – 6 character password. Type
the password on the keyboard. The password does not appear on the
screen when typed. Make sure you write it down. If you forget it, you must
clear CMOS and reconfigure. Remember your Password! Keep a record
of the new password when the password is changed. If you forget the
password, you must erase the system configuration information in CMOS.
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Chapter 4: AMIBIOS
Change Supervisor Password
This option allows you to change a supervisor password that was entered
previously.
Change User Password
This option allows you to change a user password that was entered previ-
ously.
Clear User Password
Use this option to clear the user password so that it is not required to be
entered when the system boots up.
Boot Sector Virus Protection
This option allows you to enable or disable a virus detection program to
protect the boot sector of your hard disk drive. The settings for this option
Disabled and Enabled. If Enabled, AMIBIOS will display a warning when
any program (or virus) issues a Disk Format command or attempts to write
to the boot sector of the hard disk drive.
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4-10 Exit Setup
Choose Exit Setup from the AMIBIOS Setup main menu. All Exit Setup op-
tions are described in this section. The Exit Setup screen is shown below.
BIOS SETUP UTILITY
Main Advanced Chipset PCIPnP Power Boot Security Exit
Exit system setup with
>
>
>
>
>
Exit Saving Changes
Exit Discarding Changes
Load Optimal Defaults
Load Fail-Safe Defaults
Discard Changes
saving the changes.
↔
↑↓
Select Screen
Select Item
Enter Go to Sub Screen
F1
F10
ESC
General Help
Save and Exit
Exit
V02.03 (C)Copyright 1985-2000, American Megatrends, Inc.
Exit Saving Changes
Highlighting this setting and then pressing <Enter> will save any changes
you made in the BIOS Setup program and then exit. Your system should
then continue with the boot up procedure.
Exit Discarding Changes
Highlighting this setting and then pressing <Enter> will ignore any changes
you made in the BIOS Setup program and then exit. Your system should
then continue with the boot up procedure.
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Chapter 4: AMIBIOS
Load Optimal Defaults
Highlighting this setting and then pressing <Enter> provides the optimum
performance settings for all devices and system features.
Load Failsafe Defaults
Highlighting this setting and then pressing <Enter> provides the safest set
of parameters for the system. Use them if the system is behaving errati-
cally.
Discard Changes
Highlighting this setting and then pressing <Enter> will ignore any changes
you made in the BIOS Setup program but will not exit the BIOS Setup pro-
gram.
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Appendix A: AMIBIOS Error Beep Codes
Appendix A
BIOS Error Beep Codes
During the POST (Power-On Self-Test) routines, which are performed
each time the system is powered on, errors may occur.
Non-fatal errors are those which, in most cases, allow the system to
continue the boot-up process. The error messages normally appear on
the screen.
Fatal errors are those which will not allow the system to continue the
boot-up procedure. If a fatal error occurs, you should consult with your
system manufacturer for possible repairs.
These fatal errors are usually communicated through a series of audible
beeps. The numbers on the fatal error list, on the following page,
correspond to the number of beeps for the corresponding error. All
errors listed, with the exception of Beep Code 8, are fatal errors.
POST codes may be read on the debug LEDs located beside the LAN port
on the motherboard backplane. See the description of the Debug LEDs
(LED1 and LED2) in Section 2-6.
A-1
AMIBIOS Error Beep Codes
Beep Code
Error Message
Description
1 beep
Refresh
Circuits have been reset.
(Ready to power up.)
5 short, 1 long
8 beeps
Memoryerror
No memory detected in
system
Displaymemoryread/writeerror
Video adapter missing or
with faulty memory
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Appendix B: BIOS POST Checkpoint Codes
Appendix B
BIOS POST Checkpoint Codes
When AMIBIOS performs the Power On Self Test, it writes checkpoint codes to I/O
port 0080h. If the computer cannot complete the boot process, diagnostic equipment
can be attached to the computer to read I/O port 0080h.
B-1
Uncompressed Initialization Codes
The uncompressed initialization checkpoint codes are listed in order of execution:
Checkpoint Code Description
D0h
The NMI is disabled. Power on delay is starting. Next, the initialization
code checksum will be verified.
D1h
Initializing the DMA controller, performing the keyboard controller
BAT test, starting memory refresh, and entering 4 GB flat mode next.
Starting memory sizing next.
D3h
D4h
Returning to real mode. Executing any OEM patches and setting the
Stack next.
D5h
D6h
Passing control to the uncompressed code in shadow RAM at
E000:0000h.Theinitializationcodeiscopiedtosegment0andcontrol
will be transferred to segment 0.
Controlisinsegment0. Next, checkingif<Ctrl><Home>waspressed
and verifying the system BIOS checksum. If either <Ctrl> <Home>
was pressed or the system BIOS checksum is bad, next will go to
checkpoint code E0h. Otherwise, going to checkpoint code D7h.
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B-2
Bootblock Recovery Codes
The bootblock recovery checkpoint codes are listed in order of execution:
Checkpoint Code Description
E0h
The onboard floppy controller if available is initialized. Next,
beginning the base 512 KB memory test.
Initializing the interrupt vector table next.
E1h
E2h
E6h
Initializing the DMA and Interrupt controllers next.
Enabling the floppy drive controller and Timer IRQs. Enabling internal
cache memory.
Edh
Eeh
Initializing the floppy drive.
Looking for a floppy diskette in drive A:. Reading the first sector of
the diskette.
Efh
F0h
F1h
F2h
A read error occurred while reading the floppy drive in drive A:.
Next, searching for the AMIBOOT.ROM file in the root directory.
The AMIBOOT.ROM file is not in the root directory.
Next, reading and analyzing the floppy diskette FAT to find the
clusters occupied by the AMIBOOT.ROM file.
Next, reading the AMIBOOT.ROM file, cluster by cluster.
The AMIBOOT.ROM file is not the correct size.
Next, disabling internal cache memory.
F3h
F4h
F5h
FBh
FCh
FDh
FFh
Next, detecting the type of flash ROM.
Next, erasing the flash ROM.
Next, programming the flash ROM.
Flash ROM programming was successful. Next, restarting the
system BIOS.
B-3
Uncompressed Initialization Codes
The following runtime checkpoint codes are listed in order of execution.
These codes are uncompressed in F0000h shadow RAM.
Checkpoint Code Description
03h
The NMI is disabled. Next, checking for a soft reset or a power on
condition.
05h
06h
07h
08h
0Ah
The BIOS stack has been built. Next, disabling cache memory.
Uncompressing the POST code next.
Next, initializing the CPU and the CPU data area.
The CMOS checksum calculation is done next.
TheCMOSchecksumcalculationisdone.InitializingtheCMOSstatus
register for date and time next.
0Bh
TheCMOSstatusregisterisinitialized. Next, performinganyrequired
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Appendix B: BIOS POST Checkpoint Codes
initialization before the keyboard BAT command is issued.
The keyboard controller input buffer is free. Next, issuing the BAT
command to the keyboard controller.
0Ch
0Eh
The keyboard controller BAT command result has been verified.
Next, performing any necessary initialization after the keyboard
controller BAT command test.
0Fh
10h
11h
The initialization after the keyboard controller BAT command test is
done. The keyboard command byte is written next.
The keyboard controller command byte is written. Next, issuing the
Pin 23 and 24 blocking and unblocking command.
Next, checking if <End or <Ins> keys were pressed during power on.
Initializing CMOS RAM if the Initialize CMOS RAM in every boot
AMIBIOS POST option was set in AMIBCP or the <End> key was
pressed.
12h
13h
Next,disablingDMAcontrollers1and2andinterruptcontrollers1and
2.
Thevideodisplayhasbeendisabled.PortBhasbeeninitialized.Next,
initializing the chipset.
14h
19h
1Ah
The 8254 timer test will begin next.
The 8254 timer test is over. Starting the memory refresh test next.
The memory refresh line is toggling. Checking the 15 second on/off
time next.
2Bh
2Ch
2Dh
23h
Passing control to the video ROM to perform any required configu-
ration before the video ROM test.
All necessary processing before passing control to the video ROM
is done. Looking for the video ROM next and passing control to it.
The video ROM has returned control to BIOS POST. Performing any
required processing after the video ROM had control.
Reading the 8042 input port and disabling the MEGAKEY Green
PC feature next. Making the BIOS code segment writable and
performing any necessary configuration before initializing the
interrupt vectors.
24h
The configuration required before interrupt vector initialization
has completed. Interrupt vector initialization is about to begin.
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Checkpoint Code Description
25h
Interrupt vector initialization is done. Clearing the password if the
POST DIAG switch is on.
27h
28h
Any initialization before setting video mode will be done next.
Initialization before setting the video mode is complete. Configuring
the monochrome mode and color mode settings next.
Bus initialization system, static, output devices will be done next, if
present. See the last page for additional information.
Completed post-video ROM test processing. If the EGA/VGA
controller is not found, performing the display memory read/write
test next.
2Ah
2Eh
2Fh
30h
31h
32h
The EGA/VGA controller was not found. The display memory read/
write test is about to begin.
The display memory read/write test passed. Look for retrace
checking next.
The display memory read/write test or retrace checking failed.
Performing the alternate display memory read/write test next.
The alternate display memory read/write test passed. Looking for
alternate display retrace checking next.
34h
37h
38h
Video display checking is over. Setting the display mode next.
The display mode is set. Displaying the power on message next.
Initializing the bus input, IPL, general devices next, if present. See the
last page of this chapter for additional information.
Displaying bus initialization error messages. See the last page of this
chapter for additional information.
39h
3Ah
3Bh
The new cursor position has been read and saved. Displaying the
Hit <DEL> message next.
The Hit <DEL> message is displayed. The protected mode memory
test is about to start.
40h
42h
Preparing the descriptor tables next.
The descriptor tables are prepared. Entering protected mode for the
memory test next.
43h
44h
45h
46h
47h
Entered protected mode. Enabling interrupts for diagnostics mode
next.
Interrupts enabled if the diagnostics switch is on. Initializing data to
check memory wraparound at 0:0 next.
Data initialized. Checking for memory wraparound at 0:0 and finding
the total system memory size next.
The memory wraparound test is done. Memory size calculation has
been done. Writing patterns to test memory next.
The memory pattern has been written to extended memory. Writing
patterns to the base 640 KB memory next.
B-4
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Appendix B: BIOS POST Checkpoint Codes
Checkpoint Code Description
48h
49h
4Bh
Patterns written in base memory. Determining the amount of memory
below 1 MB next.
The amount of memory below 1 MB has been found and verified.
Determining the amount of memory above 1 MB memory next.
The amount of memory above 1 MB has been found and verified.
Checking for a soft reset and clearing the memory below 1 MB for
the soft reset next. If this is a power on situation, going to checkpoint
4Eh next.
4Ch
4Dh
4Eh
4Fh
The memory below 1 MB has been cleared via a soft reset. Clearing
the memory above 1 MB next.
The memory above 1 MB has been cleared via a soft reset. Saving
the memory size next. Going to checkpoint 52h next.
The memory test started, but not as the result of a soft reset.
Displaying the first 64 KB memory size next.
The memory size display has started. The display is updated during
the memory test. Performing the sequential and random memory test
next.
50h
51h
The memory below 1 MB has been tested and initialized. Adjusting
the displayed memory size for relocation and shadowing next.
The memory size display was adjusted for relocation and shadow-
ing.
Testing the memory above 1 MB next.
52h
53h
54h
57h
58h
59h
The memory above 1 MB has been tested and initialized. Saving
the memory size information next.
The memory size information and the CPU registers are saved.
Entering real mode next.
Shutdown was successful. The CPU is in real mode. Disabling the
Gate A20 line, parity, and the NMI next.
The A20 address line, parity, and the NMI are disabled. Adjusting
the memory size depending on relocation and shadowing next.
The memory size was adjusted for relocation and shadowing.
Clearing the Hit <DEL> message next.
The Hit <DEL> message is cleared. The <WAIT...> message is
displayed. Starting the DMA and interrupt controller test next.
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Checkpoint Code Description
60h
62h
65h
66h
The DMA page register test passed. Performing the DMA Controller
1 base register test next.
The DMA controller 1 base register test passed. Performing the DMA
controller 2 base register test next.
The DMA controller 2 base register test passed. Programming DMA
controllers 1 and 2 next.
CompletedprogrammingDMAcontrollers1and2.Initializingthe8259
interrupt controller next.
67h
7Fh
80h
Completed 8259 interrupt controller initialization.
Extended NMI source enabling is in progress.
The keyboard test has started. Clearing the output buffer and
checking for stuck keys. Issuing the keyboard reset command next.
A keyboard reset error or stuck key was found. Issuing the keyboard
controller interface test command next.
81h
82h
83h
84h
85h
86h
87h
The keyboard controller interface test completed. Writing the com-
mand byte and initializing the circular buffer next.
The command byte was written and global data initialization has
completed. Checking for a locked key next.
Locked key checking is over. Checking for a memory size mismatch
with CMOS RAM data next.
The memory size check is done. Displaying a soft error and checking
for a password or bypassing WINBIOS Setup next.
The password was checked. Performing any required programming
before WINBIOS Setup next.
The programming before WINBIOS Setup has completed.
Uncompressing the WINBIOS Setup code and executing the
AMIBIOS Setup or WINBIOS Setup utility next.
88h
89h
8Bh
Returned from WINBIOS Setup and cleared the screen. Performing
any necessary programming after WINBIOS Setup next.
TheprogrammingafterWINBIOSSetuphascompleted.Displayingthe
power on screen message next.
The first screen message has been displayed. The <WAIT...>
message is displayed. Performing the PS/2 mouse check and
extended BIOS data area allocation check next.
Programming the WINBIOS Setup options next.
TheWINBIOSSetupoptionsareprogrammed.Resettingtheharddisk
controller next.
8Ch
8Dh
8Fh
91h
The hard disk controller has been reset. Configuring the floppy drive
controller next.
The floppy drive controller has been configured. Configuring the hard
disk drive controller next.
B-6
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Appendix B: BIOS POST Checkpoint Codes
Checkpoint Code Description
95h
Initializing the bus option ROMs from C800 next. See the last page of
this chapter for additional information.
96h
97h
Initializing before passing control to the adaptor ROM at C800.
Initialization before the C800 adaptor ROM gains control has com-
pleted. The adaptor ROM check is next.
98h
The adaptor ROM had control and has now returned control to BIOS
POST. Performing any required processing after the option ROM
returned control.
99h
9Ah
9Bh
9Ch
9Dh
9Eh
Any initialization required after the option ROM test has completed.
Configuring the timer data area and printer base address next.
Set the timer and printer base addresses. Setting the RS-232 base
address next.
Returned after setting the RS-232 base address. Performing any
required initialization before the Coprocessor test next.
Required initialization before the Coprocessor test is over. Initializing
the Coprocessor next.
Coprocessor initialized. Performing any required initialization after
the Coprocessor test next.
Initialization after the Coprocessor test is complete. Checking the
extended keyboard, keyboard ID, and Num Lock key next. Issuing the
keyboard ID command next.
A2h
A3h
Displaying any soft errors next.
The soft error display has completed. Setting the keyboard typematic
rate next.
A4h
A5h
A7h
A8h
A9h
Aah
Abh
The keyboard typematic rate is set. Programming the memory wait
states next.
Memory wait state programming is over. Clearing the screen and
enabling parity and the NMI next.
NMI and parity enabled. Performing any initialization required before
passing control to the adaptor ROM at E000 next.
Initialization before passing control to the adaptor ROM at E000h
completed. Passing control to the adaptor ROM at E000h next.
Returned from adaptor ROM at E000h control. Performing any
initialization required after the E000 option ROM had control next.
InitializationafterE000optionROMcontrolhascompleted.Displaying
the system configuration next.
Uncompressing the DMI data and executing DMI POST initialization
next.
B0h
B1h
00h
The system configuration is displayed.
Copying any code to specific areas.
Code copying to specific areas is done. Passing control to INT 19h
boot loader next.
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