REJ10J1351-0101
SH7619 CPU Board
M3A-HS19
32
User's Manual
Renesas 32-Bit RISC Microcomputers
SuperHTM RISC engine Family/SH7619 Group
Rev. 1.01
Issued : Oct 28, 2008
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Table of Contents
Chapter1 Overview..............................................................................................................................1-1
1.1 Overview .................................................................................................................................................................... 1-2
1.2 Configuration.............................................................................................................................................................. 1-2
1.3 External Specifications ............................................................................................................................................... 1-3
1.4 Appearance................................................................................................................................................................ 1-4
1.5 M3A-HS19 Block Diagrams........................................................................................................................................ 1-5
1.6 M3A-HS19 Board Overview ....................................................................................................................................... 1-6
1.7 M3A-HS19 Memory Mapping ..................................................................................................................................... 1-9
1.8 Absolute Maximum Ratings...................................................................................................................................... 1-10
1.9 Recommended Operating Conditions ...................................................................................................................... 1-10
Chapter2 Features and Specifications.................................................................................................2-1
2.1 Features ..................................................................................................................................................................... 2-2
2.2 CPU............................................................................................................................................................................ 2-3
2.2.1 SH7619 ............................................................................................................................................................. 2-3
2.3 Memory ...................................................................................................................................................................... 2-4
2.3.1 SH7619 U Memory and Cache Memory ........................................................................................................... 2-4
2.3.2 Flash Memory S29GL032A90TFIR4 (Standard component)............................................................................. 2-4
2.3.3 External Synchronous DRAM (SDRAM) ........................................................................................................... 2-6
2.3.4 External EEPROM .......................................................................................................................................... 2-11
2.4 Serial Port Interface.................................................................................................................................................. 2-13
2.5 PCMCIA Card Interface............................................................................................................................................ 2-14
2.6 LAN Port Interface.................................................................................................................................................... 2-15
2.7 I/O Port..................................................................................................................................................................... 2-16
2.8 Power Supply Circuit ................................................................................................................................................ 2-19
2.9 Clock Module............................................................................................................................................................ 2-20
2.10 Reset Module ......................................................................................................................................................... 2-21
2.11 Interrupt Switch ...................................................................................................................................................... 2-22
2.12 E10A-USB Interface............................................................................................................................................... 2-23
Chapter3 Operational Specifications ...................................................................................................3-1
3.1 M3A-HS19 Connectors............................................................................................................................................... 3-2
3.1.1 UART Connector Pin (J1).................................................................................................................................. 3-3
3.1.2 UART Connector (J2)........................................................................................................................................ 3-4
3.1.3 RS-422 Connector Pin (J3) ............................................................................................................................... 3-5
3.1.4 PCMCIA Connector (J4).................................................................................................................................... 3-6
3.1.5 LAN Connector (J5) .......................................................................................................................................... 3-8
3.1.6 H-UDI Connector (J6) ....................................................................................................................................... 3-9
3.1.7 Power Supply Connector (J7) ......................................................................................................................... 3-10
3.1.8 External Power Supply Connector (J8) ........................................................................................................... 3-11
3.1.9 Expansion Connectors (J9-J13) .................................................................. 3-12
3.2 Switches and LEDs .................................................................................................................................................. 3-15
3.2.1 Jumpers (JP1 - JP9) ....................................................................................................................................... 3-16
(i)
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3.2.2 Features of Switches and LEDs...................................................................................................................... 3-18
3.3 Dimensions............................................................................................................................................................... 3-20
Appendix..............................................................................................................................................A-1
M3A-HS19 SCHEMATICS
(ii)
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Chapter1 Overview
Chapter1
Overview
1-1
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Overview
1
1.1 Overview
1.1 Overview
The M3A-HS19 is a CPU board designed to evaluate the feature and performance of the SH7619 Group of Renesas Technology
original MCU, as well as developing and evaluating the application software for the MCUs.
SH7619 data bus, address bus and on-chip peripheral pins are all connected to expansion connectors and appropriate connectors
to allow for the timing evaluation with peripherals using measurement instruments, and the development of the optional boards
according to its application. Furthermore, it can be connected with an RS-232C connector and a LAN connector, and a PC card
can be mounted on the board.
Renesas Technology E10A-USB on-chip emulator can also be connected to the M3A-HS19.
1.2 Configuration
Figure 1.2.1 shows an example of system configuration using the M3A-HS19.
SH7619 CPU board
M3A-HS19
5V DC output
regulated PS
(1.5A min.)
Expansion
connector
Serial port connector
PCMCIA
connector
SH7619
H-UDI connector
LAN port connector
PC card*
*
High-performance
*
Debugger
Embedded Workshop
E10A-USB
*
SuperH RISC engine
C/C++ CompilerPackage
USB
Host computer*
These items should be prepared by user.
*
Figure 1.2.1 M3A-HS19 System Configuration
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Overview
1.3 External Specification
1
1.3 External Specifications
Table 1.3.1 lists external specifications.
Table 1.3.1 External Specifications
Description
No.
1
Items
CPU
SH7619
• Input (XIN) clock: 15.625 MHz
• Bus clock: 62.5 MHz at maximum
• CPU clock: 125 MHz at maximum
• SDRAM (16-bit data bus)
2
Memories
• EDS1216AATA-75E: 1 (16 MB)
• Flash memory (16-bit data bus)
• S29GL032A90TFIR4: 1 (4 MB)
• EEPROM (Serial)
• S93C76AFT-V-G: 1 (8 KB, 512 x 16)
3
Connectors
• Expansion Connector (Bus, I/O, VCC, GND: 140 pins in total: Through-hole)
• Channel 1 serial port connector (2-pin: Through-hole)
• Channel 2 serial port connector (D-sub 9-pin)
• RS-422 serial connector (4-pin: Through-hole)
• RJ-45 LAN connector (8-pin, RJ-45)
• PC card connector (68-pin)
• H-UDI connector (14-pin)
• Power connector (2-pin: 5 V)
• External power connector (2-pin: 1.8 V: Through-hole)
• Power LED: 1
4
5
LEDs
• User LEDs: 4
Switches
• Power switch: 1
• Reset push-button switch: 1
• NMI push-button switch: 1
• IRQ0 push-button switch: 1
• User DIP switches: 4/package
• Mode DIP switches: 4/package
• 1.8 V external switch jumper: 1
• PCMCIA power switch jumper: 1
• PCMCIA bus switch enable jumper: 1
• Expansion connector signal select jumpers: 5
• Dimensions: 100 mm x 100 mm
• Mounting form:6 layers, double-sided
• Board configuration:1 board
6
Dimensions
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Overview
1.4
1
1.4 Appearance
Figure 1.4.1 shows the appearance of the M3A-HS19.
Figure 1.4.1 M3A-HS19 Appearance
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Overview
1.5 M3A-HS19 Block Diagram
1
1.5 M3A-HS19 Block Diagrams
Figure 1.5.1 shows the system block diagram.
Serial port connector
(RS-232C x 2, RS-422 x 1)
H-UDI (14-pin)
16-bit
Expansion connector
(HIF bus)
SCIF
/SCI
HIF
H-UDI
GPIO/
Other
Peripheral
Functions
LAN
connector
EtherC
SH7619
BSC
Expansion connector
(CPU bus)
16-bit
16-bit
16-bit
SDRAM
(16MB)
Flash Memory
(4MB)
Bus switch
SH7619 CPU Board
M3A-HS19
PCMCIA
connector
Figure 1.5.1 System Block Diagram
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1.6 M3A-HS19 Board Overview
1
1.6 M3A-HS19 Board Overview
Figure 1.6.1 shows the M3A-HS19 board overview.
Top view of the component side
SW1
Power switch
LED5
Power LED
U7,U8,U9
Bus switch
U5
PCMCIA
power control IC
LED1-4
User LED
J7
Power connector
J6
JP9
H-UDI connector
(14-pin)
Power switching
jumper
U6
RS-232C
driver
J14
AC adaptor jack
J2
U12, U16
3.3V/1.8V
regulator IC
RS-232C
serial connector
X3
25MHz oscillator
X1
U1
SH719
15.625MHz oscillator
J5
RJ-45
LAN connector
SW2
Reset switch
SW6
SW5
SW4
Mode DIP
switch
SW3
User DIP switch
IRQ0 switch NMI switch
Top view of the solder side
J4
PC card
connector
(68-pin)
J12
Expansion
connector
J10
Extension
connector
U2
Flash
memory
U14
Logic IC
U10
RS-422
driver
J9, J11, J13
Expansion connector
U13
Reset IC
U4
EEPROM
Figure 1.6.1 M3A-HS19 Board External View
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1.6 M3A-HS19 Board Overview
1
Table 1.6.1 lists major components mounted on the M3A-HS19
Table 1.6.1 Major Components
Remarks
(By manufacturer)
Recommended Optional Parts
(By manufacturer)
Part
Number
Name
U1
CPU
R4S76190W125BGV (Renesas)
S29GL032A90TFIR4 (Spansion)
EDS1216AATA-75E (Elpida)
S93C76AFT-V-G (SII)
U2
Flash memory
SDRAM
U3
U4
EEPROM
U5
PCMCIA power control IC
RS-232C driver
Bus switch
LTC1470CS8#PBF (Linear)
SP3222ECY (Sipex)
U6
U7,U8,U9
U10
U11,U15
U12,U16
U13
U14
X1
SN74CBTLV16210GR (TI)
SP3077EEN-L (Sipex)
RS-422 driver
Logic IC
TC7S08FU (TOSHIBA)
Regulator IC
Reset IC
LMS1587CSX-ADJ (NS)
(Renesas)
M51957BFP
Logic IC
SN74LVC14APWR (TI)
Oscillator
SG-8002JF_15.625 MHz (Epson)
Ceramic resonator
Oscillator
Optional
, 15.625 MHz
X2
CSTCE15M7 (Murata)
X3
SG-8002JF_25.000 MHz (Epson)
Optional
,
Serial port connector (Ch1)
(Hirose)
(Hirose)
J1
A2-2PA-2.54DSA
A2-4PA-2.54DSA
2-pin MIL standard connector
XM2C-0912-112 (OMRON)
Optional
Serial port connector (Ch2)
RS-422 serial connector
J2
J3
J4
J5
J6
J7
PC card connector
RJ-45 LAN connector
H-UDI connector
ICM-C68H-S112-400R1 (J.S.T.)
TLA-6T718 (TDK)
(Sumitomo 3M)
7614-6002
S2B-XH-A (J.S.T.)
Optional
Power supply connector
1.8 V External power supply
connector
,
A2-2PA-2.54DSA
(Hirose)
J8
2-pin MIL standard connector
Optional,
(OMRON)
J9,J11-J13 Expansion connector
XG4C-2031
XG4C-4031
20-pin MIL pitch connector
Optional,
(OMRON)
J10
Expansion connector
40-pin MIL pitch connector
HEC0470-01-630 (Hoshiden)
XG8V-0331 (OMRON)
J14
J15
AC adapter jack
3-pin connector
JP1-8
JP9
Jumper
HW-3P-G (MAC8)
Jumper
XG8V-0334 (OMRON)
Yellow, SML-311YT (ROHM)
Blue, UB1114C (STANLEY)
MS-12AAH1 (Nikkai)
LED1-4
LED5
SW1
SW2
SW3
SW4
SW5
SW6
User LED
Power LED
Power switch
Reset switch (MRES)
User DIP switch
Mode DIP switch
NMI switch
(OMRON)
(OMRON)
(OMRON)
(OMRON)
(OMRON)
B3SN-3012
A6S-4104-H
A6S-4101-H
B3SN-3012
B3SN-3012
IRQ0 switch
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1.7 M3A-HS19 Memory Mapping
1
1.7 M3A-HS19 Memory Mapping
Area 0 bus width: (Default)
Data alignment: (SW4-1)
MD3 = 0
•••16-bit
MD5 = 0(ON)
MD5 = 1(OFF)
•••Big endian
•••Little endian
Figure 1.7.1 show the memory mapping examples of the SH7619 on the M3A-HS19.
Logical Address [31~29]
Area
Cacheable/Non-cacheable
000~011
100~
P0
P1
P2
P3
P4
Cacheable
Cacheable
101~
Non cacheable
110~
Cacheable
111~
Non-cacheable (on-chip I/O) etc.
(P0 and shadow area (P1, P2, P3))
MAP = 0
Address [28~0]
Area
MAP = 1
H'0000 0000
Flash Memory (4 MB)
H’0000 0000~H’003F FFFF
Flash Memory (4 MB)
H’0000 0000~H’003F FFFF
Area 0
64 MB
User Area
User Area
H'0400 0000
H'0800 0000
H'0C00 0000
Reserved *
(Do not use)
Reserved *
(Do not use)
Area 1
64 MB
Reserved *
(Do not use)
Reserved *
(Do not use)
Area 2
64 MB
SDRAM (16 MB)
SDRAM (16 MB)
H’0C00 0000~H’0CFF FFFF
H’0C00 0000~H’0CFF FFFF
Area 3
64 MB
User Area
User Area
User Area
H'1000 0000
Area 4
64 MB
User Area
H'1400 0000
H'1600 0000
H'1800 0000
Reserved
(Do not use)
Area 5A
32 MB
User Area
PCMCIA
Area 5B
32 MB
User Area
Reserved
(Do not use)
Area 6A
32 MB
User Area
PCMCIA
Area 6B
32 MB
H'1A00 0000
H'1C00 0000
H'1FFF FFFF
User Area
Reserved *
(Do not use)
Reserved
(Do not use)
Area 7
64 MB
Note: H'0000 0000 to H'1FFF FFFF are the cache-enabled area.
Figure 1.7.1 SH7619 Memory Mapping Examples
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1.8 Absolute Maximum Ratings
1
1.8 Absolute Maximum Ratings
Table 1.8.1 lists the absolute maximum ratings.
Table 1.8.1 Absolute Maximum Ratings
Symbol
Parameter
Value
Remarks
5 V system power supply voltage
3.3 V system power supply voltage
Relative to VSS
Relative to VSS
Relative to VSS
VCC
-0.3 to 6.0 V
-0.3 to 3.8 V
-0.3 to 2.1 V
-5 to 55°C
3VCC
system power supply voltage
1.8VCC 1.8 V
Operating temperature
Storage temperature
No condensation, no corrosion gas allowed.
No condensation, no corrosion gas allowed.
Topr
Tstr
-10 to 60°C
Note: Temperature refers to the air temperature in the vicinity of the board.
1.9 Recommended Operating Conditions
Table 1.9.1 lists the recommended operating conditions.
Table 1.9.1 Recommended Operating Conditions
Symbol
Parameter
Value
Remarks
5 V power supply voltage
3.3 V power supply voltage
Relative to VSS
Relative to VSS
VCC
4.75 to 5.25 V
3.0 to 3.6 V
3VCC
(Always supplied by regulator)
Relative to VSS
1.8 V power supply voltage
1.8VCC
1.71 to 1.89 V
1 A max.
(Normally supplied by regulator)
Maximum current consumption
on the board
-
Operating temperature
0 to 50°C
No condensation, no corrosion gas allowed.
Topr
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1.8 Absolute Maximum Ratings
1
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Chapter2Features and Specifications
Chapter2
Features and Specifications
2-1
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Features and Specifications
2
2.1 Features
2.1 Features
Table 2.1.1 lists the functional modules.
Table 2.1.1 Functional Modules
SH7619, clock mode 1
Section
2.2
Features
Description
CPU
• Input (XIN) clock: 15.625 MHz
• Bus clock: 62.5 MHz, max.
• CPU clock: 125 MHz, max.
• U Memory (CPU)
2.3
Memories
• 16-KB memory
• Flash Memory
• S29GL032A90TFIR4: 1 (4 MB)
• SDRAM
• EDS1216AATA-75E: 1 (16 MB)
• EEPROM
• S-93C76AFT-V-G: 1 (8 KB, 512 x 16)
Connects SCIF2 of the SH7619 to a serial port connector
Connects PCMCIA control signal and bus of the SH7619 to the
PCMCIA connector
2.4
2.5
Serial Port Interface
PCMCIA Card Interface
2.6
2.7
2.8
2.9
2.10
2.11
2.12
-
LAN Port Interface
I/O Ports
Connects the SH7619 Ether I/O to an RJ-45 connector
Connects the SH7619 I/O port to an expansion connector
Controls the system power supply of the M3A-HS19
Controls the clock
Power Supply Circuit
Clock Module
Reset Module
Reset control of device mounted on the M3A-HS19
Connects to the NMI pin and IRQ0 pin
SH7619 H-UDI/AUD interface
Interrupt Switches
E10A-USB Interface
Operational specifications
Connectors, switches, jumpers, LEDs
• Expansion connector, H-UDI connector
• PCMCIA, ETHER, RS-232C connector
• Switches and LEDs
Refer to Chapter 3 for details
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Features and Specifications
2.2 CPU
2
2.2 CPU
2.2.1 SH7619
The M3A-HS19 CPU board includes the SH7619, the 32-bit RISC MCU operates with a maximum frequency of 125 MHz.
The SH7619 is equipped with an Ethernet controller that includes an IEEE802.3u compliant Media Access Controller and
a Physical Layer Transceiver. Moreover, the SH7619 has both a 16-KB U memory (RAM) and a 16-KB instruction/data
unified cache memory. These on-chip modules enable the SH7619 to be used in a wide range of applications from data
processing to control equipments.
The M3A-HS19 can be operated at a maximum frequency of 125 MHz (external bus: 62.5 MHz, max) using a 15.625 MHz
input clock. The dedicated clock of 25.000 MHz input from CK_PHY pin is used as an on-chip PHY clock.
Figure 2.2.1 shows the SH7619 pin assignments.
SH7619
PB13/BS#
"H"
"L"
"L"
"L"
MD0
MD1
RD#
RD/WR#
MD2
MD3
Mode
WE0#/DQMLL
WE1#/DQMLU/WE#
SW4-1 "H/L"
Bus Control
(All,FLASH
MD5
TESTMD#
TESTOUT#
PB05/WE2(BE2)#/DQMUL/ICIORD#
PB06/WE3(BE3)#/DQMUU/ICIOWR#
"H"
SDRAM,PCMCIA)
CS0#
15.625MHz
25.000MHz
PB12/CS3#
EXTAL
XTAL
CKI0
PB02/CKE
PB03/CAS#
PB04/RAS#
Clock
Bus Control
(SDRAM)
CK_PHY
PB10/CS5B#/CE1A#
PB09/CE2A#
RES#
NMI
PD0/IRQ0/-/TEND0
System
Control
Bus Control
(PCMCIA)
PB00/WAIT#
PB01/IOIS16#
PA25/A25/SIOFSYNCO
RXM
RXP
TXM
TXP
PA24/A24/TXD_SIO0
PA23/A23/RXD_SIO0
PA22/A22/SIOMCLK0
PA21/A21/SCK_SIO0
Ether
Interface
CPU
Address Bus
PA20/A20
PA19/A19
PA18/A18
PA17/A17
PA16/A16
A15-A0
PC00/MII_RXD0
PC01/MII_RXD1
PC02/MII_RXD2
PC03/MII_RXD3
EEPROM
Extension
Connector
16
16
PE08/HIFCS#
PE07/HIFRS
Lower
Data Bus
D15-D0
PE06/HIFWR#/SIOFSYNC0
PE05/HIFRD
PE03/HIFMD
PE24/HIFD15/CTS1/D31
PE23/HIFD14/RTS1/D30
PE22/HIFD13/CTS1/D29
PE21/HIFD12/RTS0/D28
PE20/HIFD11/SCK0/D27
PE19/HIFD10/RXD0/D26
PE18/HIFD09/TXD1/D25
PE17/HIFD08/SCK0/D24
PE16/HIFD07/RXD0/D23
PE15/HIFD06/TXD0/D22
PE14/HIFD05/-/D21
SW4-3
SW4-2
HIF
Interface
PE00/HIFEBL/SCK_SIO0
PE04/HIFINT#/TXD_SIO0
PE02/HIFDREQ/RXD_SIO0
PE01/HIFRDY/SIOMCLK0
RESET#
PC09/RX_ER
PC14/COL
PC15/CRS
PC20/WOL
HIF-D/Upper
Data bus
REG#
CD#
PCMCIA
Interface
Serial Channel 0
EN#
PE13/HIFD04/-/D20
PC08/RX_DV
PC10/RX_CLK
PC11/TX_ER
PC12/TX_EN
PC13/TX_CLK
PE12/HIFD03/-/D19
PE11/HIFD02/-/D18
PE10/HIFD01/-/D17
Other Extension
Bus Interface
PE09/HIFD00/-/D16
PD2/IRQ2/TXD1/DREQ0
PD3/IRQ3/RXD1/DACK0
PD5/IRQ5/TXD2/DREQ1
PD6/IRQ6/RXD2/DACK1
PC16/MDIO
PC17/MDC
SW3
User port
(Ether)
RS-422,RS-232C
Interface
PC18/LINKSTA
PC19/EXOUT
PC04/MII_TXD0/-/SPEED100#
PC05/MII_TXD1/-/LINK#
PC06/MII_TXD2/-/CRS#
ASEMD#
TRST#
TDO
LED
User port
(Ether)
H-UDI
Interface
PC07/MII_TXD3/-/DUPLEX#
TDI
TMS
TCK
EXRES1
TSTBUSA
Ether.ref
Figure 2.2.1 Pin Assignments by function
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Features and Specifications
2.3 Memory
2
2.3 Memory
The M3A-HS19 includes the SH7619 on-chip U memory, an external flash memory, external SDRAM and EEPROM.
Details are described below (Except the PC card).
2.3.1 SH7619 U Memory and Cache Memory
The SH7619 has
a
16-KB (RAM)
U
memory module (address: H’E55FC000~H’E55FFFFF) and a 16-KB
instruction/data-unified cache memory.
2.3.2 Flash Memory S29GL032A90TFIR4 (Standard component)
The M3A-HS19 comes standard with a flash memory listed in Table 2.3.1 to store a user program.
The flash memory is an external bus 16-bit mode fixed and operates at 3.3 V single. The write-protection of flash memory
can be enabled or disabled by DIP switches (SW4-4).
Figure 2.3.1 shows the Flash Memory Block Diagram. Table 2.3.2 lists setting examples of the bus state
controller(write/read) when the SH7619 bus clock operates at 62.5 MHz (clock mode 1), and Figure 2.3.2 shows read and
write access timing example.
Table 2.3.1 Flash Memory Specifications
Part Number
Bus Size
Capacity
Access Time
90 ns
S29GL032A90TFIR4
16-bit mode
4 MB (16 bits x 2 Mwords x 1)
S29GL032A90TFIR4 (U2)
(2 Mwords x 16 bits)
SH7619 (U1)
3.3 V
21
A21-A1
A20-A0
16
D15-D0
DQ15-DQ0
BYTE#
OE#
3.3 V
RD#
3.3 V
3.3 V
WE#
WE0#
CS0#
CE#
RESET#
Reset Signal
NC
RY/BY#
WP#
3.3 V
DIP Switch
(SW4-4)
Figure 2.3.1 Flash Memory Block Diagram
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Features and Specifications
2.3.2 Flash Memory S29GL032A90TFIR4 (Standard component)
2
Table 2.3.2 Setting Example of Bus State Controller (Flash Memory Write and Read)
User Area
CS0
Applicable Device
S29GL032A90TFIR4
Settings for Bus State Controller
CS0 Space Bus Control Register: CS0BCR
Initial value: H'36DB 0400 (MD3 = "L")
Recommended value: H'1000 0400
•
Idle Cycles between Write-Read Cycles and
Write-Write Cycles
IWW[1:0] = B'01: 1 idle cycle inserted
• Data bus width
BSZ[1:0] = B’10: *Shall be ignored.
CS0 space wait control register: CS0WCR
Initial value: H'0000 0500
Recommended value: H'0000 0AC1
• Number of Delay Cycles from address, CS0#
Assertion to RD#, WEn#
SW[1:0] = B'01; 1.5 cycles
• Number of Access Wait Cycles
WR[3:0] = B'0101; 5 cycles
• Ignore external WAIT input
WM = B’1;
• Number of Delay Cycles from RD#, WEn# negation
to address, CS0# negation
HW[1:0] = B'01; 1.5 cycles
<Write/Read Timing>
Write1
Write2
Tw 3
Read1
Th
T1
Tw 1
Tw 2
Tw 3
Tw 4
Tw 5
T2
Tf
Taw 1
Th
T1
Tw 1
Tw 2
Tw 4
Tw 5
T2
Tf
Taw 1
Th
T1
Tw 1
Tw 2
Tw 3
Tw 4
Tw 5
T2
Tf
CKIO
tWC
tAD1
tAD1
tAD1
tAD1
tAD1
tAD1
tRC
A21-A1
tCSD1
tCSD1
tCSD1
tCSD1
tCSD1
tCSD1
CS0#
RD#
tRSD
tRSD
tWED1
tWED1
tCH
tWED1
tWED1
tCH
tCS
tAS
tAH
tAH
tWP
tWPH
tWP
tOEH
WE0#
ta(OE)
tDF(CE)
tDS
tWDD1
ta(AD)
ta(CE1)
tRDH1
tDF(OE)
tWDD1
tDH tWDH1
tDS
tDH tWDH1
tRDS1
DATA
D15-D0
DATA
DATA
Figure 2.3.2 Flash Memory Read and Write Access Timing Example
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Features and Specifications
2.3.3 External Synchronous DRAM
2
2.3.3 External Synchronous DRAM (SDRAM)
The M3A-HS19 is provided with a 16-MB synchronous DRAM (SDRAM) as an external main memory. The SDRAM is
controlled by the SH7619 on-chip bus state controller. The SDRAM is accessed in 16-bit bus.
Table 2.3.3 lists SDRAM specifications used on the M3A-HS19, and Figure 2.3.3 shows its block diagram.
Table 2.3.3 SDRAM Specifications
Items
Part Number
Description
EDS1216AATA-75E
16 MB (16-bit bus width) x 1
16 MB
Configuration
Capacity
Access Time
CAS Latency
Refresh Interval
Row Address
Column Address
Number of Banks
5.4 ns
2 (at 62.5 MHz bus clock)
4,096 refresh cycles in every 64 ms
A11- A0
A8 - A0
4-banks controlled by BA0, BA1
3.3V
EDS1216AATA-75(U3)
(2 Mx 16 bits x 4-bank)
SH7619(U1)
A14-13
2
BA1-0
A11-0
CS#
11
A12-1
CS3#
CKIO
CLK
CKE
RD/WR#
RAS#
CKE
WE#
RAS#
CAS#
CAS#
DQMLU
DQMLL
DQMU
DQML
16
D15-0
DQ15-DQ0
x 16
Figure 2.3.3 External SDRAM Block Diagram
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Features and Specifications
2.3.3 External Synchronous DRAM
2
A power-on sequence is required to use a SDRAM. Power-on sequence is to initialize the pin function controller (PFC),
set registers in the bus state controller and write data in the SDRAM mode register.
Table 2.3.4 lists the access address when writing in the SDRAM mode register on the CS3 space.
Table 2.3.4 Access Address for SDRAM Mode Register Write (CS3 Space)
Burst read/single write (burst length 1)
Burst read/burst write (burst length 1)
Data bus
width
CAS
latency
Access Address
H'F8FD 5440
External Address Pin
H'0000 0440
Access Address
H'F8FD 5040
External Address Pin
H'0000 0040
16 bits
2
Execute following settings to the M3A-HS19 SDRAM mode register.
• Burst length: Burst read/single write (burst length 1)
• Wrap type: Sequential
• CAS latency: 2 cycles
To write data in the SDRAM mode register as shown in Table 2.3.4, write the arbitrary data in words to the address of
H'F8FD 5440 (the data in this case is ignored). Following commands are sequentially issued to the SDRAM by the word
writing.
1.All banks precharge command (PALL)
Idle cycles (Tpw), of which number is specified by bits WTRP1 and WTRP0 in CS3WCR, are inserted between the PALL
and the first REF commands.
2. Auto-refreshing command (REF) for eight times
Idle cycles (Trc), of which number is specified by bits WTRP1 and WTRP0 in CS3WCR are inserted after issuing REF
command
3. Mode register write command (MRS)
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Features and Specifications
2.3.3 External Synchronous DRAM
2
Figure 2.3.4 shows a timing example of SDRAM mode register writing.
tRP
tRC
Trc
Tmw
MRS
Trr
Trc
Tnop
Tp
Tpw
Trr
Trc
Trc
Trr
Trc
Trc
CKIO
REF command is issued 8 times
SDRAM
Command
PALL
DESL
REF
DESL
DESL
DESL
DESL
DESL
REF
DESL
REF
DESL
A11-A1(A9-A0)
A12(A10/AP)
CS3#
RASL#
CASL#
RD/WR#
DQMUU-LL
D15-0
(High)
Hi-Z
[Symbols Descriptions]
PALL
: All bank precharge command
REF : Auto-refreshing command
MRS : Mode register write commamd
DESL : Deselect command
Figure 2.3.4 Timing Example of SDRAM Mode Register Writing
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Features and Specifications
2.3.3 External Synchronous DRAM
2
Table2.3.5 lists setting examples of the bus state controller with SH7619 bus clock at 62.5 MHz.
Figure 2.3.5 shows the SDRAM single read/write timing example.
Table2.3.5 Setting Example of Bus State Controller (SDRAM Read/Write)
User Area
CS3
Applicable Device
Settings for Bus State Controller
CS3 Space Bus Control Register: CS3BCR
EDS1216AATA-75E
Initial value: H'36DB 0600
Recommended value: H'0000 4400 (in 16-bit bus width)
• Memory specification
TYPE[3:0] = B'0100; SDRAM
• Data bus specification
BSZ[1:0] = B'10; 16-bit bus width
CS3 Space Wait Control Register: CS3WCR
Initial value: H'0000 0500, recommended value: H'0000 2892
• Wait Cycle Number for Precharge Completion
WTRP[1:0] = B'01; 1 cycle
• Wait Cycle Number from ACTV command to READA WRITA
command
WTRCD[1:0] = B'10; 2 cycles
• Cas Latency for Area 3
A3CL[1:0] = B'01; 2 cycles
• Wait Cycle Number for Precharge Start Wait
TRWL[1:0] = B'10; 2 cycles
•
Idle Cycle Number from REF/Self-Refreshing Release to
ACTV/REF/MRS Command
WTRC[1:0] = B'10; 5 cycles
SDRAM Control Register: SDCR
Initial value: H'0000 0000,
Recommended value: H'0000 0809
• Refresh Control
RFSH = B'1; Refreshing is performed
• Refresh Control
RMODE = B'0; Auto-Refreshing is not performed
• Bank active mode
BACTV = B'0; Auto-precharge mode
• Number of Bits of Row Address for Area 3
A3ROW[1:0] = B'01; 12 bits
• Number of Bits of Column Address for Area 3
A3COL[1:0] = B'01; 9 bits
Refresh Timer Control / Status Register: RTCSR
Initial value: H'0000 0000,
Recommended value: H'A55A 0010
• Clock Select
CKS[2:0] = B'010; Bφ/16
• Refresh Count
RRC[2:0] = B'000 ; Once
Refresh Time Constant Register: RTCOR
Initial value: H'0000 0000,
Recommended value: H'A55A 003D
*The refresh request interval when clock select is set to Bφ/16 is as
follows.
1 cycle: 256 nsec (62.5 MHz/16 = 3.90625 MHz)
Refresh request interval in this SDRAM: 15.625 μsec/time
15.625 usec/256 nsec = 61 (0x3D) cycles/refresh counts
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Features and Specifications
2.3.3 External Synchronous DRAM
2
SDRAM SINGLE READ
SDRAM SINGLE WRITE
tRC
tRC
tRAS
tRP
tRAS
tRCD
tRP
tDPL
tDAL
ACT
Tr
READA
ACT
Tr
WRITEA
Tc1
ACT
Tr
Trw1
Tc1
Tcw
Td1
Tde
Tap
Trw1
Trwl1
Trwl2
Tap
CKIO
CKE
tSI
tSI
tHI
tHI
tCSD1
tCSD1
tCSD1
tCSD1
CS3#
RAS#
CAS#
tRASD1
tHI
tSI
tRASD1
tRASD1
tRASD1
tHI
tSI
tCASD1
tCASD1
tRWD1
tCASD1
tCASD1
tRWD1
RD/WR#
DQMUU-LL
tDQMD1
tDQMD1
tDQMD1
tDQMD1
tAD1
tAD1
tAD1
tAD1
tAD1
tAD1
tAD1
tAD1
tAD1
tAD1
tAD1
tAD1
tAD1
tAD1
tAD1
tAD1
tAD1
tAD1
A11-A1(A9-A0)
A12(A10/AP)
A14,A13(BA1,0)
tRDS2
tRDH2
tOH
tOHZ
tHI
tSI
tWDD2
tWDH2
tLZ
tAC
D15-0
Data
Figure 2.3.5 SDRAM Single Read/Write Timing
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Features and Specifications
2.3.4 External EEPROM
2
2.3.4 External EEPROM
The M3A-HS19 is provided with an EEPROM for storing MAC address.
Access to the EEPROM is enabled by using the SH7261 I/O ports (PC03, PC02, PC01 and PC00). A MAC address
consists of 48-bit numbers.
Table 2.3.6 lists instruction sets, and Figure 2.3.6 shows the block diagram of CPU and EEPROM connection.
Figure 2.3.7 shows the EEPROM-AC timing and Figure 2.3.8 shows EEPROM-read/write timing.
Settings for following instruction sets are not required;
-
-
A7 to A0 for WRAL, ERAL, EWEN, and EWDS instructions
Data for ERASE, ERAL, EWEN and EWDS instructions
Table 2.3.6 Instruction Sets (S-93C76AFT)
Start Bit
Operation
Code
Address
Data
Command
SK
1
1
1
1
1
1
1
1
2
1
0
1
0
0
0
0
3
0
1
1
0
0
0
0
4
-
5
6~13
14~29
READ
A8
A8
A8
1
A7~A0
D15~D0 (OUT)
WRITE
ERASE
WRAL
ERAL
-
A7~A0
D15~D0 (IN)
-
A7~A0
-
0
1
1
0
-
-
-
-
D15~D0(IN)
0
-
-
-
EWEN
EWDS
1
0
3.3 V
SH7619 (U1)
EEPROM
S-93C76AFT(U4)
PC03/MII_RXD3
PC02/MII_RXD2
PC01/MII_RXD1
PC00/MII_RXD0
CS
SK TEST
DI
DO
Vcc
NC
GND
Figure 2.3.6 CPU and EEPROM Connection
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Features and Specifications
2.3.4 External EEPROM
2
AC characteristics
SK
Clock pulse width
1 μsec
or more
0 sec or more
1 μsec or more
Writing
Enabled Data
CS
DI
Deselect
CS setup
400 nsec or more
200 nsec or more
Setup
200 nsec or more
Hold
200 nsec or more
Hi-Z
Hi-Z
DO
Output disabled time
Within 500 nsec
Within
800 nsec
Within 800 nsec
Output delay time
Output Enabled Data
Figure 2.3.7 EEPROM-AC Timing
READ
Dummy SK
SK
3
4
5
6
11 12 13 14 15 16
27 28 29 30 31 32
44 45 46 47 48
43
1
2
7
8
9
10
CS
DI
Setting Address
A7
A6
A
3
A2
A8
A5
A
4
A
1
A0
"x"
"0"
"1" "1" "0" "x"
Hi-Z
Hi-Z
D15 D14 D13
"0"
D2 D1 D0 D15 D14 D13
D15 D14 D13
D2 D1 D0
DO
(Settiing Adddress))Data0
(Setting Address+1)Data1 (Setting Address+2)Data2
WRITE
SK
Dummy SK
1
2
3
4
5
6
11 12 13 14 15 16
27 28 29 30 31 32
Verify
7
8
9
10
Standby
CS
DI
Writing Instruction, Address, Writing Data Input
A7 A6
A3 A2
A1 A0 D15 D14 D13
A8
A5 A4
"0"
"1" "0" "1" "x"
D2 D1 D0
Hi-Z
Hi-Z
"0"
Start writing
"1"
End of writing
DO
Figure 2.3.8 EEPROM-Read/Write Timing
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Features and Specifications
2.4 Serial Port Interface
2
2.4 Serial Port Interface
The SH7619 MCU mounted on the M3A-HS19 is provided with a 3 channel’s of the Serial Communication Interface with
FIFO (SCIF).
SCIF channel 0 is connected to the 2-pin serial port connector, SCIF channel 2 is connected to the D-sub 9-pin serial port
connector, and SCIF channel 1 is connected to the 4-pin serial port connector.
Figure 2.4.1 shows the block diagram of the serial port interface.
Figure 2.4.1 Serial Port Interface
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Features and Specifications
2.5 PCMCIA Card Interface
2
2.5 PCMCIA Card Interface
The SH7619 MCU mounted on the M3A-HS19 is compliant with the JEIDA 4.2 (PCMCIA2.1 Rev.2.1). However, only
3.3 V interface PC card is supported. An on-chip bus state controller (BSC) and a PFC control the PC card.
High byte and low byte of the data is switched at the bus switch on the M3A-HS19. When the byte order of the SH7619 is
big-endian, the order of the PC card connector is little-endian (IOIS16#: ”L”).
The M3A-HS19 is provided with a PCMCIA card slot in area 5, allowing both IC memory card and I/O card to be mounted.
Figure 2.5.1 shows the block diagram of PCMCIA card interface.
SH7619 (U1)
PC card connector (J4)
20-bit bus switch
1B[9:0]
1A[9:0]
10
6
10
6
D7-D0, D15, D14
D13-D8
D15-D6
D5-D0
2B[9:0]
2A[9:0]
1OE#
2OE#
20-bit bus switch
1B[9:0]
1A[9:0]
10
10
10
10
A25-A16
A15-A6
A25-A16
A15-A6
A5-A0
2B[9:0]
2A[9:0]
A5-A0
1OE#
2OE#
6
6
RESET
CE1#
PC09/RX_ER(GPIO)
CE2A#
20-bit bus switch
CE2#
REG#
CE1A#
PC14/COL
1B[9:0]
1A[9:0]
10
8
4
4
4
4
2B[9:0]
2A[9:0]
RD#
WE#
PB05/ICIORD#
PB06/ICIOWR#
OE#
WE#
IORD#
IOWR#
CD1#
3.3 V
x3
1OE#
2OE#
4
PC15/CRS
PB0/WAIT#
PB1/IOIS16#
PD7/IRQ7
CD2#
WAIT#
IOIS16#
IREQ#
2
PCVCC
JP2
JP1
PC20/WOL
PB13/BS#
5.0 V
3.3 V
x5
VS1#
VS2#
INPACK#
SPKR#
STSCHG#
PCMCIA
Power supply
circuit
PCVCC
VCC
Figure 2.5.1 PCMCIA Card Interface
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Features and Specifications
2.6 LAN Port Interface
2
2.6 LAN Port Interface
An IEEE 802.3 compliant (MAC layer) Ethernet controller and an IEEE802.3/802.3u compliant (10/100 Mbps Ethernet
PHY) physical layer transceiver are embedded in the SH7619 MCU.
Figure 2.6.1 shows the block diagram of LAN port interface.
3.3 V
SH7619 (U1)
LED4
LED1
LED2
LED3
Yellow
Yellow Yellow Yellow
SPEED100#
LINK#
CRS#
3.3 VA
DUPLEX#
RJ-45 (J5)
(MII)
1
2
3
4
5
6
TxP
TxM
TX +
TX −
ETC
PHY
TCT
RX +
RX −
RCT
RxP
RxM
EXRES1
7
8
TSTBUSA
12.4 K(1%)
CK_PHY
25.000 MHz-OSC
3 VAGND
MII-compliant signal
Figure 2.6.1 LAN Port Interface
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Features and Specifications
2.7 I/O Port
2
2.7 I/O Port
Following I/O ports on the M3A-HS19 can be configured by the SH7619 MCU. These ports are multiplexed pins with up to
four features. Some pins have several initial features for normal mode and HIF (Host Interface) boot mode. Features can
be controlled by PFC (pin function controller).
• PA16 - PA25
• PB00 - PB13
• PC00 - PC20
• PD0 - PD7
• PE00 - PE24
The M3A-HS19 is connected with a memory, expansion connectors, a PCMCIA connector, a LAN connector, an RS-232C
connector, an RS-422 connector and other control ICs. Some I/O ports are connected to DIP switches and LEDs, which
can be used in the port mode as intended use. LED shows status in the PHY mode.
Table 2.7.1 lists Mode DIP Switch (SW4) Features. The state will be loaded when the board is reset and started.
Table 2.7.1 Mode DIP Switch (SW4) Features
Description
SW4-No.
1
2
3
4
ON: Big-endian
OFF: Little-endian
ON: Host interface (HIF) is NOT operating OFF: Host interface (HIF) is operating
ON: Normal boot mode
OFF: HIF boot mode
OFF: Write-enabled
ON: Flash ROM is write-protected
Figure 2.7.1 shows the block diagram of I/O port connections to switches and LEDs.
Table 2.7.2 and Table 2.7.3 list I/O port features.
Figure 2.7.1 I/O Port Connection to Switches and LEDs
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Features and Specifications
2.7 I/O Port
2
Table 2.7.2 I/O Port Features (1/2)
Signal Name and Connection (M3A-HS19)
Port Name
(SH7619)
PA16~PA20
PA21
PA22
PA23
PA24
PA25
PB0
A16~A20: Flash ROM, PCMCIA, expansion connector
A21/SCK_SIO0: Flash ROM, PCMCIA, expansion connector
A22/SIOMCLK0: Flash ROM, PCMCIA, expansion connector
A23/RxD_SIO0: Flash ROM, PCMCIA, expansion connector
A24/TxD_SIO0: PCMCIA, expansion connector
A25/SIOFSYNC0: PCMCIA, expansion connector
WAIT#: PCMCIA
PB1
IOIS16#: PCMCIA
PB2
CKE: SDRAM
PB3
CAS#: SDRAM
PB4
RAS#: SDRAM
PB5
WE2#/DQMUL/ICIORD#: PCMCIA, expansion connector
WE3#/DQMUU/ICIOWR#: PCMCIA, expansion connector
CE2B#: Expansion connector
PB6
PB7
PB8
CS6B#/CE1B#: Expansion connector
CE2A#: PCMCIA
PB9
PB10
PB11
PB12
PB13
PC0~PC3
PC4
CS5B#/CE1A#: PCMCIA
CS4#: Expansion connector
CS3#: SDRAM, expansion connector
BS#: PCMCIA-PW control, expansion connector
MII_RxD0~MII_RxD3: EEPROM, expansion connector
MII_TxD0/SPEED100#: LED1
MII_TxD1/LINK#: LED2
PC5
PC6
MII_TxD2/CRS#: LED3
PC7
MII_TxD3/DUPLEX#: LED4
PC8
RX_DV: Expansion connector
PC9
RX_ER: PCMCIA
PC10
PC11
PC12
PC13
PC14
PC15
PC16
PC17
PC18
PC19
PC20
PD0
RX_CLK: Expansion connector
TX_ER: Expansion connector
TX_EN: Expansion connector
TX_CLK: Expansion connector
COL: PCMCIA
CRS: PCMCIA, expansion connector
MDIO: SW3-1 (Port IN)
MDC: SW3-2 (Port IN)
LNKSTA: SW3-3 (Port IN)
EXOUT: SW3-4 (Port IN)
WOL: PCMCIA (Bus DIR) , expansion connector
IRQ0/TEND0: SW6(IRQ0)
PD1
IRQ1/TEND1: Expansion connector
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Features and Specifications
2.7 I/O Port
2
Table 2.7.3 I/O Port Features (2/2)
Signal Name and Connection (M3A-HS19)
Port Name
(SH7619)
PD2
PD3
IRQ2/TxD1/DREQ0: RS-422
IRQ3/RxD1/DACK0: RS-422
PD4
IRQ4/SCK1: Expansion connector
PD5
IRQ5/TxD2/DREQ1: RS-232C
PD6
IRQ6/RxD2/DACK1: RS-232C
PD7
IRQ7/SCK2: PCMCIA, expansion connector
HIFEBL/SCK_SIO0: SW4-2, expansion connector
HIFRDY/SIOMCLK0: Expansion connector
HIFDREQ/RxD_SIO0: Expansion connector
HIFMD: SW4-3
PE0
PE1
PE2
PE3
PE4
HIFINT#/TxD_SIO0: Expansion connector
HIFRD#: Expansion connector
PE5
PE6
HIFWR#/SIOFSYNC: Expansion connector
HIFRS: Expansion connector
PE7
PE8
HIFCS#: Expansion connector
PE9~PE14
PE15
PE16
PE17
PE18
PE19
PE20
PE21
PE22
PE23
PE24
HIFD0~HIFD5/D16~D21: Expansion connector
HIFD6/TxD0/D22: Expansion connector, 3-wire RS-232C
HIFD7/RxD0/D23: Expansion connector, 3-wire RS-232C
HIFD8/SCK0/D24: Expansion connector
HIFD9/TxD1/D25: Expansion connector
HIFD10/RxD1/D26: Expansion connector
HIFD11/SCK1/D27: Expansion connector
HIFD12/RTS0/D28: Expansion connector
HIFD13/CTS0/D29: Expansion connector
HIFD14/RTS1/D30: Expansion connector
HIFD15/CTS1/D31: Expansion connector
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Features and Specifications
2.8 Power Supply Circuit
2
2.8 Power Supply Circuit
The main power supply input 5 V DC to the M3A-HS19 and it generates 3.3 V and 1.8 V using a regulator.
It is an adjustable output voltage regulator to generate a desired voltage by changing resistance values.
A through-hole is provided with the M3A-HS19 to input 1.8 V DC from an external power supply. The PC card power
supply is controlled by software.
Figure 2.8.1 shows the schematic diagram of the power supply circuit.
5 V
Expansion connector (J12)
1
2
Flash
memory
(U2)
Other
logic IC
SDRAM
(U3)
Expansion connector
(J10)
Regulator (U12)
5 V-IN
(J7)
SW1
5 V
1
2
3.3 V
EN1
JP1
SH7619
(U1)
PB13/BS#
Regulator (U16)
GND
JP3
5 V
1.8 V-IN
(J8)
EN0
1.8 V
LTC1470
(U5)
PCMCIA connector
(J4)
1
2
GND
Figure 2.8.1 Power Supply Circuit
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Features and Specifications
2.9 Clock Module
2
2.9 Clock Module
The clock module on the M3A-HS19 consists of following three blocks;
• A block connecting X1 (oscillator) output to SH7619 EXTAL
• A block connecting X2 (ceramic resonator) to EXTAL and XTAL (Optional)
• A block connecting X3 (oscillator) to CK-PHY
An on-chip oscillator (15.625 MHz) is connected to the SH7619 MCU to provide an operating clock. Another on-chip
oscillator (25.000 MHz) is also connected to the MCU to provide clock to physical layer. Bus clock output is connected to
a SDRAM and expansion connectors via damping resisters respectively.
Figure 2.9.1 shows the block diagram of clock module.
* : To mount a ceramic resonator,remove the resistance R13 and mount the resistance R14.
:Optional
SH7619(U1)
R98
R13
EXCLK expansion
connector(J10-36)
CLK
CKIO
EXTAL
XTAL
R14
R117
Oscillator(X1)
15.625MHz
CLK SDRAM(U3)
Ceramic
resonator*(X2)
Optional
CSTCE-G15M7
(Murata)
R18
CLK
CK-PHY
Oscillator(X3)
25.000MHz
Figure 2.9.1 Clock Module
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Features and Specifications
2.10 Reset Module
2
2.10 Reset Module
Reset module controls reset signals connected to the SH7619 MCU, a flash memory and connectors. Software controls to
reset PCMCIA connector.
Figure 2.10.1 shows the schematic diagram of resets.
H-UDI connector
RESET#
Reset IC output delay time: td = 0.34×Cd(pF)µsec = 34 ms
Ra+Rb
Rb
Expansion connector
RESET#
Reset IC output detect voltage: Vs = 1.25×
= 2.5 V
)
)
3.3 V
Flash memory
RESET#
3.3 V
*Open collector output
Reset IC
M51957BFP(U13)
LVC14(U14)
Ra
10
10
K
K
Ω
SH7619
RES#
*
Input
Output
100 Ω
Delay capacitor
PC09/RX_ER
PC20/WOL
Rb
Ω
S08(U15)
RESET_IN(J9-1)
SW2
Reset switch
Cd
0.1 µF
RESET
PCMCIA(J4)
JP2
1OE#
2OE#
Bus switch (U9)
Figure 2.10.1 M3A-HS19 Reset System
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Features and Specifications
2.11 Interrupt Switch
2
2.11 Interrupt Switch
Push-button switches are connected to the SH7619 NMI pin and IRQ0 pin.
Interrupts are connected to IRQ7 from an expansion connector and a PCMCIA connector.
Figure 2.11.1 shows the schematic diagram of interrupts.
3.3 V
SH7619 (U1)
NMI
SW 5
LVC14(U14)
NMI switch
3.3 V
PD0/IRQ0/-/TEND0
SW 6
IRQ0 switch
LVC14(U14)
PC20/WOL
16
PD7/IRQ7/SCK2
IREQ#
PCMCIA(J4)
JP2
1OE#
2OE#
Expansion connector (J11)
R106
Bus switch (U9)
18
Figure 2.11.1 Interrupts
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Features and Specifications
2.12 E10A-USB Interface
2
2.12 E10A-USB Interface
The M3A-HS19 is provided with a 14-pin H-UDI connector to embed the E10A-USB emulator.
Figure 2.12.1 shows the block diagram of the E10A-USB interface.
3.3 V
3.3 V
H-UDI connector (J6)
SH7619 (U1)
11
UVCC
TCK
TCK
1
8
NC
TRST#
TDO
TRST#
TDO
3
4
10
GND
GND
NC
12
13
14
5
6
TMS
TDI
TMS
TDI
GND
GND
9
7
(GND)
RES#
ASEMD#
RES#
Reset
Figure 2.12.1 E10A-USB Interface
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Features and Specifications
2.12 E10A-USB Interface
2
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Chapter3Operational Specifications
Chapter3
Operational Specifications
3-1
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Operational Specifications
3.1 M3A-HS19 Connector
3
3.1 M3A-HS19 Connectors
Figure 3.1.1 shows the connector assignments on the M3A-HS19.
Top view of the component side
J6
J7
H-UDI
connector
Power
supply
connector
J1
RS-232C (ch1)
serial connector
(optional)
J14
AC adapter
jack
J2
J15
RS-232C (ch2)
serial connector
GND pin
for test
J8
1.8 V External
power supply
connector (optional)
J3
RS-422
serial
connector
(optional)
J5
RJ-45 LAN
connector
Top view of the solder side
J4
PC card
connector
J10, J12
Expansion
connectors
J9, J11, J13
Expansion
connectors
Figure 3.1.1 M3A-HS19 Connector Assignments
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Operational Specifications
3.1.1 UART Connector Pin (J1)
3
3.1.1 UART Connector Pin (J1)
The M3A-HS19 is provided with an UART connector pin (J1).
Figure 3.1.2 shows the pin assignment for the UART connector (J1).
Top view of the component side
1
2
J1
UART
Board Edge
Figure 3.1.2 Pin assignment for UART Connector (J1)
Table 3.1.1 lists the pin assignment for the UART connector (J1).
Table 3.1.1 Pin assignment for UART Connector (J1)
Pin no.
1
Signal Name
RXD (PE16/HIFD07/RXD0/D23)
Pin no.
2
Signal Name
TXD (PE15/HIFD06/TXD0/D22)
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Operational Specifications
3.1.2 UART Connector (J2)
3
3.1.2 UART Connector (J2)
The M3A-HS19 is provided with an UART connector (J2).
Figure 3.1.3 shows the pin assignment for the UART connector (J2).
1
6
5
9
Top view of the
component side
Board edge
J2
1
6
5
9
Board edge
Side view
Figure 3.1.3 Pin assignment for UART Connector (J2)
Table 3.1.2 lists the pin assignment for the UART connector (J2).
Table 3.1.2 Pin assignment for UART Connector (J2)
Pin no.
Signal Name
Pin no.
Signal Name
1
2
3
4
5
NC
6
7
8
9
DSR#
RTS#
CTS#
NC
RXD (PD6/IRQ6/RXD2/DACK1)
TXD (PD5/IRQ5/TXD2/DREQ1)
DTR#
GND
Pins 4-6 and 7-8 are loopback-connected, respectively.
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Operational Specifications
3.1.3 RS-422 Connector Pin (J3)
3
3.1.3 RS-422 Connector Pin (J3)
The M3A-HS19 is provided with an RS-422 connector pin (J3).
Figure 3.1.4 shows the pin assignment for the RS-422 connector pin (J3).
Top view of the
solder side
Top view of the
component side
J3
1
2
3
1
2
RS-422
3
4
4
Board edge
Board edge
Figure 3.1.4 Pin assignment for RS-422 Connector Pin (J3)
Table 3.1.3 lists the pin assignment for the RS-422 connector pin (J3).
Table 3.1.3 Pin assignment for RS-422 Connector Pin (J3)
Pin no.
Signal Name
Pin no.
Signal Name
1
2
RXD-a (PD3/IRQ3/RXD1/DACK0)
RXD-b (PD3/IRQ3/RXD1/DACK0)
3
4
TXD-z (PD2/IRQ23/TXD1/DREQ0)
TXD-y (PD2/IRQ23/TXD1/DREQ0)
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Operational Specifications
3.1.4 PCMCIA Connector (J4)
3
3.1.4 PCMCIA Connector (J4)
The M3A-HS19 is provided with a PCMCIA connector (J4).
Figure 3.1.5 shows the pin assignment for the PCMCIA connector (J4).
Top view of
the solder side
34
68
35
1
J4
3.3V PCMCIA ONLY
Board Edge
Figure 3.1.5 Pin assignment for PCMCIA Connector (J4)
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Operational Specifications
3.1.4 PCMCIA Connector (J4)
3
Table 3.1.4 lists the pin assignment for the PCMCIA connector (J4).
Table 3.1.4 Pin assignment for PCMCIA Connector (J4)
Signal Name Pin no. Signal Name
35
Pin no.
1
GND
D3
GND
2
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
CD1# (PC15/CRS)
3
D4
D11
4
D5
D12
5
D6
D13
6
D7
D14
7
CE1# (CE2A#)
D15
8
A10
CE2# (CE1A#)
9
OE# (RD#)
VS1# (Pulled up to the PCMCIA power supply)
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
A11
IORD# (PB05/WE2#/DQMUL/ICIORD#)
A9
IOWR# (PB06/WE3#/DQMUU/ICIOWR#)
A8
A17
A13
A18
A14
A19
WE# (WE1#/DQMLU/WE#)
A20
IREQ# (PD7/IRQ7/SCK2)
A21
VCC
VPP1
A16
A15
A12
A7
VCC
VPP2
A22
A23
A24
A25
A6
VS2# (Pulled up to the PCMCIA power supply)
A5
RESET (PC09/RX_ER)
A4
WAIT# (PB00/WAIT#)
A3
INPACK# (Pulled up to the PCMCIA power supply)
A2
REG# (PC14/COL)
A1
SPKR# (Pulled up to the PCMCIA power supply)
A0
STSCHG# (Pulled up to the PCMCIA power supply)
D0
D8
D1
D9
D2
D10
IOIS16#
GND
CD2# (PC15/CRS)
GND
(PB01/IOIS16#)
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Operational Specifications
3.1.5 LAN Connector (J5)
3
3.1.5 LAN Connector (J5)
The M3A-HS19 is provided with a LAN connector (J5).
Figure 3.1.6 shows the pin assignment for the LAN connector (J5).
Top view of the
component side
Top view of
the solder side
J5
8
6
4
2
8
6
7
5
3
7
5
4
3
2
1
1
Board Edge
Board Edge
Figure 3.1.6 Pin assignment for LAN Connector (J5)
Table 3.1.5 lists the pin assignment for the LAN connector (J5).
Table 3.1.5 Pin assignment for LAN Connector (J5)
Pin no.
Signal Name
Pin no.
Signal Name
1
2
3
4
TD+
TD-
5
6
7
8
RD-
RCT
NC
TCT
RD+
NC
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Operational Specifications
3.1.6 H-UDI Connector (J6)
3
3.1.6 H-UDI Connector (J6)
The M3A-HS19 is provided with an H-UDI (J6) connector to connect the E10A-USB emulator.
Figure 3.1.7 shows the pin assignment for the H-UDI connector (J6).
Top view the
component side
J6
1 8
7 14
H-UDI
Figure 3.1.7 Pin assignment for H-UDI Connector (J6)
Table 3.1.6 lists the pin assignment for the H-UDI connector (J6).
Table 3.1.6 Pin assignment for H-UDI Connector (J6)
Pin no.
Signal Name
Pin no.
8
Signal Name
1
2
3
4
5
6
7
TCK
N.C.
9
TRST#
TDO
(GND) ASEMD#
GND
10
11
N.C.
UVCC
GND
12
13
14
TMS
TDI
GND
RESET#
GND
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Operational Specifications
3.1.7 Power Supply Connector (J7)
3
3.1.7 Power Supply Connector (J7)
The M3A-HS19 is provided with a connector for power supply.
Figure 3.1.8 shows the pin assignment for the power supply connector (J7).
Top view of the
component side
Board Edge
J7
Board Edge
Side view
Figure 3.1.8 Pin assignment for Power Supply Connector (J7)
Table 3.1.7 lists the pin assignment for the power supply connector (J7).
Table 3.1.7 Pin assignment for Power Supply Connector (J7)
Pin no.
1
Signal Name
Pin no.
2
Signal Name
+5 V
GND
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Operational Specifications
3.1.8 External Power Supply Connector (J8)
3
3.1.8 External Power Supply Connector (J8)
The M3A-HS19 is provided with a through-hole for the SH7619 external power supply connector (J8: Supplies 1.8 V).
Figure 3.1.9 shows the pin assignment for the external power supply connector (J8).
Top view of
the solder side
Top view of the
component side
1
2
1
2
J8
Board Edge
Board Edge
Figure 3.1.9 Pin assignment for External Power Supply Connector (J8)
Table 3.1.8 lists the pin assignment for the external power supply connector (J8).
Table 3.1.8 Pin assignment for External Power Supply Connector (J8)
Pin no.
1
Signal Name
Pin no.
2
Signal Name
+1.8 V
GND
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Operational Specifications
3.1.9 Expansion Connectors (J9-J13)
3
3.1.9 Expansion Connectors (J9-J13)
The M3A-HS19 is provided with through-holes for expansion connectors. The Through-holes are connected to the
SH7619 I/O pins. Expansion connectors (J9 - J13) can be connected to the MIL STD connector to mount expansion
boards or to monitor the SH7619 bus signals.
Figure 3.1.10 shows the pin assignment for expansion connectors.
Figure 3.1.10 Pin assignment for Expansion Connectors
Table 3.1.9 lists the pin assignment for the expansion connector (J9).
Table 3.1.9 Pin assignment for Expansion Connector (J9)
Pin no.
Signal Name
Pin no.
2
Signal Name
1
3
PB00/WAIT#
RESET_IN#
PB13/BS#
4
PA25/SIOFSYNC0
5
6
PC01/MII_RXD1
PC00/MII_RXD0
PC03/MII_RXD3
PC02/MII_RXD2
PC20/WOL
PC15/CRS
NC
PD3/IRQ3/RXD1/DACK0
PD2/IRQ2/TXD1/DREQ0
PE07/HIFRS
PE01/HIFRDY
NC
7
8
9
10
12
14
16
18
20
11
13
15
17
19
PE04/HIFINT#
NC
GND
GND
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Operational Specifications
3.1.9 Expansion Connectors (J9-J13)
3
Table 3.1.10 Pin assignment for Expansion Connector (J10)
Pin no.
Signal Name
Pin no.
Signal Name
1
3
5
2
4
6
+3.3 V
GND
NC
+3.3 V
GND
PA23/A23/RXD_SIO0, PE18/HIFD09/TxD1/D25
Jumper select
7
8
PA22/A22/SIOMCLK0, PD4/IRQ4/SCK1
PA22/A22/SIOMCLK0
Jumper select
9
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
PA21/A21/SCK_SIO0
PA20/A20
PA18/A18
PA16/A16
A14
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
PA19/A19
PA17/A17
A15
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
PC13/TX_CLK
PC12/TX_EN
PB11/CS4#
PC08/RX_DV
RES#
PB07/CE2B#
GND
CKIO
CS0#
GND
Table 3.1.11 Pin assignment for Expansion Connector (J13)
Pin no.
Signal Name
Pin no.
Signal Name
1
3
2
4
PE24/HIFD15/CTS1/D31
PE23/HIFD14/RTS1/D30
PE22/HIFD13/CTS0/D29
PE20/HIFD11/SCK1/D27
PE18/HIFD09/TXD1/D25
PE16/HIFD07/RXD0/D23
PE14/HIFD05/-/D21
PE21/HIFD12/RTS0/D28
PE19/HIFD10/RXD1/D26
PE17/HIFD08/SCK0/D24
PE15/HIFD06/TXD0/D22
PE13/HIFD04/-/D20
PE11/HIFD02/-/D18
PE09/HIFD00/-/D16
PE08/HIFCS#
5
6
7
8
9
10
12
14
16
18
20
11
13
15
17
19
PE12/HIFD03/-/D19
PE10/HIFD01/-/D17
PE06/HIFWR#/SIOFSYNC0
PE05/HIFRD#
GND
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Operational Specifications
3.1.9 Expansion Connectors (J9-J13)
3
Table 3.1.12 Pin assignment for Expansion Connector (J12)
Pin no.
Signal Name
Pin no.
Signal Name
1
3
2
4
+5 V
RD#
DD14
DD12
DD10
DD8
DD6
DD4
DD2
DD0
+5 V
DD15
DD13
DD11
DD9
DD7
DD5
DD3
DD1
GND
5
6
7
8
9
10
12
14
16
18
20
11
13
15
17
19
Table 3.1.13 Pin assignment for Expansion Connector (J11)
Pin no.
Signal Name
Pin no.
Signal Name
PD1/IRQ1/-/TEND1
1
3
5
2
4
6
PD0/IRQ0/-/TEND0
RD/WR#
PB12/CS3#
WE0#/DQMLL , PE06/HIFWR#/SIOFSYNC0
Jumper select
WE1#/DQMLU/WE# (connected by on-chip
resistor) Optional
PB05/WE2#(BE2)/DQMUL/ICIORD#
7
9
8
PB06/WE3#(BE3)/DQMUU/ICIOWR#
NC
10
12
NC
NC
PE19/HIFD10/RxD1/D26 ,PE08/HIFCS#
(Jumper select)
11
13
15
14
16
PA24/A24/TXD_SIO0
NC
PB08/CS6B#/CE1B#, PE02/HIFDREQ/RXD_SIO0
(Jumper select)
PE00/HIFEBL/SCK_SIO0
PC11/TX_ER
PD7/IRQ7/SCK2
GND
17
19
18
20
PC10/RX_CLK
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Operational Specifications
3.2 Switches and LEDs
3
3.2 Switches and LEDs
The M3A-HS19 is provided with switches and LEDs as its operational components. Figure 3.2.1 shows the assignment of
operational components.
SW1
Power switch
Top view of the
component side
LED5
Power LED
JP4 JP5
JP2
JP1
LED1-4
User LED
JP9
Power switching
jumper
JP8
JP7
JP6
SW6
IRQ0
switch
SW5
NMI
switch
SW2
Reset
switch
SW4
Mode
SW3
User
JP3
Dip switch Dip switch
Figure 3.2.1 M3A-HS19 Operational Components Assignment
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Operational Specifications
3.2.1 Jumpers (JP1 - JP9)
3
3.2.1 Jumpers (JP1 - JP9)
The M3A-HS19 is provided with nine jumpers.
Figure 3.2.2 shows the jumper assignments (JP1 - JP9), and Table 3.2.1 through Table 3.2.6 list the jumper settings (JP1
- JP9).
Figure 3.2.2 M3A-HS19 Jumpers Assignments (JP1 - JP9)
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Operational Specifications
3.2.1 Jumpers (JP1 - JP9)
3
Table
3.2.1 M3A-HS19 Jumper Settings (JP1)
Description
Jumper no.
Setting
1-2
JP1
PW EN
PCMCIAPWSEL
2-3
PW PIO
Table 3.2.2 M3A-HS19 Jumper Settings (JP2)
Description
Jumper no.
Setting
1-2
JP2
BUF OE
BUF PIO
PCMCIABUFOE
2-3
Table 3.2.3 M3A-HS19 Jumper Settings (JP3)
Description
Jumper no.
Setting
1-2
JP3
1.8 V-fixed power supply voltage (supplied from regulator)
External power supply voltage (supplied from J8)
PWRSEL
2-3
Table 3.2.4 M3A-HS19 Jumper Settings (JP4, JP5)
Description
Jumper no.
JP4
Setting
1-2
TxD1
A23
2-3
1-2
SCK1
A22
JP5
2-3
Table 3.2.5 M3A-HS19 Jumper Settings (JP6 - JP8)
Description
Jumper no.
JP6
Setting
1-2
WE0
2-3
HIFWR
PE19
1-2
JP7
JP8
2-3
HIFCS
CE1B
1-2
2-3
HIFDREQ
Table 3.2.6 M3A-HS19 Jumper Settings (JP9)
Description
Jumper no.
JP9
Setting
1-2
AC adapter
2-3
Power supply connector
indicates the default setting.
Note: Do not make any change with the jumper settings while the M3A-HS19 is operating. Ensure to turn the power OFF
before changing the settings.
Oct.28.2008
3-17
Rev.1.01
REJ10J1351-0101
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Operational Specifications
3.2.2 Features of Switches and LED
3
3.2.2 Features of Switches and LEDs
The M3A-HS19 is provided with six switches and five LEDs.
Figure 3.2.3 shows the pin assignment for switches and
Table 3.2.7 lists the switches mounted on the M3A-HS19.
LEDs.
Top view of the
component side
LED5
Power LED
SW1
Power switch
LED1 PC04/SPEED100#
LED2 PC05/LINK#
LED3
PC06/MII_TXD2/_CRS#
LED4 PC07/DUPLEX#
SW6
IRQ0
switch
SW5
NMI
switch
SW4
1: MD5: L/H
SW3
User
DIP switch
2: HIFEBL: L/H
3: HIFMD: L/H
4: FLWP: L/H
ON
ON
SW2
Reset
switch
1 2 3 4
1 2 3 4
Figure 3.2.3 Pin assignment for Switches and LEDs
Table 3.2.7 Switches on the M3A-HS19
Description
No.
Remarks
SW1
SW2
SW3
System power on/off switch
-
System reset input switch
See section 2.10 for details.
User DIP switches (4/package)
SW3-1 OFF: PC16 = "H" ON: PC16 = "L"
SW3-2 OFF: PC17 = "H" ON: PC17 = "L"
SW3-3 OFF: PC18 = "H" ON: PC18 = "L"
SW3-4 OFF: PC19 = "H" ON: PC19 = "L"
Mode DIP switches (4/package)
NMI interrupt switch
PC16, PC17, PC18, and PC19 are pulled up.
See section 2.7 for details.
SW4
SW5
SW6
See
for features.
Table 3.2.8
See section 2.11 for details.
See section 2.11 for details.
IRQ0 switch
Oct.28.2008
3-18
Rev.1.01
REJ10J1351-0101
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Operational Specifications
3.2.2 Features of Switches and LED
3
Table 3.2.8 lists the SW4 features.
Indicates the default setting.
Table 3.2.8 SW4 Features
No.
Setting
Description
SW4-1
MD5
OFF
ON
MD5 = "H"
Little endian
Big endian
Data alignment setting
MD5 = "L"
SW4-2
OFF
ON
HIFEBL = "H"
HIFEBL = "L"
HIFMD = "H"
HIFMD = "L"
HIF pin is activated
HIFEBL
SW4-3
HIF pin is released to activate
Starts up from the host interface (HIF)
OFF
ON
HIFMD
Not start up from the host interface (
Flash memory is write-enabled
Flash memory is write-protected
HIF)
SW4-4
OFF
ON
FLASH_WP# = "H"
FLASH_WP# = "L"
FLASH_WP#
Table 3.2.9 lists the LEDs on the M3A-HS19.
Table 3.2.9 LEDs
No.
Color
Description
LED1
LED2
LED3
LED4
LED5
Yellow
Yellow
Yellow
Yellow
Blue
User LED (LED1 lights when PC04/SPEED100# outputs "L")
User LED (LED2 lights when PC05/LINK# outputs "L")
User LED (LED3 lights when PC06/MII_TXD2/-/CRS# outputs "L")
User LED (LED4 lights when PC07/DUPLEX# outputs "L")
Power LED (LED5 lights when 3.3 V power is supplied)
Oct.28.2008
3-19
Rev.1.01
REJ10J1351-0101
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Operational Specifications
3.3 Dimensions
3
3.3 Dimensions
Figure 3.3.1 shows the M3A-HS19 dimensions. Connectors can be mounted on J9 through J13 to simplify to mount an
expansion board.
<Top view of the component side>
<Transparent view of the component side>
Figure 3.3.1 M3A-HS19 Dimensions
Oct.28.2008
3-20
Rev.1.01
REJ10J1351-0101
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Appendix
M3A-HS19 SCHEMATICS
A-1
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A-2
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1
2
3
4
5
SH-2 SH7619 CPU BOARD M3A-HS19 Rev.C SCHEMATICS
A
B
C
D
A
B
C
D
TITLE
PAGE
INDEX
CPU SH7619
FLASH MEMORY/SDRAM/EEPROM 3
UART/ETHER/PCMCIA
H-UDI/RESET/POWER
1
2
4
5
BUS CONNECTORS/PUSH SW 6
OTHERS
7
Note:
VCC = 5V
3VCC = 3.3V
1.8VCC = 1.8V
R = Fixed Resistors
RA = Resistor Array
C = Ceramic Caps
CE = Tantalum Electrolytic Caps
CP = Decoupling Caps
[Note]
:not mounted
RENESAS SOLUTIONS CORPORATION
M3A-HS19
DRAWN
CHECKED
DESIGNED
APPROVED
INDEX
( 1
/
7
)
SCALE
DATE
DK30575-C
Ver.1.01
08-08-19
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1
2
3
4
5
1
2
3
4
5
3VCC
3AVCC
3VCCQ
1.8VCC
3VCCQ
3AVCC
3VCC
CLOCK MODE
MD2 MD1 MD0
"0" "0" "1"
"0" "1" "0"
"1" "0" "1"
"1" "1" "0"
R1
R2
0Ω
H1
3VCCQ
1
1
1
2
5
6
PA24/TXD_SIO0
PA25/SIOFSYNC0
PA24/A24/TXD_SIO0 [4,6]
PA25/SIOFSYNC0 [4,6]
U1
SH7619
MD[0:3]
R3
_0Ω
R4
R5
R6
0Ω
H2
AVCC
A[0:25]
_0Ω
_0Ω
0Ω
A[0:25] [3,4,6]
MD0
MD1
MD2
MD3
MD0
MD1
MD2
MD3
N13
L15
J12
R12
M11
L12
D1
MD0
MD1
MD2
MD3
MD5
NMI
A0
A1
A2
A3
A4
A5
A6
A7
A25
A24
A23
A22
A20
A21
A19
A18
C13
A14
B13
A13
C12
B12
D11
A12
C11
B11
D10
A11
C10
A10
D9
B10
A5
B5
A4
D5
B4
C4
A3
D4
9
8
7
6
4
3
2
1
A00
A01
A02
A03
A04
A05
A06
A07
A08
A09
A10
A11
A12
A13
A14
A15
RA3
A4.7KΩ
[4,5] MD5
[6] NMI
[6] PD0/IRQ0/-/TEND0
3VCC
R7
R8
R9
R10
A
B
C
D
PD0/IRQ0/-/TEND0
A
B
C
D
MD3="L":16bit Bus
MD3="H":8bit Bus
0Ω
0Ω
0Ω
_0Ω
10
5
R11
R12
4.7KΩ
4.7KΩ
L14
P11
R11
N5
_TESTMD
CK_PHY
_TESTOUT
EXRES1
CK_PHY
A8
A9
A17
A16
R15
R16
4.7KΩ
4.7KΩ
R17
12.4KΩ[1%]
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
M5
TSTBUSA
XTAL
EXTAL
R14
R13
DD[0:15] [3,4,6]
XTAL
EXTAL
RA4
PA16/A16
PA17/A17
PA18/A18
PA19/A19
PA20/A20
D0
D1
D2
D3
D4
D5
D6
D7
DD0
DD1
DD2
DD3
DD4
DD5
DD6
DD7
1
16
15
14
13
12
11
10
9
A8
D8
D15
2
3
4
5
6
7
8
[3,4,6] _RD
[3,6] _CS0
[3,6] _WE0/DQMLL
_RD
_CS0
_WE0/DQMLL
PA19
PA21/SCK_SIO0
PA22/SIOMCLK0
PA23/RXD_SIO0
PA24/TXD_SIO0
PA25/SIOFSYNC0
PA21/A21/SCK_SIO0
PA22/A22/SIOMCLK0
PA23/A23/RXD_SIO0
PA24/A24/TXD_SIO0
PA25/A25/SIOFSYNC0
A15
C14
D12
D13
D14
K15
C15
B3
A2
[3,6] PB12/_CS3
[3] PB04/_RAS
[3] PB03/_CAS
[3,6] RD/_WR
PB12/_CS3
PB04/_RAS
PB03/_CAS
RD/_WR
_WE1/DQMLU/_WE
CKIO
D[0:15]
N0Ω
3VCC
RA5
[3,4,6] _WE1/DQMLU/_WE
[3,6] CKIO
D0
D1
D2
D3
D4
D5
D6
D7
D15
D14
D13
D12
D11
D10
D9
DD15
DD14
DD13
DD12
DD11
DD10
DD9
K14
J13
J15
H12
J14
H13
G12
G15
E15
E14
F14
F13
F15
F12
G14
G13
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
D00
D01
D02
D03
D04
D05
D06
D07
D08
D09
D10
D11
D12
D13
D14
D15
R126
R127
R128
4.7KΩ
CE2B
CS4
[3] PB02/CKE
PB02/CKE
4.7KΩ
A6
C6
B8
C7
D6
D7
R10
P1
M6
C9
P10
[4] _CE2A
[4] _CE1A
[4,6] PB00/_WAIT
PB09/_CE2A
PB10/_CS5B/_CE1A
PB00/_WAIT
PB06/_WE3(BE3)/DQMUU/_ICIOWR
PB01/_IOIS16
PB05/_WE2(BE2)/DQMUL/_ICIORD
PC14/COL
PC15/CRS
PC09/RX_ER
PB13/_BS
4.7KΩ
CS6B/CE1B
D8
DD8
[4,6] PB06/_WE3/DQMUU/_ICIOWR
D8
D9
[4] PB01/_IOIS16
[4,6] PB05/_WE2/DQMUL/_ICIORD
[4] PC14/COL
3VCC
N0Ω
D10
D11
D12
D13
D14
D15
D3
D2
D1
D0
D7
D6
D5
D4
1
2
3
4
6
7
8
9
5
10
[4,6] PC15/CRS
[4] PC09/RX_ER
[4,6] PB13/_BS
RA1
A4.7KΩ
[4,6] PC20/WOL
PC20/WOL
R3
R4
R1
R2
[4] RXM
[4] RXP
[4] TXM
[4] TXP
RXM
RXP
TXM
TXP
PE09/HIFD00
PE10/HIFD01
PE11/HIFD02
PE12/HIFD03
PE13/HIFD04
PE14/HIFD05
PE15/HIFD06
PE16/HIFD07
PE17/HIFD08
PE18/HIFD09
PE19/HIFD10
PE20/HIFD11
PE21/HIFD12
PE22/HIFD13
PE23/HIFD14
PE24/HIFD15
HIFD0
HIFD1
HIFD2
HIFD3
HIFD4
HIFD5
HIFD6
HIFD7
HIFD8
HIFD9
HIFD10
HIFD11
HIFD12
HIFD13
HIFD14
HIFD15
K3
K4
J2
J3
J1
PE09/HIFD00/-/D16
PE10/HIFD01/-/D17
PE11/HIFD02/-/D18
PE12/HIFD03/-/D19
PE13/HIFD04/-/D20
D8
D9
1
2
3
4
6
7
8
9
5
10
D10
D11
D12
D13
D14
D15
N7
P6
M7
R6
[3,6] PC03/MII_RXD3
[3,6] PC02/MII_RXD2
[3,6] PC01/MII_RXD1
[3,6] PC00/MII_RXD0
PC03/MII_RXD3
PC02/MII_RXD2
PC01/MII_RXD1
PC00/MII_RXD0
3VCC
3VCC
RA2
A4.7KΩ
J4
PE14/HIFD05/-/D21
TXD0
RXD0
H2
H1
G2
G1
G3
F2
G4
F1
F3
F4
PE15/HIFD06/TXD0/D22
PE16/HIFD07/RXD0/D23
PE17/HIFD08/SCK0/D24
PE18/HIFD09/TXD1/D25
PE19/HIFD10/RXD1/D26
PE20/HIFD11/SCK1/D27
PE21/HIFD12/RTS0/D28
PE22/HIFD13/CTS0/D29
PE23/HIFD14/RTS1/D30
PE24/HIFD15/CTS1/D31
X1
R13
18Ω
EXTAL
4
2
3
VCC OUT
CP1
0.1µF
1
GND OE
SCK1
SG8002JF_15.625MHz
N2
M4
N11
P2
[5] PC16/MDIO
[5] PC17/MDC
[5] PC19/EXOUT
PC16/MDIO
PC17/MDC
PC19/EXOUT
PC18/LNKSTA
15.625MHz
[5] PC18/LNKSTA
SCK1
E3
L3
L1
L2
M1
[6] PE20/HIFD11/SCK1/D27
[4,6] PD2/IRQ2/TXD1/DREQ0
[4,6] PD3/IRQ3/RXD1/DACK0
[4] PD5/IRQ5/TXD2/DREQ1
[4] PD6/IRQ6/RXD2/DACK1
[4,6] PE15/HIFD06/TXD0/D22
[4,6] PE16/HIFD07/RXD0/D23
PE08/_HIFCS [6]
PE07/HIFRS [6]
PE06/_HIFWR [6]
PE05/_HIFRD [6]
PE04/_HIFINT [6]
PE03/HIFMD [5]
PE02/HIFDREQ [6]
PE01/HIFRDY [6]
PE00/HIFEBL/SCK_SIO0 [5,6]
PE08/_HIFCS
PE07/HIFRS
PE06/_HIFWR/SIOFSYNC0
PE05/_HIFRD
TXD1
RXD1
TXD2
RXD2
TXD0
RXD0
D2
D3
C2
C3
HIFD[0:15] [4,6]
PD2/IRQ2/TXD1/DREQ0
PD3/IRQ3/RXD1/DACK0
PD5/IRQ5/TXD2/DREQ1
PD6/IRQ6/RXD2/DACK1
XTAL
R14
_1MΩ
PE04/_HIFINT/TXD_SIO0
X2
L4
PE03/HIFMD
M2
M3
N1
PE02/HIFDREQ/RXD_SIO0
PE01/HIFRDY/SIOMCLK0
PE00/HIFEBL/SCK_SIO0
3
1
P8
M9
R9
N9
P9
M8
PC12/TX_EN [6]
PC13/TX_CLK [6]
[4] PC04/_SPEED100
[4] PC05/_LINK
PC04/MII_TXD0/-/_SPEED100
PC05/MII_TXD1/-/_LINK
PC06/MII_TXD2/-/_CRS
PC12/TX_EN
PC13/TX_CLK
_CSTCE15M7
[4] PC06/MII_TXD2/-/_CRS
[4] PC07/_DUPLEX
PC07/MII_TXD3/-/_DUPLEX
15.625MHz
CERALOCK
3VCC
N6
[6] PC08/RX_DV
PC08/RX_DV
R8
N8
B6
C8
[6] PC10/RX_CLK
[6] PC11/TX_ER
[6] PB07/_CE2B
[6] PB11/_CS4
PC10/RX_CLK
PC11/TX_ER
PB07/_CE2B
PB11/_CS4
R125
4.7KΩ
CE2B
CS4
M15
P12
M13
M12
N12
M14
L13
_RES [3,4,5,6]
_RES
TCK
TMS
TDI
TDO
_TRST
_ASEMD
TCK [5]
TMS [5]
TDI [5]
TDO [5]
_TRST [5]
_ASEMD [5]
E4
C1
B2
C5
[6] PD1/IRQ1/-/TEND1
[6] PD4/IRQ4/SCK1
[4,6] PD7/IRQ7/SCK2
[6] PB08/_CS6B/_CE1B
PD1/IRQ1/-/TEND1
PD4/IRQ4/SCK1
PD7/IRQ7/SCK2
CS6B/CE1B
PB08/_CS6B/_CE1B
3VCC
3VCC
X3
R18
18Ω
CK_PHY
4
2
3
1
VCC OUT
CP2
0.1µF
GND OE
SG8002JF_25.000MHz
25MHz
Decoupling Caps
1.8VCC
3AVCC
3VCCQ
+
+
+
CP3
0.1µF
CP4
0.1µF
CP5
0.1µF
CP6
0.1µF
CP7
0.1µF
CP8
0.1µF
CP41
0.1µF
CP42
0.1µF
CP9
0.1µF
CE13
4.7µF
CP10
0.1µF
CP11
0.1µF
CP12
0.1µF
CE14
4.7µF
CP13
0.1µF
CP14
0.1µF
CP15
0.1µF
CP16
0.1µF
CP17
0.1µF
CP18
0.1µF
CP19
0.1µF
CP20
0.1µF
CE1
4.7µF
RENESAS SOLUTIONS CORPORATION
M3A-HS19
CHECKED
DESIGNED
APPROVED
DRAWN
CPU SH7619
( 2 / 7 )
SCALE
DATE
08-08-19
DK30575-C
Ver.1.01
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1
2
3
4
5
1
2
3
4
5
SDRAM
FLASH MEMORY
A
B
C
D
A
B
C
D
[2,4,6] DD[0:15]
[2,4,6] A[0:25]
SVDD
SVDDQ
FLASH CSC CHANNEL 0
16bit access = 4MB
H3
SVDD
3VCC
R19
H4
SVDDQ
1
1
3VCC
0Ω
R20
0Ω
FVDD
3VCC
R21 0Ω
H5
FVDD
1
U3
U2
A23 R22
A22 R120
A21
A20
A19
A18
A17
A16
A15
A14
A13
A12
A11
A10
A9
_0Ω
_0Ω
DD15
DD14
DD13
DD12
DD11
DD10
DD9
DD8
DD7
DD6
DD5
A14
A13
DD15
15
13
10
9
16
17
48
1
2
3
4
5
45
43
41
39
36
34
32
30
44
42
40
38
35
33
31
29
21
20
53
RY/BY
NC
A20
A19
A18
A17
A16
A15
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
DQ15/A-1
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
BA1
BA0
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DD14
DD13
DD12
DD11
DD10
DD9
DD8
DD7
DD6
DD5
DD4
DD3
DD2
DD1
DD0
51
50
48
47
45
44
42
13
11
10
8
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
35
22
34
33
32
31
30
29
26
25
24
23
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
3VCC
DD4
DD3
DD2
DD1
DQ4
DQ3
DQ2
DQ1
DQ4
DQ3
DQ2
DQ1
6
7
8
7
5
4
2
R23
4.7KΩ
A2
A1
A8
A7
A6
A5
A4
A3
A2
A1
DD0
18
19
20
21
22
23
24
25
DQ0
DQ0
3VCC
3VCC
3VCC
R24
R25
R26
R29
0Ω
0Ω
0Ω
0Ω
19
18
17
16
[2,6] PB12/_CS3
[2] PB04/_RAS
[2] PB03/_CAS
[2,6] RD/_WR
CS
RAS
CAS
WE
40
36
NC
NC
R27
4.7KΩ
R28
4.7KΩ
R30
4.7KΩ
R31
R32
0Ω
0Ω
39
15
[2,4,6] _WE1/DQMLU/_WE
DQMU
DQML
_WE0/DQMLL
A0
FVDD
R33
R117
0Ω
22Ω
47
12
37
38
[2] PB02/CKE
[2,6] CKIO
BYTE
RESET
CKE
CLK
[2,4,5,6] _RES
26
28
11
[2,6] _CS0
[2,4,6] _RD
[2,6] _WE0/DQMLL
CE
OE
WE
_WE0/DQMLL
EDS1216AATA
14
[5] FLASH_WP
WP
S29GL032A
Decoupling Caps
FVDD
Decoupling Caps
SVDDQ
SVDD
CP21
0.1µF
+
CP22
0.1µF
CP23
0.1µF
CP44
0.1µF
CP45
0.1µF
CE15
4.7µF
CP24
0.1µF
CP25
0.1µF
CP46
0.1µF
EEPROM
Decoupling Caps
U4
3VCC
3VCC
1
2
3
4
[2,6] PC03/MII_RXD3
[2,6] PC02/MII_RXD2
[2,6] PC01/MII_RXD1
[2,6] PC00/MII_RXD0
CS
SK
DI
7
6
NC
TEST
DO
CP26
0.1µF
CP27
0.1µF
S93C76AFT
R34
7.5KΩ
R35
7.5KΩ
R36
7.5KΩ
RENESAS SOLUTIONS CORPORATION
M3A-HS19
FLASH MEMORY/SDRAM/EEPROM
CHECKED
DESIGNED
APPROVED
DRAWN
( 3 / 7 )
SCALE
DATE
DK30575-C
08-08-19
Ver.1.01
Download from Www.Somanuals.com. All Manuals Search And Download.
1
2
3
4
5
1
2
3
4
5
PCMCIA power control
3VCC
SERIAL CONNECTOR(RS232C)
J1
VCC
3VCC
PCVCC
RxD0
TxD0
R38
4.7KΩ
UART connector
2
1
3VCC
JP1
U5
PCVCC
mount hole = GND
3
4
1
8
[2,6] PB13/_BS
3
2
1
EN1
EN0
OUT
OUT
TXD0
RXD0
TXD1
RXD1
TXD2
RXD2
R37
R39
R40
R41
R42
R43
4.7KΩ
4.7KΩ
4.7KΩ
4.7KΩ
4.7KΩ
4.7KΩ
A2-2PA-2.54DSA
BPCVS1
BPCVS2
1
9
2
8
3
4
6
7
5
10
6
7
3VIN
3VIN
HW-3P
BPCINPACK
RA6
A4.7KΩ
+
CE3
1µF
R44
10KΩ
J2
2
A
B
C
D
5VIN
A
B
C
D
XM2C-0912-112
BPCSTCHG
BPCSPKR
LTC1470CS8
5
9
4
8
3
7
2
6
1
U6
CP29
0.1µF
CP30
0.1µF
TTL
RS-232
RXD0
RXD2
TXD0
TXD2
R45
R48
R46
R47
0Ω
0Ω
0Ω
0Ω
15
10
13
12
16
9
17
8
[2,6] PE16/HIFD07/RXD0/D23
[2] PD6/IRQ6/RXD2/DACK1
[2,6] PE15/HIFD06/TXD0/D22
[2] PD5/IRQ5/TXD2/DREQ1
R1OUT
R2OUT
T1IN
R1IN
R2IN
T1OUT
T2OUT
TxD2
RxD2
3VCC
Decoupling Caps
R49
4.7KΩ
_BPCCD2
_BPCCD1
T2IN
10
11
FG
C2
0.1µF
0.1µF
3VCC
2
3
7
C1+
V+
V-
R50
4.7KΩ
C1
C3
0.1µF
4
5
C1-
C2+
3VCC
3VCC
CP31
0.1µF
CP32
0.1µF
C4
19
18
VCC
GND
0.1µF
6
C2-
R123
4.7KΩ
+
CP28
0.1µF
CE2
4.7µF
1
20
EN
SHDN
R124
0Ω
[2,3,5,6] _RES
Hot-Plug buffer
BPCD[0:15]
C10
0.1µF
SP3222E
[2,3,6] DD[0:15]
PCMCIA Slot
PCVCC
U7
DD15
DD14
DD13
DD12
DD11
DD10
DD9
DD8
DD7
DD6
BPCD7
BPCD6
BPCD5
BPCD4
BPCD3
BPCD2
BPCD1
BPCD0
BPCD15
BPCD14
2
3
4
5
6
7
9
10
11
12
46
45
44
43
42
40
39
38
37
36
1A1
1A2
1A3
1A4
1A5
1A6
1A7
1A8
1A9
1A10
1B1
1B2
1B3
1B4
1B5
1B6
1B7
1B8
1B9
1B10
SERIAL CONNECTOR(RS422)
R115
J4
120Ω(1/10W)
CP43
0.1µF
17
51
18
52
VCC
VCC
VPP1
VPP2
U10
J3
RXD-a
RXD-b
TXD-z
TXD-y
8
1
2
3
4
A
B
Z
Y
RXD1
TXD1
R51
R52
0Ω
0Ω
2
3
7
6
5
[2,6] PD3/IRQ3/RXD1/DACK0
[2,6] PD2/IRQ2/TXD1/DREQ0
RO
DI
Decoupling Caps
DD5
DD4
DD3
DD2
DD1
DD0
BPCD13
BPCD12
BPCD11
BPCD10
BPCD9
BPCD15
13
14
16
18
19
20
21
22
23
24
35
34
33
31
30
29
28
27
26
25
41
40
39
38
37
66
65
64
6
2A1
2A2
2A3
2A4
2A5
2A6
2A7
2A8
2A9
2A10
2B1
2B2
2B3
2B4
2B5
2B6
2B7
2B8
2B9
2B10
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
3VCC
BPCD14
BPCD13
BPCD12
BPCD11
BPCD10
BPCD9
BPCD8
BPCD7
BPCD6
BPCD5
BPCD4
BPCD3
BPCD2
BPCD1
BPCD0
SP3077EEN-L
A2-4PA-2.54DSA
R116
Decoupling Caps
120Ω(1/10W)
BPCD8
3VCC
CP34
0.1µF
5
4
3
2
CP33
0.1µF
48
47
1
1OE#
2OE#
NC
D4
D3
D2
D1
32
31
30
BPCA[0:25]
SN74CBTLV16210
[2,3,6] A[0:25]
D0
U8
A25
BPCA25
BPCA25
BPCA24
BPCA23
BPCA22
BPCA21
BPCA20
BPCA19
BPCA18
BPCA17
BPCA16
BPCA15
BPCA14
BPCA13
BPCA12
BPCA11
BPCA10
BPCA9
BPCA8
BPCA7
BPCA6
BPCA5
BPCA4
BPCA3
BPCA2
BPCA1
2
3
4
5
6
7
9
10
11
12
46
45
44
43
42
40
39
38
37
36
56
55
54
53
50
49
48
47
46
19
20
14
13
21
10
8
11
12
22
23
24
25
26
27
28
29
1A1
1A2
1A3
1A4
1A5
1A6
1A7
1A8
1A9
1A10
1B1
1B2
1B3
1B4
1B5
1B6
1B7
1B8
1B9
1B10
A25
A24
A23
A22
A21
A20
A19
A18
A17
A16
A15
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A24
A23
A22
A21
A20
A19
A18
A17
A16
BPCA24
BPCA23
BPCA22
BPCA21
BPCA20
BPCA19
BPCA18
BPCA17
BPCA16
Decoupling Caps
ETHER(RJ-45) CONNECTOR
3VCC
3AVCC
CP35
0.1µF
R53
R54
R55
10Ω(1/10W)
49.9Ω
49.9Ω
A15
A14
A13
A12
A11
A10
A9
A8
A7
A6
BPCA15
BPCA14
BPCA13
BPCA12
BPCA11
BPCA10
BPCA9
BPCA8
BPCA7
BPCA6
13
14
16
18
19
20
21
22
23
24
35
34
33
31
30
29
28
27
26
25
2A1
2A2
2A3
2A4
2A5
2A6
2A7
2A8
2A9
2A10
2B1
2B2
2B3
2B4
2B5
2B6
2B7
2B8
2B9
2B10
J5
Decoupling Caps
1
2
3
4
5
6
7
8
[2] TXP
[2] TXM
TD+
TD-
TCT
RD+
RD-
RCT
3VCC
C5
6.8nF
[2] RXP
[2] RXM
R56
82Ω
9
10
N.C. FG
N.C. FG
CP36
0.1µF
48
47
1
1OE#
2OE#
NC
R57
82Ω
R58 TLA-6T718
0Ω
BPCA0
A0
C6
6.8nF
SN74CBTLV16210
U9
58
RESET
3VCC
C7
10nF
C8
22nF
A5
A4
A3
A2
A1
A0
BPCA5
BPCA4
BPCA3
BPCA2
BPCA1
BPCA0
BPCCE1
BPCCE2
BPCREG
BPCOE
BPCWE
BPCIORD
BPCIOWR
2
3
4
5
6
7
9
10
11
12
46
45
44
43
42
40
39
38
37
36
7
42
61
9
15
44
45
1A1
1A2
1A3
1A4
1A5
1A6
1A7
1A8
1A9
1A10
1B1
1B2
1B3
1B4
1B5
1B6
1B7
1B8
1B9
1B10
_CE1
_CE2
_REG
_OE
_WE
_IORD
_IOWR
R130
4.7KΩ
R129
R122
R60
4.7KΩ
4.7KΩ
4.7KΩ
[2] PC09/RX_ER
[2] _CE2A
[2] _CE1A
[2] PC14/COL
_BPCCD2
_BPCCD1
R61
R62
100Ω
100Ω
1
2
36
67
_CD1
_CD2
Ether/User LED
4
3VCC
U11 TC7S08
13
14
16
18
19
20
21
22
23
24
35
34
33
31
30
29
28
27
26
25
59
33
43
16
[2,3,6] _RD
[2,3,6] _WE1/DQMLU/_WE
[2,6] PB05/_WE2/DQMUL/_ICIORD
[2,6] PB06/_WE3/DQMUU/_ICIOWR
2A1
2A2
2A3
2A4
2A5
2A6
2A7
2A8
2A9
2A10
2B1
2B2
2B3
2B4
2B5
2B6
2B7
2B8
2B9
2B10
_WAIT
_IOIS16
_VS1
BPCVS1
_IREQ
PBCCD
[2,6] PC15/CRS
[2,6] PB00/_WAIT
R63
1.5KΩ
R64
1.5KΩ
R65
1.5KΩ
R66
1.5KΩ
BPCVS2
BPCINPACK
BPCSPKR
57
60
62
63
_VS2
_INPACK
_SPKR
R118
0Ω
[2] PB01/_IOIS16
H6 H7 H8 H9
[2,6] PD7/IRQ7/SCK2
LED1
LED2
SML-311YT
LED3
SML-311YT
LED4
SML-311YT
BPCSTCHG
_STSCHG
SML-311YT
R119
0Ω
3VCC
R121
4.7KΩ
1
34
35
68
[2,5] MD5
Decoupling Caps
GND
GND
GND
GND
YELLOW
YELLOW
YELLOW
YELLOW
48
47
1
1OE#
2OE#
NC
R59
4.7KΩ
3VCC
Registor Mounting Table
Endian R118 R119
JP2
SN74CBTLV16210
[2] PC04/_SPEED100
[2] PC05/_LINK
[2] PC06/MII_TXD2/-/_CRS
[2] PC07/_DUPLEX
[2,6] PC20/WOL
3
2
1
ICM-C68H-S112-400R1
CP37
0.1µF
Big
No
Yes
No
HW-3P
Little Yes
R63, R64, R65, R66 360R-> 1.5KR
RENESAS SOLUTIONS CORPORATION
M3A-HS19
R55, R115, R116
1/16W -> 1/10W
CHECKED
DESIGNED
APPROVED
DRAWN
UART/ETHER/PCMCIA
( 4 / 7 )
SCALE
DATE
DK30575-C
08-08-19
Ver.1.01
Download from Www.Somanuals.com. All Manuals Search And Download.
1
2
3
4
5
1
2
3
4
5
H-UDI INTERFACE
3VCC
3VCC
RA7
A4.7KΩ
5V TO 3.3V LINEAR REGULATOR
1-2 Power On
2-3 Power Off
VCC
A
B
C
D
A
B
C
D
3VCC
U12
Power
LMS1587CS-ADJ
Vout = 3.305V
J6
J14
Switch
3
2
4
IN
OUT
TAB
HEC0470-01-630
JP9
1
2
3
4
5
6
7
9
10
[2] TCK
[2] _TRST
[2] TDO
_ASEMD [2]
TCK
_TRST
TDO
N.C.
TMS
TDI
_RESET
(GND)
GND
SW1
2
1
3
2
1
1
2
3
R67
Ra
3
110Ω
12
13
14
[2] TMS
[2] TDI
GND
GND
GND
XG8V-0334
MS-12AAH1
+
CE4
+
CE5
+
CE6
10µF
22µF
22µF
Power
Connector
8
11
N.C.
UVCC
R69
1KΩ
R70
180Ω
Rb
7614-6002
IADJ = 55µA
J7
S2B-XH-A
1
2
Power On Reset
3VCC
3VCC
VOUT = VREF * (1 + Rb/Ra) + IADJ * (Rb)
All regulator TABs are VOUT.
R71
4.7KΩ
R72
Ra
R73
4.7KΩ
10KΩ
U14A
U14B
U13
6
1
2
3
4
1
2
Decoupling Caps
OUT
Cd
2
4
_RES [2,3,4,6]
IN
5
3VCC
LVC14
LVC14
3VCC
U15
M51957BFP
R74
100Ω
TC7S08
[6] _RESET_IN
R75
10KΩ
C9
0.1µF
SW2
B3N-3012
Rb
CP38
0.1µF
Cd
3VCC
Decoupling Caps
for LVC14
Decoupling Caps
for TC7S08FU
CP39
0.1µF
CP40
0.1µF
RESET
SWITCH
td = 34ms[0.34*Cd(pF)usec]
Vs = 2.5V[1.25*((Ra+Rb)/Rb)]
POWER LED VCC
User Port
3VCC
VCC
R77
4.7KΩ
R78
R79
4.7KΩ
R80
4.7KΩ
R68
1kΩ
4.7KΩ
SW3
LED5
UB1114C
ON
1
2
3
4
8
7
6
5
PC16/MDIO [2]
PC17/MDC [2]
PC18/LNKSTA [2]
PC19/EXOUT [2]
1.8V EXTERNAL
5V TO 1.8V LINEAR REGULATOR
BLUE
A6S-4104
1.8VCC_EX
VCC
1.8VCC_IN
J8
U16
1
2
LMS1587CS-ADJ
Vout = 1.799V
+
3
2
4
IN
OUT
TAB
A2-2PA-2.54DSA
CE7
10µF
Mode Switch
R76
Ra
300Ω
3VCC
+
CE8
+
CE9
+
CE10
22µF
10µF
22µF
1.8VCC_EX 1.8VCC_IN
1.8VCC
R82
4.7KΩ
R83
R84
4.7KΩ
R85
4.7KΩ
R81
130Ω
1:ON BIG ENDIAN (MSB FIRST)
1:OFF LITTLE ENDIAN (LSB FIRST)
2:ON NOT HIF ACTIVE
2:OFF HIF ACTIVE
3:ON NORMAL BOOT
3:OFF HIF BOOT
Rb
4.7KΩ
JP3
IADJ = 55µA
1
SW4
2
ON
1
2
3
4
8
MD5 [2,4]
3
R86
0Ω
7
6
5
PE00/HIFEBL/SCK_SIO0 [2,6]
PE03/HIFMD [2]
HW-3P
FLASH_WP [3]
4:ON FLASH WRITE PROTECT
4:OFF FLASH UNLOCK
A6S-4101
1-2 Fixed 1.8V
2-3 External 1.8V
R87
_4.7KΩ
RENESAS SOLUTIONS CORPORATION
M3A-HS19
CHECKED
DESIGNED
APPROVED
DRAWN
H-UDI/RESET/POWER
( 5 / 7 )
SCALE
DATE
DK30575-C
08-08-19
Ver.1.01
Download from Www.Somanuals.com. All Manuals Search And Download.
1
2
3
4
5
1
2
3
4
5
Extension Bus Connector
3VCC
R88
R89
JP4
[2,3,4] A[0:25]
PE18/HIFD09/TXD1
0Ω
0Ω
A
B
C
D
1
2
3
A
B
C
D
A23
PA23/RXD_SIO0
J9
R97
R94
R91
R90
R93
R92
R95
R96
0Ω
0Ω
0Ω
0Ω
0Ω
0Ω
0Ω
0Ω
HW-3P
J10
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
[5] _RESET_IN
PB00/_WAIT
1
2
3
4
5
6
7
8
9
[2,4] PB00/_WAIT
JP5
[2,4] PB13/_BS
[2,4] PA25/SIOFSYNC0
PA25/SIOFSYNC0
[2] PD4/IRQ4/SCK1
PA22/SIOMCLK0
1
2
3
[2,3] PC01/MII_RXD1
[2,4] PD3/IRQ3/RXD1/DACK0
[2,3] PC00/MII_RXD0
[2,4] PD2/IRQ2/TXD1/DREQ0
[2,3] PC03/MII_RXD3
[2] PE07/HIFRS
A22
HW-3P
PA22/SIOMCLK0
A22 R102
0Ω
PE07/_HIFRS
A21
A20
A19
A18
A17
A16
A15
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
[2,3] PC02/MII_RXD2
[2] PE01/HIFRDY
[2,4] PC20/WOL
[2,4] PC15/CRS
[2] PE04/_HIFINT
XG4C-2031
J11
A0
PD0/IRQ0/-/TEND0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
[2] PC13/TX_CLK
[2] PB07/_CE2B
[2] PC12/TX_EN
[2] PD1/IRQ1/-/TEND1
[2,3] PB12/_CS3
[2,3] RD/_WR
JP6
R99
R100
0Ω
0Ω
[2,3] _WE0/DQMLL
[2] PE06/_HIFWR
1
2
3
PB11/_CS4
PE06/_HIFWR
R101
R103
R104
0Ω
0Ω
0Ω
[2] PB11/_CS4
[2,3] CKIO
[2] PC08/RX_DV
[2,3] _CS0
[2,3,4,5] _RES
[2,3,4] _WE1/DQMLU/_WE
[2,4] PB05/_WE2/DQMUL/_ICIORD
[2,4] PB06/_WE3/DQMUU/_ICIOWR
R98
22Ω
HW-3P
R105
22Ω
JP7
PE19/HIFD10
PE08/_HIFCS
1
2
3
XG4C-4031
[2] PE08/_HIFCS
[2,4] PA24/A24/TXD_SIO0
[2,5] PE00/HIFEBL/SCK_SIO0
HW-3P
JP8
[2] PB08/_CS6B/_CE1B
[2] PE02/HIFDREQ
[2] PC11/TX_ER
[2,4] PD7/IRQ7/SCK2
[2] PC10/RX_CLK
1
2
3
R106
0Ω
HW-3P
XG4C-2031
NMI SWITCH CIRCUIT
[2,4] HIFD[0:15]
3VCC
J13
PE24/HIFD15
PE23/HIFD14
PE22/HIFD13
PE21/HIFD12
PE20/HIFD11
PE19/HIFD10
HIFD15
HIFD14
HIFD13
HIFD12
HIFD11
HIFD10
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
R109
10KΩ
U14D
U14C
VCC
PE18/HIFD09/TXD1 HIFD9
R111
100Ω
R110
0Ω
9
8
5
6
NMI [2]
PE17/HIFD08
PE16/HIFD07
PE15/HIFD06
PE14/HIFD05
PE13/HIFD04
PE12/HIFD03
PE11/HIFD02
PE10/HIFD01
PE09/HIFD00
PE06/_HIFWR
PE08/_HIFCS
PE05/_HIFRD
HIFD8
HIFD7
HIFD6
HIFD5
HIFD4
HIFD3
HIFD2
HIFD1
HIFD0
SIOFSYNC0
SW5
B3N-3012
+
CE11
4.7µF
LVC14
LVC14
NMI
R107
0Ω
R108
0Ω
SWITCH
J12
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
[2] PE05/_HIFRD
[2,3,4] DD[0:15]
_RD
DD15
DD14
DD13
DD12
DD11
DD10
DD9
DD8
DD7
DD6
DD5
DD4
DD3
DD2
DD1
DD0
[2,3,4] _RD
XG4C-2031
IRQ0 SWITCH CIRCUIT
3VCC
R112
10KΩ
U14E
U14F
R113
100Ω
R114
0Ω
11
10
13
12
PD0/IRQ0/-/TEND0 [2]
SW6
B3N-3012
+
CE12
4.7µF
LVC14
LVC14
IRQ0
XG4C-2031
SWITCH
R98 0R -> 22R
RENESAS SOLUTIONS CORPORATION
M3A-HS19
CHECKED
DESIGNED
APPROVED
DRAWN
BUS CONNECTORS/PUSH SW( 6 / 7 )
SCALE
DATE
DK30575-C
08-08-19
Ver.1.01
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1
2
3
4
5
1
2
3
4
5
TEST PIN
MH1
VCC
3VCC
1.8VCC
A
B
C
D
A
B
C
D
J15
H10
H11
H12
H13
1
2
3
1
1
1
1
1
1
1
1
1
VCC
3VCC
1.8VCC
GND
XG8S-0331
MOUNT-HOLE
MH2
AGND-GND
L1
1
BLM18PG330SN1
MOUNT-HOLE
MH3
VCC
1
CQ1
0.1µF
CQ2
0.1µF
CQ3
0.1µF
CQ5
0.1µF
CQ12
0.1µF
CQ13
0.1µF
MOUNT-HOLE
MH4
3VCC
1
CQ4
0.1µF
CQ6
0.1µF
CQ7
0.1µF
CQ9
0.1µF
CQ10
0.1µF
CQ11
0.1µF
MOUNT-HOLE
PCVCC
CQ8
0.1µF
RENESAS SOLUTIONS CORPORATION
M3A-HS19
DRAWN
CHECKED
DESIGNED
APPROVED
OTHERS
( 7
/
7
)
SCALE
DATE
DK30575-C
08-08-19
Ver.1.01
Download from Www.Somanuals.com. All Manuals Search And Download.
1
2
3
4
5
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Revision History
SH7619 CPU Board M3A-HS19User's Manual
Rev.
Date
Description
Summary
Page
1.00
1.01
Aug 28, 2008
Oct 28, 2008
-
-
First edition issued.
Errors corrected.
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SH7619 CPU Board
M3A-HS19
User's Manual
Publication Date
Published by
Oct 28, 2008
Rev. 1.01
Renesas Technology Corp.
Renesas Solutions Corp.
© 2008. Renesas Technology Corp., All rights reserved. Printed in Japan.
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M3A-HS19
User's Manual
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