Philips Stereo Amplifier TDA8559T User Manual

TDA8559T

Low-voltage stereo headphone ampliﬁer

Rev. 03 — 15 May 2006

Product data sheets

1. General description

The TDA8559T is a stereo ampliﬁer that operates over a wide supply voltage range from

1.9 V to 30 V and consumes a very low quiescent current. This makes it suitable for

battery fed applications (2 × 1.5 V cells). Because of an internal voltage buffer, this device

can be used with or without a capacitor connected in series with the load. It can be

applied as a headphone ampliﬁer, but also as a mono ampliﬁer with a small speaker

(25 Ω), or as a line driver in mains applications.

2. Features

I Operating voltage from 1.9 V to 30 V

I Very low quiescent current

I Low distortion

I Few external components

I Differential inputs

I Usable as a mono ampliﬁer in Bridge-Tied Load (BTL) or stereo Single-Ended (SE)

I Single-ended mode without loudspeaker capacitor

I Mute and Standby mode

I Short-circuit proof to ground, to supply voltage (< 10 V) and across load

I No switch on or switch off clicks

I ESD protected on all pins

3. Applications

I Portable telephones

I MP3 players

I Portable audio

I Mains fed equipment

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Low-voltage stereo headphone ampliﬁer

6. Block diagram

REFERENCE

STANDBY

50 kΩ

+IN1

−

V/I

−

−IN1

OUT1

50 kΩ

DQC

MUTE

MODE

INPUT

LOGIC

−

+IN2

OUT2

V/I

−

−IN2

50 kΩ

kΩ

100 kΩ

BUFFER

SVRR

100

kΩ

TDA8559T

9,10

mgd115

n.c.

GND

Fig 1. Block diagram

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7. Pinning information

7.1 Pinning

STANDBY

+IN1

−IN1

OUT1

GND

SVRR

+IN2

TDA8559T

BUFFER

OUT2

n.c.

−IN2

MUTE

MODE

n.c.

001aae802

Top view

Fig 2. Pin conﬁguration

7.2 Pin description

Table 3.

Symbol

STANDBY

+IN1

Pin description

Description

standby select

non-inverting input 1

inverting input 1

−IN1

SVRR

+IN2

supply voltage ripple rejection

non-inverting input 2

inverting input 2

mute select

−IN2

MUTE

MODE

n.c.

input mode select

not connected

n.c.

not connected

OUT2

BUFFER

GND

output 2

buffer output (0.5V_P)

ground

OUT1

V_P2

output 1

high supply voltage

low supply voltage

V_P1

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8. Functional description

The TDA8559T contains two ampliﬁers with differential inputs, a 0.5V_Poutput buffer and a

high supply voltage stabilizer. Each ampliﬁer consists of a voltage-to-current converter

(V/I), an output ampliﬁer and a common dynamic quiescent current controller. The gain of

each ampliﬁer is internally ﬁxed at 26 dB (= 20 ×). The 0.5V_Poutput can be used as a

replacement for the single-ended capacitors. The two ampliﬁers can also be used as a

mono ampliﬁer in a BTL conﬁguration thereby resulting in more output power.

With three mode select pins, the device can be switched into the following modes:

1. Standby mode (I_P< 10 µA)

2. Mute mode

3. Operation mode, with two input selections (the input source is directly connected or

connected via coupling capacitors at the input).

The ripple rejection in the stereo application with a single-ended capacitor can be

improved by connecting a capacitor between the 0.5V_Pcapacitor pin and ground.

The device is fully protected against short-circuiting of the output pins to ground, to the

low supply voltage pin and across the load.

8.1 V/I converters

The V/I converters have a transconductance of 400 µS. The inputs are completely

symmetrical and the two ampliﬁers can be used in opposite phase. The Mute mode

causes the V/I converters to block the input signal. The input mode pin selects two

applications in which the V/I converters can be used.

The ﬁrst application (input mode pin ﬂoating) is used with a supply voltage below 6 V. The

input DC level is at ground level (the unused input pin connected to ground) and no input

coupling capacitors are necessary. The maximum converter output current is sufﬁcient to

obtain an output swing of 3 V (peak).

In the second application with a supply voltage greater than 6 V (input mode pin HIGH),

the input mode pin is connected to V_P. In this conﬁguration (input DC level is

0.5V_P+ 0.6 V) the input source must be coupled with a capacitor and the two unused

input pins must be connected via a capacitor to ground, to improve noise performance.

This application has a higher quiescent current, because the maximum output current of

the V/I converter is higher to obtain an output voltage swing of 9 V (peak).

8.2 Output ampliﬁers

The output ampliﬁers have a transresistance of 50 kΩ, a bandwidth of approximately

750 kHz and a maximum output current of 100 mA. The mid-tap output voltage equals the

voltage applied at the non-inverting pin of the output ampliﬁer. This pin is connected to the

output of the 0.5V_Pbuffer. This reduces the distortion when the load is connected

between an output ampliﬁer and the buffer (because feedback is applied over the load).

8.3 Buffer

The buffer delivers 0.5V_Pto the output with a maximum output (sink and source) current of

200 mA (peak).

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8.4 Dynamic quiescent controller

The Dynamic Quiescent Current controller (DQC) gives the advantage of low quiescent

current and low distortion. When there are high frequencies in the output signal, the DQC

will increase the quiescent current of the two output ampliﬁers and the buffer. This will

reduce the crossover distortion that normally occurs at high frequencies and low

quiescent current. The DQC gives output currents that are linear with the amplitude and

the frequency of the output signals. These currents control the quiescent current.

8.5 Stabilizer

The TDA8559T has a voltage supply range from 1.9 V to 30 V. This range is divided over

two supply voltage pins. Pin 16 is 1.9 V to 18 V (breakdown voltage of the process); this

pin is preferred for supply voltages less than 18 V. Pin 15 is used for applications where

V_Pis approximately 6 V to 30 V. The stabilizer output is internally connected to the supply

voltage pin 16. In the range from 6 V to 18 V, the voltage drop to pin 16 is 1 V. In the range

from 18 V to 30 V the stabilizer output voltage (to pin 16) is approximately 17 V.

8.6 Input logic

The MUTE pin (pin 7) selects the Mute mode of the V/I converters. LOW (TTL/CMOS)

level is mute. A voltage between 0.5 V (low level) and 1.5 V (high level) causes a soft mute

to operate (no plops). When pin 7 is ﬂoating or greater than 1.5 V it is in the operating

condition.

The input mode pin must be connected to V_Pwhen the supply voltage is greater than 6 V.

The input mode logic raises the tail current of the V/I converters and enables the two

buffers to bias the inputs of the V/I converters.

8.7 Reference

This circuit supplies all currents needed in this device. With the Standby mode pin 1

(TTL/CMOS), it is possible to switch to the Standby mode and reduce the total quiescent

current to below 10 µA.

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Low-voltage stereo headphone ampliﬁer

9. Internal circuitry

Table 4.

Symbol

STANDBY

Internal circuits

Equivalent circuit

10 kΩ

kΩ

mgd110

+IN1, −IN1, +IN2 2, 3, 5 and 6

and −IN2

mgd106

SVRR

kΩ

mgd107

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Low-voltage stereo headphone ampliﬁer

Table 4.

Symbol

MUTE

Internal circuits …continued

Equivalent circuit

mgd112

MODE

250

kΩ

1 kΩ

5 kΩ

mgd113

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Table 4.

Symbol

Internal circuits …continued

Equivalent circuit

OUT2 and OUT1 11 and 14

100 Ω

50 Ω

mgd108

buffer output

BUFFER

buffer output

mgd109

V_P2and V_P1

15 and 16

2 kΩ

mgd111

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10. Limiting values

Table 5.

Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol

V_P2(max)

V_P1(max)

V_i(max)

I_ORM

Parameter

Conditions

Min

Max

Unit

maximum supply voltage (pin 15)

maximum supply voltage (pin 16)

maximum input voltage

peak output current

repetitive

150

1.19

+85

+150

150

°C

P_tot

total power dissipation

ambient temperature

T_amb

T_stg

−40

storage temperature

−55

T_vj

virtual junction temperature

short-circuiting time

t_sc

V_P< 10 V

11. Thermal characteristics

Table 6.

Symbol

R_th(j-a)

Thermal characteristics

Parameter

Conditions

Typ

105

Unit

K/W

thermal resistance from junction to ambient

in free air

12. Characteristics

Table 7.

Characteristics

V_P= 3 V; T_amb= 25 °C; f_i= 1 kHz; unless otherwise speciﬁed.

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

DC characteristics

[1]

V_P

operating supply voltage

1.9

I_q(tot)

I_stb

V₁

total quiescent current

standby supply current

Standby mode voltage

open load

standby

operating

mute

2.75

µA

0.5

300

1.5

V₇

Mute mode voltage

input bias current

operating

1.5

I_bias

100

Single-ended stereo application (R_L= 32 Ω)

P_o

output power

THD = 10 %

[2]

THD

total harmonic distortion

P_o= 20 mW; f_i= 1 kHz

0.075

0.1

0.15

P_o= 20 mW; f_i= 10 kHz

G_v

f_ss

voltage gain

kHz

small signal roll-off

frequency

−1 dB

750

α_cs

channel separation

channel unbalance

R_s= 5 kΩ

∆G_v

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Low-voltage stereo headphone ampliﬁer

Table 7.

Characteristics …continued

V_P= 3 V; T_amb= 25 °C; f_i= 1 kHz; unless otherwise speciﬁed.

Symbol

V_no

Parameter

Conditions

Min

Typ

Max

Unit

µV

[3]

noise output voltage

V_no(mute)

noise output voltage in

mute

µV

[4]

V_o(mute)

V_mt

output voltage in mute

mid-tap voltage

µV

1.4

1.5

100

1.6

125

100

Z_i

input impedance

kΩ

[5]

[6]

V_os

DC output offset voltage

SVRR

supply voltage ripple

rejection

BTL application (R_L= 25 Ω)

P_o

output power

THD = 10 %

125

140

0.05

0.1

THD

total harmonic distortion

P_o= 70 mW; f_i= 1 kHz

P_o= 70 mW; f_i= 10 kHz

0.1

G_v

f_ss

voltage gain

kHz

small signal roll-off

frequency

−1 dB

750

[3]

V_no

noise output voltage

100

120

µV

V_no(mute)

noise output voltage in

mute

µV

[4]

V_o(mute)

Z_i

output voltage in mute

input impedance

150

µV

kΩ

[7]

[6]

V_os

DC output offset voltage

SVRR

supply voltage ripple

rejection

Line driver application (R_L= 1 kΩ)

V_oline output voltage

0.1

2.9

[1] The supply voltage range at pin V_P1is from 1.9 V to 18 V. Pin V_P2is used for the voltage range from 6 V to 30 V.

[2] Measured with low-pass ﬁlter 30 kHz.

[3] Noise output voltage measured with a bandwidth of 20 Hz to 20 kHz, unweighted. R_s= 5 kΩ.

[4] RMS output voltage in mute is measured with V_i= 200 mV (RMS); f = 1 kHz.

[5] DC output offset voltage is measured between the signal output and the 0.5V_Poutput.

[6] The ripple rejection is measured with a ripple voltage of 200 mV (RMS) applied to the positive supply rail (R_s= 0 kΩ).

[7] DC output offset voltage is measured between the two signal outputs.

13. Application information

13.1 General

For applications with a maximum supply voltage of 6 V (input mode low) the input pins

need a DC path to ground (see Figure 3 and Figure 4). For applications with supply

voltages in the range from 6 V to 18 V (input mode HIGH) the input DC level is

0.5V_P+ 0.6 V. In this situation the input conﬁgurations illustrated in Figure 5 and Figure 6

have to be used.

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The capacitor Cb is recommended for stability improvement. The value may vary between

10 nF and 100 nF. This capacitor should be placed close to the IC between pin 12 and

pin 13.

13.2 Heatsink design

The standard application is stereo headphone single-ended with a 32 Ω load impedance

to buffer (see Figure 9). The headphone ampliﬁer can deliver a peak output current of

150 mA into the load.

For the SO16 envelope R_th(j-a)= 105 K/W; the maximum sinewave power dissipation for

150 – 25

105

_amb= 25 °C is: 1.2 W =

--------------------

150 – 60

--------------------

105

For T_amb= 60 °C the maximum total power dissipation is: 0.85 W =

13.3 Test conditions

T_amb= 25 °C; unless otherwise speciﬁed: V_P= 3 V, f = 1 kHz, R_L= 32 Ω, Gain = 26 dB,

low input mode, band-pass ﬁlter: 22 Hz to 30 kHz. The total harmonic distortion as a

function of frequency was measured with low-pass ﬁlter of 80 kHz. The quiescent current

has been measured without any load impedance.

In applications with coupling capacitors towards the load, an electrolytic capacitor has to

be connected to pin 4 (SVRR).

1. The graphs for the single-ended application have been measured with the application

illustrated in Figure 9; input conﬁguration for input mode low (Figure 4) and input

conﬁguration for input mode high (Figure 6).

2. The graphs for the BTL application ‘input mode low’ have been measured with the

application circuit illustrated in Figure 11 and the input conﬁguration illustrated in

Figure 4.

3. The graphs for the line-driver application have been measured with the application

circuit illustrated in Figure 13 and the input conﬁguration illustrated in Figure 6; input

mode high.

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13.4 Input conﬁgurations

The IC can be applied in two ways, ‘input mode low’ and ‘input mode high’. This can be

selected by the input mode at pin 8:

1. Input mode low: pin 8 ﬂoating: The DC level of the input pins has to be between 0 V

and (V_P− 1.8 V). A DC path to ground is needed. The maximum output voltage is

approximately 2.1 V (RMS). Input conﬁgurations illustrated in Figure 3 and Figure 4

should be used.

2. Input mode high: pin 8 is connected to V_P: This mode is intended for supply voltages

> 6 V. It can deliver a maximum output voltage of approximately 6 V (RMS) at

THD = 0.5 %. The DC voltage level of the input pins is (0.5V_P+ 0.6 V). Coupling

capacitors are necessary. Input conﬁgurations illustrated in Figure 5 and Figure 6

should be used.

2.2 µF

pins 2 and 5

INPUT

pins 2 and 5

INPUT

5 kΩ

pins 3 and 6

mgd123

pins 3 and 6

mgd124

V_P< 6 V.

Fig 3. Input conﬁguration; with input capacitor

Fig 4. Input conﬁguration; without input capacitor

pin 2

100 nF

pin 3

220 nF

220

pins 2 and 5

pin 6

INPUT

220 nF

100 nF

pins 3 and 6

mgd125

pin 5

mgd126

V_P< 6 V.

At V_P< 6 V, combined negative inputs.

Fig 5. Input conﬁguration

Fig 6. Input conﬁguration

620 kΩ

47 kΩ

220 nF

mute

mgl135

Fig 7. Soft mute

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13.5 Standby/mute

1. The Standby mode (V₁< 0.5 V) is intended for power saving purpose. Then the total

quiescent current is < 10 µA.

2. To avoid ‘pop-noise’ during switch-on or switch-off the IC can be muted (V₇< 0.5 V).

This can be achieved by a ‘soft-mute’ circuit or by direct control from a microcontroller.

13.6 Application 1: SE with loudspeaker capacitor

The value of capacitor Cr inﬂuences the behavior of the Supply Voltage Ripple Rejection

(SVRR) at low frequencies; increasing the value of Cr increases the performance of the

SVRR; see Figure 8.

13.7 Application 2: SE to buffer (without loudspeaker capacitor)

This is the basic headphone application. The advantage of this application with respect to

application 1, is that it needs only one external component (Cb) in the event of stability

problems; see Figure 9.

13.8 Application 3: Improved SE to buffer (without loudspeaker capacitor)

This application is an improved conﬁguration of application 2. The distinction between the

two is connecting the loads in opposite phase. This lowers the average current through

the SE buffer. It should be noted that a headphone cannot be used because the load

requires ﬂoating terminals; see Figure 10.

13.9 Application 4: Bridge tied load mono ampliﬁer

This conﬁguration delivers four times the output power of the SE application with the same

supply and load conditions. The capacitor Cr is not required; see Figure 11.

13.10 Application 5: Line driver application

The TDA8559T delivers a virtual rail-to-rail output voltage and is also usable in a low

voltage environment, as a line driver. In this application the input needs a DC path to

ground, input conﬁgurations illustrated in Figure 3 and Figure 4 should be used. The value

of capacitor Cr inﬂuences the behavior of the SVRR at low frequencies; increasing the

value of Cr increases the performance of the SVRR; see Figure 12.

13.11 Application 6: Line driver application

The TDA8559T delivers a virtual rail-to-rail output voltage. Because the input mode has to

be high, the input conﬁgurations illustrated in Figure 5 and Figure 6 should be used. This

application can also be used for headphone application, however, due to the limited output

current and the limited output power at the headphone, series resistors have to be used

between the output pins and the load; see Figure 13.

The value of capacitor Cr inﬂuences the behavior of the SVRR at low frequencies;

increasing the value of Cr increases the performance of the SVRR.

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13.12 Application 7: Line driver application

With the supply voltage connected to pin 15 it is possible to use the head ampliﬁer above

the maximum of 18 V to pin 16. The internal supply voltage will be reduced to a maximum

of approximately 17 V.

This will be convenient in applications where the supply voltage is higher than 18 V,

however an output voltage swing that reaches the higher supply voltage is not required.

the input conﬁgurations illustrated in Figure 5 and Figure 6 should be used. This

application can also be used for headphone applications. However, due to the limited

output current, series resistors have to be used between the output pins and the load; see

Figure 14.

13.13 Application diagrams

100

100 µF

STANDBY

IN1

REFERENCE

50 kΩ

−

V/I

−

OUT1

−

220 µF

32 Ω

50 kΩ

MUTE

MODE

DQC

INPUT

LOGIC

32 Ω

−

OUT2

−

IN2

V/I

220 µF

−

50 kΩ

kΩ

100 kΩ

BUFFER

SVRR

BUFFER

100

kΩ

22 µF

TDA8559T

mgd116

GND

Fig 8. Application 1; single-ended with loudspeaker capacitor

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100

100 µF

STANDBY

REFERENCE

50 kΩ

−

V/I

IN1

−

OUT1

−

32 Ω

50 kΩ

MUTE

MODE

DQC

INPUT

LOGIC

32 Ω

−

OUT2

−

V/I

IN2

−

50 kΩ

kΩ

100 kΩ

BUFFER

SVRR

100

kΩ

TDA8559T

mgd117

GND

Fig 9. Application 2; single-ended to buffer (without loudspeaker capacitor)

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100

100 µF

STANDBY

REFERENCE

50 kΩ

32 Ω

−

V/I

IN1

OUT1

−

50 kΩ

MUTE

MODE

DQC

INPUT

LOGIC

32 Ω

−

OUT2

−

IN2

V/I

−

50 kΩ

kΩ

100 kΩ

BUFFER

SVRR

100

kΩ

TDA8559T

mgd118

GND

Fig 10. Application 3; improved single-ended to buffer (without loudspeaker capacitor)

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100

100 µF

STANDBY

IN1

REFERENCE

50 kΩ

−

V/I

OUT1

−

50 kΩ

MUTE

MODE

25 Ω

DQC

INPUT

LOGIC

−

OUT2

IN2

V/I

−

50 kΩ

kΩ

100 kΩ

BUFFER

SVRR

100

kΩ

TDA8559T

mgd119

GND

Fig 11. Application 4; BTL mono ampliﬁer

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100

100 µF

STANDBY

IN1

REFERENCE

50 kΩ

1 kΩ

−

V/I

OUT1

−

10 µF

50 kΩ

MUTE

MODE

DQC

INPUT

LOGIC

−

OUT2

IN2

V/I

10 µF

1 kΩ

−

50 kΩ

kΩ

100 kΩ

BUFFER

SVRR

BUFFER

100

kΩ

22 µF

TDA8559T

mgd120

GND

V_P= 1.9 V to 6 V.

Fig 12. Application 5; line driver application

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100

100 µF

STANDBY

REFERENCE

100 nF

IN1

50 kΩ

1 kΩ

−

V/I

OUT1

−

10 µF

50 kΩ

DQC

220

INPUT

LOGIC

MUTE

MODE

100 nF

IN2

−

OUT2

V/I

10 µF

1 kΩ

−

50 kΩ

kΩ

100 kΩ

BUFFER

SVRR

BUFFER

100

kΩ

22 µF

TDA8559T

mgd121

GND

V_P= 6 V to 18 V.

Fig 13. Application 6; line driver application

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100

100 µF

STANDBY

REFERENCE

100 nF

IN1

50 kΩ

−

V/I

OUT1

−

10 µF

−

50 kΩ

DQC

220

POWER

AMPLIFIER

INPUT

LOGIC

MUTE

MODE

100 nF

−

OUT2

−

IN2

V/I

10 µF

−

50 kΩ

kΩ

100 kΩ

BUFFER

SVRR

BUFFER

100

kΩ

TDA8559T

mgd122

GND

V_P= 6 V to 30 V.

Fig 14. Application 7; line driver application

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13.14 Printed-circuit board layout

MUTE

Inp.

mode

220 nF

Out2

220 µF

INP2

22 µF

Buf.

INP1

220 µF

Out1

100 nF

220 nF

Std.

TDA8559T

100 µF

D&A AUDIO POWER

QC - NIJMEGEN

+Vp

001aae801

Top view component side.

Fig 15. Printed-circuit board layout

The Printed-Circuit Board (PCB) layout supports all applications as illustrated in Figure 8

to Figure 14. The PCB layout has been assembled for input conﬁguration as shown in

Figure 3, and output and supply conﬁguration as shown in Figure 8 for a maximum supply

voltage of 6 V.

13.15 Response curves for low input mode

mda089

mda090

(mA)

(V)

(1)

(2)

(V)

(1) High mode.

(2) Low mode.

Fig 16. I_qas a function of V_P(stereo headphone)

Fig 17. V_P1as a function of V_P2(stereo headphone)

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mda092

mda091

THD

(%)

THD

(%)

(1)

(2)

(1)

(2)

−1

−

−2

−

−2

−

f (Hz)

(W)

f = 1 kHz.

R_L= 32 Ω.

(1) V_P= 3 V, R_L= 32 Ω.

(1) V_P= 5 V, THD = 50 mW.

(2) V_P= 3 V, THD = 20 mW.

(2) V_P= 5 V, R_L= 32 Ω.

Fig 18. THD as a function of P_o(stereo headphone)

Fig 19. THD as a function of frequency (stereo

headphone)

mda094

mda093

−2

(V)

(A)

−1

−3

(1)

(2) (3)

(1) (2)

−2

−4

−5

−6

−7

−3

−4

−5

0.5

1.5

2.5

(V)

stb

mute

(1) V_P= 12 V.

(2) V_P= 3 V and 6 V.

(3) V_P= 3 V, 6 V and 12 V.

(1) V_P= 3 V.

(2) V_P= 12 V.

Fig 20. I_qas a function of V_stb(stereo headphone)

Fig 21. V_oas a function of V_mute(stereo headphone)

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mda096

mda095

(dB)

∆Gr

(dB)

0.5

−20

−40

−0.5

−60

−1

−80

f (Hz)

V_P= 3 V, V_i= 20 mV.

Fig 22. Channel separation as a function of frequency

(stereo headphone)

Fig 23. Channel unbalance as a function of frequency

(stereo headphone)

mda098

mda097

0.4

(W)

SVRR

(dB)

0.3

−20

0.2

0.1

−40

(1)

(2)

−60

−80

f (Hz)

(V)

V_P= 3 V, R_s= 0 Ω, V_r= 0.2 V (RMS).

(1) R_L= 32 Ω, THD = 10 %.

(2) R_L= 32 Ω, THD = 0.5 %.

Fig 24. SVRR as a function of frequency (stereo

headphone)

Fig 25. P_oas a function of V_P(stereo headphone)

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mda099

mda130

1.5

THD

(%)

(W)

(1)

(2)

(1)

(2)

0.5

−1

−2

−3

−2

−1

(W)

(V)

(1) R_L= 25 Ω.

f = 1 kHz.

(2) R_L= 32 Ω.

(1) V_P= 3 V, R_L= 25 Ω.

(2) V_P= 5 V, R_L= 25 Ω.

Fig 26. Total worst case power dissipation as a

function of supply voltage (SE) (stereo

headphone)

Fig 27. THD as a function of P_o(BTL mono)

mda131

mda132

SVRR

(dB)

THD

(%)

−20

−1

−40

(1)

(2)

−60

−2

−80

f (Hz)

(1) V_P= 3 V, R_L= 25 Ω, THD = 70 mW.

(2) V_P= 5 V, R_L= 25 Ω, THD = 150 mW.

V_P= 3 V, R_s= 0 Ω, V_r= 0.2 V (RMS).

Fig 28. THD as a function of frequency (BTL mono)

Fig 29. SVRR as a function of frequency (BTL mono)

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mda134

mda133

1.6

(W)

1.2

0.8

0.4

0.75

(1)

(2)

0.5

(1)

(2)

0.25

(V)

(1) THD = 10 %, R_L= 25 Ω.

(1) R_L= 25 Ω.

(2) THD = 0.5 %, R_L= 25 Ω.

(2) R_L= 32 Ω

Fig 30. P_oas a function of supply voltage (BTL mono)

Fig 31. Total worst case power dissipation as a

function of supply voltage (BTL mono)

13.16 Response curves for high input mode

mda119

mda120

0.8

(W)

1.6

1.2

0.6

(1)

(2)

0.4

0.2

(1)

(2)

0.8

0.4

(V)

(1) R_L= 32 Ω, THD = 10 %.

(1) R_L= 25 Ω.

(2) R_L= 32 Ω, THD = 0.5 %.

(2) R_L= 32 Ω.

Fig 32. P_oas a function of V_P(SE) (BTL mono)

Fig 33. Total worst case power dissipation as a

function of supply voltage (SE) (stereo

headphone)

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mda122

mda121

THD

(%)

THD

(%)

(1)

(2)

−1

−2

−3

−2

−1

f (Hz)

(W)

V_P= 10 V, R_L= 32 Ω, f = 1 kHz.

V_P= 10 V, R_L= 32 Ω.

(1) P_o= 100 mW.

(2) P_o= 50 mW.

Fig 34. THD as a function of P_o(stereo headphone)

Fig 35. THD as a function of frequency (stereo

headphone)

mda123

mda124

(dB)

SVRR

(dB)

−20

−40

−60

−80

f (Hz)

V_P= 10 V, V_i= 20 mV.

V_P= 10 V, R_s= 0 Ω, V_r= 0.2 V (RMS).

Fig 36. Channel separation as a function of frequency

(stereo headphone)

Fig 37. SVRR as a function of frequency (stereo

headphone)

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mda126

mda125

THD

(%)

THD

(%)

(1)

(2)

−1

−2

−1

f (Hz)

(V)

(1) V_P= 12 V, R_L= 1 kΩ.

V_P= 12 V, V_o= 1 V.

(2) V_P= 18 V, R_L= 1 kΩ.

Fig 38. THD as a function of V_o(stereo line driver)

Fig 39. THD as a function of frequency (stereo line

driver)

mda127

mda128

(dB)

SVRR

(dB)

−20

−40

−60

−80

f (Hz)

V_P= 12 V, V_i= 20 mV.

V_P= 12 V, R_s= 0 Ω, V_r= 0.2 V (RMS).

Fig 40. Channel separation as a function of frequency

(stereo line driver)

Fig 41. SVRR as a function of frequency (stereo line

driver)

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mda129

(V)

(1)

(2)

(V)

(1) THD = 10 %, R_L= 1 kΩ.

(2) THD = 0.5 %, R_L= 1 kΩ.

Fig 42. V_oas a function of V_P(stereo line driver)

14. Test information

14.1 Quality information

The General Quality Speciﬁcation for Integrated Circuits, SNW-FQ-611 is applicable.

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15. Package outline

SO16: plastic small outline package; 16 leads; body width 3.9 mm

SOT109-1

(A )

pin 1 index

detail X

2.5

scale

5 mm

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

(1)

UNIT

max.

0.25

0.10

1.45

1.25

0.49

0.36

0.25

0.19

10.0

9.8

4.0

3.8

6.2

5.8

1.0

0.4

0.7

0.6

0.7

0.3

1.27

0.05

1.05

0.041

1.75

0.25

0.01

0.25

0.01

0.25

0.1

8^o

0^o

0.010 0.057

0.004 0.049

0.019 0.0100 0.39

0.014 0.0075 0.38

0.16

0.15

0.244

0.228

0.039 0.028

0.016 0.020

0.028

0.012

inches

0.069

0.01 0.004

Note

1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.

REFERENCES

OUTLINE

EUROPEAN

PROJECTION

ISSUE DATE

VERSION

IEC

JEDEC

JEITA

99-12-27

03-02-19

SOT109-1

076E07

MS-012

Fig 43. Package outline SOT109-1 (SO16)

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16. Soldering

16.1 Introduction to soldering surface mount packages

There is no soldering method that is ideal for all surface mount IC packages. Wave

soldering can still be used for certain surface mount ICs, but it is not suitable for ﬁne pitch

SMDs. In these situations reﬂow soldering is recommended.

16.2 Reﬂow soldering

Reﬂow soldering requires solder paste (a suspension of ﬁne solder particles, ﬂux and

binding agent) to be applied to the printed-circuit board by screen printing, stencilling or

pressure-syringe dispensing before package placement. Driven by legislation and

environmental forces the worldwide use of lead-free solder pastes is increasing.

Several methods exist for reﬂowing; for example, convection or convection/infrared

heating in a conveyor type oven. Throughput times (preheating, soldering and cooling)

vary between 100 seconds and 200 seconds depending on heating method.

Typical reﬂow temperatures range from 215 °C to 260 °C depending on solder paste

material. The peak top-surface temperature of the packages should be kept below:

Table 8.

SnPb eutectic process - package peak reﬂow temperatures (from J-STD-020C

July 2004)

Package thickness

< 2.5 mm

Volume mm³< 350

240 °C + 0/−5 °C

225 °C + 0/−5 °C

Volume mm³≥ 350

225 °C + 0/−5 °C

≥ 2.5 mm

Table 9.

Pb-free process - package peak reﬂow temperatures (from J-STD-020C July

2004)

Package thickness

Volume mm³< 350

Volume mm³350 to

2000

Volume mm³> 2000

< 1.6 mm

260 °C + 0 °C

250 °C + 0 °C

260 °C + 0 °C

250 °C + 0 °C

245 °C + 0 °C

260 °C + 0 °C

245 °C + 0 °C

1.6 mm to 2.5 mm

≥ 2.5 mm

Moisture sensitivity precautions, as indicated on packing, must be respected at all times.

16.3 Wave soldering

Conventional single wave soldering is not recommended for surface mount devices

(SMDs) or printed-circuit boards with a high component density, as solder bridging and

non-wetting can present major problems.

To overcome these problems the double-wave soldering method was speciﬁcally

developed.

If wave soldering is used the following conditions must be observed for optimal results:

• Use a double-wave soldering method comprising a turbulent wave with high upward

pressure followed by a smooth laminar wave.

• For packages with leads on two sides and a pitch (e):

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– larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be

parallel to the transport direction of the printed-circuit board;

– smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the

transport direction of the printed-circuit board.

The footprint must incorporate solder thieves at the downstream end.

• For packages with leads on four sides, the footprint must be placed at a 45° angle to

the transport direction of the printed-circuit board. The footprint must incorporate

solder thieves downstream and at the side corners.

During placement and before soldering, the package must be ﬁxed with a droplet of

adhesive. The adhesive can be applied by screen printing, pin transfer or syringe

dispensing. The package can be soldered after the adhesive is cured.

Typical dwell time of the leads in the wave ranges from 3 seconds to 4 seconds at 250 °C

or 265 °C, depending on solder material applied, SnPb or Pb-free respectively.

A mildly-activated ﬂux will eliminate the need for removal of corrosive residues in most

applications.

16.4 Manual soldering

Fix the component by ﬁrst soldering two diagonally-opposite end leads. Use a low voltage

(24 V or less) soldering iron applied to the ﬂat part of the lead. Contact time must be

limited to 10 seconds at up to 300 °C.

When using a dedicated tool, all other leads can be soldered in one operation within

2 seconds to 5 seconds between 270 °C and 320 °C.

16.5 Package related soldering information

Table 10. Suitability of surface mount IC packages for wave and reﬂow soldering methods

Package^[1]

Soldering method

Wave

Reﬂow^[2]

BGA, HTSSON..T^[3], LBGA, LFBGA, SQFP,

SSOP..T^[3], TFBGA, VFBGA, XSON

not suitable

suitable

DHVQFN, HBCC, HBGA, HLQFP, HSO, HSOP,

HSQFP, HSSON, HTQFP, HTSSOP, HVQFN,

HVSON, SMS

not suitable^[4]

suitable

PLCC^[5], SO, SOJ

suitable

LQFP, QFP, TQFP

not recommended^[5][6]

not recommended^[7]

not suitable

suitable

SSOP, TSSOP, VSO, VSSOP

CWQCCN..L^[8], PMFP^[9], WQCCN..L^[8]

suitable

not suitable

[1] For more detailed information on the BGA packages refer to the (LF)BGA Application Note (AN01026);

order a copy from your Philips Semiconductors sales ofﬁce.

[2] All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the

maximum temperature (with respect to time) and body size of the package, there is a risk that internal or

external package cracks may occur due to vaporization of the moisture in them (the so called popcorn

effect). For details, refer to the Drypack information in the Data Handbook IC26; Integrated Circuit

Packages; Section: Packing Methods.

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[3] These transparent plastic packages are extremely sensitive to reﬂow soldering conditions and must on no

account be processed through more than one soldering cycle or subjected to infrared reﬂow soldering with

peak temperature exceeding 217 °C ± 10 °C measured in the atmosphere of the reﬂow oven. The package

body peak temperature must be kept as low as possible.

[4] These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the

solder cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink

on the top side, the solder might be deposited on the heatsink surface.

[5] If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave

direction. The package footprint must incorporate solder thieves downstream and at the side corners.

[6] Wave soldering is suitable for LQFP, QFP and TQFP packages with a pitch (e) larger than 0.8 mm; it is

deﬁnitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.

[7] Wave soldering is suitable for SSOP, TSSOP, VSO and VSSOP packages with a pitch (e) equal to or larger

than 0.65 mm; it is deﬁnitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.

[8] Image sensor packages in principle should not be soldered. They are mounted in sockets or delivered

pre-mounted on ﬂex foil. However, the image sensor package can be mounted by the client on a ﬂex foil by

using a hot bar soldering process. The appropriate soldering proﬁle can be provided on request.

[9] Hot bar soldering or manual soldering is suitable for PMFP packages.

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17. Revision history

Table 11. Revision history

Document ID

TDA8559_3

Release date

20060515

Data sheet status

Change notice

Supersedes

Product data sheet

TDA8559_2

Modiﬁcations:

• The format of this data sheet has been redesigned to comply with the new presentation and

information standard of Philips Semiconductors.

• DIP16 (SOT39-1) package removed

TDA8559_2

(9397 750 02066)

19970627

Product speciﬁcation

TDA8559_1

19960102

Preliminary speciﬁcation

(9397 750 00546)

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18. Legal information

18.1 Data sheet status

Document status^[1][2]

Product status^[3]

Development

Deﬁnition

Objective [short] data sheet

This document contains data from the objective speciﬁcation for product development.

This document contains data from the preliminary speciﬁcation.

This document contains the product speciﬁcation.

Preliminary [short] data sheet Qualiﬁcation

Product [short] data sheet Production

[1]

[2]

[3]

Please consult the most recently issued document before initiating or completing a design.

The term ‘short data sheet’ is explained in section “Deﬁnitions”.

The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status

information is available on the Internet at URL http://www.semiconductors.philips.com.

malfunction of a Philips Semiconductors product can reasonably be expected

18.2 Deﬁnitions

to result in personal injury, death or severe property or environmental

damage. Philips Semiconductors accepts no liability for inclusion and/or use

of Philips Semiconductors products in such equipment or applications and

therefore such inclusion and/or use is for the customer’s own risk.

Draft — The document is a draft version only. The content is still under

internal review and subject to formal approval, which may result in

modiﬁcations or additions. Philips Semiconductors does not give any

representations or warranties as to the accuracy or completeness of

information included herein and shall have no liability for the consequences of

use of such information.

Applications — Applications that are described herein for any of these

products are for illustrative purposes only. Philips Semiconductors makes no

representation or warranty that such applications will be suitable for the

speciﬁed use without further testing or modiﬁcation.

Short data sheet — A short data sheet is an extract from a full data sheet

with the same product type number(s) and title. A short data sheet is intended

for quick reference only and should not be relied upon to contain detailed and

full information. For detailed and full information see the relevant full data

sheet, which is available on request via the local Philips Semiconductors

sales ofﬁce. In case of any inconsistency or conﬂict with the short data sheet,

the full data sheet shall prevail.

Limiting values — Stress above one or more limiting values (as deﬁned in

the Absolute Maximum Ratings System of IEC 60134) may cause permanent

damage to the device. Limiting values are stress ratings only and operation of

the device at these or any other conditions above those given in the

Characteristics sections of this document is not implied. Exposure to limiting

values for extended periods may affect device reliability.

Terms and conditions of sale — Philips Semiconductors products are sold

subject to the general terms and conditions of commercial sale, as published

at http://www.semiconductors.philips.com/proﬁle/terms, including those

pertaining to warranty, intellectual property rights infringement and limitation

of liability, unless explicitly otherwise agreed to in writing by Philips

18.3 Disclaimers

General — Information in this document is believed to be accurate and

reliable. However, Philips Semiconductors does not give any representations

or warranties, expressed or implied, as to the accuracy or completeness of

such information and shall have no liability for the consequences of use of

such information.

Semiconductors. In case of any inconsistency or conﬂict between information

in this document and such terms and conditions, the latter will prevail.

No offer to sell or license — Nothing in this document may be interpreted

or construed as an offer to sell products that is open for acceptance or the

grant, conveyance or implication of any license under any copyrights, patents

or other industrial or intellectual property rights.

Right to make changes — Philips Semiconductors reserves the right to

make changes to information published in this document, including without

limitation speciﬁcations and product descriptions, at any time and without

notice. This document supersedes and replaces all information supplied prior

to the publication hereof.

18.4 Trademarks

Notice: All referenced brands, product names, service names and trademarks

are the property of their respective owners.

Suitability for use — Philips Semiconductors products are not designed,

authorized or warranted to be suitable for use in medical, military, aircraft,

space or life support equipment, nor in applications where failure or

19. Contact information

For additional information, please visit: http://www.semiconductors.philips.com

For sales ofﬁce addresses, send an email to: [email protected]

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20. Contents

General description . . . . . . . . . . . . . . . . . . . . . . 1

Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Quick reference data . . . . . . . . . . . . . . . . . . . . . 2

Ordering informatio n . . . . . . . . . . . . . . . . . . . . . 2

Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3

16.1

Introduction to soldering surface mount

packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Reﬂow soldering. . . . . . . . . . . . . . . . . . . . . . . 31

Wave soldering. . . . . . . . . . . . . . . . . . . . . . . . 31

Manual soldering . . . . . . . . . . . . . . . . . . . . . . 32

Revision history . . . . . . . . . . . . . . . . . . . . . . . 34

7.1

7.2

Pinning informatio n . . . . . . . . . . . . . . . . . . . . . . 4

Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4

Legal information . . . . . . . . . . . . . . . . . . . . . . 35

Data sheet status . . . . . . . . . . . . . . . . . . . . . . 35

Deﬁnitions . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 35

T r ademarks . . . . . . . . . . . . . . . . . . . . . . . . . . 35

Functional description . . . . . . . . . . . . . . . . . . . 5

V/I converters . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Output ampliﬁers. . . . . . . . . . . . . . . . . . . . . . . . 5

Buffer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Dynamic quiescent controller . . . . . . . . . . . . . . 6

Stabilize r . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Input logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Contact information . . . . . . . . . . . . . . . . . . . . 35

Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

Internal circuitry. . . . . . . . . . . . . . . . . . . . . . . . . 7

Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . 10

Thermal characteristics. . . . . . . . . . . . . . . . . . 10

Characteristic s . . . . . . . . . . . . . . . . . . . . . . . . . 1 0

Application information. . . . . . . . . . . . . . . . . . 11

Genera l . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1

Heatsink design . . . . . . . . . . . . . . . . . . . . . . . 12

T e st conditions . . . . . . . . . . . . . . . . . . . . . . . . 12

Input conﬁgurations . . . . . . . . . . . . . . . . . . . . 13

Standby/mute . . . . . . . . . . . . . . . . . . . . . . . . . 14

Application 1: SE with loudspeaker capacito r . 1 4

Application 2: SE to buffer (without

loudspeaker capacitor) . . . . . . . . . . . . . . . . . 14

Application 3: Improved SE to buffer (without

loudspeaker capacitor) . . . . . . . . . . . . . . . . . . 14

Application 4: Bridge tied load mono ampliﬁer 14

Application 5: Line driver application . . . . . . . 14

Application 6: Line driver application . . . . . . . 14

Application 7: Line driver application . . . . . . . 15

Application diagrams . . . . . . . . . . . . . . . . . . . 15

Printed-circuit board layou t . . . . . . . . . . . . . . . 2 2

Response curves for low input mode . . . . . . . 22

Response curves for high input mode . . . . . . 26

Test informatio n . . . . . . . . . . . . . . . . . . . . . . . . 2 9

Quality information . . . . . . . . . . . . . . . . . . . . . 29

Package outline . . . . . . . . . . . . . . . . . . . . . . . . 30

Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Please be aware that important notices concerning this document and the product(s)

described herein, have been included in section ‘Legal information’.

For more information, please visit: http://www.semiconductors.philips.com.

For sales office addresses, email to: [email protected].

Date of release: 15 May 2006

Document identifier: TDA8559_3

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