Philips Network Router PTN3501 User Manual

INTEGRATED CIRCUITS  
PTN3501  
Maintenance and control device  
Product specification  
2001 Jan 17  
Supersedes data of 2000 Nov 22  
Philips  
Semiconductors  
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Philips Semiconductors  
Product specification  
Maintenance and control device  
PTN3501  
2
CHARACTERISTICS OF THE I C-BUS  
2
The I C-bus is for 2-way, 2-line communication between different ICs  
Start and stop conditions  
or modules. The two lines are a serial data line (SDA) and a serial  
clock line (SCL). Both lines must be connected to a positive supply  
via a pull-up resistor when connected to the output stages of a device.  
Data transfer may be initiated only when the bus is not busy.  
Both data and clock lines remain HIGH when the bus is not busy. A  
HIGH-to-LOW transition of the data line, while the clock is HIGH is  
defined as the start condition (S). A LOW-to-HIGH transition of the  
data line while the clock is HIGH is defined as the stop condition (P)  
(see Figure 4).  
Bit transfer  
One data bit is transferred during each clock phase. The data on the  
SDA line must remain stable during the HIGH period of the clock  
pulse as changes in the data line at this time will be interpreted as  
control signals (See Figure 3).  
System configuration  
A device generating a message is a “transmitter”, a device receiving  
is the “receiver”. The device that controls the message is the  
“master” and the devices which are controlled by the master are the  
“slaves” (see Figure 5).  
SDA  
SCL  
DATA LINE  
STABLE;  
DATA VALID  
CHANGE  
OF DATA  
ALLOWED  
SW00542  
Figure 3. Bit transfer  
SDA  
SCL  
SDA  
SCL  
S
P
START CONDITION  
STOP CONDITION  
SW00543  
Figure 4. Definition of start and stop conditions  
SDA  
SCL  
MASTER  
TRANSMITTER/  
RECEIVER  
SLAVE  
TRANSMITTER/  
RECEIVER  
MASTER  
TRANSMITTER/  
RECEIVER  
SLAVE  
RECEIVER  
MASTER  
TRANSMITTER  
SW00544  
Figure 5. System configuration  
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Product specification  
Maintenance and control device  
PTN3501  
out of the slave transmitter. The device that acknowledges has to  
pull down the SDA line during the acknowledge clock pulse, so that  
the SDA line is stable LOW during the HIGH period of the  
acknowledge related clock pulse, set–up and hold times must be  
taken into account.  
Acknowledge (see Figure 6)  
The number of data bytes transferred between the start and the stop  
conditions from transmitter to receiver is not limited. Each byte of  
eight bits is followed by one acknowledge bit. The acknowledge bit  
is a HIGH level put on the bus by the transmitter whereas the  
master generates an extra acknowledge related clock pulse.  
A master receiver must signal an end of data to the transmitter by  
not generating an acknowledge on the last byte that has been  
clocked out of the slave. In this event the transmitter must leave the  
data line HIGH to enable the master to generate a stop condition.  
A slave receiver which is addressed must generate an acknowledge  
after the reception of each byte. Also a master must generate an  
acknowledge after the reception of each byte that has been clocked  
DATA OUTPUT  
BY TRANSMITTER  
NOT ACKNOWLEDGE  
ACKNOWLEDGE  
DATA OUTPUT  
BY RECEIVER  
SCL FROM  
MASTER  
1
2
8
9
S
CLOCK PULSE FOR  
ACKNOWLEDGEMENT  
START  
CONDITION  
SW00545  
2
Figure 6. Acknowledgment on the I C-bus  
FUNCTIONAL DESCRIPTION  
V
DD  
WRITE PULSE  
100 µA  
DATA FROM  
SHIFT REGISTER  
D
C
Q
FF  
P0 TO P7  
I
S
POWER-ON  
RESET  
V
SS  
D
C
Q
FF  
I
READ PULSE  
S
TO INTERRUPT LOGIC  
SW00788  
DATA TO  
SHIFT REGISTER  
Figure 7. Simplified schematic diagram of each I/O  
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Product specification  
Maintenance and control device  
PTN3501  
Addressing  
For addressing, see Figure 8.  
SLAVE ADDRESS  
SLAVE ADDRESS  
S
0
A5 A4 A3 A2 A1 A0  
0
A
S
1
A5 A4  
A3 A2 A1 A0  
0
A
a.  
b.  
(a) I/O EXPANDER  
(b) MEMORY  
SW00648  
Figure 8. PTN3501 slave addresses  
Asynchronous Start  
Following any Start condition on the bus, a minimum of 9 SCL clock cycles must be completed before a Stop condition can be issued. The  
device does not support a Stop or a repeated Start condition during this time period.  
I/O OPERATIONS (see also Figure 7)  
Each of the PTN3501’s eight I/Os can be independently used as an input or output. Input I/O data is transferred from the port to the  
microcontroller by the READ mode (See Figure 10). Output data is transmitted to the port by the I/O WRITE mode (see Figure 9).  
SCL  
SDA  
1
2
3
4
5
6
7
8
SLAVE ADDRESS (I/O EXPANDER)  
DATA TO PORT  
DATA 2  
DATA TO PORT  
DATA 1  
S
0
A5 A4 A3 A2 A1 A0  
0
A
A
A
START CONDITION  
R/W ACKNOWLEDGE  
FROM SLAVE  
ACKNOWLEDGE  
FROM SLAVE  
ACKNOWLEDGE  
FROM SLAVE  
WRITE TO  
PORT  
DATA OUT  
FROM PORT  
DATA 1 VALID  
DATA 2 VALID  
SW00649  
t
t
pv  
pv  
Figure 9. I/O WRITE mode (output)  
SLAVE ADDRESS (I/O EXPANDER)  
DATA FROM PORT  
DATA FROM PORT  
DATA 4  
SDA  
S
0
A5 A4 A3 A2 A1 A0  
1
A
DATA 1  
A
1
P
START CONDITION  
R/W ACKNOWLEDGE  
FROM SLAVE  
ACKNOWLEDGE  
FROM MASTER  
STOP  
CONDITION  
READ FROM  
PORT  
DATA INTO  
PORT  
DATA 1  
DATA 2  
DATA 3  
DATA 4  
t
t
ph  
ps  
INT  
t
t
iv  
ir  
SW00650  
Figure 10. I/O READ mode (input)  
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Product specification  
Maintenance and control device  
PTN3501  
Interrupt (see Figs 11 and 12)  
In the WRITE mode at the acknowledge bit after the  
The PTN3501 provides an open drain output (INT) which can be fed  
to a corresponding input of the microcontroller. This gives these  
chips a type of master function which can initiate an action  
elsewhere in the system.  
HIGH–to–LOW transition of the SCL signal  
Returning of the port data to its original setting. A second port  
state change will require an SCL rising clock edge to be captured  
as an INT event.  
An interrupt is generated by any rising or falling edge of the port  
Interrupts which occur during the acknowledge clock pulse may  
be lost (or very short) due to the resetting of the interrupt during  
this pulse.  
inputs in the input mode. After time t the signal INT is valid.  
iv  
Resetting and reactivating the interrupt circuit is achieved when data  
on the port is changed to the original setting or data is read from or  
written to the port which has generated the interrupt.  
Each change of the I/Os after resetting will be detected and, after  
the next rising clock edge, will be transmitted as INT. Reading from  
or writing to another device does not affect the interrupt circuit.  
Resetting occurs as follows:  
In the READ mode at the acknowledge bit after the rising edge of  
the SCL signal  
PTN3501  
(1)  
PTN3501  
(2)  
PTN3501  
(16)  
V
DD  
INT  
INT  
INT  
MICROCONTROLLER  
INT  
SW00790  
Figure 11. Application of multiple PTN3501s with interrupt  
SLAVE ADDRESS (I/O EXPANDER)  
DATA FROM PORT  
SDA  
S
0
A5  
A4  
A3  
A2  
A1  
A0  
1
A
1
1
P
START CONDITION  
SCL  
R/W  
8
ACKNOWLEDGE  
FROM SLAVE  
STOP CONDITION  
P5  
1
2
3
4
5
6
7
DATA  
INTO P5  
INT  
SW00791  
t
t
iv  
ir  
Figure 12. Interrupt generated by a change of input to I/O P5  
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Product specification  
Maintenance and control device  
PTN3501  
Quasi-bidirectional I/Os (see Figure 13)  
A quasi-bidirectional I/O can be used as an input or output without the use of a control signal for data direction. At power-on the I/Os are HIGH.  
In this mode, only a current source to V is active. An additional strong pull-up to V allows fast rising edges into heavily loaded outputs.  
DD  
DD  
These devices turn on when an output is written HIGH, and are switched off by the negative edge of SCL. The I/Os should be HIGH before  
being used as inputs.  
SLAVE ADDRESS (PTN3501)  
DATA TO PORT  
0
DATA TO PORT  
1
SDA  
S
0
A
A
A
3
A2 A1 A0  
0
A
A
A
P
5
4
START CONDITION  
R/W ACKNOWLEDGE  
FROM SLAVE  
P3  
ACKNOWLEDGE  
FROM SLAVE  
P3  
SCL  
1
2
3
4
5
6
7
8
P3  
OUTPUT  
VOLTAGE  
P3  
PULL-UP  
OUTPUT  
CURRENT  
I
I
OHt  
OH  
SW00789  
Figure 13. Transient pull-up current I  
PARAMETER  
while P3 changes from LOW-to-HIGH and back to LOW  
OHt  
SYMBOL  
MIN  
TYP  
MAX  
UNIT  
µs  
t
t
t
Output data valid; C 100 pF  
4
4
pv  
ps  
L
Input data setup time; C 100 pF  
0
µs  
L
Input data hold time; C 100 pF  
4
µs  
ph  
L
t
iv  
Interrupt input data valid time;  
µs  
C 100 pF  
L
t
ir  
Interrupt reset time; C 100 pF  
4
µs  
L
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Product specification  
Maintenance and control device  
PTN3501  
the master issues the stop condition, initiating the internal write cycle  
to the non–volatile memory. Only write and read operations to the  
quasi–bidirectional I/Os are allowed during the internal write cycle.  
MEMORY OPERATIONS  
Write operations  
Write operations require an additional address field to indicate the  
memory address location to be written. The address field is eight  
bits long providing access to any one of the 256 words of memory.  
There are two types of write operations, byte write and page write.  
Page Write (see Figure 15)  
A page write is initiated in the same way as the byte write, if after  
sending the first word of data, the stop condition is not received the  
PTN3501 considers subsequent words as data. After each data  
word the PTN3501 responds with an acknowledge and the four least  
significant bits of the memory address field are incremented. Should  
the master not send a stop condition after 16 data words the  
address counter will return to its initial value and overwrite the data  
previously written. After the receipt of the stop condition the inputs  
will behave as with the byte write during the internal write cycle.  
Byte Write (see Figure 14)  
To perform a byte write the start condition is followed by the memory  
slave address and the R/W bit set to 0. The PTN3501 will respond  
with an acknowledge and then consider the next eight bits sent as  
the word address and the eight bits after the word address as the  
data. The PTN3501 will issue an acknowledge after the receipt of  
both the word address and the data. To terminate the data transfer  
SLAVE  
ADDRESS  
(MEMORY)  
WORD  
ADDRESS  
DATA  
SDA  
S
1
A5 A4 A3 A2 A1 A0  
0
A
A
A
P
START CONDITION  
R/W  
ACKNOWLEDGE  
FROM SLAVE  
ACKNOWLEDGE STOP  
FROM SLAVE CONDITION  
ACKNOWLEDGE  
FROM SLAVE  
SW00651  
Figure 14. Byte write  
SLAVE ADDRESS  
(MEMORY)  
WORD ADDRESS  
DATA TO MEMORY  
DATA n  
DATA TO MEMORY  
SDA  
DATA +3n  
P
S
1
A5 A4 A3 A2 A1 A0  
A
A
A
A
0
R/W  
START  
CONDITION  
STOP  
CONDITION  
ACKNOWLEDGE  
FROM SLAVE  
ACKNOWLEDGE  
FROM SLAVE  
ACKNOWLEDGE  
FROM SLAVE  
SW00652  
Figure 15. Page Write  
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Product specification  
Maintenance and control device  
PTN3501  
The master must perform a byte write to the address location to be  
read, but instead of transmitting the data after receiving the  
acknowledge from the PTN3501 the master reissues the start  
condition and memory slave address with the R/W bit set to one.  
The PTN3501 will then transmit an acknowledge and use the next  
eight clock cycles to transmit the data contained in the addressed  
location. The master ceases the transmission by issuing the stop  
condition after the eighth bit, omitting the ninth clock cycle  
acknowledge.  
Read operations  
PTN3501 read operations are initiated in an identical manner to  
write operations with the exception that the memory slave address’  
R/W bit is set to a one. There are three types of read operations;  
current address, random and sequential.  
Current Address Read (see Figure 16)  
The PTN3501 contains an internal address counter that increments  
after each read or write access, as a result if the last word accessed  
was at address n then the address counter contains the address  
n+1.  
Sequential Read (see Figure 18)  
The PTN3501 sequential read is an extension of either the current  
address read or random read. If the master doesn’t issue a stop  
condition after it has received the eighth data bit, but instead issues  
an acknowledge, the PTN3501 will increment the address counter  
and use the next eight cycles to transmit the data from that location.  
The master can continue this process to read the contents of the  
entire memory. Upon reaching address 255 the counter will return to  
address 0 and continue transmitting data until a stop condition is  
received. The master ceases the transmission by issuing the stop  
condition after the eighth bit, omitting the ninth clock cycle  
acknowledge.  
When the PTN3501 receives its memory slave address with the  
R/W bit set to one it issues an acknowledge and uses the next eight  
clocks to transmit the data contained at the address stored in the  
address counter. The master ceases the transmission by issuing the  
stop condition after the eighth bit. There is no ninth clock cycle for  
the acknowledge.  
Random Read (see Figure 17)  
The PTN3501’s random read mode allows the address to be read  
from to be specified by the master. This is done by performing a  
dummy write to set the address counter to the location to be read.  
SLAVE ADDRESS  
(MEMORY)  
DATA FROM MEMORY  
1 A5 A4 A3 A2 A1 A0  
1
A
SDA  
S
P
START  
CONDITION  
R/W  
STOP  
CONDITION  
ACKNOWLEDGE  
FROM SLAVE  
SW00653  
Figure 16. Current Address Read  
SLAVE ADDRESS  
(MEMORY)  
WORD  
ADDRESS  
SLAVE ADDRESS  
(MEMORY)  
DATA FROM MEMORY  
SDA  
P
S
1
A5 A4 A3 A2 A1 A0  
0
A
A
S
1 A5 A4 A3 A2 A1 A0  
A
1
ACKNOWLEDGE  
FROM SLAVE  
R/W  
R/W  
START  
CONDITION  
STOP  
CONDITION  
ACKNOWLEDGE  
FROM SLAVE  
ACKNOWLEDGE  
FROM SLAVE  
START  
CONDITION  
SW00654  
Figure 17. Random Read  
SLAVE ADDRESS  
(MEMORY)  
DATA  
FROM MEMORY  
DATA  
FROM MEMORY  
DATA  
FROM MEMORY  
SDA  
DATA n  
DATA n+1  
DATA N+X  
P
S
1
A5 A4 A3 A2 A1 A0  
A
A
A
1
R/W  
START  
CONDITION  
STOP  
CONDITION  
ACKNOWLEDGE  
FROM SLAVE  
ACKNOWLEDGE  
FROM MASTER  
ACKNOWLEDGE  
FROM MASTER  
SW00655  
Figure 18. Sequential Read  
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Product specification  
Maintenance and control device  
PTN3501  
ABSOLUTE MAXIMUM RATINGS  
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied.  
SYMBOL  
PARAMETER  
MIN  
MAX  
UNIT  
V
V
Supply Voltage  
–0.5  
4.0  
5.5  
20  
V
V
CC  
Input Voltage  
V
SS  
– 0.5  
I
I
I
I
I
DC Input Current  
DC Output Current  
Supply Current  
–20  
–25  
–100  
–100  
mA  
mA  
mA  
mA  
mW  
mW  
_C  
I
25  
O
100  
100  
400  
100  
DD  
SS  
Supply Current  
P
P
T
Total Power Dissipation  
tot  
Total Power Dissipation per Output  
Storage Temperature  
O
–65  
–40  
+150  
+85  
STG  
T
AMB  
Operating Temperature  
_C  
V
ESD  
Electrostatic Discharge:  
Human Body Model, 1.5 k, 100 pF  
Machine Model, 0 , 200 pF  
>2000  
>200  
V
V
DC ELECTRICAL CHARACTERISTICS  
T
= –40_C to +85_C unless otherwise specified; V = 3.3 V  
amb  
CC  
SYMBOL  
Supply  
PARAMETER  
MIN  
TYP  
MAX  
UNIT  
V
I
Supply Voltage  
2.5  
3.3  
3.6  
60  
1
V
DD  
Standby Current; A thru A , WC = HIGH  
µA  
mA  
mA  
V
DDQ  
DD1  
DD2  
0
5
I
I
Supply Current Read  
Supply Current Write  
2
V
POR  
Power on Reset Voltage  
2.4  
Input SCL; input, output SDA  
V
V
Input LOW voltage  
Input HIGH voltage  
–0.5  
0.7 V  
3
0.3 V  
V
IL  
IH  
OL  
L
DD  
5.5  
V
DD  
I
I
Output LOW current @ V = 0.4 V  
mA  
µA  
pF  
OL  
Input leakage current @ V = V or V  
SS  
–1  
1
I
DD  
C
Input capacitance @ V = V  
SS  
7
I
I
I/O Expander Port  
V
V
I
Input LOW voltage  
Input HIGH voltage  
–0.5  
0.7 V  
–400  
10  
0.3 V  
5.5  
400  
V
IL  
DD  
V
IH  
DD  
Input current through protection diodes  
µA  
mA  
µA  
mA  
pF  
pF  
IHL(max)  
OL  
I
I
I
Output LOW current @ V = 1 V  
25  
100  
2
OL  
Output HIGH current @ V = V  
ss  
30  
300  
OH  
OH  
Transient pull–up current  
Input Capacitance  
OHt  
C
C
10  
I
Output Capacitance  
10  
O
Address Inputs A thru A , WC input  
0
5
V
V
I
Input LOW voltage  
Input HIGH voltage  
–0.5  
0.7 V  
–1  
0.3 V  
5.5  
1
V
IL  
DD  
V
IH  
DD  
Input leakage current @ V = V  
µA  
µA  
L
I
DD  
Input leakage (pull-up) current @ V = V  
10  
25  
100  
I
SS  
Interrupt output INT  
I
OL  
I
L
Low level output current; V = 0.4 V  
1.6  
–1  
mA  
OL  
Leakage current @ V = V or V  
SS  
+1  
µA  
I
DD  
10  
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Product specification  
Maintenance and control device  
PTN3501  
2
I C-BUS TIMING CHARACTERISTICS  
SYMBOL  
PARAMETER  
MIN.  
TYP.  
MAX.  
UNIT  
2
I C-bus timing (see Figure 19; Note 1)  
f
t
t
t
t
t
t
t
t
t
t
SCL clock frequency  
400  
50  
kHz  
ns  
µs  
µs  
µs  
µs  
µs  
ns  
ns  
µs  
µs  
SCL  
tolerable spike width on bus  
bus free time  
SW  
1.3  
0.6  
0.6  
BUF  
START condition set–up time  
START condition hold time  
SCL and SDA rise time  
SCL and SDA fall time  
data set–up time  
SU;STA  
HD;STA  
r
0.3  
0.3  
f
250  
0
SU;DAT  
HD;DAT  
VD;DAT  
SU;STO  
data hold time  
SCL LOW to data out valid  
STOP condition set–up time  
1.0  
0.6  
NOTE:  
1. All the timing values are valid within the operating supply voltage and ambient temperature range and refer to V and V with an input  
IL  
IH  
voltage swing of V to V  
.
SS  
DD  
START  
CONDITION  
(S)  
BIT 7  
MSB  
(A7)  
BIT 6  
(A6)  
BIT 0  
LSB  
(R/W)  
ACKNOWLEDGE  
(A)  
STOP  
CONDITION  
(P)  
PROTOCOL  
t
SU;STA  
1 / f  
SCL  
SCL  
SDA  
t
t
t
f
BUF  
r
t
t
t
t
t
HD;STA  
SU;DAT  
VD;DAT  
SU;STO  
HD;DAT  
MBD820  
SW00561  
Figure 19.  
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Product specification  
Maintenance and control device  
PTN3501  
POWER-UP TIMING  
SYMBOL  
PARAMETER  
MAX.  
UNIT  
ms  
1
t
Power-up to Read Operation  
Power-up to Write Operation  
1
5
PUR  
1
t
ms  
PUW  
NOTE:  
1. t  
and t are the delays required from the time V is stable until the specified operation can be initiated. These parameters are  
PUW CC  
PUR  
guaranteed by design.  
WRITE CYCLE LIMITS  
(5)  
SYMBOL  
PARAMETER  
MIN.  
TYP.  
MAX.  
UNIT  
1
t
Write Cycle Time  
5
10  
ms  
WR  
NOTE:  
1. t  
is the maximum time that the device requires to perform the internal write operation.  
WR  
Write Cycle Timing  
SCL  
8th Bit  
Word n  
ACK  
SDA  
MEMORY  
ADDRESS  
t
WR  
Stop  
Condition  
Start  
Condition  
SW00560  
Figure 20.  
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Product specification  
Maintenance and control device  
PTN3501  
SOLDERING  
seconds depending on heating method. Typical reflow temperatures  
range from 215 to 250°C.  
Introduction  
There is no soldering method that is ideal for all IC packages. Wave  
soldering is often preferred when through-hole and surface mounted  
components are mixed on one printed-circuit board. However, wave  
soldering is not always suitable for surface mounted ICs, or for  
printed-circuits with high population densities. In these situations  
reflow soldering is often used.  
Preheating is necessary to dry the paste and evaporate the binding  
agent. Preheating duration: 45 minutes at 45°C.  
Wave soldering  
Wave soldering is not recommended for SSOP packages. This is  
because of the likelihood of solder bridging due to closely-spaced  
leads and the possibility of incomplete solder penetration in  
multi-lead devices.  
This text gives a very brief insight to a complex technology. A more  
in-depth account of soldering ICs can be found in our IC Package  
Databook (order code 9398 652 90011).  
If wave soldering cannot be avoided, the following conditions  
must be observed:  
DIP  
A double-wave (a turbulent wave with high upward pressure  
followed by a smooth laminar wave) soldering technique  
should be used.  
Soldering by dipping or by wave  
The maximum permissible temperature of the solder is 260°C;  
solder at this temperature must not be in contact with the joint for  
more than 5 seconds. The total contact time of successive solder  
waves must not exceed 5 seconds.  
The longitudinal axis of the package footprint must be  
parallel to the solder flow and must incorporate solder  
thieves at the downstream end.  
The device may be mounted up to the seating plane, but the  
temperature of the plastic body must not exceed the specified  
Even with these conditions, only consider wave soldering  
SSOP packages that have a body width of 4.4 mm, that is  
SSOP16 (SOT369–1) or SSOP20 (SOT266–1).  
maximum storage temperature (T max). If the printed-circuit board  
stg  
has been pre-heated, forced cooling may be necessary immediately  
after soldering to keep the temperature within the permissible limit.  
During placement and before soldering, the package must be fixed  
with a droplet of adhesive. The adhesive can be applied by screen  
printing, pin transfer or syringe dispensing. The package can be  
soldered after the adhesive is cured.  
Repairing soldered joints  
Apply a low voltage soldering iron (less than 24 V) to the lead(s) of  
the package, below the seating plane or not more than 2 mm above  
it. If the temperature of the soldering iron bit is less than 300°C it  
may remain in contact for up to 10 seconds. If the bit temperature is  
between 300 and 400°C, contact may be up to 5 seconds.  
Maximum permissible solder temperature is 260°C, and maximum  
duration of package immersion in solder is 10 seconds, if cooled to  
less than 150°C within 6 seconds. Typical dwell time is 4 seconds at  
250°C.  
SO and SSOP  
A mildly-activated flux will eliminate the need for removal of  
corrosive residues in most applications.  
Reflow soldering  
Reflow soldering techniques are suitable for all SO and SSOP  
packages.  
Repairing soldered joints  
Fix the component by first soldering two diagonally opposite end  
leads. Use only a low voltage soldering iron (less than 24 V) applied  
to the flat part of the lead. Contact time must be limited to  
10 seconds at up to 300 °C. When using a dedicated tool, all other  
leads can be soldered in one operation within 2 to 5 seconds  
between 270 and 320°C.  
Reflow soldering requires solder paste (a suspension of fine solder  
particles, flux and binding agent) to be applied to the printed-circuit  
board by screen printing, stencilling or pressure-syringe dispensing  
before package placement.  
Several techniques exist for reflowing; for example, thermal  
conduction by heated belt. Dwell times vary between 50 and 300  
2
PURCHASE OF PHILIPS I C COMPONENTS  
2
2
Purchase of Philips I C components conveys a license under the Philips’ I C patent  
2
to use the components in the I C system provided the system conforms to the  
I C specifications defined by Philips. This specification can be ordered using the  
2
code 9398 393 40011.  
13  
2001 Jan 17  
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Philips Semiconductors  
Product specification  
Maintenance and control device  
PTN3501  
TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm  
SOT360-1  
14  
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2001 Jan 17  
Philips Semiconductors  
Product specification  
Maintenance and control device  
PTN3501  
Data sheet status  
[1]  
Data sheet  
status  
Product  
status  
Definition  
Objective  
specification  
Development  
This data sheet contains the design target or goal specifications for product development.  
Specification may change in any manner without notice.  
Preliminary  
specification  
Qualification  
This data sheet contains preliminary data, and supplementary data will be published at a later date.  
Philips Semiconductors reserves the right to make changes at any time without notice in order to  
improve design and supply the best possible product.  
Product  
specification  
Production  
This data sheet contains final specifications. Philips Semiconductors reserves the right to make  
changes at any time without notice in order to improve design and supply the best possible product.  
[1] Please consult the most recently issued datasheet before initiating or completing a design.  
Definitions  
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For  
detailed information see the relevant data sheet or data handbook.  
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one  
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or  
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended  
periods may affect device reliability.  
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips  
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or  
modification.  
Disclaimers  
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can  
reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications  
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.  
RighttomakechangesPhilipsSemiconductorsreservestherighttomakechanges, withoutnotice, intheproducts, includingcircuits,standard  
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no  
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these  
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless  
otherwise specified.  
Philips Semiconductors  
811 East Arques Avenue  
P.O. Box 3409  
Copyright Philips Electronics North America Corporation 2001  
All rights reserved. Printed in U.S.A.  
Sunnyvale, California 94088–3409  
Telephone 800-234-7381  
Date of release: 01-01  
Document order number:  
9397 750 07933  
Philips  
Semiconductors  
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