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SCXI-1120
User Manual
Eight-Channel Isolated Analog Input Module for Signal Conditioning
August 1994 Edition
Part Number 320425B-01
© Copyright 1992, 1994 National Instruments Corporation.
All Rights Reserved.
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Limited Warranty
The SCXI-1120 is warranted against defects in materials and workmanship for a period of one year from the date of
shipment, as evidenced by receipts or other documentation. National Instruments will, at its option, repair or replace
equipment that proves to be defective during the warranty period. This warranty includes parts and labor.
A Return Material Authorization (RMA) number must be obtained from the factory and clearly marked on the
outside of the package before any equipment will be accepted for warranty work. National Instruments will pay the
shipping costs of returning to the owner parts which are covered by warranty.
National Instruments believes that the information in this manual is accurate. The document has been carefully
reviewed for technical accuracy. In the event that technical or typographical errors exist, National Instruments
reserves the right to make changes to subsequent editions of this document without prior notice to holders of this
edition. The reader should consult National Instruments if errors are suspected. In no event shall National
Instruments be liable for any damages arising out of or related to this document or the information contained in it.
EXCEPT AS SPECIFIED HEREIN, NATIONAL INSTRUMENTS MAKES NO WARRANTIES, EXPRESS OR IMPLIED,
AND SPECIFICALLY DISCLAIMS ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR
PURPOSE. CUSTOMER'S RIGHT TO RECOVER DAMAGES CAUSED BY FAULT OR NEGLIGENCE ON THE PART
OF NATIONAL INSTRUMENTS SHALL BE LIMITED TO THE AMOUNT THERETOFORE PAID BY THE CUSTOMER.
NATIONAL INSTRUMENTS WILL NOT BE LIABLE FOR DAMAGES RESULTING FROM LOSS OF DATA, PROFITS,
USE OF PRODUCTS, OR INCIDENTAL OR CONSEQUENTIAL DAMAGES, EVEN IF ADVISED OF THE POSSIBILITY
THEREOF. This limitation of the liability of National Instruments will apply regardless of the form of action,
whether in contract or tort, including negligence. Any action against National Instruments must be brought within
one year after the cause of action accrues. National Instruments shall not be liable for any delay in performance due
to causes beyond its reasonable control. The warranty provided herein does not cover damages, defects,
malfunctions, or service failures caused by owner's failure to follow the National Instruments installation, operation,
or maintenance instructions; owner's modification of the product; owner's abuse, misuse, or negligent acts; and
power failure or surges, fire, flood, accident, actions of third parties, or other events outside reasonable control.
Copyright
Under the copyright laws, this publication may not be reproduced or transmitted in any form, electronic or
mechanical, including photocopying, recording, storing in an information retrieval system, or translating, in whole or
in part, without the prior written consent of National Instruments Corporation.
Trademarks
®
®
®
LabVIEW , NI-DAQ , and RTSI are trademarks of National Instruments Corporation.
Product and company names listed are trademarks or trade names of their respective companies.
Warning Regarding Medical and Clinical Use
of National Instruments Products
National Instruments products are not designed with components and testing intended to ensure a level of reliability
suitable for use in treatment and diagnosis of humans. Applications of National Instruments products involving
medical or clinical treatment can create a potential for accidental injury caused by product failure, or by errors on the
part of the user or application designer. Any use or application of National Instruments products for or involving
medical or clinical treatment must be performed by properly trained and qualified medical personnel, and all
traditional medical safeguards, equipment, and procedures that are appropriate in the particular situation to prevent
serious injury or death should always continue to be used when National Instruments products are being used.
National Instruments products are NOT intended to be a substitute for any form of established process, procedure, or
equipment used to monitor or safeguard human health and safety in medical or clinical treatment.
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Contents
About This Manual.............................................................................................................xi
Conventions Used in This Manual.................................................................................xii
Related Documentation..................................................................................................xiii
Customer Communication .............................................................................................xiii
Introduction ..........................................................................................................................1-1
What Your Kit Should Contain......................................................................................1-2
Chapter 2
Configuration and Installation.......................................................................................2-1
Module Configuration....................................................................................................2-1
Jumper W44 ...........................................................................................2-5
Using Jumpers W42 and W43 ...............................................................2-5
Analog Configuration ........................................................................................2-7
Jumper W46 ...............................................................................2-7
Direct Temperature Connection.............................................................2-8
Hardware Installation.....................................................................................................2-11
Front Connector Signal Descriptions.................................................................2-13
Analog Input Channels...........................................................................2-13
Rear Signal Connector Signal Descriptions.......................................................2-25
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Contents
Timing Requirements and Communication Protocol.............................2-28
Communication Signals .........................................................................2-28
Chapter 3
Theory of Operation ..........................................................................................................3-1
Functional Overview......................................................................................................3-1
Digital Control Circuitry................................................................................................3-7
Analog and Timing Circuitry.........................................................................................3-8
Analog Input Channels.......................................................................................3-8
Calibration Equipment Requirements....................................................3-10
Offset Null Adjust..................................................................................3-11
Analog Output Circuitry ........................................................................3-12
Scanning Modes.............................................................................................................3-13
Single-Module Parallel Scanning.......................................................................3-14
Single-Module Multiplexed Scanning ...................................................3-14
Single-Module Multiplexed Scanning (Direct)..........................3-14
Single-Module Multiplexed Scanning (Indirect) .......................3-15
Chapter 4
Register Descriptions.........................................................................................................4-1
Register Description Format ..............................................................................4-1
SCXI-1120 Registers .........................................................................................4-1
Configuration Register...........................................................................4-3
Slot-Select Register................................................................................4-6
Programming........................................................................................................................5-1
Programming Considerations.........................................................................................5-1
Register Writes...................................................................................................5-1
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Contents
Single-Channel Measurements ..........................................................................5-3
Direct Measurements .............................................................................5-3
Parallel Output ...........................................................................5-3
Indirect Measurements...........................................................................5-4
Measurements from the SCXI-1120 via Another Module.........5-4
Counter 1 and SCANDIV ..........................................................5-8
Single-Module Parallel Scanning...............................................5-8
Single-Module Multiplexed Scanning (Direct)..........................5-9
Single-Module Multiplexed Scanning (Indirect) .......................5-9
Channel Scanning from Other Modules.........................5-9
Module ...........................................................................5-9
Multiple-Module Multiplexed Scanning....................................5-9
Multiple-Chassis Scanning ........................................................5-10
4. Acquisition Enable, Triggering, and Servicing.................................5-12
Example 1 ..........................................................................................................5-12
Appendix A
Specifications ........................................................................................................................A-1
Analog Input ..................................................................................................................A-1
Physical ..........................................................................................................................A-3
Operating Environment..................................................................................................A-3
Storage Environment......................................................................................................A-3
Rear Signal Connector ......................................................................................................B-1
SCXIbus Connector ...........................................................................................................C-1
SCXI-1120 Front Connector...........................................................................................D-1
Front Connector Signal Descriptions.............................................................................D-2
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Contents
Appendix E
SCXI-1120 Cabling.............................................................................................................E-1
SCXI-1340 Cable Assembly..........................................................................................E-1
Assembly........................................................................................................................E-3
SCXI-1341 and SCXI-1344 Installation ............................................................E-4
SCXI-1342 Installation ......................................................................................E-6
SCXI-1180 Installation ......................................................................................E-6
SCXI-1302 50-Pin Terminal Block ...............................................................................E-8
SCXI-1351 Installation ......................................................................................E-10
SCXI-1350 Installation ......................................................................................E-10
SCXI-1343 Installation ......................................................................................E-11
Appendix F
Customer Communication..........................................................................................G-1
Glossary ..................................................................................................................Glossary-1
Index .............................................................................................................................Index-1
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Contents
Figures
Figure 2-1. SCXI-1120 General Parts Locator Diagram ......................................................2-2
Figure 2-2. Detailed Parts Locator Diagram.........................................................................2-3
Figure 2-3. SCXI-1120 Front Connector Pin Assignment ...................................................2-12
Figure 2-4. Ground-Referenced Signal Connection with High Common-Mode Voltage....2-14
Figure 2-5. Floating Signal Connection Referenced to Chassis Ground for Better
Figure 2-6. Floating AC-Coupled Signal Connection ..........................................................2-14
Figure 2-9. SCXI-1320 Parts Locator Diagram....................................................................2-21
Figure 2-10. SCXI-1328 Parts Locator Diagram....................................................................2-22
Figure 2-11. SCXI-1120 Rear Signal Connector Pin Assignment .........................................2-24
Figure 2-12. SCANCLK Timing Requirements .....................................................................2-28
Figure 2-13. Slot-Select Timing Diagram ..............................................................................2-29
Figure 2-14. Serial Data Timing Diagram ..............................................................................2-30
Figure 2-15. Configuration Register Write Timing Diagram .................................................2-31
Figure 2-16. SCXI-1120 Module ID Register Timing Diagram ............................................2-31
Figure 3-1. SCXI-1120 Block Diagram................................................................................3-1
Figure 3-2. SCXIbus Connector Pin Assignment.................................................................3-3
Figure 3-3. Digital Interface Circuitry Block Diagram ........................................................3-6
Figure 3-4. SCXI-1120 Digital Control................................................................................3-7
Figure 3-5. Analog Input Block Diagram.............................................................................3-9
Figure 3-6. Analog Output Circuitry ....................................................................................3-12
Figure 3-7. Single-Module Parallel Scanning.......................................................................3-14
Figure 3-8. Single-Module Multiplexed Scanning (Direct)..................................................3-15
Figure 3-9. Single-Module Multiplexed Scanning (Indirect) ...............................................3-15
Figure 3-10. Multiple-Module Multiplexed Scanning............................................................3-16
Figure 3-11. Multiple-Chassis Scanning ................................................................................3-16
Figure B-1. SCXI-1120 Rear Signal Connector Pin Assignment .........................................B-1
Figure C-1. SCXIbus Connector Pin Assignment.................................................................C-2
Figure D-1. SCXI-1120 Front Connector Pin Assignment ...................................................D-1
Figure E-1. SCXI-1340 Installation ......................................................................................E-3
Figure E-2. SCXI-1180 Rear Connections............................................................................E-7
Figure E-3. SCXI-1180 Front Panel Installation...................................................................E-8
Figure E-4. Cover Removal ..................................................................................................E-9
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Contents
Tables
Table 2-1. Digital Signal Connections, Jumper Settings.....................................................2-6
Table 2-2. Jumper W46 Settings .........................................................................................2-8
Table 2-3. Jumper W41 Settings .........................................................................................2-9
Table 2-4. Gain Jumper Allocation .....................................................................................2-9
Table 2-5. Gain Jumper Positions .......................................................................................2-10
Table 2-6. Filter Jumper Allocation ....................................................................................2-10
Table 2-7. Jumper Settings on the SCXI-1320 Terminal Block .........................................2-19
Table 2-8. Jumper Settings on the SCXI-1328 Terminal Block .........................................2-20
Table 2-9. SCXIbus to SCXI-1120 Rear Signal Connector to Data Acquisition
Table 3-1. SCXIbus Equivalents for the Rear Signal Connector ........................................3-5
Table 3-2. Calibration Potentiometers Reference Designators ...........................................3-12
Table 5-1. SCXI-1120 Rear Signal Connector Pin Equivalences .......................................5-2
Table E-1. SCXI-1120 and MIO-16 Board Pinout Equivalences........................................E-2
Table E-2. SCXI-1341 and SCXI-1344 Pin Translations....................................................E-4
Table E-3. SCXI-1342 Pin Translations ..............................................................................E-5
Table E-4. SCXI-1343 Pin Connections..............................................................................E-12
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About This Manual
This manual describes the electrical and mechanical aspects of the SCXI-1120 and contains
information concerning its operation and programming. The SCXI-1120 is a class I module that
operates as eight isolated input channels. Refer to your chassis manual for a description of the
different module classes. Each channel is isolated and independently configurable via jumpers.
Refer to your chassis manual for a description of the different module classes. The SCXI-1120 is
a member of the National Instruments Signal Conditioning eXtensions for Instrumentation
(SCXI) Series for the National Instruments data acquisition plug-in boards. This board is
designed for low-cost signal conditioning of thermocouples, volt sources, millivolt sources, and
4 to 20 mA sources or 0 to 20 mA process-current sources where high common-mode voltages
exist.
This manual describes the installation, theory of operation, and basic programming
considerations for the SCXI-1120.
Organization of This Manual
The SCXI-1120 User Manual is organized as follows:
•
•
Chapter 1, Introduction, describes the SCXI-1120; lists the contents of your SCXI-1120 kit;
describes the optional software, optional equipment, and custom cables; and explains how to
unpack the SCXI-1120 kit.
Chapter 2, Configuration and Installation, describes the SCXI-1120 jumper configurations,
installation of the SCXI-1120 into the SCXI chassis, signal connections to the SCXI-1120,
and cable wiring.
•
•
•
Chapter 3, Theory of Operation, contains a functional overview of the SCXI-1120 module
and explains the operation of each functional unit making up the SCXI-1120.
Chapter 4, Register Descriptions, describes in detail the SCXI-1120 Module ID Register, the
Configuration Register, the Slot 0 registers, and multiplexer addressing.
Chapter 5, Programming, contains a functional programming description of the SCXI-1120
and Slot 0.
•
•
Appendix A, Specifications, lists the specifications for the SCXI-1120.
Appendix B, Rear Signal Connector, describes the pinout and signal names for the
SCXI-1120 50-pin rear signal connector, including a description of each connection.
•
Appendix C, SCXIbus Connector, describes the pinout and signal names for the SCXI-1120
96-pin SCXIbus connector, including a description of each connection.
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About This Manual
•
•
•
Appendix D, SCXI-1120 Front Connector, describes the pinout and signal names for the
SCXI-1120 front connector, including a description of each connection.
Appendix E, SCXI-1120 Cabling, describes how to use and install the hardware accessories
for the SCXI-1120.
Appendix F, Revision A and B Photo and Parts Locator Diagrams, contains a photograph of
the Revision A and B SCXI-1120 signal conditioning module and the general and detailed
parts locator diagrams.
•
•
•
Appendix G, Customer Communication, contains forms you can use to request help from
National Instruments or to comment on our products and manuals.
The Glossary contains an alphabetical list and description of terms used in this manual,
including abbreviations, acronyms, metric prefixes, mnemonics, symbols, and terms.
The Index contains an alphabetical list of key terms and topics in this manual, including the
page where you can find each one.
Conventions Used in This Manual
The following conventions are used in this manual.
italic
Italic text denotes emphasis, a cross reference, or an introduction to a key
concept.
Lab board
Lab board refers to the Lab-LC, Lab-NB, Lab-PC, and Lab-PC+ boards,
unless otherwise noted.
MC
MC refers to the Micro Channel series computers.
MIO board
MIO board refers to the AT-MIO-16, AT-MIO-16D, AT-MIO-16F-5,
AT-MIO-16X, AT-MIO-64F-5, MC-MIO-16, NB-MIO-16, and
NB-MIO-16X series of multichannel I/O data acquisition boards.
monospace
Lowercase text in this font denotes text or characters that are to be literally
input from the keyboard, sections of code, programming examples, and
syntax examples. This font is also used for the proper names of disk
drives, paths, directories, programs, subprograms, subroutines, device
names, functions, variables, filenames, and extensions, and for statements
and comments taken from program code.
NB
NB refers to the NuBus series computers.
PC
PC refers to the IBM PC/XT, the IBM PC AT, and compatible computers.
SCXIbus
SCXIbus refers to the backplane in the chassis. A signal on the backplane
is referred to as the SCXIbus <signal name> line (or signal). The
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About This Manual
SCXIbus descriptor may be omitted when the meaning is clear.
Descriptions of all SCXIbus signals are given in Appendix C, SCXIbus
Connector.
Slot 0
Slot 0 refers to the power supply and control circuitry in the SCXI chassis.
Abbreviations, acronyms, metric prefixes, mnemonics, symbols, and terms are listed in the
Glossary.
Related Documentation
The following documents contain information that you may find helpful as you read this manual:
•
•
Your DAQ board user manual
Your SCXI chassis user manual
Customer Communication
National Instruments wants to receive your comments on our products and manuals. We are
interested in the applications you develop with our products, and we want to help if you have
problems with them. To make it easy for you to contact us, this manual contains comment and
configuration forms for you to complete. These forms are in Appendix G, Customer
Communication, at the end of this manual.
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Chapter 1
Introduction
This chapter describes the SCXI-1120; lists the contents of your SCXI-1120 kit; describes the
optional software, optional equipment, and custom cables; and explains how to unpack the
SCXI-1120 kit.
The SCXI-1120 is a class I module consisting of eight isolated input channels. The SCXI-1120
is a module for signal conditioning of thermocouples, volt sources, millivolt sources, 4 to 20 mA
current sources, and 0 to 20 mA process-current sources. Refer to your chassis manual for a
description of the different module classes. If external excitation is provided, thermistors, RTDs,
and strain gauges can also be measured. The SCXI-1120 can operate in two output modes–in the
Parallel-Output mode with all eight input channels connected in parallel to eight data acquisition
board channels, or in the Multiplexed-Output mode with all eight channels multiplexed into a
single data acquisition board channel.
The SCXI-1120 operates with full functionality with the National Instruments MIO-16 boards.
You can use the Lab-NB, the Lab-PC, the Lab-PC+, the Lab-LC, and the PC-LPM-16 boards
with the SCXI-1120, but these boards cannot scan the module when it is configured in the
Multiplexed-Output mode. These boards can perform only single-channel reads in this mode.
You can also use the SCXI-1120 with other systems that comply with the specifications given in
Chapter 2, Configuration and Installation. You can multiplex several SCXI-1120s into a single
channel, thus greatly increasing the number of analog input signals that can be digitized.
The addition of a shielded terminal block provides screw terminals for easy signal attachment to
the SCXI-1120. In addition, a temperature sensor for cold-junction compensation of
thermocouples is included on the terminal block. This cold-junction reference (CJR) is either
multiplexed along with the eight channels or connected by jumpers to a different channel of the
data acquisition board.
With the SCXI-1120, the SCXI chassis can serve as a fast-scanning signal conditioner for
laboratory testing, production testing, and industrial process monitoring.
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Introduction
Chapter 1
What Your Kit Should Contain
The contents of the SCXI-1120 kit (part number 776572-20) are listed as follows.
Kit Component
Part Number
SCXI-1120 module
SCXI-1120 User Manual
181695-01
320425-01
If your kit is missing any of the components, contact National Instruments.
Optional Software
This manual contains complete instructions for directly programming the SCXI-1120. You can
order separate software packages for controlling the SCXI-1120 from National Instruments.
When you combine the PC, AT, and MC data acquisition boards with the SCXI-1120, you can
use LabVIEW for Windows or LabWindows for DOS. LabVIEW and LabWindows are
innovative program development software packages for data acquisition and control applications.
LabVIEW uses graphical programming, whereas LabWindows enhances Microsoft C and
QuickBASIC. Both packages include extensive libraries for data acquisition, instrument control,
data analysis, and graphical data presentation.
Your National Instruments data acquisition board is shipped with the NI-DAQ software.
NI-DAQ has a library of functions that can be called from your application programming
environment. These functions include routines for analog input (A/D conversion), buffered data
acquisition (high speed A/D conversion), analog output (D/A conversion), waveform generation,
digital I/O, counter/timer, SCXI, RTSI, and self-calibration. NI-DAQ maintains a consistent
software interface among its different versions so you can switch between platforms with
minimal modifications to your code.
You can also use the SCXI-1120, together with the PC, AT, and MC data acquisition boards,
with NI-DAQ software for DOS/Windows/LabWindows. NI-DAQ software for
DOS/Windows/LabWindows comes with language interfaces for Professional BASIC, Turbo
Pascal, Turbo C, Turbo C++, Borland C++, and Microsoft C for DOS; and Visual Basic, Turbo
Pascal, Microsoft C with SDK, and Borland C++ for Windows. NI-DAQ software for
DOS/Windows/LabWindows is on high-density 5.25 in. and 3.5 in. diskettes.
You can use the SCXI-1120, together with the NB Series data acquisition boards, with
LabVIEW, a software system that features interactive graphics, a state-of-the-art user interface,
and a powerful graphical programming language. The LabVIEW Data Acquisition VI Library, a
series of VIs for using LabVIEW with National Instruments boards, is included with LabVIEW.
The LabVIEW Data Acquisition VI Library is functionally equivalent to the NI-DAQ software
for Macintosh.
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Chapter 1
Introduction
You can also use the SCXI-1120, combined with the NB Series data acquisition boards, with
NI-DAQ software for Macintosh. NI-DAQ software for Macintosh, which is shipped with all
National Instruments Macintosh data acquisition boards, comes with language interfaces for
MPW C, THINK C, Pascal, and Microsoft QuickBASIC. Any language that uses Device
Manager Toolbox calls can access NI-DAQ software for Macintosh.
Optional Equipment
Equipment
Part Number
SCXI-1320 front terminal block
SCXI-1328 high-accuracy isothermal terminal block
SCXI-1330 32-pin connector-and-shell assembly
SCXI-1340 cable assembly
SCXI-1341 Lab-NB/Lab-PC/Lab-PC+ cable assembly
SCXI-1342 PC-LPM-16 cable assembly
SCXI-1343 rear screw terminal adapter
SCXI-1344 Lab-LC cable assembly
SCXI-1346 shielded multichassis cable adapter
SCXI-1347 SCXI shielded cable assembly
with 1 m cable
776573-20
776573-28
776573-30
776574-40
776574-41
776574-42
776574-43
776574-44
776574-46
776574-471
776574-472
776574-475
776574-470
with 2 m cable
with 5 m cable
with 10 m cable
SCXI-1349 SCXI shielded cable assembly
with 1 m cable
776574-491
776574-492
776574-495
776574-490
776575-50
776582-01
180524-05
180524-10
with 2 m cable
with 5 m cable
with 10 m cable
SCXI-1350 multichassis adapter
SCXI process-current resistor kit
Standard ribbon cable
0.5 m
1.0 m
NB6 cable
0.5 m
1.0 m
181305-01
181305-10
Refer to the Signal Connections section in Chapter 2, Configuration and Installation, and to
Appendix E, SCXI-1120 Cabling, for additional information on cabling, connectors, and
adapters.
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Introduction
Chapter 1
Custom Cables
The SCXI-1120 rear signal connector is a 50-pin male ribbon-cable header. The manufacturer
part number used by National Instruments for this header is as follows:
•
AMP Inc. (part number 1-103310-0)
The mating connector for the SCXI-1120 rear signal connector is a 50-position polarized
ribbon-socket connector with strain relief. National Instruments uses a polarized or keyed
connector to prevent inadvertent upside-down connection to the SCXI-1120. Recommended
manufacturer part numbers for this mating connector are as follows:
•
•
Electronic Products Division/3M (part number 3425-7650)
T&B/Ansley Corporation (part number 609-5041CE)
Standard 50-conductor, 28 AWG, stranded ribbon cables that can be used with these connectors
are as follows:
•
•
Electronic Products Division/3M (part number 3365/50)
T&B/Ansley Corporation (part number 171-50)
The SCXI-1120 front connector is a 32-pin DIN C male connector with columns A and C even
pins only. The manufacturer part number used by National Instruments for this connector is as
follows:
•
Panduit Corporation (part number 100-932-023)
The mating connector for the SCXI-1120 front connector is a 32-pin DIN C female connector.
National Instruments uses a polarized connector to prevent inadvertent upside-down connection
to the SCXI-1120. Recommended manufacturer part numbers for this mating connector are as
follows:
•
•
Panduit Corporation (part number 100-932-434; straight-solder eyelet pins)
Panduit Corporation (part number 100-932-633; right-angle pins)
These connectors were selected to meet UL 1950 and UL 1244 for 1,500 Vrms isolation.
Unpacking
Your SCXI-1120 module is shipped in an antistatic package to prevent electrostatic damage to
the module. Several components on the module can be damaged by electrostatic discharge. To
avoid such damage in handling the module, take the following precautions:
•
Touch the antistatic package to a metal part of your SCXI chassis before removing the
module from the package.
•
Remove the module from the package and inspect the module for loose components or any
other sign of damage. Notify National Instruments if the module appears damaged in any
way. Do not install a damaged module into your SCXI chassis.
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Chapter 2
Configuration and Installation
This chapter describes the SCXI-1120 jumper configurations, installation of the SCXI-1120 into
the SCXI chassis, signal connections to the SCXI-1120, and cable wiring.
Module Configuration
The SCXI-1120 includes 46 jumpers that are shown in the parts locator diagrams in Figures 2-1
and 2-2.
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Configuration and Installation
Chapter 2
The jumpers are used as follows:
•
Fixed jumpers
-
-
-
On Revision A and B modules, jumper W42 is unused and should not be connected.
Jumper W45 is reserved and should not be reconfigured.
On Revision A and B modules, jumper W44 carries the SLOT0SEL* signal from the rear
signal connector, after buffering, to the SCXIbus INTR* line and should be left in the
factory-default position (position 1). On Revision C and later modules, jumper W44 does
not exist.
•
User-configurable jumpers
-
-
-
-
-
-
-
-
Jumper W43 carries the SCXIbus MISO line, after buffering, to the SERDATOUT signal
on the rear signal connector.
On Revision C and later modules, jumper 42 connects a pullup resistor to the
SERDATOUT signal on the rear signal connector.
Jumper W46 configures the guard, the analog output ground, and enables the
Pseudodifferential Reference mode.
Jumpers W1 through W8 configure the first-stage gain of channels 0 through 7,
respectively.
Jumpers W9 through W16 configure the second-stage gain of channels 0 through 7,
respectively.
Jumpers W17 through W24 configure the first-stage filtering of input channels 0 through
7, respectively.
Jumpers W25 through W40 configure the second-stage filtering of input channels 0
through 7, respectively.
Jumper W41 directly connects the temperature sensor to the rear signal connector. To do
so, set jumper W46 in the AB-R2 or AB-R0 position first.
Further configuration of the board is software controlled and will be discussed later in this
chapter.
Digital Signal Connections
The four digital signal connection jumpers have position 1 marked on the board. Position 3 is
not explicitly marked on the board.
The SCXI-1120 has three jumpers dedicated for communication between the data acquisition
board and the SCXIbus. These jumpers are W42, W43, and W44.
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Jumper W44
On Revision A and B modules, position 1 connects, after buffering, SLOT0SEL* to the SCXIbus
INTR* line. This is the factory-default setting and should not be changed. In this setting, the
data acquisition board controls the SCXIbus INTR* line. See the Timing Requirements and
Communication Protocol section later in this chapter, and Chapter 5, Programming, for
information on the use of the INTR* line. See Appendix E, SCXI-1120 Cabling, for the pin
equivalences of the SCXI-1120 rear signal connector and the data acquisition board I/O
connector.
Position 3 is reserved and should not be used.
On Revision C and later modules, jumper W44 is not loaded. SLOT0SEL* is always buffered to
the INTR* line.
Jumper W43
Position 1 connects, after buffering, the SCXIbus MISO line to the SERDATOUT pin of the rear
signal connector. In this setting, along with the proper setting of jumper W42, the data
acquisition board can read the Module ID Register of the SCXI-1120. This is the factory-default
setting. See the Timing Requirements and Communication Protocol section later in this chapter,
and Chapter 4, Register Descriptions, for information on reading the Module ID Register. See
Appendix E, SCXI-1120 Cabling, for the pin equivalences of the SCXI-1120 rear signal
connector and the data acquisition board I/O connector.
Position 3 disconnects SERDATOUT from the SCXIbus MISO line.
Jumper W42
On Revision A and B modules, jumper W42 should not be connected. On Revision C and later
modules, position 1 connects a 2.2 kΩ pullup resistor to the SERDATOUT line. Position 3 does
not connect the pullup resistor to the SERDATOUT line.
Using Jumpers W42 and W43
If the SCXI-1120 is not cabled to a data acquisition board, the positions of these jumpers do not
matter, so leave them in their factory-default positions (both in position 1).
If the SCXI-1120 is cabled to a data acquisition board, and the SCXI chassis that the SCXI-1120
is in, is the only SCXI chassis cabled to that data acquisition board, leave the jumpers in their
factory-default positions (both in position 1).
If the SCXI-1120 is cabled to a data acquisition board, and there are multiple SCXI chassis
cabled to that data acquisition board with shielded cables (you are using SCXI-1346 shielded
cable multichassis adapters), leave the jumpers in their factory-default positions (both in
position 1).
If the SCXI-1120 is cabled to a data acquisition board, and there are multiple SCXI chassis
cabled to that data acquisition board with ribbon cables (you are using SCXI-1350 multichassis
adapters), leave jumper W43 in its factory-default position (position 1). On all but one of the
SCXI-1120s that are cabled to the data acquisition board, move jumper W42 to position 3. It
does not matter which of the SCXI-1120 modules that are cabled to the data acquisition board
has jumper W42 set to position 1. If you have different types of modules cabled to the data
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acquisition board, those different modules will have jumpers similar to W43 and W42 of the
SCXI-1120. Set those jumpers on the different modules using the same method described here
for the SCXI-1120.
On Revision A and B SCXI-1120s, jumper W42 is not used. You set jumper W43 as explained
in the cases above, except in the case of a multichassis ribbon cable system. In a multichassis
ribbon cable system with Revision A and B SCXI-1120s cabled to the data acquisition board,
you can access the MISO line in only one chassis. Pick one of the chassis that has the
SCXI-1120 cabled to the DAQ board. Set jumper W43 on the SCXI-1120 to position 1. On the
SCXI-1120s that are in the other chassis and cabled to the data acquisition board, set jumper
W43 to position 3. Notice that you will only be able to access digital information from the
chassis that has the SCXI-1120 with jumper W43 set to position 1.
On Revision C and later modules, the SERDATOUT line is driven with an open-collector driver
(a driver that actively drives low or goes to a high-impedance state, relying on a pullup resistor to
make the signal line go high). When using a single chassis, leave W42 and W43 in position 1,
the factory default, on the SCXI-1120 that is connected to the data acquisition board. In this
setting, the module drives MISO to SERDATOUT and connects the necessary pullup resistor to
the SERDATOUT line. When using multiple chassis, leave jumper W43 in position 1 on all of
the SCXI-1120s that are cabled to the data acquisition board. Only one of the SCXI-1120s that
are cabled to the data acquisition board should have jumper W42 in position 1. It does not matter
which of the SCXI-1120s that are cabled to the data acquisition board has the pullup connected.
All of the other SCXI-1120 modules that are cabled to the data acquisition board should have
jumper W42 in position 3. The reason for this is that if too many pullup resistors are attached to
the SERDATOUT line, the drivers cannot drive the line low. See Table 2-1 for the description
and configuration of the jumper settings.
Table 2-1. Digital Signal Connections, Jumper Settings
Jumper
Description
Configuration
W42
Connects pullup to SERDATOUT
(Revision C and later) factory-
default setting.
3
•
2
•
1
•
W42
W43
Parking position (not connected on
Revision A and B)
3
2
1
•
•
•
3
2
1
Connects MISO to SERDATOUT
Factory-default setting.
•
•
•
3
2
1
•
•
•
W43
Parking position
(continues)
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Table 2-1. Digital Signal Connections, Jumper Settings (Continued)
Jumper
Description
Factory default
Configuration
W45
3
•
2
•
1
•
W44
Factory default
(Revision A and B modules only)
3
2
1
•
•
•
Analog Configuration
The SCXI-1120 has 42 analog configuration jumpers.
Before starting, notice that the jumper configurations for each channel are similar; only the
jumper reference designator number changes. When you learn how to configure one channel,
you can configure the other channels as well.
Grounding, Shielding, and Reference-Mode Selection
Jumper W46
Position B-R0R1 is the parked position and the factory-default setting.
Position AB-R0 connects the analog reference to the analog output ground (pins 1 and 2 on the
rear signal connector). Select this configuration when using an RSE data acquisition board. You
should not use differential input data acquisition boards when jumper W46 is in the AB-R0
position.
Position AB-R1 connects the analog reference to the SCXIbus guard.
Position AB-R2 enables the Pseudodifferential Reference mode and connects the analog
reference to the OUTREF pin on the rear signal connector. Select this mode when the
SCXI-1120 has to operate with data acquisition boards that have a nonreferenced single-ended
input (NRSE). Do not use differential-input data acquisition boards when jumper W46 is in the
AB-R2 position.
Note: The SCXI-1120 will drive pins 4, 6, 8, 10, 12, 14, 16, and 18 on the rear signal connector,
although the SCXI-1120 is in pseudodifferential mode.
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Table 2-2. Jumper W46 Settings
Jumper
Description
Configuration
W46
W46
W46
W46
Factory setting in parking position
•
•
•
•
•
•
B
A
R2 R1 R0
Connects the analog reference to
AOGND (pins 1 and 2 of the rear
signal connector). Use this connection
with RSE data acquisition boards.
•
•
•
•
•
B
A
•
R
2
R1
R0
Connects SCXIbus guard to the analog
reference
•
•
•
•
•
•
B
A
R2 R1 R0
Enables the Pseudodifferential
Reference mode (pin 19 of the rear
signal connector is connected to the
analog reference)
•
•
•
•
B
A
R2 R1 R0
Direct Temperature Connection
Jumper W41
When your SCXI-1120 is operating with a data acquisition board configured in a differential
mode, such as the MIO board, you can access the temperature sensor only in the Multiplexed-
Output mode. Direct temperature connection is not permissible to the data acquisition board.
This is the factory setting and is position 1 of the jumper block. Position 3 is not explicitly
marked.
If the temperature sensor needs to be accessed in parallel with the other eight outputs, or
scanned–without software interference–along with the other channels, you need to place W41 in
position 3 (this position is not explicitly marked on the module) and to configure your reference
to pseudodifferential or single-ended operation (jumper W46) with your data acquisition board
configured for the same reference scheme. In this position, the direct temperature sensor
connection is made on pin 18 of the rear signal connector and corresponds to ACH15 of the MIO
boards or the PC-LPM-16.
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Table 2-3. Jumper W41 Settings
Jumper
Description
Configuration
W41
Temperature sensor
accessed in MTS mode
(Factory setting)
3
3
2
2
1
1
W41
Temperature sensor
accessed in DTS mode,
data acquisition board
configured for NRSE or
RSE
Gain Jumpers
Each input channel has two gain stages. The first gain stage provides gains of 1, 10, 50, and 100,
and the second stage provides gains of 1, 2, 5, 10, and 20. Tables 2-4 and 2-5 show how to set
up the gain for each channel.
Table 2-4. Gain Jumper Allocation
Input Channel Number
First Gain Jumper
Second Gain Jumper
0
1
2
3
4
5
6
7
W1
W2
W3
W4
W5
W6
W7
W8
W9
W10
W11
W12
W13
W14
W15
W16
The board is shipped with the first-stage gain set to 100 (position A), and a second-stage gain set
to 10 (position D). To change the gain of your module, move the appropriate jumper on your
module to the position indicated in Tables 2-3 and 2-4. Refer to Figure 2-1, SCXI-1120 General
Parts Locator Diagram, and Figure 2-2, Detailed Parts Locator Diagram, for jumper locations
on your module.
To determine the overall gain of a given channel use the following formula:
Overall gain = First-stage gain x second-stage gain.
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Table 2-5. Gain Jumper Positions
Gain
Setting
Jumper Position
1
10
D
C
First-stage
50
B
100
A (Factory setting)
1
2
5
A
B
C
Second-stage
10
20
D (Factory setting)
E
Filter Jumpers
Two-stage filtering is also available on your SCXI-1120 module. The first stage is located in the
isolated section of the input channel, whereas the second stage is located in the nonisolated
section of your input channel. Two-stage filtering eliminates the noise generated by the isolation
amplifier, producing a higher signal-to-noise ratio. Furthermore, two filter bandwidths are
available, 10 kHz and 4 Hz.
Table 2-6. Filter Jumper Allocation
Input Channel
Number
First Filter Jumper
Second Filter Jumper
4 Hz
10 kHz
4 Hz
10 kHz
(Factory
Setting)
(Factory
Setting)
0
1
2
3
4
5
6
7
W17-A
W18-A
W19-A
W20-A
W21-A
W22-A
W23-A
W24-A
W17-B
W18-B
W19-B
W20-B
W21-B
W22-B
W23-B
W24-B
W25
W27
W29
W31
W33
W35
W37
W39
W26
W28
W30
W32
W34
W36
W38
W40
Your SCXI-1120 is shipped in the 4 Hz position. Remember to make sure that both stages are
set to the same bandwidth to ensure that the required bandwidth is achieved. Notice that one
jumper block is available for each filter stage.
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Hardware Installation
You can install the SCXI-1120 in any available SCXI chassis. After you have made any
necessary changes and have verified and recorded the jumper settings on the form in
Appendix G, Customer Communication, you are ready to install the SCXI-1120. The following
are general installation instructions, but consult the user manual or technical reference manual of
your SCXI chassis for specific instructions and warnings.
1. Turn off the computer that contains the data acquisition board or disconnect it from your
SCXI chassis.
2. Turn off the SCXI chassis. Do not insert the SCXI-1120 into a chassis that is turned on.
3. Insert the SCXI-1120 into the module guides. Gently guide the module into the back of the
slot until the connectors make good contact. If a cable assembly has already been installed in
the rear of the chassis, the module and cable assembly must be firmly engaged; however, do
not force the module into place.
4. Screw the front mounting panel of the SCXI-1120 to the top and bottom threaded strips of
your SCXI chassis.
5. If this module is to be connected to an MIO-16 data acquisition board, attach the connector at
the metal end of the SCXI-1340 cable assembly to the rear signal connector on the
SCXI-1120 module. Screw the rear panel to the rear threaded strip. Attach the loose end of
the cable to the MIO-16 board.
Note: For installation procedures with other SCXI accessories and data acquisition boards,
consult Appendix E, SCXI-1120 Cabling.
6. Check the installation.
7. Turn on the SCXI chassis.
8. Turn on the computer or reconnect it to your chassis.
The SCXI-1120 board is installed and ready for operation.
Signal Connections
This section describes the input and output signal connections to the SCXI-1120 board via the
SCXI-1120 front connector and rear signal connector, and includes specifications and connection
instructions for the signals given on the SCXI-1120 connectors.
Warning:
Connections that exceed any of the maximum ratings of input or output signals on
the SCXI-1120 can result in damage to the SCXI-1120 board and to the SCXIbus.
Maximum input ratings for each signal are given in this chapter under the
discussion of that signal. National Instruments is not liable for any damages
resulting from such signal connections.
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Front Connector
Figure 2-3 shows the pin assignments for the SCXI-1120 front connector.
Pin
Number
Signal
Name
Column
B
Signal
Name
A
C
CH0-
CH0+
CH1+
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
CH1-
CH2-
CH3-
CH2+
CH3+
CH4+
CH5+
CH4-
CH5-
CH6-
CH7-
CH6+
CH7+
8
RSVD
7
RSVD
RSVD
+5 V
6
5
MTEMP
4
3
CHSGND
DTEMP
2
1
Figure 2-3. SCXI-1120 Front Connector Pin Assignment
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Front Connector Signal Descriptions
Pin
A2
C2
Signal Name
CHSGND
DTEMP
Description
Chassis Ground – Tied to the SCXI chassis.
Direct Temperature Sensor – Connects the
temperature sensor to pin 18 of the rear signal
connector MCH7- when the terminal block is
configured for direct temperature connection and
jumper W41 is in position 3.
A4
+5 V
+5 VDC Source – Used to power the temperature
sensor on the terminal block. 0.2 mA of source not
protected.
C4
MTEMP
RSVD
Multiplexed Temperature Sensor – Connects the
temperature sensor to the output multiplexer.
A6, C6, C8
Reserved – Reserved for future use. Do not connect
any signals to these pins. TTL/CMOS output. They
are not protected.
A8, A10, C10, No Connect
A16, C16,A22,
Do not connect any signals to these pins.
C22, A28, C28
A12, A14, A18, CH7+ through CH0+
A26, A20, A24,
Positive Input Channels – The positive inputs to
channels 7 through 0, respectively.
A30, A32
C12, C14, C18, CH7- through CH0-
C20, C24, C26,
Negative Input Channels – The negative inputs to
channels 7 through 0, respectively.
C30, C32
The signals on the front connector are all analog with the exceptions of pins A6, C6, and C8.
The analog signals can be divided into two groups–the analog input channels, and the
temperature sensor.
Analog Input Channels
The positive input channels are located in column A. Their corresponding negative input
channels are located in column C. Each input corresponds to a separate amplifier and is fully
isolated from the other channels and from earth ground. The inputs are designed in a floating
single-ended configuration, thus the measured signal can be referenced to a ground level with
common-mode voltage up to 250 Vrms. For better noise immunity, connect the negative input
channel to the signal reference. If the measured signals are floating, connect the negative input
channel to chassis ground on the terminal block. Figure 2-4 shows how to connect a ground-
referenced signal. Figure 2-5 shows how to connect a floating signal. Figures 2-6 and 2-7 show
how to connect AC-coupled signals.
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+
+
+
V
s
V
out
-
-
+
High
CMV
I
V
cm
-
Module
Figure 2-4. Ground-Referenced Signal Connection with High Common-Mode Voltage
+
+
+
V
out
V
s
-
-
I
Module
Figure 2-5. Floating Signal Connection Referenced to Chassis Ground for Better
Signal-to-Noise Ratio
+
+
V
out
+
-
V
s
R
bias
-
I
Module
Figure 2-6. Floating AC-Coupled Signal Connection
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+
+
+
V
out
R
bias
-
V
s
-
I
+
-
High
CMV
V
cm
Module
Figure 2-7. AC-Coupled Signal Connection with High Common-Mode Voltage
For AC-coupled signals, an external resistor from the positive input channel to the signal
reference should be connected. This is needed to provide the DC path for the positive input bias
current. Typical resistor values range from 100 kΩ to 1 MΩ. This solution, although necessary
in this case, lowers the input impedance of the input channel amplifier and introduces an
additional offset voltage proportional to the input bias current and to the resistor value used. The
typical input bias current of the amplifier consists of ±80 pA and a negligible offset drift current.
When a 100 kΩ resistor is used, this will result into ±8 µV of offset, which is insignificant in
most applications. However, if larger valued bias resistors are used, significant input offset may
result. To determine the maximum offset introduced by the biasing resistor, use the following
equation:
V
= I x R
bias bias
ofsbias
The input signal range of an SCXI-1120 input channel is ±5 V/ G
referenced to its negative
is equal to the product of the first-stage and second-stage gains. In addition,
total
input, where G
total
the input channels are overvoltage protected to 240 Vrms with power on or off at a maximum of
4.5 mArms sink or source.
Warning: Exceeding the input signal range and the common-mode input range results in
distorted signals. Exceeding the maximum input voltage rating (250 Vrms between
terminals, and between any terminal and ground) can result in damage to the
SCXI-1120, the SCXIbus, and the data acquisition board. National Instruments is
not liable for any damages resulting from such signal connections.
Temperature Sensor Connection
Pins C2 and C4 are dedicated for connecting the temperature sensor to the SCXI-1120. The
temperature sensor is not isolated and is referenced to the chassis ground. The connection is
overvoltage protected to ±25 VDC with power on and ±15 VDC with power off.
Warning: Exceeding the overvoltage protection on the temperature connections can result in
damage to the SCXI-1120, the SCXIbus, and the data acquisition board. National
Instruments is not liable for any damages resulting from such signal connections.
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Connector-and-Shell Assembly
Two types of signal connectors are available to connect the signals to the SCXI-1120 inputs.
The first, the SCXI-1330 32-pin DIN C female connector-and-shell assembly, is available in a kit
listed in the Optional Equipment section in Chapter 1, Introduction. The connector has eyelet
ends for easy hook-and-solder wire connection. With this kit, you can build your own signal
cable to connect to the SCXI-1120 inputs. After you have built the cable, the shell covers and
protects the connector. Perform the following steps to assemble and mount the connector-and-
shell assembly to your SCXI module:
1. Refer to Figure 2-8, Assembling and Mounting the SCXI-1330 Connector-and-Shell
Assembly, and the diagram included with your SCXI-1330 kit to build the connector-and-
shell assembly.
2. Turn off the computer that contains your data acquisition board or disconnect the board
from your SCXI chassis.
3. Turn off your SCXI chassis.
4. Slide the selected module out of the SCXI chassis.
5. Remove the module cover.
6. Place one jack screw as indicated in Figure 2-8.
7. While holding the jack screw in place, insert the lock washer and then the nut. Notice that
you might need long-nose pliers to insert the washer and nut.
8. Tighten the nut by holding it firmly and rotating the jack screw.
9. Repeat steps 6 through 8 for the second jack screw.
10. Replace the module cover and tighten the grounding screw.
11. Slide the module back in place.
12. Connect the SCXI-1330 to your module connector and secure it by tightening both
mounting screws.
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Shell Assembly
Mounting Screw
Connector
Jack
Screws
SCXI-1120 Module
Nut
Lock Washers
Nut
Shell Assembly
Grounding Screw
Mounting Screw
Figure 2-8. Assembling and Mounting the SCXI-1330 Connector-and-Shell Assembly
SCXI-1320 and SCXI-1328 Terminal Blocks
The second type of connector available to connect the signals to the SCXI-1120 inputs is a
terminal block with an onboard temperature sensor and screw terminals for easy connection.
One terminal block, the SCXI-1328 isothermal terminal block, has a high-accuracy onboard
temperature sensor. The terminal block kits are listed in the Optional Equipment section in
Chapter 1, Introduction.
The SCXI-1320 terminal block and SCXI-1328 high-accuracy isothermal terminal block consist
of a shielded board with supports for connection to the SCXI-1120 input connector. The
terminal blocks have 18 screw terminals for easy connection. Eight pairs of screw terminals are
for signal connection to the eight inputs of the SCXI-1120, and one pair of screw terminals
connects to the chassis ground.
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The following warnings contain important safety information concerning hazardous voltages and
terminal blocks.
Warnings: When using the terminal block with high common-mode voltages, you must
insulate your signal wires appropriately. National Instruments is not liable for any
damages or injuries resulting from inadequate signal wire insulation.
If high voltages (≥42 Vrms) are present, you must connect the safety earth ground
to the strain-relief tab. This complies with UL 1244 and protects against electric
shock when the terminal block is not connected to the chassis. To connect the
safety earth ground to the strain-relief tab, run an earth ground wire in the cable
from the signal source to the terminal block. National Instruments is not liable for
any damages or injuries resulting from inadequate safety earth ground
connections.
When connecting your signals to the SCXI-1320 terminal block for use with the SCXI-1120,
follow the labeling on the SCXI-1320 indicated under the module type column for the
SCXI-1120 as indicated in Figure 2-9.
When connecting your signals to the SCXI-1328 high-accuracy isothermal terminal block for use
with the SCXI-1120, follow the labeling on the SCXI-1328 indicated along the module type row
for the SCXI-1120 as indicated in Figure 2-10.
Terminal Block Temperature Sensor
To accommodate thermocouples with the SCXI-1120, the terminal block has a temperature
sensor for cold-junction compensation. You can connect the temperature sensor in two ways:
•
•
You can connect the temperature sensor to the MTEMP pin (C4) on the module front
connector and multiplex the sensor at the output multiplexer along with amplifier outputs.
This is the Multiplexed Temperature Sensor (MTS) mode. Refer to the Configuration
Register section in Chapter 4, Register Descriptions, for further details.
You can connect the temperature sensor to a separate data acquisition channel via pin 18 on
the module rear signal connector when you set SCXI-1120 jumper W41 to position 3. This is
the Direct Temperature Sensor (DTS) mode.
Note: Use an average of a large number of samples to obtain the most accurate reading.
Noisy environments require more samples for greater accuracy.
The SCXI-1320 temperature sensor outputs 10 mV/°C and has an accuracy of ±1° C over the
0° to 55° C temperature range. To determine the temperature, use the following formulas:
T (°C) = 100(VTEMPOUT
)
T (°C) 9
[
]
T (°F) =
+32
5
where VTEMPOUT is the temperature sensor output and T (°F) and T (°C) are the temperature
readings in degrees Fahrenheit and degrees Celsius, respectively.
The SCXI-1328 temperature sensor outputs 0.62 to 0.07 V from 0° to 55° C and has an accuracy
of ±0.35° C over the 15° to 35° C range and ±0.65° C over the 0° to 15° and 35° to 55° C ranges.
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To determine the temperature, use the following formulas:
T (°C) = T = TK - 273.15
where TK is the temperature in kelvin
1
TK =
3
a + b lnR +c lnR
(
)
(
)
T
T
[
]
a = 1.288 x 10-3
b = 2.356 x 10-4
c = 9.556 x 10-8
RT = resistance of the thermistor in Ω
VTEMPOUT
RT = 50,000
2.5 − VTEMPOUT
VTEMPOUT = output voltage of the temperature sensor
T (°C) 9
[
]
T (°F) =
+32
5
where T (°F) and T (°C) are the temperature readings in degrees Fahrenheit and degrees Celsius,
respectively.
Terminal Block Jumper Configuration
In addition to the screw terminals, the terminal block has one jumper for configuring the onboard
temperature sensor. When you set jumper W1 on the terminal block to the MTEMP position, the
jumper connects the temperature sensor to the SCXI-1120 output multiplexer. This is the factory
setting. The DTEMP position connects the temperature sensor to SCXI-1120 jumper W41.
In both MTS and DTS modes, the reference to the temperature sensor signal is the SCXI-1120
analog ground that is connected to MCHO- in the MTS mode, or to OUTREF or AOGND (with
SCXI-1120 jumper W46 set in positions AB-R2 and AB-R0, respectively) in the DTS mode.
One jumper block comprises both positions; thus, you can use only one type of configuration at a
time. The parking position for the jumper block is the MTEMP position (the temperature sensor
is disabled until the RTEMP bit in the Configuration Register selects the sensor).
Tables 2-7 and 2-8 show the jumper settings on the SCXI-1320 and SCXI-1328 terminal blocks.
Table 2-7. Jumper Settings on the SCXI-1320 Terminal Block
Jumper
Position
Description
W1
MTS mode selected; factory
setting; parking position
MTEMP
DTEMP
W1
DTS mode selected
MTEMP
DTEMP
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Table 2-8. Jumper Settings on the SCXI-1328 Terminal Block
Position Description
Jumper
W1
MTS mode selected; factory
setting; parking position
•
•
•
•
DTEMP
DTEMP
MTEMP
MTEMP
W1
DTS mode selected
•
•
Terminal Block Signal Connection
Warnings: The chassis GND terminals on your terminal block are for grounding high
impedance sources such as a floating source (1 mA maximum). Do not use these
terminals as safety earth grounds.
If high voltages (≥42 Vrms) are present, you must connect the safety earth ground
to the strain-relief tab. This complies with UL 1244 and protects against electric
shock when the terminal block is not connected to the chassis. To connect the
safety earth ground to the strain-relief tab, run an earth ground wire in the cable
from the signal source to the terminal block. National Instruments is not liable for
any damages or injuries resulting from inadequate safety earth ground
connections.
Shock Hazard: This unit should only be opened by qualified personnel aware of
the dangers involved. Disconnect all power before removing cover. Always
install grounding screw.
!
To connect the signal to the terminal block, use the following procedure:
1. Remove the grounding screw of the top cover.
2. Snap out the top cover of the shield by placing a screwdriver in the groove at the bottom of
the terminal block.
3. Slide the signal wires, one at a time, through the front panel strain-relief opening. You can
add insulation or padding if necessary.
4. Connect the wires to the screw terminals by wrapping the wires around the screws and
tightening the screws without letting the wires slip out.
5. Tighten the larger strain-relief screws.
6. Snap the top cover back in place.
7. Reinsert the grounding screw to ensure proper shielding.
8. Connect the terminal block to the SCXI-1120 front connector as explained in the Terminal
Block Installation section later in this chapter.
Figure 2-9 shows a parts locator diagram for the SCXI-1320 terminal block. Figure 2-10 shows
a parts locator diagram for the SCXI-1328 terminal block.
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Terminal Block Installation
To connect the terminal block to the SCXI-1120 front connector, perform the following steps:
1. Connect the SCXI-1120 front connector to its mating connector on the terminal block.
2. Make sure that the SCXI-1120 top and bottom thumbscrews do not obstruct the rear panel of
the terminal block.
3. Tighten the top and bottom screws on the back of the terminal block to hold it securely in
place.
Rear Signal Connector
Note: If you will be using the SCXI-1120 with a National Instruments data acquisition board
and cable assembly, you do not need to read the remainder of this chapter. If you will
also be using the SCXI-1180 feedthrough panel, the SCXI-1343 rear screw terminal
adapter, or the SCXI-1351 one-slot cable extender with the SCXI-1120, you should read
this section.
Figure 2-11 shows the pin assignments for the SCXI-1120 rear signal connector.
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AOGND
MCH0+
MCH1+
MCH2+
MCH3+
MCH4+
MCH5+
MCH6+
MCH7+
OUTREF
AOGND
MCH0-
MCH1-
MCH2-
MCH3-
MCH4-
1
3
5
7
9
2
4
6
8
10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44
45 46
47 48
49 50
MCH5-
MCH6-
MCH7-
DIG GND
SERDATIN
DAQD*/A
SERDATOUT
SLOT0SEL*
DIG GND
SERCLK
SCANCLK
RSVD
Figure 2-11. SCXI-1120 Rear Signal Connector Pin Assignment
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Rear Signal Connector Signal Descriptions
Pin
Signal Name
Description
1-2
AOGND
Analog Output Ground – Connected to the analog
reference when jumper W46 is in position AB-R0.
3-18
19
MCH0± through MCH7± Analog Output Channels 0 through 7 – Connects to
the data acquisition board differential analog input
channels.
OUTREF
Output Reference – Serves as the reference node for
the analog output channels and the temperature
sensor–in the DTS mode–in the Pseudodifferential
Reference mode. It should be connected to the
analog input sense of the NRSE data acquisition
board.
24, 33
DIG GND
Digital Ground – Supply the reference for data
acquisition board digital signals and are tied to the
module digital ground.
25
26
27
SERDATIN
SERDATOUT
DAQD*/A
Serial Data In – Taps into the SCXIbus MOSI line
to provide serial input data to a module or Slot 0.
Serial Data Out – Taps into the SCXIbus MISO line
to accept serial output data from a module.
Data Acquisition Board Data/Address Line – Taps
into the SCXIbus D*/A line to indicate to the
module whether the incoming serial stream is data
or address information.
29
36
37
43
SLOT0SEL*
SCANCLK
SERCLK
RSVD
Slot 0 Select – Taps into the SCXIbus INTR* line
to indicate whether the information on MOSI is
being sent to a module or Slot 0.
Scan Clock – Indicates to the SCXI-1120 that a
sample has been taken by the data acquisition board
and causes the SCXI-1120 to change channels.
Serial Clock – This signal taps into the SCXIbus
SPICLK line to clock the data on the MOSI and
MISO lines.
Reserved.
All other pins are not connected.
See the Timing Requirements and Communication Protocol section later in this chapter for more
detailed information on timing.
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The signals on the rear signal connector can be classified as analog output signals, digital I/O
signals, or timing I/O signals. Signal connection guidelines for each of these groups are given in
the following section.
Analog Output Signal Connections
Pins 1 through 19 of the rear signal connector are analog output signal pins. Pins 1 and 2 are
AOGND signal pins. AOGND is an analog output common signal that is routed through jumper
W46 to the analog reference on the SCXI-1120. You can use these pins for a general analog
power ground tie point to the SCXI-1120 if necessary. In particular, when using differential
input data acquisition boards, such as the MIO-16 board, it is preferable to leave jumper W46 in
its factory setting or in position AB-R1 to avoid ground loops. With data acquisition boards that
are configured for referenced single-ended (RSE) measurements, jumper W46 should be in
position AB-R0 to connect the SCXI-1120 analog ground reference to the data acquisition analog
ground. Pin 19 is the OUTREF pin, and is connected internally to the analog reference when
jumper W46 is in position AB-R2. Pins 3 through 18 are the analog output channels of the
SCXI-1120. Pins 3 and 4, or MCH0±, are a multiplexed output of all eight channels and the
temperature sensor output. Pins 5 through 18, or MCH1± through MCH7±, are a parallel
connection of channels 1 through 7 to the rear signal connector. Pin 18 is a direct connection to
the temperature sensor when jumper W41 is in position 3. Notice that the temperature sensor is
located on the terminal block. For further details on configuring the temperature sensor output,
refer to the SCXI-1320 and SCXI-1328 Terminal Blocks section earlier in this chapter.
Warning: The SCXI-1120 analog outputs are not overvoltage protected. Applying external
voltage to these outputs can result in damage to the SCXI-1120. National
Instruments is not liable for any damages resulting from such signal connections.
Note: The SCXI-1120 analog outputs are short-circuit protected.
Digital I/O Signal Connections
Pins 24 through 27, 29, 33, 36, 37, and 43 constitute the digital I/O lines of the rear signal
connector. They are divided into three categories–the digital input signals, the digital output
signals, and the digital timing signals.
The digital input signals are pins 24, 25, 27, 29, 33, and 37. The data acquisition board uses
these pins to configure the SCXI module that is under data acquisition board control. Each
digital line emulates the SCXIbus communication signals as follows:
•
•
Pin 25 is SERDATIN and is equivalent to the SCXIbus MOSI serial data input line.
Pin 27 is DAQD*/A and is equivalent to the SCXIbus D*/A line. It indicates to the module
whether the incoming serial stream on SERDATIN is data (DAQD*/A = 0) or address
(DAQD*/A = 1) information.
•
Pin 29 is SLOT0SEL* and is equivalent to the SCXIbus INTR* line. It indicates whether the
data on the SERDATIN line is being sent to Slot 0 (SLOT0SEL* = 0) or to a module
(SLOT0SEL* = 1).
•
•
Pins 24 and 33 are the digital ground references for the data acquisition board digital signals
and are tied to the module digital ground.
Pin 37 is SERCLK and is equivalent to the SCXIbus SPICLK line and is used to clock the
serial data on the SERDATIN line into the module registers.
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The digital output signal is pin 26:
•
Pin 26 is SERDATOUT and is equivalent to SCXIbus MISO when jumper W43 is in
position 1.
The digital I/O signals of the SCXI-1120 match the digital I/O lines of the MIO-16 board. When
used with an SCXI-1341, SCXI-1342, or SCXI-1344 cable assembly, the SCXI-1120 signals
match the digital lines of the Lab-NB/Lab-PC+/Lab-LC boards and the PC-LPM-16 board,
respectively. Table 2-9 lists the equivalences. For more information, consult Appendix E,
SCXI-1120 Cabling.
Table 2-9. SCXIbus to SCXI-1120 Rear Signal Connector to
Data Acquisition Board Pin Equivalences
SCXIbus Line
SCXI-1120
Rear Signal
Connector
MIO-16 Board Lab-NB/Lab-PC/
Lab-PC+/Lab-LC
PC-LPM-16
MOSI
D*/A
INTR*
SPICLK
MISO
SERDATIN
DAQD*/A
SLOT0SEL*
SERCLK
ADIO0
ADIO1
ADIO2
EXTSTROBE*
BDIO0
PB4
PB5
PB6
PB7
PC1
DOUT4
DOUT5
DOUT6
DOUT7
DIN6
SERDATOUT
The digital timing signals are pins 36 and 43:
•
Pin 36 is used as a clock by the SCXI-1120 to increment the MUXCOUNTER after each
conversion by the data acquisition board during scanning. This signal is referred to as
SCANCLK. See Chapter 3, Theory of Operation, for a description of MUXCOUNTER.
•
Pin 43 is a reserved digital input.
The following specifications and ratings apply to the digital I/O lines.
Absolute maximum voltage
input rating
5.5 V with respect to DIG GND
Digital input specifications (referenced to DIG GND):
V
IH input logic high voltage
2 V minimum
VIL input logic low voltage
0.8 V maximum
II input current leakage
±1 µA maximum
Digital output specifications (referenced to DIG GND):
V
OH output logic high voltage 3.7 V minimum at 4 mA maximum
VOL output logic low voltage
0.4 V maximum at 4 mA maximum
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Chapter 2
Timing Requirements and Communication Protocol
Timing Signal
The data acquisition timing signal is SCANCLK.
SCANCLK is used to increment MUXCOUNTER on its rising edge. Figure 2-12 shows the
timing requirements of the SCANCLK signal. These requirements will ensure that SCANCLK
is properly transmitted over TRIG0.
Thigh
Tlow
SCANCLK
T
T
Time low before rising edge
Time high before falling edge
400 nsec minimum
250 nsec minimum
low
high
Figure 2-12. SCANCLK Timing Requirements
For output selection time specifications, refer to Appendix A, Specifications.
Communication Signals
This section describes the methods for communicating on the Serial Peripheral Interface (SPI)
bus and their timing requirements. The communication signals are SERDATIN, DAQD*/A,
SLOT0SEL*, SERDATOUT, and SERCLK. Furthermore, SS* is produced by Slot 0 according
to data acquisition board programming, and SS* timing relationships will also be discussed. For
information on the Slot 0 Slot-Select Register, consult Chapter 4, Register Descriptions.
The data acquisition board determines to which slot it will talk by writing a slot-select number to
Slot 0. In the case of an SCXI-1001 chassis, this write also determines to which chassis the data
acquisition board will talk. Writing a slot-select number is also used in programming the Slot 0
hardscan circuitry. See Chapter 5, Programming, for information on programming the Slot 0
hardscan circuitry.
The following sections detail the procedure for selecting a slot in a particular chassis.
Figure 2-13 illustrates the timing of this procedure with the example case of selecting Slot 11 in
Chassis 9. Notice that the factory-default chassis address for the SCXI-1000 is address 0. For
information on changing the address of your chassis, consult the SCXI-1000/1001 User Manual.
An SCXI-1000 chassis will respond to any chassis number.
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SLOT0SEL*
Tss_dis
SS*X
Chassis Y
SS*11
Chassis 9
Tclk_wait
Tss_en
SERCLK
Tslot0sel*_wait
SERDATIN
0
1
0
0
1
1
0
1
1
Chassis ID = 9
SLOT0SEL* low to SS* disabled
SLOT0SEL* low to first rising edge on SERCLK
Last rising edge on SERCLK to SLOT0SEL* high
SLOT0SEL* high to SS* enabled
Slot 11
T
T
T
T
200 nsec maximum
75 nsec minimum
250 nsec minimum
350 nsec maximum
ss _ dis
_ wait
clk
slot0sel* wait
_
ss _ en
Figure 2-13. Slot-Select Timing Diagram
To write the 16-bit slot-select number to Slot 0, follow these steps:
1. Initial conditions:
SERDATIN = don't care.
DAQD*/A = don't care.
SLOT0SEL* = 1.
SERCLK = 1.
2. Clear SLOT0SEL* to 0. This will deassert all SS* lines to all modules in all chassis.
3. For each bit, starting with the MSB, perform the following action:
a. SERDATIN = bit to be sent. These bits are the data that are being written to the
Slot-Select Register.
b. SERCLK = 0.
c. SERCLK = 1. This rising edge clocks the data.
4. Set SLOT0SEL* to 1. This will assert the SS* line of the module whose slot number was
written to Slot 0. If multiple chassis are being used, only the appropriate slot in the chassis
whose address corresponds to the written chassis number will be selected. When no
communication is taking place between the data acquisition board and any modules, you
should write zero to the Slot-Select Register to ensure that no accidental writes occur.
Figure 2-14 shows the timing requirements on the SERCLK and SERDATIN signals. You must
observe these timing requirements for all communications. T
SCXI-1120.
is a specification of the
delay
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T
high
T
low
SERCLK
SERDATIN
T
setup
T
hold
T
delay
SERDATOUT
T
T
T
T
T
Minimum low time
Minimum high time
SERDATIN setup time
SERDATIN hold time
SERDATOUT delay
65 nsec minimum
low
400 nsec minimum
200 nsec minimum
200 nsec minimum
350 nsec maximum
high
setup
hold
delay
Figure 2-14. Serial Data Timing Diagram
After the Slot-Select line to an SCXI-1120 has been asserted, you can write to its Configuration
Register and read from its Module ID Register using the following protocols. The contents of
the Module ID Register are reinitialized by deasserting Slot-Select. After the 32 bits of data are
read from the Module ID Register, further data will be zeros until reinitialization occurs.
To write to the Configuration Register, follow these steps:
1. Initial conditions:
SS* asserted low.
SERDATIN = don't care.
DAQD*/A = 0 (indicates data will be written to Configuration Register).
SLOT0SEL* = 1.
SERCLK = 1 (and has not transitioned since SS* went low).
2. For each bit to be written:
Establish the desired SERDATIN level corresponding to this bit.
SERCLK = 0.
SERCLK = 1. Clock the data.
3. Pull SLOT0SEL* low to deassert the SS* line and establish conditions for writing a new
slot-select number to the Slot 0 Slot-Select Register.
4. If you are not selecting another slot, you should write zero to the Slot 0 Slot-Select Register.
Figure 2-15 illustrates a write to the SCXI-1120 Configuration Register of the binary pattern:
10000011 00001111
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SLOT0SEL*
SS*
SERCLK
SERDATIN
1 0 0 0 0 0 1 1 0 0 0 0 1 1 1 1
Figure 2-15. Configuration Register Write Timing Diagram
To read from the Module ID Register, follow these steps:
1. Initial conditions:
SS* asserted low.
SERDATIN = don't care.
DAQD*/A = 1. Make sure DAQD*/A does not go low or erroneous data will be written
to the Configuration Register.
SLOT0SEL* = 1.
SERCLK = 1 (and has not changed since SS* went low).
2. For each bit to be read:
SERCLK = 0.
SERCLK = 1. Clock the data.
Read the level of the SERDATOUT line.
3. Pull SLOT0SEL* low to deassert the SS* line and establish conditions for writing a new
slot-select number to the Slot 0 Slot-Select Register.
4. If you are not selecting another slot, you should write zero to the Slot 0 Slot-Select Register.
Figure 2-16 illustrates a read of the SCXI-1120 Module ID Register.
SLOT0SEL*
SS*
SERCLK
Tdelay
SERDATOUT
0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
byte 0 = 4 byte 1 = 0 byte 2 = 0 byte 3 = 0
SS* high to SERDATOUT high
T
350 nsec maximum
delay
Figure 2-16. SCXI-1120 Module ID Register Timing Diagram
For further details on programming these signals, refer to Chapter 5, Programming.
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Chapter 3
Theory of Operation
This chapter contains a functional overview of the SCXI-1120 module and explains the operation
of each functional unit making up the SCXI-1120.
Functional Overview
The block diagram in Figure 3-1 illustrates the key functional components of the SCXI-1120.
Isolated Section
SCXIbus
Nonisolated
Section
Input Channel 0
+
+
+
-
Digital
Interface
and
Input Channel 1
Input Channel 6
+
Control
-
•
•
•
•
Timing
and
Analog
Output
Stage
•
•
•
•
+
+
+
-
Input Channel 7
+
-
Temperature Sensor
Figure 3-1. SCXI-1120 Block Diagram
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Theory of Operation
Chapter 3
The major components of the SCXI-1120 are as follows:
•
•
•
•
SCXIbus connector
Digital interface
Digital control circuitry
Timing and analog circuitry
The SCXI-1120 consists of eight isolated amplifier channels with gains of 1, 2, 5, 10, 20, 50,
100, 200, 500, 1,000, and 2,000. The SCXI-1120 also has a digital section for automatic control
of channel scanning, temperature selection, and MUXCOUNTER clock selection.
The theory of operation of each of these components is explained in the rest of this chapter.
SCXIbus Connector
Figure 3-2 shows the pinout of the SCXIbus connector.
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GUARD
GUARD
GUARD
AB0+
A1
B1
A2
B2
D1
C1
D2
C2
GUARD
GUARD
GUARD
AB0-
GUARD
GUARD
GUARD
A3
B3
A4
D3
C3
D4
GUARD
GUARD
GUARD
B4
C4
GUARD
GUARD
GUARD
A5
B5
A6
D5
C5
D6
GUARD
GUARD
GUARD
B6
C6
A7
D7
B7
C7
A8
D8
B8
C8
A9
D9
B9
C9
A10
B10
A11
B11
A12
B12
A13
B13
A14
B14
A15
B15
A16
B16
A17
B17
A18
B18
A19
B19
A20
B20
A21
B21
A22
B22
A23
B23
A24
B24
D10
C10
D11
C11
D12
C12
D13
C13
D14
C14
D15
C15
D16
C16
D17
C17
D18
C18
D19
C19
D20
C20
D21
C21
D22
C22
D23
C23
D24
C24
CHSGND
CHSGND
CHSGND
CHSGND
CHSGND
RSVD
INTR*
D*/A
V-
RESET*
MISO
V-
V-
V-
CHSGND
CHSGND
V+
V+
+5 V
SPICLK
TRIG0
SS*
CHSGND
CHSGND
V+
V+
+5 V
MOSI
SCANCON
Figure 3-2. SCXIbus Connector Pin Assignment
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Theory of Operation
Chapter 3
SCXIbus Connector Signal Descriptions
Pin
Signal Name
Description
A1, B1, C1, D1, GUARD
A2, D2, A3, B3,
C3, D3, A4, D4,
A5, B5, C5, D5,
A6, D6
Guard – Shields and guards the analog bus lines
from noise.
B2
AB0+
Analog Bus 0+ – Positive analog bus 0 line. Used
to multiplex several modules to one analog signal.
C2
AB0-
Analog Bus 0- – Negative analog bus 0 line. Used
to multiplex several modules to one analog signal.
C13-C17, A21, CHSGND
B21, C21, D21
Chassis Ground – Digital and analog ground
reference.
C18
A19
RSVD
Reserved.
RESET*
Reset – When pulled low, reinitializes the module to
its power-up state. Totem pole. Input.
B19
C19
MISO
D*/A
Master-In-Slave-Out – Transmits data from the
module to the SCXIbus. Open collector. I/O.
Data/Address – Indicates to the module whether
address information or data information is being
sent to the module on MOSI. Open collector. I/O.
D19
INTR*
Interrupt – Active low. Causes data that is on
MOSI to be written to the Slot-Select Register
Slot 0. Open collector. Output.
A20, B20, C20, V-
D20
Negative Analog Supply – -18.5 V to -25 V.
Positive Analog Supply – +18.5 V to +25 V.
+5 VDC Source – Digital power supply.
A22, B22, C22, V+
D22
A23, D23
B23
+5 V
SPICLK
Serial Peripheral Interface (SPI) Clock – Clocks the
serial data on the MOSI and MISO lines. Open
collector. I/O.
C23
MOSI
Master-Out-Slave-In – Transmits data from the
SCXIbus to the module. Open collector. I/O.
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Pin
Signal Name
Description (continued)
A24
TRIG0
TRIG0 – General-purpose trigger line used by the
SCXI-1120 to send SCANCLK to other modules or
receive SCANCLK from other modules. Open
collector. I/O.
B24
C24
SS*
Slot Select – When low, enables module
communications over the SCXIbus. Totem pole.
Input.
SCANCON
Scanning Control – Combination output enable and
reload signal for scanning operations. Totem pole.
Input.
All other pins are not connected.
MOSI, MISO, SPICLK, and SS* form a synchronous communication link that conforms with
SPI using an idle-high clock and second-edge data latching. D*/A, INTR*, and RESET* are
additional control signals.
When the module is being used in an SCXI-1000 or SCXI-1001 chassis, the data acquisition
board, via the module rear signal connector, must tap into the open-collector backplane signal
lines as a master to write to the module. The signal connections from the rear signal connector to
the backplane are shown in Table 3-1.
Table 3-1. SCXIbus Equivalents for the Rear Signal Connector
Rear Signal Connector
Signal
SCXIbus Equivalent
SERDATIN
DAQD*/A
SLOT0SEL*
MOSI
D*/A
INTR* Jumper W44 must be set to position 1
(Revision A and B modules only)
SPICLK
SERCLK
SERDATOUT
MISO
Jumper 43 must be set to position 1
The SCXI-1120 module converts the data acquisition board signals to open-collector signals on
the backplane of the SCXI chassis. In order for the data acquisition board to talk to a slot, the
board must first assert the SS* for that slot. This is done by asserting INTR* low, writing a
16-bit number over MOSI corresponding to the desired slot (and chassis if an SCXI-1001 chassis
is being used), and then releasing INTR* high. At this point, the SS* of the desired slot is
asserted low and the data acquisition board can communicate with the module in that slot
according to the SPI protocol.
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Digital Interface
Figure 3-3 shows a diagram of the SCXI-1120 and SCXIbus digital interface circuitry.
SCXIbus
SERDATIN
Buffered Serial
Data
DAQD*/A
Digital
Interface
SLOT0SEL*
Buffered Digital
Signal Controls
SERCLK
SERDATOUT
Figure 3-3. Digital Interface Circuitry Block Diagram
The digital interface circuitry is divided into a data acquisition section and an SCXIbus section.
The SCXI-1120 connects to the SCXIbus via a 4x24 metral receptacle and to the data acquisition
board via a 50-pin ribbon-cable header. The digital interface circuitry buffers the digital signals
from the data acquisition board and the SCXIbus and sends signals back and forth between the
data acquisition board and the SCXIbus.
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Digital Control Circuitry
Figure 3-4 diagrams the SCXI-1120 digital control.
Serial Data Out
Module ID Register
Buffered
Serial Data In
Input Channel
Select
Configuration
Register
Buffered Digital
Control Signals
Output
SCANCLK
Path
Control
Stage
Control
Hardware
Scan
Control
Figure 3-4. SCXI-1120 Digital Control
The digital control section consists of the Configuration Register and the Module ID Register.
The Configuration Register is a two-byte, serial-in, parallel-out shift register. Data is received on
the MOSI line from either Slot 0 or the data acquisition board when SS* is enabled and D*/A
indicates data transfer (D*/A low). The Configuration Register provides channel selection and
configures the SCXI-1120 for scanning options. All the control bits are fed into a latch before
being routed to the rest of the module. The channel-select bits are taken directly from the shift
register. Complete descriptions of the register bits are given in Chapter 4, Register Descriptions.
Writes to the Configuration Register require the following steps:
1. SS* goes low, enabling communication with the board.
2. D*/A goes low, indicating that the information sent on the MOSI line is data.
3. The serial data is available on MOSI and SPICLK clocks it into the register.
4. SS* goes high and D*/A goes high, indicating an end of communication. This action latches
the Configuration Register bits.
When the SCXIbus is reset, all bits in the Configuration Register are cleared.
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The Module ID Register connects to MISO on the SCXIbus. The Module ID Register is an 8-bit,
parallel/serial-in, serial-out shift register and an SPI communication adapter. The contents of the
Module ID Register are written onto MISO during the first four bytes of transfer after SS* has
been asserted low. Zeros are written to MISO thereafter until SS* is released and reasserted.
The SCXI-1120 module ID is hex 00000004.
Analog and Timing Circuitry
The SCXIbus provides analog power (±18.5 VDC) that is regulated on the SCXI-1120 to
±15 VDC, a guard, an analog bus (AB0±), and a chassis ground (CHSGND). AB0± buses the
SCXI-1120 output to other modules or receives outputs from other modules via the SCXIbus.
The guard guards the analog bus and can be connected via jumper W46 to the analog ground
reference or can be left floating (a connection can be made by another board).
The data acquisition board analog input and timing is the interface between the SCXI-1120
output and the data acquisition board. This is described in the following section.
Analog Input Channels
Figure 3-5 is a diagram of the analog input block.
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Input Channel 0
+
-
+
+
+
+
+
+
+
+
+
-
To Output
LPF
LPF
LPF
LPF
LPF
LPF
LPF
LPF
LPF
Stage
I
I
I
I
I
I
I
I
Input Channel 1
LPF
+
-
+
-
To Output
Stage
Input Channel 2
LPF
+
-
+
-
To Output
Stage
Input Channel 3
LPF
+
-
+
-
To Output
Stage
Input Channel 4
LPF
+
-
+
-
To Output
Stage
Input Channel 5
LPF
+
-
+
-
To Output
Stage
Input Channel 6
LPF
+
-
+
-
To Output
Stage
Input Channel 7
LPF
+
-
+
-
To Output
Stage
MTEMP
DTEMP
Figure 3-5. Analog Input Block Diagram
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The analog input consists of eight isolated single-ended noninverting amplifiers. In addition,
lowpass filtering is available at the inputs. You can jumper select one of two bandwidths,
10 kHz or 4 Hz. The amplifier gain is divided into two stages, a first stage providing gains of 1,
10, 50, and 100, and a second stage providing gains of 1, 2, 5, 10, and 20. Each channel is
configurable to a different bandwidth and gain.
Use the following formula to determine the overall gain of a given amplifier input channel:
G
= G x G
1st 2nd
total
where G
is the overall gain and G and G
are the first- and second-stage gains. Here it is
2nd
total
1st
important to note that the choice of gain in each stage will affect the amplifier bandwidth. To
determine the bandwidth of a given gain stage use the following formula:
BW = GBWP/G
where BW is a given amplifier stage bandwidth, GBWP is the gain bandwidth product (typically
800 kHz), and G is the gain at this stage. This BW might be of concern at high first-stage gains
such as 50 and 100. In this case, the first-stage amplifier has a BW equal to 16 kHz and 8 kHz,
respectively. Due to this decrease in the amplifier bandwidth, you will notice a decrease in the
channel overall bandwidth, but a better noise immunity. If this bandwidth limitation is
unacceptable, you should spread the gains over both stages, thus increasing the BW of each
amplifier stage. This will introduce, in most cases, a negligible effect on the channel bandwidth.
For example, to achieve a gain of 100, use G = 10 and G
= 10; for a gain of 1,000, use
1st
2nd
G
= 50 and G
= 20.
1st
2nd
All the amplifier input channels are overvoltage protected to 240 Vrms with power on or off.
The isolated amplifiers fulfill two purposes on the SCXI-1120 module. They convert a small
signal riding on a high common-mode voltage into a single-ended signal with respect to the
SCXI-1120 chassis ground. With this conversion, the input analog signal can be extracted from
a high common-mode voltage or noise before being sampled and converted by the data
acquisition board. The isolated amplifier also amplifies and conditions an input signal, which
results in an increase in measurement resolution and accuracy.
After isolation, further filtering is available to increase the noise immunity of the amplifier
channel. It is important to note that the overall amplifier bandwidth is determined by both
filtering stages, so to achieve the required bandwidth, both filtering sections should be set the
same, as indicated in Chapter 2, Configuration and Installation.
Calibration
Calibration Equipment Requirements
For best measurement results, calibrate the SCXI-1120 so that its offset is adjusted to 0 ± 3 mV
RTO and 0 ± 6 µV RTI. No special equipment is needed other than a regular voltmeter with the
following specifications.
•
•
Range:
± 30 mV to ±300 mV
Resolution: 3 1/2 digits or greater
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A multiranging 3 1/2-digit digital multimeter can provide you with the necessary function as
described previously. We will refer to the measuring instrument as a digital multimeter (DMM).
Each channel on the SCXI-1120 has two potentiometers dedicated for calibration. One
potentiometer is used to null the output offset; the other is used to null the input offset.
Offset Null Adjust
To null the offset of the amplifier channels, complete the following steps:
1. Set the DMM range to the smallest range that can measure ±3 mV.
2. Short the inputs of the DMM together and then to chassis ground.
3. Record the measurement indicated by the DMM display. This is the DMM inherent offset
and it should be subtracted from subsequent measurements.
4. Short the desired channel inputs together and then to chassis ground.
5. Set the amplifier gain to 1.
6. Connect the amplifier output to the DMM. Make sure that the DMM can achieve the
accuracy and resolution you need.
7. Adjust the output potentiometer of the desired channel until the output is 0 ± 3 mV.
8. Set the DMM range to the smallest range that can measure ±6 mV.
9. Set the amplifier gain to 1,000.
10. Adjust the input potentiometer of the desired channel until the output is 0 ± 6 mV.
11. Go to the next channel.
To avoid erroneous results when nulling the amplifier, follow these steps in the order indicated.
You may seal the potentiometers after calibration with antisabotage lacquer to avoid tampering
with the calibration.
Table 3-2 lists the potentiometer reference designators that correspond to each channel.
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Table 3-2. Calibration Potentiometers Reference Designators
Input Channel
Number
Amplifier Channel
Input Null Output
Null
0
1
2
3
4
5
6
7
R8
R24
R25
R26
R27
R28
R29
R30
R31
R10
R12
R14
R16
R18
R20
R21
Analog Output Circuitry
Figure 3-6 shows the SCXI-1120 analog output circuitry.
SCXIbus
Output
Stage
Control
AB0
Switch
Channel 0
Channel 7
Output
Mux
MCH0+
•
•
•
Buffer
MCH0-
MTEMP
From MCH1+
Channel 1
•
•
•
MCH1-
Output Stage and
Hardware Scan
Control
From
MCH6+
Channel 6
MCH6-
Analog
Reference
From
Channel 7
MCH7+
W41
DTEMP
>>
MCH7-
Figure 3-6. Analog Output Circuitry
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The SCXI-1120 output circuitry consists of a buffered-output multiplexer and channel-select
hardware. The channel-select hardware consists of a three-bit counter, MUXCOUNTER. This
counter is needed when the board is operating in the Multiplexed-Output mode. The counter
output is sent to the output multiplexer address pins to determine which of the eight channels is
to be connected to MCH0. In the Single-Channel Read mode, the MUXCOUNTER is loaded
with the desired channel number. In the Scanning mode, the counter is loaded with the first
channel to be read. During the scan, the counter is clocked by SCANCLK from the data
acquisition board, or TRIG0 from the SCXIbus, depending on the state of the CLKSELECT bit
in the Configuration Register. During scanning operations, the MUXCOUNTER is reloaded
with the channel value stored in the Configuration Register when SCANCON is high (inactive),
and will count upwards on each rising clock edge when SCANCON is low (active). In the
Parallel-Output mode, the MUXCOUNTER is disabled and its output indicates binary 00; thus,
amplifier Channel 0 is selected at the output multiplexer and is connected to MCH0. The seven
other channels are hardwired to MCH1 through MCH7 on the rear signal connector.
The output multiplexer multiplexes all eight amplifier outputs and the temperature-sensor
reading provided on the MTEMP line. To read the temperature sensor when it is multiplexed
with the other input channels, the RTEMP bit of the Configuration Register must be set high.
This measurement is only software controlled. For hardware control of the temperature sensor
reading, connect the temperature sensor to pin 18 on the rear signal connector as described in
Chapter 2, Configuration and Installation. The multiplexer output connects to the MCH0± and
is connected to the data acquisition board analog channel input. In the case of the MIO data
acquisition boards, MCH0± on the rear signal connector corresponds to ACH0 and ACH8.
Furthermore, the multiplexed output of the SCXI-1120 can be bused, via switches to AB0± on
the SCXIbus, to other modules. When you use multiple modules, it is possible to bus the module
output via AB0 to the module that connects to the data acquisition board. In this case, the AB0
switches of all the modules are closed, whereas the output multiplexer of all the modules, except
the one being read, are disabled. Refer to chapters 2 and 5 for further details on how to configure
and program multiple modules.
In addition to the Multiplexed-Output mode described in the previous paragraph, it is possible to
operate the SCXI-1120 in the Parallel-Output mode. In this mode, you need no software–other
than the software used with your data acquisition board–to control the scanning of the eight
channels or to perform a single read. To access the temperature sensor in this mode, configure
the temperature sensor in the DTS mode. At power up or reset, amplifier Channel 0 is selected
on the output multiplexer, and thus connects to MCH0. The other seven amplifier channels are
hardwired to the rear signal connector. Notice that when the Multiplexed-Output mode is
selected, pins 5 through 18 on the rear signal connector are still driven by the SCXI-1120. The
SCXI-1120 outputs on the rear signal connector are short-circuit protected.
Refer to the following Scanning Modes section for further details on how to scan the SCXI-1120
channels.
Scanning Modes
The SCXI-1120 has four basic types of scanning modes–single-module parallel scanning,
single-module multiplexed scanning, multiple-module multiplexed scanning, and
multiple-chassis scanning, which is possible only with the SCXI-1001 chassis. For additional
information, consult Chapter 2, Configuration and Installation, Chapter 5, Programming, your
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Chapter 3
data acquisition board user manual, or your SCXI chassis user manual. If you need more
information, contact National Instruments.
Single-Module Parallel Scanning
Single-module parallel scanning is the simplest scanning mode. Directly cable the SCXI-1120 to
the data acquisition board as shown in Figure 3-7. In this configuration, each analog signal has
its own channel. Timing signals are not necessary for this type of scanning because the module
provides all channels to the data acquisition board at all times. You can implement
single-module parallel scanning with any data acquisition board that is appropriately cabled to
the SCXI-1120.
SCXI-1120
Data Acquisition Board
Cable Assembly
CH0
CH1
CH2
CH3
CH4
CH5
CH6
CH7
MCH0
MCH1
MCH2
MCH3
MCH4
MCH5
MCH6
MCH7
Analog Input 0
Analog Input 1
Analog Input 2
Analog Input 3
Analog Input 4
Analog Input 5
Analog Input 6
Analog Input 7
Eight Isolated
Floating
Single-Ended
Inputs
Figure 3-7. Single-Module Parallel Scanning
Multiplexed Scanning
Only the MIO-16 data acquisition boards support multiplexed scanning on the SCXI-1120.
During multiplexed scanning, a module sends the SCANCLK signal to Slot 0 over the TRIG0
backplane line, and Slot 0 sends SCANCON signals to each module. Each module uses its
SCANCON signal to reload MUXCOUNTER and to determine when the SCXI-1120 output is
enabled. Slot 0 contains a module scan list first-in-first-out (FIFO) memory chip, similar to the
Channel/Gain FIFO on an MIO-16 board, except that instead of having a channel number and
gain setting for each entry, the Slot 0 FIFO contains a slot number and a sample count for each
entry. The list in Slot 0 will determine which module is being accessed and for how many
samples. It is important that you make sure that the lists on the data acquisition board and Slot 0
are compatible so that the samples are acquired as intended. See your SCXI chassis manual for
more information.
Single-Module Multiplexed Scanning
Single-Module Multiplexed Scanning (Direct)
This is the simplest multiplexed-scanning mode. Directly cable the SCXI-1120 to the data
acquisition board as shown in Figure 3-8. The module sends SCANCLK onto TRIG0, and Slot 0
sends SCANCON back to the module. SCANCON will be low at all times during the scan
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except during changes from one Slot 0 scan list entry to the next, when SCANCON pulses high
to make the MUXCOUNTER reload its starting channel. Notice that although you are using
only a single module, you can put many entries with different counts in the Slot 0 FIFO, so that
some channels are read more often than others. You cannot change the start channel in the
module Configuration Register during a scan.
SCXI-1000 or SCXI-1001 Chassis
SCANCON X
TRIG0
DataAcquisition Board
Cable
Assembly
Eight Isolated
SCANCLK
Timing Output
Analog Input
Floating
Single-Ended
Inputs
MCH0
SLOT 0
SCXI-1120
SLOT X
Figure 3-8. Single-Module Multiplexed Scanning (Direct)
Single-Module Multiplexed Scanning (Indirect)
In this mode, the SCXI-1120 is not directly cabled to the data acquisition board. Instead, you
connect another module to the data acquisition board, and the analog output of the SCXI-1120 is
sent over Analog Bus 0, through the intermediate module, and then to the data acquisition board.
The SCXI-1120 receives its MUXCOUNTER clock from TRIG0, which is sent by the
intermediate module, as shown in Figure 3-9. Slot 0 operation is the same for direct connection
scanning.
SCXI-1000 or SCXI-1001 Chassis
SCANCON X
TRIG0
DataAcquisition Board
Cable
Assembly
SCANCLK
Timing Output
MCH0
Analog Input
Other
SLOT 0
SCXI-1120
Module
SLOT X
Analog Bus 0
Figure 3-9. Single-Module Multiplexed Scanning (Indirect)
Multiple-Module Multiplexed Scanning
In this mode, all the modules tie into Analog Bus 0 and SCANCON enables the output of their
amplifiers. The module that is directly cabled to the data acquisition board sends SCANCLK
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Chapter 3
onto TRIG0 for the other modules and Slot 0, as shown in Figure 3-10. The scan list in Slot 0 is
programmed with the sequence of modules and the number of samples per entry.
SCXI-1000 or SCXI-1001 Chassis
SCANCON X
DataAcquisition Board
SCANCON B
SCANCONA
TRIG0
SCANCLK
MCH0
SLOT 0
CableAssembly
SCXI Module
SLOT B
SCXI Module
SCXI Module
SLOT X
Analog Bus 0
SLOTA
Figure 3-10. Multiple-Module Multiplexed Scanning
Multiple-Chassis Scanning
In this mode, you attach each SCXI-1001 chassis to a daisy chain of cable assemblies and
multichassis adapter boards, as shown in Figure 3-11. You program each chassis separately, and
each chassis occupies a dedicated channel of the data acquisition board. Within each chassis,
scanning operations act as if the other chassis are not being used, with one exception–you must
program the Slot 0 scan list in each chassis with dummy entries of Slot 13 to fill the samples
when the data acquisition board will be sampling another chassis or data acquisition board
channel. This will keep the chassis synchronized. Notice that you can only perform
multiple-chassis scanning with the SCXI-1001 chassis and MIO-16 data acquisition boards. See
Chapter 5, Programming, for more information on multiple-chassis scanning. See Appendix E,
SCXI-1120 Cabling, for more information on the necessary cable accessories for multichassis
scanning.
Multichassis
Adapter
Multichassis
Adapter
Multichassis
Adapter
Data Acquisition Board
Cable
Assembly
Cable
Assembly
Cable
Assemblies
Input Ch. N
Input Ch. 1
Input Ch. 0
Timing Output
Chassis 1
Chassis 2
Chassis
Chassis N
Figure 3-11. Multiple-Chassis Scanning
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Chapter 4
Register Descriptions
This chapter describes in detail the SCXI-1120 Module ID Register, the Configuration Register,
the Slot 0 registers, and multiplexer addressing.
Note: If you plan to use a programming software package such as NI-DAQ, LabWindows, or
LabVIEW with your SCXI-1120 board, you do not need to read this chapter.
Register Description
Register Description Format
This register description chapter discusses each of the SCXI-1120 registers and the Slot 0
registers. A detailed bit description of each register is given. The individual register description
gives the type, word size, and bit map of the register, followed by a description of each bit.
The register bit map shows a diagram of the register with the MSB shown on the left (bit 15 for a
16-bit register, bit 7 for an 8-bit register), and the LSB shown on the right (bit 0). A rectangle is
used to represent each bit. Each bit is labeled with a name inside its rectangle. An asterisk (*)
after the bit name indicates that the bit is inverted (negative logic). The Module ID register has a
unique format and is described in the Module ID Register section.
In many of the registers, several bits are labeled with an X, indicating don't care bits. When you
write to a register, you may set or clear these bits without effect.
SCXI-1120 Registers
The SCXI-1120 has two registers. The Module ID Register is a four-byte, read-only register that
contains the Module ID number of the SCXI-1120. The Configuration Register is a 16-bit,
write-only register that controls the functions and characteristics of the SCXI-1120.
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Register Descriptions
Chapter 4
Module ID Register
The Module ID Register contains the 4-byte module ID code for the SCXI-1120. This code
number will be read as the first four bytes on the MISO line whenever the module is accessed.
The bytes will appear least significant byte first. Within each byte, data is sent out MSB first.
Additional data transfers will result in all zeros being sent on the MISO line. The Module ID
Register is reinitialized to its original value each time the SCXI-1120 is deselected by the SS*
signal on the backplane.
Type:
Read-only
Word Size: 4-byte
Bit Map:
Byte 0
7
0
6
0
5
0
4
0
3
0
2
1
1
0
0
0
Byte 1
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
0
Byte 2
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
0
Byte 3
7
0
6
0
5
0
4
0
3
0
2
0
1
0
0
0
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Register Descriptions
Configuration Register
The Configuration Register contains 16 bits that control the functions of the SCXI-1120. When
SS* is asserted (low) and D*/A indicates data (low), the register will shift in the data present on
the MOSI line, bit 15 first, and then latch it when the SCXI-1120 is deselected by the SS* signal
on the backplane. The Configuration Register initializes to all zeros when the SCXI chassis is
reset or first turned on.
Type:
Write-only
Word Size: 16-bit
Bit Map:
15
CLKOUTEN
14
CLKSELECT
13
X
12
X
11
X
10
CHAN2
9
8
CHAN1
CHAN0
7
X
6
X
5
4
RSVD
3
2
1
0
RTEMP
SCANCLKEN SCANCONEN
AB0EN
FOUTEN*
Bit
Name
Description
15
CLKOUTEN
CLKSELECT
Scan Clock Output Enable – This bit determines whether
the SCANCLK signal from the rear signal connector is sent
out, in inverted form, to the TRIG0 backplane signal. If
CLKOUTEN is set to 1, SCANCLK* is transmitted on
TRIG0. If CLKOUTEN is cleared to 0, SCANCLK* is not
transmitted on TRIG0.
14
Scan Clock Select – This bit determines whether the
SCXI-1120 uses SCANCLK or the inverted form of TRIG0
to clock the MUXCOUNTER for the purposes of scanning
through the analog channels. If CLKSELECT is cleared
to 0, SCANCLK is used to clock MUXCOUNTER. If
CLKSELECT is set to 1, TRIG0* is used as the source to
clock MUXCOUNTER.
13-11, 7-6
10-8
X
Don't care bits – Unused.
CHAN<2..0>
Channel Select – These bits determine the channel number
(zero to seven) that is loaded into the MUXCOUNTER to
determine the analog channel to be read during a single
read, or the starting channel on the module for a scanned
data acquisition. CHAN2 is the MSB.
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Register Descriptions
Chapter 4
Bit
Name
Description (continued)
5
RTEMP
Read Temperature – This bit determines whether the
selected channel output or the MTEMP signal is driven
onto the MCH0± pins of the rear signal connector. If
RTEMP is cleared to 0, the selected channel output is used
as the module output. If RTEMP is set to 1, the MTEMP
signal is used as the module output. The module output
will only be driven when FOUTEN* is cleared to 0, or
SCANCON is active (low) while SCANCONEN* is
cleared.
4
3
RSVD
Reserved – This bit should always be written to 0.
SCANCLKEN Scan Clock Enable – This bit determines whether
MUXCOUNTER will increment on each clock signal (the
clock source is determined by CLKSELECT), or keep its
loaded value. If SCANCLKEN is set to 1,
MUXCOUNTER will be clocked during scans. If
SCANCLKEN is cleared to 0, MUXCOUNTER will not be
clocked.
2
1
SCANCONEN Scan Control Enable – This bit, when set to 1, enables the
SCANCON signal.
AB0EN
Analog Bus 0 Enable – This bit determines whether Analog
Bus 0 on the SCXIbus drives MCH0 on the rear signal
connector. If AB0EN is cleared to 0, Analog Bus 0 doesnot
drive MCH0. If AB0EN is set to 1, Analog Bus 0 + drives
MCH0+ through a buffer and a Analog Bus 0 - is connected
to MCH0-.
0
FOUTEN*
Forced Output Enable – This bit determines whether the
module will drive the MCH0± pins on the rear signal
connector with either the selected channel output or the
MTEMP signal, depending on the state of RTEMP. If
FOUTEN* is cleared to 0, the MCH0± pins will be driven
through a buffer by the selected channel output or the
MTEMP line. If FOUTEN* is set to 1, the MCH0± pins
will not be driven by the selected channel output or
MTEMP, unless SCANCON is active (low) and the
SCANCONEN bit is cleared. If the selected channel output
or MTEMP is driving the output buffer, it will drive Analog
Bus 0 if AB0EN is set. If nothing is driving the output
buffer, the SCXI-1120 output will saturate.
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Chapter 4
Register Descriptions
Slot 0 Register Descriptions
Slot 0 has three registers. The Slot-Select Register is a 16-bit, write-only register that determines
with which slot the data acquisition board will speak when SLOT0SEL* is released high. In the
case of the SCXI-1001 chassis, the Slot-Select Register also determines in which chassis the
desired slot is. The FIFO Register is a 16-bit, write-only register used for storing the Slot 0 scan
list that determines the chassis scan sequence. The Hardscan Control Register (HSCR) is an
8-bit, write-only register used for setting up the timing circuitry in Slot 0. The Slot-Select
Register is written to by using the SLOT0SEL* line. The HSCR and the FIFO Register are
written to as if they were registers located on modules in Slots 13 and 14. You should maintain
software copies of the Slot-Select Register, HSCRs, and all the Slot 0 scan lists that correspond
to the writes to FIFO Registers.
If you are using multiple chassis, it is important to understand the architectural differences of the
Slot-Select Register as compared to the HSCR and the FIFO Register. Although each chassis
has its own physical Slot-Select Register, all are written to at the same time. The jumper settings
in Slot 0 of a chassis determine with which chassis number Slot 0 is identified. From the
software perspective, only one Slot-Select Register exists in a system composed of multiple
chassis. The HSCR and FIFO Register, on the other hand, are unique to each chassis and you
must program them separately.
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Register Descriptions
Chapter 4
Slot-Select Register
The Slot-Select Register contains 16 bits that determine which module in which chassis will be
enabled for communication when the SLOT0SEL* line is high. An SCXI-1000 chassis will
select the appropriate module in its chassis, regardless of the chassis number written. The
Slot-Select Register will shift in the data present on the MOSI line, bit 16 first, when
SLOT0SEL* is low.
Type:
Write-only
Word Size: 16-bit
Bit Map:
15
X
14
X
13
X
12
X
11
X
10
X
9
X
8
CHS4
7
6
5
4
3
SL3
2
SL2
1
SL1
0
SL0
CHS3
CHS2
CHS1
CHS0
Bit
Name
X
Description
15-9
8-4
Don't care bits – Unused.
CHS<4..0>
Chassis Bit 4 through 0 – These bits determine
which chassis is selected. On the SCXI-1000
chassis, these are don't care bits.
3-0
SL<3..0>
Slot Bit 3 through 0 – These bits determine which
slot in the selected chassis is selected.
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Register Descriptions
Hardscan Control Register (HSCR)
The HSCR contains eight bits that control the setup and operation of the hardscan timing
circuitry of Slot 0. To write to the HSCR, follow the procedure given in the Register Writes
section in Chapter 5, Programming, using 13 as the slot number and writing eight bits to the
HSCR. The register will shift in the data present on the MOSI line, bit 7 first, when Slot 13 is
selected by the Slot-Select Register.
Type:
Write-only
Word Size: 8-bit
Bit Map:
7
RSVD
6
FRT
5
RD
4
ONCE
3
2
1
0
HSRS*
LOAD*
SCANCONEN
CLKEN
Bit
Name
RSVD
FRT
Description
7
6
Reserved.
Forced Retransmit – This bit, when clear, causes the scan
list in the FIFO to be reinitialized to the first entry, thus
allowing the scan list to be reprogrammed in two steps
instead of having to rewrite the entire list. When this bit is
set, it has no effect.
5
4
RD
Read – This bit, when clear, prevents the FIFO from being
read. When set, the FIFO is being read except at the end
of a scan list entry during scanning, when reading is briefly
disabled to advance to the next scan list entry.
ONCE
Once – When set, this bit will cause the Hardscan circuitry
to shut down at the end of the scan list circuitry during a
data acquisition. When clear, the circuitry will wrap
around and continue seamlessly with the first scan list entry
after the entry is finished.
3
2
1
0
HSRS*
LOAD*
Hardscan Reset – When clear, this bit causes all the
hardware scanning circuitry, including the FIFO, to be reset
to the power up state. When set, this bit has no effect.
Load – This bit, when clear, forces a loading of the Slot 0
sample counter with the output of the FIFO. When set,
this bit has no effect.
SCANCONEN
CLKEN
Scan Control Enable – When set, this bit enables the
SCANCON lines. When clear, all SCANCON lines are
disabled (high).
Clock Enable – When set, this bit enables TRIG0 as a
clock for the hardscan circuitry. When clear, TRIG0 is
disabled.
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Register Descriptions
Chapter 4
FIFO Register
The FIFO Register is used to add entries to the Slot 0 FIFO. The FIFO contains the Slot 0 scan
list. Each entry contains a slot number to be accessed, and a count number to determine the
number of samples to be taken from that slot. To write to the FIFO Register, follow the
procedure given in the Register Writes section in Chapter 5, Programming, using 14 as the slot
number, and writing 16 bits to the FIFO Register. The register will shift in the data present on
the MOSI line, bit 7 first, when Slot 14 is selected by the Slot-Select Register. The Slot 0 scan
list is created by consecutive writes to the FIFO Register. Each write creates a new entry at the
end of the scan list. The maximum number of entries is 256. To clear the FIFO of all entries,
clear the HSRS* bit in the HSCR.
Type:
Write-only
Word Size: 16-bit
Bit Map:
15
X
14
X
13
X
12
X
11
X
10
MOD3
9
8
MOD2
MOD1
7
6
5
4
3
2
1
0
MOD0
CNT6
CNT5
CNT4
CNT3
CNT2
CNT1
CNT0
Bit
Name
Description
15-11
10-7
X
Don't care bits – Unused.
MOD<3..0>
Module Number – The value of these bits plus one
determines the number of the slot to be accessed for
this scan entry. For example, to access Slot 6,
MOD<3..0> would be 0101.
6-0
CNT<6..0>
Count – The value of these bits plus one determines
how many samples will be taken before the next
scan list entry becomes active. A value of zero
corresponds to one sample and a value of 127
corresponds to 128 samples.
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Chapter 5
Programming
This chapter contains a functional programming description of the SCXI-1120 and Slot 0.
Note: If you plan to use a programming software package such as NI-DAQ, LabWindows, or
LabVIEW with your SCXI-1120 board, you do not need to read this chapter.
Programming Considerations
Programming the SCXI-1120 involves writing to the Configuration Register. Programming
Slot 0 involves writing to the HSCR and FIFO Register. Programming the data acquisition
boards involves writes to their registers. See your data acquisition board user manual for more
information. The programming instructions list the sequence of steps to take. The instructions
are language independent; that is, they instruct you to write a value to a given register without
presenting the actual code.
Notation
For the bit patterns to be written, the following symbols are used:
0
1
X
C
binary zero
binary one
don't care; either zero or one may be written
one of three bits used to specify the channel to be loaded into the MUXCOUNTER. This
value will either be the channel to be read for single reads, or a starting channel for
scanned measurements.
The 16-bit patterns are presented MSB first, left to right.
Register Writes
This section describes how to write to the Configuration Register, HSCR, and FIFO Register,
including the procedure for writing to the Slot-Select Register to select the appropriate slot. For
timing specifics, refer to the Timing Requirements and Communication Protocol section in
Chapter 2, Configuration and Installation. The rear signal connector pin equivalences to the
different National Instruments data acquisition boards are given in Table 5-1. Also see
Appendix E, SCXI-1120 Cabling. The Configuration Register, the HSCR, and the FIFO Register
are write-only registers.
The different bits in these registers often control independent pieces of circuitry. There are times
when you may want to set or clear a specific bit or bits without affecting the remaining bits.
However, a write to one of these registers will affect all bits simultaneously. You cannot read
the registers to determine which bits have been set or cleared in the past; therefore, you should
maintain a software copy of these registers. You can then read the software copy to determine
the status of the register. To change the state of a single bit without disturbing the remaining
bits, set or clear the bit in the software copy and write the software copy to the register.
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Programming
Chapter 5
Table 5-1. SCXI-1120 Rear Signal Connector Pin Equivalences
SCXIbus Line SCXI-1120 Rear MIO-16 Board Lab-NB/Lab-PC/
PC-LPM-16
Signal Connector
Lab-PC+/Lab-LC
MOSI
D*/A
INTR*
SPICLK
MISO
SERDATIN
DAQD*/A
SLOT0SEL*
SERCLK
ADIO0
ADIO1
ADIO2
EXTSTROBE*
BDIO0
PB4
PB5
PB6
PB7
PC1
DOUT4
DOUT5
DOUT6
DOUT7
DIN6
SERDATOUT
Register Selection and Write Procedure
1. Select the slot of the module to be written to (or Slot 13 or 14). Initial conditions:
SERDATIN = X.
DAQD*/A = X.
SLOT0SEL* = 1.
SERCLK = 1.
2. Clear SLOT0SEL* to 0. This will deassert all SS* lines to all modules in all chassis.
3. For each bit, starting with the MSB (bit 15):
a. SERDATIN = bit to be sent. These bits are the data that is being written to the
Slot-Select Register.
b. Clear SERCLK to 0.
c. Set SERCLK to 1. This rising edge clocks the data. (If you are using an MIO-16 board,
writing to the EXTSTROBE* register will pulse EXTSTROBE* low and then high,
accomplishing steps 3b and 3c.)
4. Set SLOT0SEL* to 1. This will assert the SS* line of the module whose slot number was
written to Slot 0. If you are using multiple chassis, only the appropriate slot in the chassis
whose address corresponds to the written chassis number will be selected automatically.
When no communications are taking place between the data acquisition board and any
modules, write zero to the Slot-Select Register to ensure that no accidental writes occur.
5. If you are writing to a Configuration Register, clear DAQD*/A to 0 (this indicates data will
be written to Configuration Register). If you are writing to the HSCR or FIFO Register,
leave DAQD*/A high.
6. For each bit to be written to the Configuration Register:
a. Establish desired SERDATIN level corresponding to this bit.
b. Clear SERCLK to 0.
c. Set SERCLK to 1 (clock the data). (If you are using an MIO-16 board, writing to the
EXTSTROBE* register will pulse EXTSTROBE* low and then high, accomplishing
steps 6b and 6c.)
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Chapter 5
Programming
7. Pull SLOT0SEL* low to deassert the SS* line, latch the data into the Configuration Register
and establish conditions for writing a new slot-select number to the Slot 0 Slot-Select
Register.
8. If you are not selecting another slot, write zero to the Slot 0 Slot-Select Register. If you are
selecting another slot, start at step 3.
For a timing illustration of a Configuration Register write, see Figure 2-15, Configuration
Register Write Timing Diagram, which shows the proper write to configure an SCXI-1120 that is
directly cabled to an MIO-16 board for multiple-module multiplexed scanning with a start
channel of 3.
Initialization
The SCXI-1120 powers up with its Configuration register cleared to all zeros. You can force this
state by sending an active low signal on the RESET* pin of the SCXIbus connector. In the reset
state, CH0 through CH3 are routed to MCH0 through MCH3 on the rear signal connector. The
module is disconnected from Analog Bus 0 and disabled from scanning.
Single-Channel Measurements
This section describes how to program the SCXI-1120, either alone or in conjunction with other
modules, to make single-channel, or nonscanned, measurements.
Direct Measurements
Parallel Output
To perform a parallel output measurement, you must cable the SCXI-1120 rear signal connector
to a data acquisition board with each output connected to a different data acquisition board
channel. See Chapter 2, Configuration and Installation, for more information. For information
on how to make the voltage measurement with your data acquisition board, consult your data
acquisition board user manual. Remember to account for the gains of both the SCXI-1120 and
the data acquisition board when calculating the actual voltage present at the input of the
SCXI-1120.
To measure one of the eight differential input channels to the SCXI-1120, or the DTEMP line if
the module has been configured appropriately, perform the following steps:
1. Write the binary pattern 00XXX000 XX000000to the SCXI-1120 Configuration Register.
Notice that this can be the RESET state.
2. Measure the voltage with the data acquisition board.
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Programming
Chapter 5
Multiplexed Output
To perform a direct multiplexed output measurement, you must cable the SCXI-1120 rear signal
connector to a data acquisition board. See Chapter 2, Configuration and Installation, for more
information. For information on how to make the voltage measurement with your data
acquisition board, consult your data acquisition board user manual. Remember to account for the
gains of both the SCXI-1120 and the data acquisition board when calculating the actual voltage
present at the input of the SCXI-1120.
To measure one of the eight differential input channels to the SCXI-1120, perform the following
steps:
1. Write the binary pattern 00XXXXCC XX000000 to the SCXI-1120 Configuration Register.
2. Measure the voltage with the data acquisition board.
To measure the voltage on the MTEMP line, perform the following steps:
1. Write the binary pattern 00XXXXXX XX100000to the SCXI-1120 Configuration Register.
2. Measure the voltage with the data acquisition board.
Indirect Measurements
Indirect measurements involve one module sending a signal to Analog Bus 0, where it is picked
up by another module and transmitted to the data acquisition board.
Measurements from Other Modules
To perform measurements from other modules, you must cable the SCXI-1120 rear signal
connector to a data acquisition board. See Chapter 2, Configuration and Installation, for more
information. To make a measurement from another module, perform the following steps:
1. Perform any necessary programming to ensure that no modules are driving Analog Bus 0.
For an SCXI-1120, clearing AB0EN in the Configuration Register will ensure that its output
is not driving AB0.
2. Write the binary pattern 00XXXXXX XX100011to the SCXI-1120 Configuration Register.
This step disables the SCXI-1120 from driving Analog Bus 0 and allows Analog Bus 0 to
drive MCH0 through the output buffer.
3. Program the other module to drive Analog Bus 0 with the signal to be measured.
4. Measure the voltage with the data acquisition board.
Measurements from the SCXI-1120 via Another Module
To perform measurements via another module, you must cable the other module rear signal
connector to a data acquisition board. The other module must be able to transfer Analog Bus 0 to
the data acquisition board. See Chapter 2, Configuration and Installation, for more information.
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Programming
To measure one of the eight differential input channels to the SCXI-1120, perform the following
steps:
1. Perform any necessary programming to ensure that no modules are driving Analog Bus 0.
For an SCXI-1120, clearing AB0EN in the Configuration Register will ensure that its output
is not driving AB0.
2. Program the other module not to drive Analog Bus 0, but to send Analog Bus 0 to the data
acquisition board.
3. Write the binary pattern 00XXXCCC XX000010to the SCXI-1120 Configuration Register.
4. Measure the voltage with the data acquisition board.
To measure the voltage on the MTEMP line, perform the following steps:
1. Perform any necessary programming to ensure that no modules are driving Analog Bus 0.
For an SCXI-1120, clearing AB0EN in the Configuration Register will ensure that its output
is not driving AB0.
2. Program the other module not to drive Analog Bus 0, but to send Analog Bus 0 to the data
acquisition board.
3. Write the binary pattern 00XXXXXX XX100010to the SCXI-1120 Configuration Register.
4. Measure the voltage with the data acquisition board.
Scanning Measurements
Programming for scanned data acquisition involves programming your data acquisition board,
modules, and Slot 0. In general, the steps to be taken are as follows:
1. Perform all data acquisition board programming to the point of enabling the data
acquisition.
2. Perform all module programming.
3. Program the Slot 0 hardscan circuitry.
4. Enable the data acquisition, trigger it either through software or hardware, and service the
data acquisition.
The MIO boards can do all types of scanning. Lab-NB, Lab-PC, Lab-PC+, Lab-LC, and
PC-LPM-16 boards support only single-module parallel scanning, and do not support any of the
multiplexed scanning modes. Notice that single-module parallel scanning is typically done
without any module or Slot 0 programming; only programming the data acquisition board is
necessary.
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Programming
Chapter 5
1. Data Acquisition Board Setup Programming
The programming steps for your data acquisition board are given in your data acquisition board
user manual. You should follow the instructions in the following sections:
•
•
•
•
•
AT-MIO-16 User Manual
-
-
Multiple A/D Conversions with Continuous Channel Scanning (Round Robin)
Multiple A/D Conversions with Interval Channel Scanning (Pseudosimultaneous)
AT-MIO-16D User Manual
-
-
Multiple A/D Conversions with Continuous Channel Scanning (Round Robin)
Multiple A/D Conversions with Interval Channel Scanning (Pseudosimultaneous)
AT-MIO-16F-5 User Manual
-
-
Posttrigger Data Acquisition with Continuous Channel Scanning
Posttrigger Data Acquisition with Interval Channel Scanning
AT-MIO-16X User Manual
-
-
Continuous Channel Scanning Data Acquisition
Interval Channel Scanning Data Acquisition
AT-MIO-64F-5 User Manual
-
-
Continuous Channel Scanning Data Acquisition
Interval Channel Scanning Data Acquisition
•
•
•
•
Lab-LC User Manual
Programming Multiple A/D Conversions with Channel Scanning
Lab-NB User Manual
Programming Multiple A/D Conversions with Channel Scanning
Lab-PC User Manual
Programming Multiple A/D Conversions with Channel Scanning
Lab-PC+ User Manual
-
-
-
-
-
-
Programming Multiple A/D Conversions with Channel Scanning
Programming Multiple A/D Conversions with Interval Scanning
Programming Multiple A/D Conversions in Single-Channel Interval Acquisition Mode
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Programming
•
MC-MIO-16 User Manual
-
-
Multiple A/D Conversions with Continuous Channel Scanning (Round Robin)
Multiple A/D Conversions with Interval Channel Scanning (Pseudosimultaneous)
•
•
NB-MIO-16 User Manual
Programming Multiple A/D Conversions with Channel Scanning
NB-MIO-16X User Manual
-
-
-
Multiple A/D Conversions with Continuous Channel Scanning (Round Robin)
Multiple A/D Conversions with Interval Channel Scanning (Pseudosimultaneous)
•
PC-LPM-16 User Manual
Programming Multiple A/D Conversions with Channel Scanning
-
Follow the instructions in these sections through the part labeled as follows:
• Clear the A/D Circuitry and Reset the Mux Counter in the MIO board user manual (except for
the AT-MIO-16X and AT-MIO-64F-5). Do not continue to the part called Enable the
Scanning Data Acquisition Operation. You will do this after you have programmed the
modules and Slot 0.
• Program the Sample Counter (if you are doing continuous channel scanning) or Program the
Scan-Interval Counter (if you are doing interval channel scanning) in the AT-MIO-16X and
AT-MIO-64F-5 user manuals. Do not continue to the part labeled Enable a Scanning Data
Acquisition Operation or Enable an Interval Scanning Data Acquisition Operation. You will
do this after you have programmed the modules and Slot 0.
Note: For multiplexed scanning with an MIO board, it is important that you follow the
instructions in the channel scanning sections, not the single-channel sections. Although
you may be using only one MIO board channel, the channel scanning programming will
ensure that the MIO board outputs SCANCLK, which is needed by the SCXI-1120 and
Slot 0.
• Clear the A/D Circuitry in the Lab-LC User Manual. Do not continue to the part called
Program the Sample-Interval Counter. You will do this after you have programmed the
modules and Slot 0.
• Clear the A/D Circuitry in the Lab-PC User Manual, the Lab PC+ User Manual, and the
PC-LPM-16 User Manual. Do not continue to the part called Start and Service the Data
Acquisition Operation. You will do this after you have programmed the modules and Slot 0.
• Clear the A/D Circuitry in the Lab-NB User Manual. Do not continue to the part called
Program the Sample-Interval Counter (Counter A0). You will do this after you have
programmed the modules and Slot 0.
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Programming
Chapter 5
Counter 1 and SCANDIV
All MIO boards can operate their data acquisition board scan lists in two ways–they can acquire
one sample per data acquisition board scan list entry; or they can acquire N samples per data
acquisition board scan list entry, where N is a number from 2 to 65,535 that is programmed in
Counter 1. This second method of operation is especially useful when the data acquisition board
scan list length is limited to 16 entries, as it is on all MIO boards except the AT-MIO-16F-5,
which can have up to 512 entries. Because you can multiplex many SCXI-1120s in one chassis
to one MIO board channel, often the simplest way to program the MIO board is to use only one
data acquisition board scan list entry, and make N the total number of samples to be taken on all
modules in one scan. Check your MIO board user manual for limitations in the data acquisition
board scan list format.
To program the MIO board to take N samples per data acquisition board scan list entry, perform
the following additional programming steps at the end of the Enable the Scanning Data
Acquisition Operation section in the appropriate data acquisition board user manual:
1. Write FF01 to the Am9513 Command Register to select Counter 1 Mode Register.
2. Write 0325 (hex) to the Am9513 Data Register to store Counter 1 Mode Value for most MIO
boards. For the AT-MIO-16F-5, and the AT-MIO-16X, and the AT-MIO-64F-5, write 1325
(hex).
3. Write FF09 to the Am9513 Command Register to select Counter 1 Load Register.
4. Write the number of samples to be taken per scan list entry (2 to 65,535) to the Am9513
Data Register to load Counter 1.
5. Write FF41 to the Am9513 Command Register to load Counter 1.
6. Write FFF1 to the Am9513 Command Register to step Counter 1.
7. Write FF21 to the Am9513 Command Register to arm Counter 1.
8. Set the SCANDIV bit in Command Register 1.
2. Module Programming
This section describes the programming steps for various scanning possibilities.
Single-Module Parallel Scanning
To perform single-module parallel scanning, you must cable the SCXI-1120 rear signal
connector to a data acquisition board with each output connected to a different data acquisition
board channel. See Chapter 2, Configuration and Installation, for more information.
To program the SCXI-1120 for single-module parallel scanning, write the binary pattern
00XXXX00 XX000000to the SCXI-1120 Configuration Register. Notice that this can be the
RESET state.
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Programming
Single-Module Multiplexed Scanning (Direct)
To perform simple channel scanning, you must cable the SCXI-1120 to a data acquisition board.
See Chapter 2, Configuration and Installation, for more information.
To program the module for scanned-channel measurements, write the binary pattern 10XXXCCC
XX001101to the SCXI-1120 Configuration Register. CCCrepresents the starting channel
number.
Single-Module Multiplexed Scanning (Indirect)
To indirectly scan a module, send the output of the scanned module onto Analog Bus 0, where it
is picked up by another module and transmitted to the data acquisition board.
Channel Scanning from Other Modules. To scan measurements from other modules, you must
cable the SCXI-1120 to a data acquisition board. See Chapter 2, Configuration and Installation,
for more information. The module programming steps are as follows:
1. Perform any necessary programming to ensure that no modules are driving Analog Bus 0.
For an SCXI-1120, clearing AB0EN in the Configuration Register will ensure that its output
is not driving AB0.
2. Write the binary pattern 10XXXXXX XX100011to the SCXI-1120 Configuration Register.
This step disables the SCXI-1120 from driving Analog Bus 0 and allows Analog Bus 0 to
drive MCH0 through the output buffer.
3. Program the other module to be scanned.
Channel Scanning from the SCXI-1120 via Another Module. To scan the SCXI-1120 via other
modules, you must cable the other module to a data acquisition board, and the other module must
be able to transfer Analog Bus 0 to the data acquisition board. The other module must also be
able to send a SCANCLK*-compatible signal on TRIG0. See Chapter 2, Configuration and
Installation, for more information. The module programming steps are as follows:
1. Perform any necessary programming to ensure that no modules are driving Analog Bus 0.
For an SCXI-1120, clearing AB0EN in the Configuration Register will ensure that its output
is not driving AB0.
2. Program the other module not to drive Analog Bus 0, but to send Analog Bus 0 to the data
acquisition board. Also program the other module to send a SCANCLK*-compatible signal
to TRIG0.
3. Write the binary pattern 01XXXCCC XX001111to the SCXI-1120 Configuration Register,
where CCCis the starting channel number.
Multiple-Module Multiplexed Scanning
To scan multiple modules, you must connect one module to the data acquisition board, and the
module must be able to transfer Analog Bus 0 to the data acquisition board. This module must
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Programming
Chapter 5
also be able to send a SCANCLK*-compatible signal on TRIG0. See Chapter 2, Configuration
and Installation, for more information. The module programming steps are as follows:
1. Perform any necessary programming to ensure that no modules are driving Analog Bus 0.
For an SCXI-1120, clearing AB0EN in the Configuration Register will ensure that its output
is not driving AB0.
2. Program the module that is connected to the data acquisition board to connect Analog Bus 0
to the data acquisition board but not drive Analog Bus 0 unless it is receiving an active low
signal on SCANCON. Also program the module to send a SCANCLK*-compatible signal
onto TRIG0. If this module is an SCXI-1120, this programming is accomplished by writing
the binary pattern 10XXXCCC XX001111to its Configuration Register.
Note: If this module is an SCXI-1120 and is not going to be scanned (it is just being used as
an interface), write a 0 to bit 2 (SCANCONEN) in the Configuration Register. The
start channel bits become don't care bits.
3. Program the other modules to be used in the scan to connect their outputs to Analog Bus 0
but not drive Analog Bus 0 unless receiving an active low signal on SCANCON. Also
program the modules to use TRIG0 as their clock source. For SCXI-1120 modules, this
programming is accomplished by writing the binary pattern 01XXXCCC XX001111to
their Configuration Registers.
Multiple-Chassis Scanning
To scan modules on multiple chassis, you must use the SCXI-1001 chassis. The cable from the
data acquisition board must bus the digital lines to one module on each chassis. Additionally, the
cable must provide each chassis with its own analog channel. The data acquisition board must be
able to take several readings at a time on a given channel before accessing a new channel. See
the Counter 1 and SCANDIV subsection of the 1. Data Acquisition Board Setup Programming
section earlier in this chapter. You can use the MIO-16 boards, in conjunction with the
SCXI-1350 multichassis adapter, for multichassis scanning.
For each chassis, program the modules according to the appropriate mode of operation,
disregarding the fact that other chassis will be involved.
For example, you want to scan thirteen modules. Twelve modules are in one chassis, and the
thirteenth is in the second chassis and is to be scanned through a fourteenth module that is cabled
to the data acquisition board but is not involved in the scan. Program the twelve modules in the
first chassis according to the steps in the previous Multiple-Module Multiplexed Scanning
section, and program the thirteenth and fourteenth modules according to Channel Scanning from
the SCXI-1120 via Another Module earlier in this chapter.
3. Programming the Slot 0 Hardscan Circuitry
The following section describes how to program the Slot 0 circuitry for scanning operations. For
a more detailed description of the Slot 0 scanning circuitry, consult the SCXI-1000/1001 User
Manual. Descriptions of the Slot 0 registers are in the Slot 0 Register Descriptions section of
Chapter 4, Register Descriptions. It is not necessary to read this section if you are performing
single-module parallel scanning.
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Chapter 5
Programming
To program the hardscan circuitry, perform the following steps:
1. Write binary 0000 0000to the HSCR.
2. Write binary 0000 1000to the HSCR.
3. Write the Slot 0 scan list to the FIFO.
4. Write binary 0010 1100to the HSCR.
5. Write binary 101S 1100to the HSCR.
6. Write binary 101S 1110to the HSCR.
7. Write binary 101S 1111to the HSCR.
To program the hardscan circuitry to use the current scan list, perform the following steps:
1. Write binary 0000 1000to the HSCR.
2. Write binary 0100 1000to the HSCR.
3. Write binary 0000 1000to the HSCR.
4. Write binary 0010 1100to the HSCR.
5. Write binary 101S 1100to the HSCR.
6. Write binary 101S 1110to the HSCR.
7. Write binary 101S 1111to the HSCR.
In the preceding steps:
S= 0if you want the scanning to repeat when the end of the list is reached.
S= 1if you want the circuitry to shut down after a single scan.
When you are writing multiple entries to the same register, for example, repetitive writes to the
HSCR or several FIFO entries, it is important that SS*13 or SS*14 go inactive (high) between
each entry. Select another slot or toggle the SLOT0SEL* line to temporarily deassert the
appropriate SS* line.
If consecutive scan list entries access an SCXI-1120, the module will reload the
MUXCOUNTER with the starting channel after each entry. Thus, two entries with counts of
four for one module will yield different behavior than one entry with a count of eight.
For multiple-chassis scanning, program each Slot 0 with dummy entries to fill the sample counts
when the data acquisition board is accessing other chassis. Use Slot 13 as the dummy entry slot.
See Example 3 at the end of this chapter.
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Programming
Chapter 5
4. Acquisition Enable, Triggering, and Servicing
At this point, you should now continue from where you left off in the 1. Data Acquisition Board
Setup Programming section of this chapter. Perform the following steps given in your data
acquisition board user manual.
•
MIO board user manual
-
-
-
Enable the scanning data acquisition operation.
Apply a trigger.
Service the data acquisition operation.
•
•
Lab-PC User Manual, Lab-PC+ User Manual, and PC-LPM-16 User Manual
Start and service the data acquisition operation.
Lab-LC User Manual
-
-
-
Program the sample-interval counter.
Service the data acquisition operation.
•
Lab-NB User Manual
-
-
Program the sample-interval counter (Counter A0).
Service the data acquisition operation.
Scanning Examples
The following examples are intended to aid your understanding of module and Slot 0
programming. It will be helpful to refer to the bit descriptions for the Configuration Register and
the FIFO Register in Chapter 4, Register Descriptions.
Example 1
You want to scan, in Multiplexed mode, channels 1 through 4 on an SCXI-1120 in Slot 1 of an
SCXI-1000 chassis. The SCXI-1120 is directly cabled to a data acquisition board.
The programming steps are as follows:
1. Program your data acquisition board as described in the 1. Data Acquisition Board Setup
Programming section of this chapter.
2. Following the procedure given in the Register Writes section, write 10000100 00001101
to the Configuration Register of the SCXI-1120 in Slot 1.
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Chapter 5
Programming
3. Follow the steps outlined in the section earlier in this chapter, 3. Programming the Slot 0
Hardscan Circuitry, where step 3, Write the Slot 0 scan list to the FIFO, consists of the
following:
Write 00000000 00000011to the FIFO Register. This corresponds to Slot 1 for four
samples.
4. Follow the procedure given in the 4. Acquisition Enable, Triggering, and Servicing section
earlier in this chapter.
Example 2
An SCXI-1000 chassis has four SCXI-1120 modules in Slots 1, 2, 3, and 4. The SCXI-1120 in
Slot 4 is cabled to the data acquisition board. You want to scan channels 3 through 7 on the
SCXI-1120 in Slot 1, channels 0 through 6 on the SCXI-1120 in Slot 4, and channels 7 through 3
on the SCXI-1120 in Slot 3.
The programming steps are as follows:
1. Program your data acquisition board as described in the 1. Data Acquisition Board Setup
Programming section.
2. Following the procedure given in the Register Writes section, write 00000000 00000000
to the Configuration Register of the SCXI-1120 in Slot 2. This step resets the module,
including the clearing of the AB0EN bit (bit 0). Notice that a complete reset of this module
is not necessary, but is used for simplicity.
3. Following the procedure given in the Register Writes section, write 10XXX000 00001111
to the Configuration Register of the SCXI-1120 in Slot 4.
4. Following the procedure given in the Register Writes section, write 01XXX011 00001111
to the Configuration Register of the SCXI-1120 in Slot 1.
5. Following the procedure given in the Register Writes section, write 01XXX111 00001111
to the Configuration Register of the SCXI-1120 in Slot 3. Notice that after Channel 7, the
SCXI-1120 will wrap around to Channel 0.
6. Follow the steps given in the section earlier in this chapter, 3. Programming the Slot 0
Hardscan Circuitry, where step 3, Write the Slot 0 scan list to the FIFO, consists of the
following:
a. Write 00000000 00000100to the FIFO Register. This corresponds to Slot 1 for five
samples.
b. Write 00000001 10000110to the FIFO Register. This corresponds to Slot 4 for
seven samples.
c. Write 00000001 00000100to the FIFO Register. This corresponds to Slot 3 for five
samples.
Make sure to toggle SLOT0SEL* or reselect the FIFO Register from scratch between steps
6a, 6b, and 6c.
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Programming
Chapter 5
7. Follow the procedure given in the 4. Acquisition Enable, Triggering, and Servicing section
earlier in this chapter.
Example 3
You want to scan five channels on an SCXI-1120 in Slot 4 of Chassis 1, then seven channels of
an SCXI-1120 in Slot 11 of Chassis 2, three channels of an SCXI-1120 in Slot 3 in Chassis 3,
and one channel of an SCXI-1120 in Slot 8 of Chassis 3.
Assuming that the modules are correctly cabled and programmed, the Slot 0 scan lists should be
as follows:
Chassis 1
Chassis 2
Chassis 3
Entry
Slot
Number
Count
Entry
Slot
Number
Count
Entry
Slot
Number
Count
1
2
4
13
5
11
1
2
3
13
11
13
5
7
4
1
2
3
13
3
8
12
3
1
Other solutions are possible.
In the section earlier in this chapter, 3. Programming the Slot 0 Hardscan Circuitry, step 3, Write
the Slot 0 scan list to the FIFO, consists of the following steps:
1. Select Slot 14 in Chassis 1.
2. Write XXXXX001 10000100over MOSI.
3. Toggle SLOT0SEL*.
4. Write XXXXX110 00001010over MOSI.
5. Select Slot 14 in Chassis 2.
6. Write XXXXX110 00000100over MOSI.
7. Toggle SLOT0SEL*.
8. Write XXXXX101 00000110over MOSI.
9. Toggle SLOT0SEL*.
10. Write XXXXX110 00000011over MOSI.
11. Select Slot 14 in Chassis 3.
12. Write XXXXX110 00001011over MOSI.
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Chapter 5
Programming
13. Toggle SLOT0SEL*.
14. Write XXXXX001 00000010over MOSI.
15. Toggle SLOT0SEL*.
16. Write XXXXX011 10000000over MOSI.
17. Select Slot 0 in Chassis 0.
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Appendix A
Specifications
This appendix lists the specifications for the SCXI-1120. These are typical at 25° C unless
otherwise stated. The operating temperature range is 0° to 50° C.
Analog Input
Gain (jumper-selectable)
1, 2, 5, 10, 20, 50, 100, 200, 500, 1,000, 2,000
Output range
±5 V
Number of channels
Gain accuracy
8
0.15% of full scale
Offset voltage
Input
±6 µV
±3 mV
Output
Stability versus ambient temperature
Input offset drift
±0.2 µV/°C
±200 µV/°C
20 ppm/°C
Output offset drift
Gain drift
Input bias current
±80 pA
Input resistance
Normal
40 MΩ
50 kΩ
50 kΩ
Power off
Overload
Output resistance
Multiplexed-Output mode
Parallel-Output mode
100 Ω
330 Ω
Filtering (jumper selectable)
4 Hz (-10 dB) or 10 kHz (-3 dB), 3-pole RC
Output selection time
(with 5 V step, all gains)
0.012% accuracy1
5.2 µsec typical, 7 µsec maximum
0.006% accuracy2
10 µsec
0.0015% accuracy2
20 µsec
1
2
Includes the combined effects of the SCXI-1120 and the AT-MIO-16F-5
Includes the combined effects of the SCXI-1120 and the AT-MIO-16X
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Specifications
Appendix A
Rise time
4 Hz
0.12 sec
70 µsec
10 kHz
Slew rate
0.15 V/µsec
Noise (400 kHz bandwidth)1
Input (gain = 1,000)
4 Hz filter
100 nVrms
4 µVrms
10 kHz filter
Output (gain = 1)
4 Hz
150 µVrms
1 mVrms
10 kHz
Operating common-mode voltage
Channel to channel or
Channel to earth
50 or 60 Hz
5
250 Vrms
Common-mode rejection ratio,
50 or 60 Hz
1 kΩ in input leads
NMR (50 or 60 Hz)
160 dB minimum at 4 Hz bandwidth
60 dB at 4 Hz bandwidth
Input protection (continuous)
Output protection
250 Vrms maximum
Continuous short-to-ground
7.5 W maximum
Power dissipation
3
Cold-Junction Sensor
SCXI-1320
Accuracy
Output
1.0° from 0° to 55° C
10 mV/°C
SCXI-1328
Accuracy4
0.35° from 15° to 35° C
0.65° from 0° to 15° and 35° to 55° C
1.91 to 0.58 V from 0° to 55° C
Output
1
Includes the combined effects of the SCXI-1120 and the AT-MIO-16F-5
Includes the combined effects of the SCXI-1120 and the AT-MIO-16X
Located on the SCXI-1320 and SCXI-1328 terminal blocks
2
3
4
Includes the combined effects of the temperature sensor accuracy and the temperature difference between the
temperature sensor and any screw terminal
5
Module tested using the UL 1244 standard to twice the working voltage + 1,000 Vrms
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Appendix A
Specifications
Note: You can find the temperature T (°C) as follows:
T (°C) = TK - 273.15
where TK is the temperature in kelvin
1
TK =
3
a +b lnR +c lnR
(
)
(
)
T
T
[
]
a = 1.288 x 10-3
b = 2.356 x 10-4
c = 9.556 x 10-8
RT = resistance of the thermistor in Ω
VTEMPOUT
RT =50,000
2.5−VTEMPOUT
VTEMPOUT = output voltage of the temperature sensor
Physical
Dimensions
1.2 by 6.8 by 8.0 in.
Connectors
50-pin male ribbon-cable rear connector
32-pin DIN C male front connector
(18-screw terminal adapter available)
Operating Environment
Temperature
0° to 50° C
Relative humidity
5% to 90% at 35° C
Storage Environment
Temperature
-55° to 150° C
-55° to 125° C for the SCXI-1328
Relative humidity
5% to 90% noncondensing
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Appendix B
Rear Signal Connector
This appendix describes the pinout and signal names for the SCXI-1120 50-pin rear signal
connector, including a description of each connection.
Figure B-1 shows the pin assignments for the SCXI-1120 rear signal connector.
AOGND
MCH0+
MCH1+
MCH2+
MCH3+
MCH4+
MCH5+
MCH6+
MCH7+
OUTREF
AOGND
MCH0-
MCH1-
MCH2-
MCH3-
MCH4-
1
3
5
7
9
2
4
6
8
10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44
45 46
47 48
49 50
MCH5-
MCH6-
MCH7-
DIG GND
SERDATIN
DAQD*/A
SERDATOUT
SLOT0SEL*
DIG GND
SERCLK
SCANCLK
RSVD
Figure B-1. SCXI-1120 Rear Signal Connector Pin Assignment
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Rear Signal Connector
Appendix B
Rear Signal Connector Signal Descriptions
Pin
Signal Name
Description
1-2
AOGND
Analog Output Ground – Connected to the analog
reference when jumper W46 is in position AB-R0.
3-18
19
MCH0± through MCH7± Analog Output Channels 0 through 7 – Connects to
the data acquisition board differential analog
inputchannels.
OUTREF
Output Reference – Serves as the reference node for
the analog output channels and the temperature
sensor–in the DTS mode–in the Pseudodifferential
Reference mode. It should be connected to the
analog input sense of the NRSE data acquisition
board.
24, 33
DIG GND
Digital Ground – Supply the reference for data
acquisition board digital signals and are tied to the
module digital ground.
25
26
27
SERDATIN
SERDATOUT
DAQD*/A
Serial Data In – Taps into the SCXIbus MOSI line
to provide serial input data to a module or Slot 0.
Serial Data Out – Taps into the SCXIbus MISO line
to accept serial output data from a module.
Data Acquisition Board Data/Address Line – Taps
into the SCXIbus D*/A line to indicate to the
module whether the incoming serial stream is data
or address information.
29
36
37
43
SLOT0SEL*
SCANCLK
SERCLK
RSVD
Slot 0 Select – Taps into the SCXIbus INTR* line
to indicate whether the information on MOSI is
being sent to a module or Slot 0.
Scan Clock – Indicates to the SCXI-1120 that a
sample has been taken by the data acquisition board
and causes the SCXI-1120 to change channels.
Serial Clock – This signal taps into the SCXIbus
SPICLK line to clock the data on the MOSI and
MISO lines.
Reserved.
All other pins are not connected.
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Appendix B
Rear Signal Connector
See the Timing Requirements and Communication Protocol section in Chapter 2, Configuration
and Installation, for more detailed information on timing. Detailed signal specifications are also
included in Chapter 2.
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Appendix C
SCXIbus Connector
This appendix describes the pinout and signal names for the SCXI-1120 96-pin SCXIbus
connector, including a description of each connection.
Figure C-1 shows the pinout of the SCXI-1120 SCXIbus connector.
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SCXIbus Connector
Appendix C
GUARD
GUARD
GUARD
AB0+
A1
B1
A2
B2
D1
C1
D2
C2
GUARD
GUARD
GUARD
AB0-
GUARD
GUARD
GUARD
A3
B3
A4
D3
C3
D4
GUARD
GUARD
GUARD
B4
C4
GUARD
GUARD
GUARD
A5
B5
A6
D5
C5
D6
GUARD
GUARD
GUARD
B6
C6
A7
D7
B7
C7
A8
D8
B8
C8
A9
D9
B9
C9
A10
B10
A11
B11
A12
B12
A13
B13
A14
B14
A15
B15
A16
B16
A17
B17
A18
B18
A19
B19
A20
B20
A21
B21
A22
B22
A23
B23
A24
B24
D10
C10
D11
C11
D12
C12
D13
C13
D14
C14
D15
C15
D16
C16
D17
C17
D18
C18
D19
C19
D20
C20
D21
C21
D22
C22
D23
C23
D24
C24
CHSGND
CHSGND
CHSGND
CHSGND
CHSGND
RSVD
INTR*
D*/A
V-
RESET*
MISO
V-
V-
V-
CHSGND
CHSGND
V+
V+
+5 V
SPICLK
TRIG0
SS*
CHSGND
CHSGND
V+
V+
+5 V
MOSI
SCANCON
Figure C-1. SCXIbus Connector Pin Assignment
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Appendix C
SCXIbus Connector
SCXIbus Connector Signal Descriptions
Pin
Signal Name
Description
A1, B1, C1, D1, GUARD
A2, D2, A3, B3,
C3, D3, A4, D4,
A5, B5, C5, D5,
A6, D6
Guard – Shields and guards the analog bus lines
from noise.
B2
AB0+
Analog Bus 0+ – Positive analog bus 0 line. Used
to multiplex several modules to one analog signal.
C2
AB0-
Analog Bus 0- – Negative analog bus 0 line. Used
to multiplex several modules to one analog signal.
C13-C17, A21, CHSGND
B21, C21, D21
Chassis Ground – Digital and analog ground
reference.
C18
A19
RSVD
Reserved.
RESET*
Reset – When pulled low, reinitializes the module to
its power-up state. Totem pole. Input.
B19
C19
MISO
D*/A
Master-In-Slave-Out – Transmits data from the
module to the SCXIbus. Open collector. I/O.
Data/Address – Indicates to the module whether
address information or data information is being
sent to the module on MOSI. Open collector. I/O.
D19
INTR*
Interrupt – Active low. Causes data that is on
MOSI to be written to the Slot-Select Register
Slot 0. Open collector. Output.
A20, B20, C20, V-
D20
Negative Analog Supply – -18.5 V to -25 V.
Positive Analog Supply – +18.5 V to +25 V.
+5 VDC Source – Digital power supply.
A22, B22, C22, V+
D22
A23, D23
B23
+5 V
SPICLK
MOSI
Serial Peripheral Interface (SPI) Clock – Clocks the
serial data on the MOSI and MISO lines. Open
collector. I/O.
C23
Master-Out-Slave-In – Transmits data from the
SCXIbus to the module. Open collector. I/O.
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SCXIbus Connector
Appendix C
Pin
Signal Name
Description (continued)
A24
TRIG0
TRIG0 – General-purpose trigger line used by the
SCXI-1120 to send SCANCLK to other modules or
receive SCANCLK from other modules. Open
collector. I/O.
B24
C24
SS*
Slot Select – When low, enables module
communications over the SCXIbus. Totem pole.
Input.
SCANCON
Scanning Control – Combination output enable and
reload signal for scanning operations. Totem pole.
Input.
All other pins are not connected.
Further information is given in Chapter 3, Theory of Operation.
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Appendix D
SCXI-1120 Front Connector
This appendix describes the pinout and signal names for the SCXI-1120 front connector,
including a description of each connection.
Figure D-1 shows the pin assignments for the SCXI-1120 front connector.
Pin
Number
Column
B
Signal
Name
Signal
Name
A
C
CH0-
CH0+
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
CH1+
CH1-
CH2-
CH3-
CH2+
CH3+
CH4+
CH5+
CH4-
CH5-
CH6-
CH7-
CH6+
CH7+
8
RSVD
7
RSVD
RSVD
+5 V
6
5
4
MTEMP
3
CHSGND
DTEMP
2
1
Figure D-1. SCXI-1120 Front Connector Pin Assignment
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SCXI-1120 Front Connector
Appendix D
Front Connector Signal Descriptions
Pin
A2
C2
Signal Name
CHSGND
DTEMP
Description
Chassis Ground – Tied to the SCXI chassis.
Direct Temperature Sensor – Connects the
temperature sensor to pin 18 of the rear signal
connector MCH7- when the terminal block is
configured for direct temperature connection and
jumper W41 is in position 3.
A4
+5 V
+5 VDC Source – Used to power the temperature
sensor on the terminal block. 0.2 mA of source not
protected.
C4
MTEMP
RSVD
Multiplexed Temperature Sensor – Connects the
temperature sensor to the output multiplexer.
A6, C6, C8
Reserved – Reserved for future use. Do not connect
any signals to these pins. TTL/CMOS output. They
are not protected.
A8, A10, C10, No Connect
A16, C16,A22,
Do not connect any signals to these pins.
C22, A28, C28
A12, A14, A18, CH7+ through CH0+
A26, A20, A24,
Positive Input Channels – The positive inputs to
channels 7 through 0, respectively.
A30, A32
C12, C14, C18, CH7- through CH0-
C20, C24, C26,
Negative Input Channels – The negative inputs to
channels 7 through 0, respectively.
C30, C32
Further information is given in Chapter 2, Configuration and Installation.
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Appendix E
SCXI-1120 Cabling
This appendix describes how to use and install the hardware accessories for the SCXI-1120:
•
•
•
•
•
•
•
•
•
SCXI-1340 cable assembly
SCXI-1341 Lab-NB, Lab-PC, and Lab-PC+ cable assembly
SCXI-1342 PC-LPM-16 cable assembly
SCXI-1344 Lab-LC cable assembly
SCXI-1180 feedthrough panel
SCXI-1302 50-pin terminal block
SCXI-1351 one-slot cable extender
SCXI-1350 multichassis adapter
SCXI-1343 screw terminal adapter
SCXI-1340 Cable Assembly
The SCXI-1340 cable assembly connects an MIO-16 board to an SCXI-1120 module. The
SCXI-1340 consists of a 50-conductor ribbon cable that has mounting bracket at one end and a
50-pin female connector at the other end. The female connector connects to the I/O connector of
the MIO-16 board. Attached to the mounting bracket is a 50-pin female mounting-bracket
connector that connects to the module rear signal connector. To extend the signals of the
MIO-16 board to an SCXI-1180 feedthrough panel or an SCXI-1181 breadboard module, you
can use the male breakout connector that is near the mounting bracket on the ribbon cable. All
50 pins from the MIO-16 board go straight through to the rear signal connector. You can use a
standard 50-pin ribbon cable instead of the SCXI-1340 cable assembly. The SCXI-1340 has the
following advantages over the ribbon cable:
•
•
The SCXI-1340 has strain relief so that you cannot accidentally disconnect the cable.
The SCXI-1340 includes a mounting bracket that mounts to the chassis so that you can
remove and reinsert the module without explicitly removing the cable from the back of the
chassis. This is especially useful when the SCXI chassis is rack mounted, making rear access
difficult.
•
•
The SCXI-1340 has an extra male breakout connector for use with the SCXI-1180
feedthrough panel or additional modules or breadboards that need a direct connection to the
MIO-16 board.
The SCXI-1340 rear panel gives the module and the chassis both mechanical and electrical
shielding.
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SCXI-1120 Cabling
Appendix E
Table E-1 lists the pin equivalences of the MIO-16 board and the SCXI-1120.
Table E-1. SCXI-1120 and MIO-16 Board Pinout Equivalences
Pin
SCXI-1120 Rear Signal Connector
MIO-16 Board
Equivalent
1-2
3
4
AOGND
MCH0+
MCH0-
AIGND
ACH0
ACH8
5
6
MCH1+
MCH1-
ACH1
ACH9
7
8
9
MCH2+
MCH2-
MCH3+
MCH3-
MCH4+
MCH4-
MCH5+
MCH5-
MCH6+
MCH6-
MCH7+
MCH7-
OUTREF
DIG GND
SERDATIN
SERDATOUT
DAQD*/A
SLOT0SEL*
SCANCLK
SERCLK
RSVD
ACH2
ACH10
ACH3
ACH11
ACH4
ACH12
ACH5
ACH13
ACH6
ACH14
ACH7
ACH15
AISENSE
DIG GND
ADIO0
BDIO0
ADIO1
ADIO2
SCANCLK
EXTSTROBE*
OUT1
10
11
12
13
14
15
16
17
18
19
24, 33
25
26
27
29
36
37
43
No other pins are connected on the SCXI-1120.
SCXI-1340 Installation
Follow these steps to install the SCXI-1340:
1. Make sure that the computer and the SCXI chassis are turned off.
2. Install the SCXI module in the chassis.
3. Plug the mounting bracket connector onto the module rear signal connector (see Figure E-1).
Make sure the alignment tab on the bracket enters the upper module guide of the chassis.
4. Screw the mounting bracket to the threaded strips in the rear of the chassis.
SCXI-1120 User Manual
E-2
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Appendix E
SCXI-1120 Cabling
5. Connect the loose end of the cable assembly to the MIO-16 board rear signal connector.
Check the installation.
After step 1, the order of these steps is not critical; however, it is easier to locate the correct
position for the mounting bracket with a module installed in the chassis. If you will attach a
cable to the breakout connector, installation is easiest if you attach the second cable before
installing the SCXI-1340.
Rear Panel
Mounting Bracket
Connector
Step 4
Step 5
50-Pin Female
Connector to
MIO-16 Board
Step 3
Male Breakout
Connector
Step 4
SCXI-1120 Rear
Signal Connector
Mounting Bracket
Figure E-1. SCXI-1340 Installation
SCXI-1341 Lab-NB, Lab-PC, or Lab-PC+ and SCXI-1344
Lab-LC Cable Assembly
The SCXI-1341 Lab-NB, Lab-PC, or Lab-PC+ cable assembly connects a Lab-NB, Lab-PC, or
Lab-PC+ board to an SCXI-1120 module. The SCXI-1344 Lab-LC cable assembly connects a
Lab-LC board to an SCXI-1120 module. The SCXI-1341 and SCXI-1344 cable assemblies
consist of two pieces–an adapter board and a 50-conductor ribbon cable that connects the Lab
board to the rear connector of the adapter board. The adapter board converts the signals from the
Lab board I/O connector to a format compatible with the SCXI-1120 rear signal connector pinout
at the front connector of the SCXI-1341 or SCXI-1344. The adapter board also has an additional
male breakout connector that makes the unmodified Lab board signals accessible to an
SCXI-1180 feedthrough panel or an SCXI-1181 breadboard module. The adapter board gives the
© National Instruments Corporation
E-3
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SCXI-1120 Cabling
Appendix E
Lab boards full access to the digital control lines and analog signals (except DTEMP), but the Lab
boards cannot scan channels in Multiplexed mode. Leave jumper W1 in position A on the
SCXI-1341 and SCXI-1344. The SCXI-1120 does not use jumper W1. Table E-2 lists the
SCXI-1341 and SCXI-1344 pin translations.
Note: If you are using the Lab-PC+, configure the board for single-ended inputs.
Table E-2. SCXI-1341 and SCXI-1344 Pin Translations
Lab Board Pin
Lab Board Signal
SCXI-1120 Pin
SCXI-1120 Signal
1
2
3
4
5
6
7
8
ACH0
ACH1
ACH2
ACH3
ACH4
ACH5
ACH6
ACH7
AIGND
DAC0OUT
AOGND
DAC1OUT
DGND
PB4
3
5
7
9
MCH0+
MCH1+
MCH2+
MCH3+
MCH4+
MCH5+
MCH6+
MCH7+
11
13
15
17
1-2
20
23
21
24, 33
25
27
29
37
26
28
36
46
34-35
9
AOGND
10
11
12
13, 50
26
27
28
29
31
32
40
43
49
No Connect
No Connect
No Connect
DIG GND
SERDATIN
DAQD*/A
SLOT0SEL*
SERCLK
SERDATOUT
No Connect
SCANCLK
No Connect
No Connect
PB5
PB6
PB7
PC1
PC2
EXTCONV*
OUTB1
+5 V
All other pins of the Lab board pinout are not sent to the SCXI-1120 rear signal connector.
SCXI-1341 and SCXI-1344 Installation
Follow these steps to install the SCXI-1341 or SCXI-1344:
1. Make sure that the computer and the SCXI chassis are turned off.
2. Install the SCXI module in the chassis.
3. Connect one end of the ribbon cable to the adapter board rear connector. This is the 50-pin
connector of the SCXI-1344 cable.
4. Plug the adapter board front connector to the module rear signal connector. Make sure a
corner of the adapter board enters the upper module guide of the chassis.
5. Screw the rear panel to the threaded strips in the rear of the chassis.
SCXI-1120 User Manual
E-4
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Appendix E
SCXI-1120 Cabling
6. For an SCXI-1341, connect the loose end of the ribbon cable to the Lab-NB, Lab-PC, or
Lab-PC+ I/O connector. For an SCXI-1344, connect the two 26-pin connectors to the
Lab--LC according to the instructions given in the Installation section of Chapter 2,
Configuration and Installation, of the Lab-LC User Manual.
Check the installation.
SCXI-1342 PC-LPM-16 Cable Assembly
The SCXI-1342 PC-LPM-16 cable assembly connects a PC-LPM-16 board to an SCXI-1120
module. The 1342 cable assembly consists of two pieces–an adapter board and a 50-conductor
ribbon cable that connects the PC-LPM-16 board to the adapter board. The adapter board
converts the signals from the PC-LPM-16 I/O connector to a format compatible with the
SCXI-1120 rear signal connector pinout. The adapter board also has an additional male breakout
connector that makes the unmodified PC-LPM-16 signals accessible to an SCXI-1180
feedthrough panel or SCXI-1181 breadboard module. The adapter board gives the PC-LPM-16
full access to the digital control lines and analog signals, but the PC-LPM-16 cannot scan
channels in the Multiplexed mode. Leave jumper W1 in position A on the SCXI-1342. The
SCXI-1120 does not use jumper W1. Table E-3 lists the SCXI-1342 pin translations.
Table E-3. SCXI-1342 Pin Translations
PC-LPM-16 Pin
PC-LPM-16 Signal
Rear Signal
Connector Pin
SCXI-1120 Use
1-2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19, 50
28
29
34
35
AIGND
ACH0
ACH8
ACH1
ACH9
ACH2
ACH10
ACH3
ACH11
ACH4
ACH12
ACH5
ACH13
ACH6
ACH14
ACH7
ACH15
DGND
DIN6
1-2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
24, 33
26
28
25
27
AOGND
MCH0+
MCH0-
MCH1+
MCH1-
MCH2+
MCH2-
MCH3+
MCH3-
MCH4+
MCH4-
MCH5+
MCH5-
MCH6+
MCH6-
MCH7+
MCH7-
DIG GND
SERDATOUT
No Connect
SERDATIN
DAQD*/A
DIN7
DOUT4
DOUT5
(continues)
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SCXI-1120 Cabling
Appendix E
Table E-3. SCXI-1342 Pin Translations (Continued)
PC-LPM-16 Pin
PC-LPM-16 Signal
Rear Signal
Connector Pin
SCXI-1120 Use
36
37
46
49
DOUT6
DOUT7
OUT2
+5 V
29
37
46
34-35
SLOT0SEL*
SERCLK
No Connect
No Connect
All other pins of the PC-LPM-16 pinout are not sent to the SCXI-1120 rear signal connector.
SCXI-1342 Installation
Follow these steps to install the SCXI-1342:
1. Make sure that the computer and the SCXI chassis are turned off.
2. Install the SCXI module to which the SCXI-1342 will connect.
3. Connect one end of the ribbon cable to the adapter board rear connector.
4. Plug the adapter board front connector onto the module rear signal connector. Make sure a
corner of the adapter board enters the upper module guide of the chassis.
5. Screw the rear panel to the threaded strips in the rear of the chassis.
6. Connect the loose end of the ribbon cable to the PC-LPM-16 I/O connector.
Check the installation.
SCXI-1180 Feedthrough Panel
The SCXI-1180 feedthrough panel provides front-panel access to the signals of any data
acquisition board that uses a 50-pin I/O connector. The SCXI-1180 consists of a front panel with
a 50-pin male front panel connector that occupies one slot in the SCXI chassis, and a ribbon
cable with a female rear connector and a male breakout connector. You can attach the rear
connector to the male breakout connector of an SCXI-1340, SCXI-1341, SCXI-1342,
SCXI-1344, or SCXI-1351 in the adjacent slot. The breakout connector further extends the
cabling scheme. The front panel connector provides the feedthrough connection. You can attach
an SCXI-1302 terminal block to the front panel connector for simple screw terminal connections.
A rear filler panel that shields and protects the interior of the SCXI chassis is also included.
SCXI-1180 Installation
Install the SCXI-1180 to the right of a slot that has an SCXI-1340, SCXI-1341, SCXI-1342, or
SCXI-1344 cable assembly or an SCXI-1351 slot extender in its rear connector space.
Follow these steps to install the SCXI-1180:
SCXI-1120 User Manual
E-6
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Appendix E
SCXI-1120 Cabling
1. Make sure that the computer and the SCXI chassis are turned off.
2. Remove the front filler panel of the slot where you will insert the SCXI-1180.
3. Thread the rear connector through the front of the chassis to the rear of the chassis. Attach
the rear connector to the breakout connector of the adjacent cable assembly or slot extender,
as shown in Figure E-2.
Step 4
Threaded Strip in
Rear of Chassis
Step 3
SCXI-1180
Breakout Connector
Rear
Panel
Breakout Connector
from SCXI-1340
Rear Connector
Ribbon Cable to
Front Panel
Figure E-2. SCXI-1180 Rear Connections
4. Screw in the rear panel to the threaded strip in the rear of the chassis.
5. Screw the front panel into the front threaded strip, as shown in Figure E-3.
Check the installation.
© National Instruments Corporation
E-7
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SCXI-1120 Cabling
Appendix E
Front Panel
Connector
Ribbon Cable to
Rear and Breakout
Connectors
Step 5
Front Panel
Front Threaded Strip
Figure E-3. SCXI-1180 Front Panel Installation
SCXI-1302 50-Pin Terminal Block
The SCXI-1302 terminal block has screw terminal connections for the 50-pin connector on the
SCXI-1180 feedthrough panel.
SCXI-1302 Wiring Procedure
To wire the SCXI-1302 terminal block, you must remove the cover, connect all the wiring, and
replace the cover. The procedure for this is as follows:
1. Unscrew the rear grounding screw on the back of the terminal block, as shown in Figure E-4.
2. With a flathead screwdriver, carefully pry the cover off the terminal block.
3. Insert each wire through the terminal block strain-relief opening.
4. Connect the wires to the screw terminals.
5. Tighten the large strain-relief screws to secure the wires.
6. Snap the cover back in place.
7. Reinsert the rear grounding screw. The terminal block is now ready to be connected to the
front panel connector.
SCXI-1120 User Manual
E-8
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Appendix E
SCXI-1120 Cabling
50-Pin
Connector
Grounding
Screw
Step 2
Step 1
Insert Screwdriver in
Groove and Rotate to
Pry Open
Thumbscrew Cutout
Figure E-4. Cover Removal
SCXI-1302 Installation
Follow these steps to install the SCXI-1302:
1. Install an SCXI-1180 feedthrough panel as described in the SCXI-1180 Installation section.
2. Wire the terminal block as previously described in the SCXI-1302 Wiring Procedure section.
3. Connect the SCXI-1302 terminal block to the front panel connector on the SCXI-1180
feedthrough panel. Be careful to fit the thumbscrews in the thumbscrew cutouts.
4. Tighten the top and bottom captive screws on the back of the terminal block into the screw
holes in the front panel. This will hold the SCXI-1302 securely in place.
Check the installation.
SCXI-1351 One-Slot Cable Extender
The SCXI-1351 cable extender is a miniature SCXI-1340 cable assembly. Instead of connecting
to an MIO board 1 m away, the SCXI-1351 female rear connector connects to the male breakout
connector of a module that must be in the rear connector space of the slot to the left. The
SCXI-1351 has a female mounting bracket connector that mates with the rear signal connector of
a module, and also has a male breakout connector on the ribbon cable for connecting to a
feedthrough panel or more cable extenders.
© National Instruments Corporation
E-9
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SCXI-1120 Cabling
Appendix E
SCXI-1351 Installation
Follow these steps to install the SCXI-1351:
1. Make sure that the computer and the SCXI chassis are turned off.
2. Install the SCXI module in the chassis.
3. Connect the rear connector of the cable extender to the breakout connector in the adjacent
slot. This attachment is similar to Step 3 in the SCXI-1180 Installation section, as shown in
Figure E-2.
4. Plug the mounting bracket connector to the module rear signal connector. Make sure the
alignment tab on the bracket enters the upper module guide of the chassis.
5. Screw the mounting bracket to the threaded strips in the rear of the chassis.
Check the installation.
SCXI-1350 Multichassis Adapter
You use the SCXI-1350 multichassis adapter to connect an additional SCXI-1001 chassis to the
MIO-16 board. Using several SCXI-1350s, you can connect up to eight chassis to a single MIO
board. The SCXI-1350 consists of a multichassis adapter board. You will also need a ribbon
cable for each chassis-to-chassis connection, and a ribbon cable for the connection from the MIO
board to the first chassis.
Note: Use 0.5 m ribbon cable when connecting multiple chassis together to minimize cable
length and maintain signal integrity. You can use a 1 m cable from the MIO board to the
first chassis.
The adapter board has a male rear connector, a female front connector, and a male chassis
extender connector. You can attach the rear connector to a ribbon cable from the MIO board or a
preceding chassis. You connect the front connector with the module rear signal connector. You
connect the chassis extender connector to a ribbon cable that goes to the subsequent chassis. The
adapter takes Channel 0 from the front connector and sends it to Channel 0 of the rear connector.
The adapter also takes channels 0 through 6 on the chassis extender connector and maps them to
channels 1 through 7, respectively, on the rear connector.
SCXI-1350 Installation
Follow these steps to install the SCXI-1350:
1. Make sure that the computer and all the SCXI chassis are turned off.
2. Insert all the modules in all the chassis.
3. Connect one end of a ribbon cable to the MIO board.
4. Connect the other end of the ribbon cable to the rear connector of the first SCXI-1350.
SCXI-1120 User Manual
E-10
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Appendix E
SCXI-1120 Cabling
5. Connect another ribbon cable or cable assembly to the chassis extender connector.
6. Plug the adapter board front connector to the module rear signal connector. Make sure a
corner of the adapter board enters the upper module guide of the chassis.
7. Screw the rear panel to the threaded strips in the rear of the chassis.
8. Connect the cable assembly to the desired module in the second chassis, or if you are using
more than two chassis, connect the loose end of the ribbon cable to the rear connector of the
second SCXI-1350, and install the adapter board.
9. Continue until all chassis are connected. For N chassis, you will need N ribbon cables and N
multichassis adapters.
SCXI-1343 Rear Screw Terminal Adapter
You use the SCXI-1343 universal adapter to adapt custom wiring to the SCXI-1120. The
SCXI-1343 has screw terminals for the analog output connections and solder pads for the rest of
the signals. A strain-relief clamp is on the outside of the rear panel.
SCXI-1343 Installation
1. Insert each wire through the adapter strain-relief opening.
2. Make all solder connections first.
3. Connect the other wires to the screw terminals.
4. Tighten the strain-relief screws to secure the wires.
5. Plug the adapter board front connector to the module rear signal connector. Make sure a
corner of the adapter board enters the upper module guide of the chassis.
6. Screw the rear panel to the threaded strips in the rear of the chassis.
© National Instruments Corporation
E-11
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SCXI-1120 Cabling
Appendix E
Table E-4. SCXI-1343 Pin Connections
Rear Signal Connector Pin
SCXI-1120 Use
Connection Type
1
2
3
4
5
6
7
8
AOGND
AOGND
MCH0+
MCH0-
MCH1+
MCH1-
MCH2+
MCH2-
MCH3+
MCH3-
MCH4+
MCH4-
MCH5+
MCH5-
MCH6+
MCH6-
Solder pad
Screw terminal
Screw terminal
Screw terminal
Screw terminal
Screw terminal
Screw terminal
Screw terminal
Screw terminal
Screw terminal
Screw terminal
Screw terminal
Screw terminal
Screw terminal
Screw terminal
Screw terminal
Screw terminal
Screw terminal
Screw terminal
Solder pad
Solder pad
Solder pad
Solder pad
Solder pad
Solder pad
Solder pad
Solder pad
Solder pad
Solder pad
Solder pad
Solder pad
Solder pad
Solder pad
Solder pad
Solder pad
Solder pad
Solder pad
Solder pad
Solder pad
Solder pad
Solder pad
Solder pad
Solder pad
Solder pad
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24, 33
26
27
28
29
30
31
32
33
34-35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
MCH7+
MCH7-
OUTREF
No Connect
No Connect
No Connect
No Connect
DIG GND
SERDATOUT
DAQD*/A
No Connect
SLOT0SEL*
No Connect
No Connect
No Connect
No Connect
No Connect
SCANCLK
SERCLK
No Connect
No Connect
No Connect
No Connect
No Connect
RSVD
No Connect
No Connect
No Connect
No Connect
No Connect
No Connect
No Connect
Solder pad
Solder pad
Solder pad
Solder pad
SCXI-1120 User Manual
E-12
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Appendix F
Revision A and B Photo and Parts Locator
Diagrams
This appendix contains a photograph of the Revision A and B SCXI-1120 signal conditioning
module and the general and detailed parts locator diagrams.
Figure F-1 shows the Revision A and B SCXI-1120 signal conditioning module. Figures F-2 and
F-3 show the general and detailed parts locator diagrams.
Figure F-1. Revision A and B SCXI-1120 Signal Conditioning Module
© National Instruments Corporation
F-1
SCXI-1120 User Manual
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Appendix G
Customer Communication
For your convenience, this appendix contains forms to help you gather the information necessary
to help us solve technical problems you might have as well as a form you can use to comment on
the product documentation. Filling out a copy of the Technical Support Form before contacting
National Instruments helps us help you better and faster.
National Instruments provides comprehensive technical assistance around the world. In the U.S.
and Canada, applications engineers are available Monday through Friday from 8:00 a.m. to
6:00 p.m. (central time). In other countries, contact the nearest branch office. You may fax
questions to us at any time.
Corporate Headquarters
(512) 795-8248
Technical support fax: (800) 328-2203
(512) 794-5678
Branch Offices
Australia
Austria
Belgium
Denmark
Finland
France
Germany
Italy
Phone Number
(03) 879 9422
(0662) 435986
02/757.00.20
45 76 26 00
(90) 527 2321
(1) 48 14 24 00
089/741 31 30
02/48301892
(03) 3788-1921
03480-33466
32-848400
Fax Number
(03) 879 9179
(0662) 437010-19
02/757.03.11
45 76 71 11
(90) 502 2930
(1) 48 14 24 14
089/714 60 35
02/48301915
(03) 3788-1923
03480-30673
32-848600
Japan
Netherlands
Norway
Spain
Sweden
Switzerland
U.K.
(91) 640 0085
08-730 49 70
056/20 51 51
0635 523545
(91) 640 0533
08-730 43 70
056/20 51 55
0635 523154
© National Instruments Corporation
G-1
SCXI-1120 User Manual
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Technical Support Form
___________________________________________________
Photocopy this form and update it each time you make changes to your software or hardware, and use the completed
copy of this form as a reference for your current configuration. Completing this form accurately before contacting
National Instruments for technical support helps our applications engineers answer your questions more efficiently.
If you are using any National Instruments hardware or software products related to this problem, include the
configuration forms from their user manuals. Include additional pages if necessary.
Name
Company
Address
Fax (
Computer brand
Operating system
)
Phone (
Model
)
Processor
Speed
MHz
RAM
no
MB
Display adapter
Mouse
yes
Other adapters installed
Brand
Hard disk capacity
Instruments used
MB
National Instruments hardware product model
Configuration
Revision
National Instruments software product
Configuration
Version
The problem is
List any error messages
The following steps will reproduce the problem
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SCXI-1120 Hardware Configuration Form
Record the settings and revisions of your hardware and software on the line to the right of each item. Complete a
new copy of this form each time you revise your software or hardware configuration, and use this form as a
reference for your current configuration. Completing this form accurately before contacting National Instruments
for technical support helps our applications engineers answer your questions more efficiently.
•
•
•
•
SCXI-1120 Revision Letter
Chassis Slot
Chassis Type
Grounding, Shielding, and Reference
Mode Selection (Factory Setting:
Parked, W46, B-R0R1)
•
Input Channel Gain Configuration
Input Channel
First-Stage Gain
Factory Setting User Setting
Second-Stage Gain
Factory Setting User Setting
Total Gain
Factory Setting, 1,000
0
1
2
3
4
5
6
7
100, W1, A
100, W2, A
100, W3, A
100, W4, A
100, W5, A
100, W6, A
100, W7, A
100, W8, A
10, W9, D
10, W10, D
10, W11, D
10, W12, D
10, W13, D
10, W14, D
10, W15, D
10, W16, D
•
Input Channel Filter Configuration
Input Channel
Factory Setting
User Setting
0
1
2
3
4
5
6
7
W17, A, W25, ON, W26, OFF
W18, A, W27, ON, W28, OFF
W19, A, W29, ON, W30, OFF
W20, A, W31, ON, W32, OFF
W21, A, W33, ON, W34, OFF
W22, A, W35, ON, W36, OFF
W23, A, W37, ON, W38, OFF
W24, A, W39, ON, W40, OFF
•
•
Other Modules in System
Data Acquisition Boards Installed
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Documentation Comment Form
National Instruments encourages you to comment on the documentation supplied with our products. This
information helps us provide quality products to meet your needs.
Title: SCXI-1120 User Manual
Edition Date:
Part Number:
August 1994
320425B-01
Please comment on the completeness, clarity, and organization of the manual.
If you find errors in the manual, please record the page numbers and describe the errors.
Thank you for your help.
Name
Title
Company
Address
Phone
(
)
Mail to:
Technical Publications
Fax to:
Technical Publications
National Instruments Corporation
MS 53-02
National Instruments Corporation
6504 Bridge Point Parkway, MS 53-02
Austin, TX 78730-5039
(512) 794-5678
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Glossary
Prefix
Meaning
Value
p-
n-
µ-
m-
k-
pico-
10-12
10-9
10-6
10-3
103
nano-
micro-
milli-
kilo-
M-
mega-
106
Numbers/Symbols
˚
Ω
degrees
ohms
+5 VDC Source signal
+5 V (signal)
A
A
amperes
AB0+
AB0-
AB0EN
ACH#
A/D
Positive Analog Bus 0 signal
Negative Analog Bus 0 signal
Analog Bus 0 Enable bit
data acquisition board Analog Input Channel Number
analog-to-digital
AOGND
Arms
AWG
Analog Output Ground signal
amperes, root mean square
American Wire Gauge
B
BW
bandwidth
C
C
CH#+
CH#-
CHAN
CHS
Celsius
Positive Input Channel Number signal
Negative Input Channel Number signal
Channel Select bit
Chassis bit
CHSGND
CJR
CLKEN
CLKOUTEN
CLKSELECT
CNT
Chassis Ground signal
cold-junction reference
Clock Enable bit
Scan Clock Output Enable bit
Scan Clock Select bit
Count bit
© National Instruments Corporation
Glossary-1
SCXI-1120 User Manual
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Glossary
D
D*/A
D/A
Data/Address signal
digital-to-analog
DAQD*/A
dB
DIG GND
DIN
DMM
DTEMP
DTS
Data Acquisition Board Data/Address Line signal
decibels
Digital Ground signal
Deutsche Industrie Norme
digital multimeter
Direct Temperature Sensor signal
direct temperature sensor
F
F
Fahrenheit
first-in-first-out
Forced Output Enable bit
Forced Retransmit bit
FIFO
FOUTEN*
FRT
G
GBWP
GUARD
gain bandwidth product
Guard signal
H
hex
hexadecimal
HSCR
HSRS*
Hz
Hardscan Control Register
Hardscan Reset bit
hertz
I
II
in.
input current leakage
inches
INTR*
I/O
Interrupt signal
input/output
K
K
kelvin
L
LOAD*
LSB
Load bit
least significant bit
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Glossary
M
m
M
meters
megabytes of memory
MCH#+
MCH#-
MIO
MISO
MOD
MOSI
MSB
MTEMP
MTS
Positive Analog Output Channel Number signal
Negative Analog Output Channel Number signal
multifunction I/O
Master-In-Slave-Out signal
Module Number bit
Master-Out-Slave-In signal
most significant bit
Multiplexed Temperature Sensor signal
multiplexed temperature sensor
N
NRSE
nonreferenced single-ended (input)
O
ONCE
OUTREF
Once bit
Output Reference signal
P
ppm
parts per million
R
RAM
RD
RESET*
rms
random-access memory
Read bit
Reset signal
root mean square
RSE
RSVD
RTD
RTEMP
RTSI
referenced single-ended (input)
Reserved bit/signal
resistance temperature detector
Read Temperature bit
Real-Time System Integration
S
SCANCLK
SCANCLKEN
SCANCON
SCANCONEN
SCXI
Scan Clock signal
Scan Clock Enable bit
Scanning Control signal
Scan Control Enable bit
Signal Conditioning eXtensions for Instrumentation (bus)
Software Developer's Kit
SDK
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Glossary
sec
seconds
SERCLK
SERDATIN
SERDATOUT
SL
Serial Clock signal
Serial Data In signal
Serial Data Out signal
Slot bit
SLOT0SEL*
SPI
SPICLK
SS*
Slot 0 Select signal
Serial Peripheral Interface
Serial Peripheral Interface Clock signal
Slot Select signal
T
tempco
TRIG0
temperature coefficient
Trigger 0 signal
U
UL
Underwriters Laboratory
V
V
V+
V-
VDC
VIH
VIL
VOH
VOL
Vrms
volts
Positive Analog Supply signal
Negative Analog Supply signal
volts direct current
input logic high voltage
input logic low voltage
output logic high voltage
output logic low voltage
volts, root mean square
W
W
watts
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Index
AOGND signal
Numbers/Symbols
analog output signal connections, 2-26
rear signal connector, 2-25, B-2
+5 V signal
front connector, 2-13, D-2
SCXIbus connector, 3-4, C-3
B
bit descriptions
AB0EN, 4-4
A
CHAN<2..0>, 4-3
CHS<4..0>, 4-6
CLKEN, 4-7
AB0- signal, 3-4, C-3
AB0+ signal, 3-4, C-3
CLKOUTEN, 4-3
CLKSELECT, 4-3
CNT<6..0>, 4-8
FOUTEN*, 4-4
FRT, 4-7
HSRS*, 4-7
LOAD*, 4-7
MOD<3..0>, 4-8
ONCE, 4-7
RD, 4-7
RSVD, 4-4, 4-7
RTEMP, 4-4
AB0EN bit, 4-4
AC-coupled signal connection with high
common-mode voltage, 2-15
analog configuration
direct temperature connection
(jumper W41), 2-8 to 2-9
filter jumpers, 2-10
gain jumpers, 2-9 to 2-10
grounding, shielding, and reference-
mode selection (jumper W46),
2-7
analog input channels
SCANCLKEN, 4-4
SCANCONEN, 4-4, 4-7
SL<3..0>, 4-6
analog input block diagram, 3-9
calibration, 3-10 to 3-12
equipment requirements,
3-10 to 3-11
offset null adjust, 3-11
potentiometers reference
designators, 3-12
C
formula for determining overall
gain, 3-10
front connector, 2-12 to 2-13
AC-coupled signal connection, 2-15
floating AC-coupled signal
connection, 2-14
cabling
custom cables, 1-4
part numbers for custom cables, 1-4
SCXI-1180 feedthrough panel
cable assembly, E-6
front panel installation, E-8
installation, E-6 to E-8
rear connections, E-7
SCXI-1302 50-pin terminal block
installation, E-9
floating signal connection, 2-14
ground-referenced signal
connection, 2-14
warning against exceeding input
range, 2-15
wiring procedure, E-8 to E-9
SCXI-1340
theory of operation, 3-8 to 3-10
analog input specifications, A-1 to A-2
analog output circuitry, 3-12 to 3-13
analog output signal connections, 2-26
cable assembly, E-1 to E-2
installation, E-2 to E-3
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Index
serial data timing diagram, 2-30
slot-select procedure, 2-28 to 2-29
slot-select timing diagram, 2-29
writing to Configuration Register, 2-30
configuration. See also signal connections.
analog configuration
SCXI-1120 and MIO-16 board
pinout equivalences, E-2
SCXI-1341
cable assembly, E-3 to E-4
installation, E-4 to E-5
SCXI-1342
cable assembly, E-5 to E-6
installation, E-6
SCXI-1343 rear screw terminal adapter
installation, E-11
pin connections, E-12
SCXI-1344
direct temperature connection
(jumper W41), 2-8 to 2-9
filter jumpers, 2-10
gain jumpers, 2-9 to 2-10
grounding, shielding, and reference-
mode selection (jumper W46),
2-7 to 2-8
cable assembly, E-3 to E-4
installation, E-4 to E-5
SCXI-1350 multichassis adapter
cable assembly, E-10
digital signal connections, 2-4 to 2-7
jumper settings (table), 2-6 to 2-7
jumper W42, 2-5
jumper W43, 2-5
jumper W44, 2-5
using jumpers W42 and W43,
2-5 to 2-6
installation, E-10 to E-11
SCXI-1351 one-slot cable extender
cable assembly, E-9
installation, E-10
fixed jumpers, 2-4
parts locator diagrams
calibration, 3-10 to 3-12
equipment requirements, 3-10 to 3-11
offset null adjust, 3-11
potentiometers reference
designators, 3-12
CH3 through CH0 signal, 5-3
CH7- through CH0- signal, 2-13, D-2
CH7+ through CH0+ signal, 2-13, D-2
CHAN<2..0> bit, 4-3
detailed diagram, 2-3
general diagram, 2-2
SCXI-1320 terminal block jumper
configuration, 2-19
SCXI-1328 terminal block jumper
configuration, 2-18 to 2-19
user-configurable jumpers, 2-4
Configuration Register
channel scanning
description of, 4-3 to 4-4
write procedure, 2-30 to 2-31, 3-7
connector-and-shell assembly. See
SCXI-1330 connector-and-shell
assembly.
from other modules, 5-9
from SCXI-1120 via another
module, 5-9
CHS<4..0> bit, 4-6
CHSGND signal
front connector, 2-13, D-2
SCXIbus connector, 3-4, C-3
CLKEN bit, 4-7
customer communication, xiii, G-1
CLKOUTEN bit, 4-3
CLKSELECT bit, 4-3
CNT<6..0> bit, 4-8
cold-junction sensor specifications,
A-2 to A-3
communication signals for SPI bus,
2-28 to 2-31
D
D*/A signal
description of, 3-4, C-3
digital control circuitry, 3-7
and SPI bus, 3-5
DAQD*/A signal
Configuration Register write timing
diagram, 2-31
Module ID Register timing
diagram, 2-31
communicating on SPI bus, 2-28 to 2-31
digital I/O signal connections,
2-26 to 2-27
rear signal connector, 2-25, B-2
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Index
register selection and write
procedure, 5-2
SCXI-1320 terminal block
connecting, 2-17 to 2-18
installation, 2-23
jumper configuration, 2-19
parts locator diagram, 2-21
signal connection, 2-20
temperature sensor, 2-18
SCXI-1328 terminal block
connecting, 2-17 to 2-18
installation, 2-23
DIG GND signal, 2-25, B-2
digital control circuitry, 3-7 to 3-8
digital I/O signal connections
rear signal connector, 2-26 to 2-27
SCXIbus pin equivalences with
SCXI-1120 and data acquisition
boards, 2-27
specifications and ratings, 2-27
digital interface circuitry, 3-6
digital signal connections, 2-4 to 2-7
jumper settings (table), 2-6 to 2-7
jumper W42, 2-5
jumper configuration, 2-19 to 2-20
parts locator diagram, 2-22
signal connection, 2-20
temperature sensor, 2-18 to 2-19
SCXI-1330 connector-and-shell
assembly, 2-16 to 2-17
jumper W43, 2-5
jumper W44, 2-5
using jumpers W42 and W43, 2-5 to 2-6
direct temperature connection
(jumper W41), 2-8 to 2-9
documentation
signal descriptions, 2-13, D-2
temperature sensor connection, 2-15
FRT bit, 4-7
functional overview. See theory of
conventions used, xii
operation.
organization of manual, xi-xii
related documentation, xiii
DTEMP signal, 2-13, D-2
G
gain jumpers, 2-9 to 2-10
E
ground-referenced signal connection with
high common-mode voltage, 2-14
grounding (jumper W46), 2-7
GUARD signal, 3-4, C-3
equipment, optional, 1-3 to 1-4
F
H
fax technical support, G-1
FIFO Register, 4-8
hardscan circuitry, programming,
5-10 to 5-11
Hardscan Control Register (HSCR), 4-7
hardware installation, 2-11
HSRS* bit, 4-7
filter jumpers, 2-10
floating AC-coupled signal connection, 2-14
floating signal connection referenced to
chassis ground, 2-14
FOUTEN* bit, 4-4
front connector
I
analog input channels, 2-13 to 2-15
AC-coupled signal connection, 2-15
floating AC-coupled signal
connection, 2-14
installation
hardware installation, 2-11
SCXI-1180 feedthrough panel,
E-6 to E-8
SCXI-1302 50-pin terminal block, E-9
SCXI-1320 terminal block, 2-23
floating signal connection, 2-14
ground-referenced signal
connection, 2-14
pin assignments, 2-12, D-1
SCXI-1120 User Manual
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Index
SCXI-1328 terminal block, 2-23
M
SCXI-1340, E-2 to E-3
SCXI-1341, E-4 to E-5
SCXI-1342, E-6
manual. See documentation.
MCH0± through MCH7± signal
analog output signal connections,
2-26, 3-13
rear signal connector, 2-25, B-2
MISO signal
SCXI-1343 rear screw terminal
adapter, E-11
SCXI-1344, E-4 to E-5
SCXI-1350 multichassis adapter,
E-10 to E-11
SCXI-1351 one-slot cable
extender, E-10
unpacking the SCXI-1120, 1-4
description of, 3-4, C-3
digital control circuitry, 3-8
jumper connection, 2-4, 2-5, 2-6
and SPI bus, 3-5
INTR* signal
MOD<3..0> bit, 4-8
module configuration. See configuration.
Module ID Register
description of, 3-4, C-3
jumper connection, 2-4, 2-5
and SPI bus, 3-5
description of, 4-2
theory of operation, 3-8
timing diagram, 2-31
module programming, 5-8 to 5-10
channel scanning from other
modules, 5-9
J
jumpers
digital signal connections
channel scanning from SCXI-1120 via
another module, 5-9
multiple-chassis scanning, 5-10
multiple-module multiplexed scanning,
5-9 to 5-10
single-module multiplexed scanning
direct, 5-9
jumper settings (table), 2-6 to 2-7
W42, 2-5 to 2-6
W43, 2-5 to 2-6
W44, 2-5
filter jumpers, 2-10
fixed jumpers, 2-4
gain jumpers, 2-9 to 2-10
SCXI-1320 terminal block jumper
configuration, 2-19
SCXI-1328 terminal block jumper
configuration, 2-19 to 2-20
user-configurable jumpers, 2-4
W41 (direct temperature connection),
2-8 to 2-9
indirect, 5-9
single-module parallel scanning, 5-8
MOSI signal
description of, 3-4, C-3
digital control circuitry, 3-7
and SPI bus, 3-5
MTEMP signal
analog output, 3-13
W46 (grounding, shielding, and
reference-mode selection),
2-7
front connector, 2-13, D-2
measurements via another module, 5-5
multiplexed output, 5-4
multiplexed scanning, 3-14 to 3-16
multiple-chassis scanning, 3-16, 5-10
multiple-module multiplexed scanning,
3-15 to 3-16, 5-9 to 5-10
single-module multiplexed scanning,
3-14 to 3-15
L
Lab-LC cable assembly. See SCXI-1344.
Lab-NB cable assembly. See SCXI-1341.
Lab-PC or Lab-PC+ cable assembly. See
SCXI-1341.
LabVIEW software, 1-2 to 1-3
LOAD* bit, 4-7
direct, 3-14, 5-9
indirect, 3-15, 5-9
MUXCOUNTER, 3-13, 3-14, 3-15, 5-11
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acquisition enable, triggering, and
N
servicing, 5-12
data acquisition and board
programming, 5-6 to 5-8
Counter 1 and SCANDIV, 5-8
module programming, 5-8 to 5-10
channel scanning from other
modules, 5-9
NI-DAQ software, 1-2 to 1-3
nulling the offset, 3-11
O
ONCE bit, 4-7
channel scanning from
SCXI-1120 via another
module, 5-9
multiple-chassis scanning, 5-10
multiple-module multiplexed
scanning, 5-9 to 5-10
operating environment specifications, A-3
operation of SCXI-1120. See theory of
operation.
OUTREF signal
analog output signal connections, 2-26
jumper connection, 2-7 to 2-8
rear signal connector, 2-25, B-2
single-module multiplexed
scanning (direct), 5-9
single-module multiplexed
scanning (indirect), 5-9
single-module parallel
scanning, 5-8
P
parallel scanning, single-module, 3-14, 5-8
PC-LPM-16 cable assembly. See
SCXI-1342.
Slot 0 hardscan circuitry,
5-10 to 5-11
single-channel measurements, 5-3 to 5-5
direct measurements, 5-3 to 5-4
indirect measurements, 5-4 to 5-5
measurements from other
modules, 5-4
physical specifications, A-3
pin assignments
front connector, 2-12, D-1
rear signal connector, 2-24, B-1
SCXI-1343 rear screw terminal
adapter, E-12
measurements from SCXI-1120 via
another module, 5-4 to 5-5
multiplexed output, 5-4
parallel output, 5-3
SCXIbus connector, 3-3, C-2
pin equivalences
SCXI-1120 and MIO-16 board pinout
equivalences, E-2
SCXI-1341, E-4
Pseudodifferential Reference mode,
2-7
SCXI-1342, E-5 to E-6
SCXI-1344, E-4
R
SCXIbus to rear signal connector, 3-5
SCXIbus to rear signal connector and
data acquisition boards, 2-27, 5-2
programming. See also registers.
notation for bit patterns, 5-1
register writes, 5-1 to 5-3
initialization, 5-3
RD bit, 4-7
rear signal connector
analog output signal connections, 2-26
communication signals, 2-28 to 2-31
digital I/O signal connections,
2-26 to 2-27
pin assignments, 2-24, B-1
pin equivalences with SCXIbus and data
acquisition boards, 2-27, 5-2
SCXIbus pin equivalences, 3-5
signal descriptions, 2-25 to 2-26, B-2
timing signal, 2-28
rear signal connector pin
equivalences, 5-2
register selection and write
procedure, 5-2 to 5-3
scanning examples, 5-12 to 5-15
scanning measurements, 5-5 to 5-12
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Index
reference-mode selection (jumper W46),
2-7
registers
module programming, 5-8 to 5-10
channel scanning from other
modules, 5-9
programming considerations, 5-1 to 5-3
initialization, 5-3
channel scanning from SCXI-1120
via another module, 5-9
multiple-chassis scanning, 5-10
multiple-module multiplexed
scanning, 5-9 to 5-10
single-module multiplexed scanning
(direct), 5-9
rear signal connector pin
equivalences, 5-2
register selection and write
procedure, 5-2 to 5-3
SCXI-1120 registers, 4-1 to 4-4
Configuration Register, 2-30 to 2-31,
3-7, 4-3 to 4-4
single-module multiplexed scanning
(indirect), 5-9
Module ID Register, 2-31, 3-8, 4-2
Slot 0 registers, 4-5 to 4-8
FIFO Register, 4-8
single-module parallel scanning, 5-8
programming, 5-5 to 5-12
acquisition enable, triggering, and
servicing, 5-12
Hardscan Control Register
(HSCR), 4-7
Slot-Select Register, 4-6
RESET* signal
data acquisition and board
programming, 5-6 to 5-8
Counter 1 and SCANDIV, 5-8
scanning examples, 5-12 to 5-15
Slot 0 hardscan circuitry,
5-10 to 5-11
description of, 3-4, C-3
initialization, 5-3
and SPI bus, 3-5
Revision A and B SCXI-1120 signal
conditioning module
scanning modes
theory of operation, 3-13 to 3-16
multiplexed scanning, 3-14 to 3-16
multiple-chassis scanning, 3-16
multiple-module multiplexed
scanning, 3-15 to 3-16
detailed parts locator diagram, F-3
general parts locator diagram, F-2
photograph, F-1
RSVD bit, 4-4, 4-7
RSVD signal
single-module multiplexed
scanning, 3-14 to 3-15
single-module parallel
front connector, 2-13, D-2
rear signal connector, 2-25, B-2
SCXIbus connector, 3-4, C-3
RTEMP bit, 4-4
scanning, 3-14
SCXI-1120. See also configuration;
installation.
block diagram, 3-1
contents of kit, 1-2
custom cables, 1-4
definition of, xi, 1-1
optional equipment, 1-3 to 1-4
optional software, 1-2 to 1-3
overview, 1-1
Revision A and B signal conditioning
module
S
SCANCLK signal
analog output, 3-13
module programming, 5-9
multiplexed scanning, 3-14 to 3-15
rear signal connector, 2-25, B-2
timing requirements, 2-28
SCANCLKEN bit, 4-4
detailed parts locator diagram, F-3
general parts locator diagram, F-2
photograph, F-1
SCANCON signal
analog output, 3-13
multiplexed scanning, 3-14 to 3-15
SCXIbus connector, 3-5, C-4
SCANCONEN bit, 4-4, 4-7
scanning measurements
unpacking, 1-4
SCXI-1120 registers, 4-1 to 4-4
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SCXI-1350 multichassis adapter
cable assembly, E-10
installation, E-10 to E-11
SCXI-1351 one-slot cable extender
cable assembly, E-9
Configuration Register, 2-30 to 2-31,
3-7, 4-3 to 4-4
Module ID Register, 2-31, 3-8, 4-2
SCXI-1180 feedthrough panel
cable assembly, E-6
installation, E-10
SCXIbus connector
front panel installation, E-8
installation, E-6 to E-8
rear connections, E-7
pin assignments, 3-3, C-2
pin equivalences
SCXI-1302 50-pin terminal block
installation, E-9
with rear signal connector, 3-5
with rear signal connector and data
acquisition boards, 2-27, 5-2
signal descriptions, 3-4 to 3-5,
C-3 to C-4
wiring procedure, E-8 to E-9
SCXI-1320 terminal block
definition of, 2-17
installation, 2-23
SERCLK signal
jumper configuration, 2-19
parts locator diagram, 2-21
signal connection, 2-20
temperature sensor, 2-18
warnings, 2-18
communicating on SPI bus, 2-28 to 2-31
digital I/O signal connections, 2-26, 2-27
rear signal connector, 2-25, B-2
register selection and write procedure,
5-2 to 5-3
SCXI-1328 terminal block
definition of, 2-17
SERDATIN signal
communicating on SPI bus, 2-28 to 2-31
digital I/O signal connections,
2-26 to 2-27
rear signal connector, 2-25, B-2
register selection and write procedure,
5-2 to 5-3
installation, 2-23
jumper configuration, 2-19 to 2-20
parts locator diagram, 2-22
signal connection, 2-20
temperature sensor, 2-18 to 2-19
warnings, 2-18
SERDATOUT signal
SCXI-1330 connector-and-shell assembly,
2-16 to 2-17
SCXI-1340
communicating on SPI bus, 2-28 to 2-31
digital I/O signal connections,
2-26 to 2-27
cable assembly, E-1 to E-2
installation, E-2 to E-3
SCXI-1120 and MIO-16 board pinout
equivalences, E-2
jumper connection, 2-4, 2-5, 2-6
rear signal connector, 2-25, B-2
serial data timing diagram, 2-30
Serial Peripheral Interface (SPI) bus
communication signals. See
communication signals for SPI bus.
shielding (jumper W46), 2-7
signal connections
SCXI-1341
cable assembly, E-3 to E-4
installation, E-4 to E-5
pin equivalences, E-4
SCXI-1342
front connector
cable assembly, E-5
installation, E-6
pin equivalences, E-5 to E-6
SCXI-1343 rear screw terminal adapter
installation, E-11
analog input channels, 2-13 to 2-15
pin assignments, 2-12, D-1
SCXI-1320 terminal block, 2-17 to
2-21, 2-23
SCXI-1328 terminal block, 2-17 to
2-20, 2-22 to 2-23
SCXI-1330 connector-and-shell
assembly, 2-16 to 2-17
pin connections, E-12
SCXI-1344
cable assembly, E-3 to E-4
installation, E-4 to E-5
pin equivalences, E-4
signal descriptions, 2-13, D-2
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Index
register selection and write procedure,
5-2 to 5-3
slot-select timing diagram, 2-29
writing 16-bit-slot select number, 2-29
SLOT0SEL* signal
temperature sensor connection, 2-15
rear signal connector
analog output signal
connections, 2-26
communication signals, 2-28 to 2-31
digital I/O signal connections, 2-26
to 2-27
pin assignments, 2-24, B-1
pin equivalences with SCXIbus and
data acquisition boards,
2-27, 5-2
communicating on SPI bus, 2-28 to 2-31
digital I/O signal connections,
2-26 to 2-27
jumper connection, 2-4, 2-5
programming hardscan circuitry, 5-11
rear signal connector, 2-25, B-2
register selection and write procedure,
5-2 to 5-3
SCXIbus pin equivalences, 3-5
signal descriptions, 2-25, B-2
timing signal, 2-28
software, optional, 1-2 to 1-3
specifications
SCXI-1320 terminal block, 2-20
SCXI-1328 terminal block, 2-20
SCXIbus connector
analog input, A-1 to A-2
cold-junction sensor, A-2 to A-3
operating environment, A-3
physical, A-3
pin assignments, 3-3, C-2
pin equivalences with rear signal
connector, 3-5
storage environment, A-3
SPI bus. See communication signals for SPI
bus.
pin equivalences with rear signal
connector and data acquisition
boards, 2-27, 5-2
signal descriptions, 3-4 to 3-5,
C-3 to C-4
SPICLK signal
description of, 3-4, C-3
digital control circuitry, 3-7
and SPI bus, 3-5
warning against exceeding maximum
ratings, 2-11
SS* signal
single-channel measurements, 5-3 to 5-5
direct measurements, 5-3 to 5-4
indirect measurements, 5-4 to 5-5
measurements from other modules, 5-4
measurements from SCXI-1120 via
another module, 5-4 to 5-5
multiplexed output, 5-4
description of, 3-5, C-4
digital control circuitry, 3-7, 3-8
programming Slot 0 hardscan
circuitry, 5-11
storage environment specifications, A-3
parallel output, 5-3
single-module multiplexed scanning
direct, 5-9
T
indirect, 5-9
technical support, G-1
temperature connection, direct
(jumper W41), 2-8 to 2-9
theory of operation, 3-14 to 3-15
single-module parallel scanning, 3-14, 5-8
SL<3..0> bit, 4-6
Slot 0 hardscan circuitry, programming,
5-10 to 5-11
Slot 0 registers, 4-5 to 4-8
FIFO Register, 4-8
Hardscan Control Register (HSCR), 4-7
Slot-Select Register, 4-6
slot selection
temperature sensor
connection for analog input
channels, 2-15
SCXI-1320 terminal block, 2-18
SCXI-1328 terminal block, 2-18 to 2-19
terminal block. See SCXI-1302 50-pin
terminal block; SCXI-1320 terminal
block; SCXI-1328 terminal block.
theory of operation
© National Instruments Corporation
Index-8
SCXI-1120 User Manual
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Index
analog and timing circuitry, 3-8 to 3-13
analog input block diagram, 3-9
analog input channels, 3-9 to 3-10
analog output circuitry, 3-12 to 3-13
calibration, 3-10 to 3-12
block diagram, 3-1
digital control circuitry, 3-7 to 3-8
digital interface circuitry, 3-6
scanning modes, 3-13 to 3-16
multiple-chassis scanning, 3-16
multiple-module multiplexed
scanning, 3-15 to 3-16
single-module multiplexed scanning,
3-14 to 3-15
single-module parallel
scanning, 3-14
SCXIbus connector
equivalents for rear signal
connector, 3-5
pin assignments, 3-3
signal descriptions, 3-4 to 3-5
timing signal (SCANCLK), 2-28
TRIG0 signal, 3-5, C-4
U
unpacking the SCXI-1120, 1-4
V
V- signal, 3-4, C-3
V+ signal, 3-4, C-3
SCXI-1120 User Manual
Index-9
© National Instruments Corporation
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