National Instruments Network Card PC DIO 24 User Manual
PC-DIO-24  
User Manual  
Digital I/O Board for the IBM PC/XT/AT  
September 1995 Edition  
Part Number 320288B-01  
© Copyright 1989, 1995 National Instruments Corporation.  
All Rights Reserved.  
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Limited Warranty  
The PC-DIO-24 is warranted against defects in materials and workmanship for a period of one year from the date of  
shipment, as evidenced by receipts or other documentation. National Instruments will, at its option, repair or replace  
equipment that proves to be defective during the warranty period. This warranty includes parts and labor.  
The media on which you receive National Instruments software are warranted not to fail to execute programming  
instructions, due to defects in materials and workmanship, for a period of 90 days from date of shipment, as  
evidenced by receipts or other documentation. National Instruments will, at its option, repair or replace software  
media that do not execute programming instructions if National Instruments receives notice of such defects during  
the warranty period. National Instruments does not warrant that the operation of the software shall be uninterrupted  
or error free.  
A Return Material Authorization (RMA) number must be obtained from the factory and clearly marked on the  
outside of the package before any equipment will be accepted for warranty work. National Instruments will pay the  
shipping costs of returning to the owner parts which are covered by warranty.  
National Instruments believes that the information in this manual is accurate. The document has been carefully  
reviewed for technical accuracy. In the event that technical or typographical errors exist, National Instruments  
reserves the right to make changes to subsequent editions of this document without prior notice to holders of this  
edition. The reader should consult National Instruments if errors are suspected. In no event shall National  
Instruments be liable for any damages arising out of or related to this document or the information contained in it.  
EXCEPT AS SPECIFIED HEREIN, NATIONAL INSTRUMENTS MAKES NO WARRANTIES, EXPRESS OR  
IMPLIED, AND SPECIFICALLY DISCLAIMS ANY WARRANTY OF MERCHANTABILITY OR FITNESS  
FOR A PARTICULAR PURPOSE. CUSTOMER'S RIGHT TO RECOVER DAMAGES CAUSED BY FAULT  
OR NEGLIGENCE ON THE PART OF NATIONAL INSTRUMENTS SHALL BE LIMITED TO THE AMOUNT  
THERETOFORE PAID BY THE CUSTOMER. NATIONAL INSTRUMENTS WILL NOT BE LIABLE FOR  
DAMAGES RESULTING FROM LOSS OF DATA, PROFITS, USE OF PRODUCTS, OR INCIDENTAL OR  
CONSEQUENTIAL DAMAGES, EVEN IF ADVISED OF THE POSSIBILITY THEREOF. This limitation of the  
liability of National Instruments will apply regardless of the form of action, whether in contract or tort, including  
negligence. Any action against National Instruments must be brought within one year after the cause of action  
accrues. National Instruments shall not be liable for any delay in performance due to causes beyond its reasonable  
control. The warranty provided herein does not cover damages, defects, malfunctions, or service failures caused by  
owner's failure to follow the National Instruments installation, operation, or maintenance instructions; owner's  
modification of the product; owner's abuse, misuse, or negligent acts; and power failure or surges, fire, flood,  
accident, actions of third parties, or other events outside reasonable control.  
Copyright  
Under the copyright laws, this publication may not be reproduced or transmitted in any form, electronic or  
mechanical, including photocopying, recording, storing in an information retrieval system, or translating, in whole or  
in part, without the prior written consent of National Instruments Corporation.  
Trademarks  
®
®
LabVIEW and NI-DAQ are trademarks of National Instruments Corporation.  
Product and company names listed are trademarks or trade names of their respective companies.  
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WARNING REGARDING MEDICAL AND CLINICAL USE  
OF NATIONAL INSTRUMENTS PRODUCTS  
National Instruments products are not designed with components and testing intended to ensure a level of reliability  
suitable for use in treatment and diagnosis of humans. Applications of National Instruments products involving  
medical or clinical treatment can create a potential for accidental injury caused by product failure, or by errors on the  
part of the user or application designer. Any use or application of National Instruments products for or involving  
medical or clinical treatment must be performed by properly trained and qualified medical personnel, and all  
traditional medical safeguards, equipment, and procedures that are appropriate in the particular situation to prevent  
serious injury or death should always continue to be used when National Instruments products are being used.  
National Instruments products are NOT intended to be a substitute for any form of established process, procedure, or  
equipment used to monitor or safeguard human health and safety in medical or clinical treatment.  
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FCC/DOC Radio Frequency Interference Compliance  
This equipment generates and uses radio frequency energy and, if not installed and used in strict accordance with the  
instructions in this manual, may cause interference to radio and television reception. This equipment has been tested  
and found to comply with the following two regulatory agencies:  
Federal Communications Commission  
This device complies with Part 15 of the Federal Communications Commission (FCC) Rules for a Class A digital  
device. Operation is subject to the following two conditions:  
1. This device may not cause harmful interference in commercial environments.  
2. This device must accept any interference received, including interference that may cause undesired operation.  
Canadian Department of Communications  
This device complies with the limits for radio noise emissions from digital apparatus set out in the Radio  
Interference Regulations of the Canadian Department of Communications (DOC).  
Le présent appareil numérique n’émet pas de bruits radioélectriques dépassant les limites applicables aux appareils  
numériques de classe A prescrites dans le règlement sur le brouillage radioélectrique édicté par le ministère des  
communications du Canada.  
Instructions to Users  
These regulations are designed to provide reasonable protection against harmful interference from the equipment to  
radio reception in commercial areas. Operation of this equipment in a residential area is likely to cause harmful  
interference, in which case the user will be required to correct the interference at his own expense.  
There is no guarantee that interference will not occur in a particular installation. However, the chances of  
interference are much less if the equipment is installed and used according to this instruction manual.  
If the equipment does cause interference to radio or television reception, which can be determined by turning the  
equipment on and off, one or more of the following suggestions may reduce or eliminate the problem.  
•
•
•
•
Operate the equipment and the receiver on different branches of your AC electrical system.  
Move the equipment away from the receiver with which it is interfering.  
Reorient or relocate the receiver’s antenna.  
Be sure that the equipment is plugged into a grounded outlet and that the grounding has not been defeated with a  
cheater plug.  
Notice to user: Changes or modifications not expressly approved by National Instruments could void the user’s  
authority to operate the equipment under the FCC Rules.  
If necessary, consult National Instruments or an experienced radio/television technician for additional suggestions.  
The following booklet prepared by the FCC may also be helpful: How to Identify and Resolve Radio-TV  
Interference Problems. This booklet is available from the U.S. Government Printing Office, Washington, DC  
20402, Stock Number 004-000-00345-4.  
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Contents  
About This Manual.............................................................................................................xi  
Organization of This Manual .........................................................................................xi  
Conventions Used in This Manual.................................................................................xii  
National Instruments Documentation ............................................................................xii  
Related Documentation..................................................................................................xiii  
Customer Communication .............................................................................................xiii  
Chapter 1  
Introduction ..........................................................................................................................1-1  
About the PC-DIO-24 ....................................................................................................1-1  
What You Need to Get Started ......................................................................................1-2  
Software Programming Choices ....................................................................................1-2  
LabVIEW and LabWindows/CVI Application Software ..................................1-2  
NI-DAQ Driver Software...................................................................................1-3  
Register-Level Programming.............................................................................1-4  
Optional Equipment .......................................................................................................1-4  
Custom Cables ...................................................................................................1-4  
Unpacking ......................................................................................................................1-6  
Chapter 2  
Configuration and Installation ......................................................................................2-1  
Board Configuration ......................................................................................................2-1  
Base I/O Address Settings..................................................................................2-2  
Interrupt Selection..............................................................................................2-4  
Interrupt Enable Settings........................................................................2-4  
Interrupt Level Settings..........................................................................2-4  
Installation......................................................................................................................2-5  
Signal Connections ........................................................................................................2-6  
I/O Connector Pin Description...........................................................................2-6  
Signal Connection Descriptions.........................................................................2-7  
Port C Pin Assignments .........................................................................2-7  
Timing Specifications ........................................................................................2-8  
Mode 1 Input Timing .............................................................................2-9  
Mode 1 Output Timing ..........................................................................2-10  
Mode 2 Bidirectional Timing.................................................................2-11  
Chapter 3  
Theory of Operation ..........................................................................................................3-1  
Address Decoder ............................................................................................................3-2  
Bus Transceivers ............................................................................................................3-2  
PC I/O Channel Control Circuitry .................................................................................3-2  
82C55A Programmable Peripheral Interface ................................................................3-2  
Interrupt Control Circuitry .............................................................................................3-2  
Digital I/O Connector.....................................................................................................3-2  
© National Instruments Corporation  
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Contents  
Chapter 4  
Register-Level Programming .........................................................................................4-1  
Introduction....................................................................................................................4-1  
82C55A Modes of Operation.........................................................................................4-1  
Mode 0 ...............................................................................................................4-2  
Mode 1 ...............................................................................................................4-2  
Mode 2 ...............................................................................................................4-2  
Single Bit Set/Reset Feature ..............................................................................4-2  
Register Map ..................................................................................................................4-3  
Register Descriptions .....................................................................................................4-3  
Single Bit Set/Reset Feature ..............................................................................4-4  
Programming Considerations.........................................................................................4-5  
Mode 0–Basic I/O ..............................................................................................4-5  
Mode 0 Programming Example .............................................................4-6  
Mode 1–Strobed Input .......................................................................................4-7  
Mode 1 Input Programming Example....................................................4-9  
Mode 1–Strobed Output.....................................................................................4-9  
Mode 1 Output Programming Example .................................................4-11  
Mode 2–Bidirectional Bus .................................................................................4-12  
Mode 2 Programming Example .............................................................4-13  
Interrupt Programming Examples......................................................................4-14  
Interrupt Handling..........................................................................................................4-15  
Appendix A  
Specifications ........................................................................................................................A-1  
Appendix B  
I/O Connector.......................................................................................................................B-1  
Appendix C  
OKI 82C55A Data Sheet...................................................................................................C-1  
Appendix D  
Customer Communication...............................................................................................D-1  
Glossary ............................................................................................................................Glossary-1  
Index ..................................................................................................................................Index-1  
PC-DIO-24 User Manual  
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Contents  
Figures  
Figure 1-1.  
The Relationship between the Programming Environment, NI-DAQ, and  
Your Hardware...................................................................................................1-3  
Figure 2-1.  
Figure 2-2.  
Figure 2-3.  
Figure 2-4.  
Figure 2-5.  
PC-DIO-24 Parts Locator Diagram ...................................................................2-2  
Example Base I/O Address Switch Settings .....................................................2-3  
Jumper Settings–PC6, PC4, PC2, and N/C........................................................2-4  
Interrupt Jumper Setting for IRQ5 (Factory Setting) ........................................2-4  
Digital I/O Connector Pin Assignments ............................................................2-6  
Figure 3-1.  
Figure 4-1.  
PC-DIO-24 Block Diagram ...............................................................................3-1  
Control-Word Formats.......................................................................................4-4  
Figure B-1. PC-DIO-24 I/O Connector .................................................................................B-1  
Tables  
Table 2-1.  
Table 2-2.  
PC-DIO-24 Factory-Set Jumper and Switch Settings........................................2-1  
Port C Signal Assignments ...............................................................................2-7  
Table 4-1.  
Table 4-2.  
Table 4-3.  
Table 4-4.  
PC-DIO-24 Address Map...................................................................................4-3  
Port C Set/Reset Control Words ........................................................................4-5  
Mode 0 I/O Configurations ................................................................................4-6  
Interrupt Enable Signals for All Mode Combinations .......................................4-16  
Table A-1.  
Maximum Average Transfer Rates for the PC-DIO-24.....................................A-2  
© National Instruments Corporation  
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About This Manual  
This manual describes the mechanical and electrical aspects of the PC-DIO-24 and contains  
information concerning its operation and programming. The PC-DIO-24 is a 24-bit parallel,  
digital I/O interface designed around an 82C55A programmable peripheral interface (PPI). The  
PC-DIO-24 is a member of the National Instruments PC Series of PC I/O Channel expansion  
boards for the IBM PC computer family. These boards are designed for low-cost data acquisition  
and control for applications in laboratory testing, production testing, and industrial process  
monitoring and control.  
This manual describes installation, basic programming considerations, and theory of operation  
for the PC-DIO-24. The example programs included are written in C.  
Organization of This Manual  
The PC-DIO-24 User Manual is organized as follows:  
•
•
Chapter 1, Introduction, describes the PC-DIO-24, lists what you need to get started,  
describes software programming choices, optional equipment, and custom cables, and  
explains how to unpack the PC-DIO-24.  
Chapter 2, Configuration and Installation, describes how to configure and install the  
PC-DIO-24, including I/O connector signal descriptions, handshake timing diagrams, and  
cabling instructions.  
•
•
Chapter 3, Theory of Operation, contains a functional overview of the PC-DIO-24 board and  
explains the operation of each functional unit making up the PC-DIO-24.  
Chapter 4, Register-Level Programming, describes in detail the address and function of each  
of the PC-DIO-24 control and status registers. This chapter also includes important  
information related to register-level programming the PC-DIO-24.  
•
•
Appendix A, Specifications, lists the specifications for the PC-DIO-24 board.  
Appendix B, I/O Connector, describes the pinout and signal names for the I/O connector on  
the PC-DIO-24.  
•
Appendix C, OKI 82C55A Data Sheet, contains the manufacturer data sheet for the  
OKI 82C55A (OKI Semiconductor) CMOS programmable peripheral interface. This  
interface is used on the PC-DIO-24 board.  
•
•
Appendix D, Customer Communication, contains forms you can use to request help from  
National Instruments or to comment on our products.  
The Glossary contains an alphabetical list and description of terms used in this manual,  
including abbreviations, acronyms, metric prefixes, mnemonics, symbols, and terms.  
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About This Manual  
•
The Index alphabetically lists the topics in this manual, including the page where you can  
find each one.  
Conventions Used in This Manual  
The following conventions are used in this manual.  
bold  
Bold text denotes menus, menu items, or dialog box buttons or options.  
bold italic  
Bold italic text denotes a note, caution, or warning.  
italic  
Italic text denotes emphasis, a cross reference, or an introduction to a key  
concept.  
monospace  
Lowercase text in this font denotes text or characters that are to be literally  
input from the keyboard, sections of code, programming examples, and  
syntax examples. This font is also used for the proper names of disk  
drives, paths, directories, programs, subprograms, subroutines, device  
names, functions, variables, filenames, and extensions, and for statements  
and comments taken from program code.  
NI-DAQ  
PC  
NI-DAQ refers to the NI-DAQ software for PC compatibles unless  
otherwise noted.  
PC refers to the IBM PC/XT, the IBM PC AT, and compatible computers  
unless otherwise noted.  
SCXI  
< >  
SCXI stands for Signal Conditioning eXtensions for Instrumentation and  
is a National Instruments product line designed to perform front-end signal  
conditioning for National Instruments plug-in DAQ boards.  
Angle brackets containing numbers separated by an ellipses represent a  
range, signal, or port (for example, ACH<0..7> stands for ACH0 through  
ACH7).  
Abbreviations, acronyms, metric prefixes, mnemonics, and symbols are listed in the Glossary.  
National Instruments Documentation  
The PC-DIO-24 User Manual is one piece of the documentation set for your data acquisition  
(DAQ) system. You could have any of several types of manuals, depending on the hardware and  
software in your system. Use the different types of manuals you have as follows:  
•
Getting Started with SCXI—If you are using SCXI, this is the first manual you should read.  
It gives an overview of the SCXI system and contains the most commonly needed  
information for the modules, chassis, and software.  
PC-DIO-24 User Manual  
xii  
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About This Manual  
•
•
Your SCXI hardware user manuals—If you are using SCXI, read these manuals next for  
detailed information about signal connections and module configuration. They also explain  
in greater detail how the module works and contain application hints.  
Your DAQ hardware user manuals—These manuals have detailed information about the  
DAQ hardware that plugs into or is connected to your computer. Use these manuals for  
hardware installation and configuration instructions, specification information about your  
DAQ hardware, and application hints.  
•
Software manuals—Examples of software manuals you may have are the LabVIEW and  
LabWindows®/CVI manual sets and the NI-DAQ manuals (a 4.6.1 or earlier version of  
NI-DAQ supports LabWindows for DOS). After you set up your hardware system, use either  
the application software (LabVIEW or LabWindows/CVI) manuals or the NI-DAQ manuals  
to help you write your application. If you have a large and complicated system, it is  
worthwhile to look through the software manuals before you configure your hardware.  
•
•
Accessory installation guides or manuals—If you are using accessory products, read the  
terminal block and cable assembly installation guides or accessory board user manuals. They  
explain how to physically connect the relevant pieces of the system. Consult these guides  
when you are making your connections.  
SCXI chassis manuals—If you are using SCXI, read these manuals for maintenance  
information on the chassis and installation instructions.  
Related Documentation  
The following documents contain information that you may find helpful as you read this manual:  
•
•
IBM Personal Computer AT Technical Reference manual  
IBM Personal Computer XT Technical Reference manual  
Customer Communication  
National Instruments wants to receive your comments on our products and manuals. We are  
interested in the applications you develop with our products, and we want to help if you have  
problems with them. To make it easy for you to contact us, this manual contains comment and  
configuration forms for you to complete. These forms are in Appendix D, Customer  
Communication, at the end of this manual.  
© National Instruments Corporation  
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Chapter 1  
Introduction  
This chapter describes the PC-DIO-24, lists what you need to get started, describes software  
programming choices, optional equipment, and custom cables, and explains how to unpack the  
PC-DIO-24.  
About the PC-DIO-24  
Thank you for purchasing the National Instruments PC-DIO-24. The PC-DIO-24 is a low cost,  
24-bit parallel, digital I/O interface for the PC. An OKI 82C55A PPI controls the 24 bits of  
digital I/O. The 82C55A is very flexible and powerful when interfacing with peripheral  
equipment, can operate in either a unidirectional or bidirectional bus mode, and can generate  
interrupt request outputs. The 82C55A can be programmed for almost any 8-bit or 16-bit digital  
I/O application. All digital I/O is through a standard 50-pin male connector. The pin  
assignments for this connector are compatible with standard 24-channel digital I/O applications.  
The PC-DIO-24 can be used in a wide range of digital I/O applications. With the PC-DIO-24, a  
PC can be interfaced to any of the following.  
•
Other computers  
-
-
-
-
Another PC with a National Instruments PC-DIO-24 or AT-DIO-32F  
IBM Personal System/2 with a National Instruments MC-DIO-24 or MC-DIO-32F  
Apple Macintosh II with a National Instruments NB-DIO-24 or NB-DIO-32F  
Any other computer with an 8-bit or 16-bit parallel interface  
•
•
•
•
Centronics-compatible printers and plotters  
Panel meters  
Instruments and test equipment with BCD readouts and/or controls  
Opto-isolated solid-state relays (SSRs) and I/O module mounting racks  
Note: The PC-DIO-24 cannot sink sufficient current to drive the SSR-OAC-5 and  
SSR-OAC-5A output modules. However, it can drive the SSR-ODC-5 output module  
and all SSR input modules available from National Instruments.  
If you need to drive a SSR-OAC-5 or SSR-OAC-5A, you can either use a non-inverting  
digital buffer chip between the PC-DIO-24 and the SSR backplane, or you can use a  
DIO-23F or MIO Series board with appropriate connections (e.g., SC-205X and  
cables).  
© National Instruments Corporation  
1-1  
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Introduction  
Chapter 1  
With the PC-DIO-24, the PC can serve as a digital I/O system controller for laboratory testing,  
production testing, and industrial process monitoring and control.  
Detailed specifications of the PC-DIO-24 are in Appendix A, Specifications.  
What You Need to Get Started  
To set up and use your PC-DIO-24, you will need the following:  
PC-DIO-24 board  
PC-DIO-24 User Manual  
One of the following software packages and documentation:  
NI-DAQ for PC compatibles  
LabVIEW for Windows  
LabWindows/CVI for Windows  
Your computer  
Software Programming Choices  
There are several options to choose from when programming your National Instruments DAQ  
and SCXI hardware. You can use LabVIEW, LabWindows/CVI, or NI-DAQ. A 4.6.1 or earlier  
version of NI-DAQ supports LabWindows for DOS.  
LabVIEW and LabWindows/CVI Application Software  
LabVIEW and LabWindows/CVI are innovative program development software packages for  
data acquisition and control applications. LabVIEW uses graphical programming, whereas  
LabWindows/CVI enhances traditional programming languages. Both packages include  
extensive libraries for data acquisition, instrument control, data analysis, and graphical data  
presentation.  
LabVIEW features interactive graphics, a state-of-the-art user interface, and a powerful graphical  
programming language. The LabVIEW Data Acquisition VI Library, a series of VIs for using  
LabVIEW with National Instruments DAQ hardware, is included with LabVIEW. The LabVIEW  
Data Acquisition VI Libraries are functionally equivalent to the NI-DAQ software.  
LabWindows/CVI features interactive graphics, a state-of-the-art user interface, and uses the  
ANSI standard C programming language. The LabWindows/CVI Data Acquisition Library, a  
series of functions for using LabWindows/CVI with National Instruments DAQ hardware, is  
included with the NI-DAQ software kit. The LabWindows/CVI Data Acquisition libraries are  
functionally equivalent to the NI-DAQ software.  
Using LabVIEW or LabWindows/CVI software will greatly reduce the development time for  
your data acquisition and control application.  
PC-DIO-24 User Manual  
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Chapter 1  
Introduction  
NI-DAQ Driver Software  
The NI-DAQ driver software is included at no charge with all National Instruments DAQ  
hardware. NI-DAQ is not packaged with SCXI or accessory products, except for the SCXI-1200.  
NI-DAQ has an extensive library of functions that you can call from your application  
programming environment. These functions include routines for analog input (A/D conversion),  
buffered data acquisition (high-speed A/D conversion), analog output (D/A conversion),  
waveform generation, digital I/O, counter/timer operations, SCXI, RTSI, self-calibration,  
messaging, and acquiring data to extended memory.  
NI-DAQ has both high-level DAQ I/O functions for maximum ease of use and low-level DAQ  
I/O functions for maximum flexibility and performance. Examples of high-level functions are  
streaming data to disk or acquiring a certain number of data points. An example of a low-level  
function is writing directly to registers on the DAQ device. NI-DAQ does not sacrifice the  
performance of National Instruments DAQ devices because it lets multiple devices operate at  
their peak performance.  
NI-DAQ also internally addresses many of the complex issues between the computer and the  
DAQ hardware such as programming interrupts and DMA controllers. NI-DAQ maintains a  
consistent software interface among its different versions so that you can change platforms with  
minimal modifications to your code. Figure 1-1 illustrates the relationship between NI-DAQ and  
LabVIEW and LabWindows/CVI.  
Conventional  
LabVIEW  
(PC, Macintosh, or  
Sun SPARCstation)  
LabWindows/CVI  
(PC or Sun  
SPARCstation)  
Programming  
Environment  
(PC, Macintosh, or  
Sun SPARCstation)  
NI-DAQ  
Driver Software  
Personal  
Computer or  
Workstation  
DAQ or  
SCXI Hardware  
Figure 1-1. The Relationship between the Programming Environment,  
NI-DAQ, and Your Hardware  
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Introduction  
Chapter 1  
Register-Level Programming  
The final option for programming any National Instruments DAQ hardware is to write register-  
level software. Writing register-level programming software can be very time-consuming and  
inefficient, and is not recommended for most users.  
Even if you are an experienced register-level programmer, consider using NI-DAQ, LabVIEW,  
or LabWindows/CVI to program your National Instruments DAQ hardware. Using the NI-DAQ,  
LabVIEW, or LabWindows/CVI software is easier than, and as flexible as, register-level  
programming, and can save weeks of development time.  
Optional Equipment  
National Instruments offers a variety of products to use with your PC-DIO-24 board, including  
cables, connector blocks, and other accessories, as follows:  
•
•
•
Cables and cable assemblies, shielded and ribbon  
Connector blocks, shielded and unshielded 50-pin screw terminals  
Signal conditioning eXtensions for Instrumentation (SCXI) modules and accessories for  
isolating, amplifying, exciting, and multiplexing signals for relays and analog output. With  
SCXI you can condition and acquire up to 3,072 channels.  
•
Low channel count signal conditioning modules, boards, and accessories, including  
conditioning for strain gauges and RTDs, simultaneous sample and hole, and relays.  
For more specific information about these products, refer to your National Instruments catalog or  
call the office nearest you.  
Custom Cables  
National Instruments offers cables and accessories for you to prototype your application or to use  
if you frequently change board interconnections.  
If you want to develop your own cable, however, the following guidelines may be useful:  
The PC-DIO-24 I/O connector is a 50-pin male ribbon-cable header. The manufacturer part  
numbers used by National Instruments for this header are as follows:  
•
•
Electronic Products Division/3M (part number 3596-5002)  
T&B/Ansley Corporation (part number 609-5007)  
The mating connector for the PC-DIO-24 is a 50-position, polarized, ribbon socket connector  
with strain relief. National Instruments uses a polarized (keyed) connector to prevent inadvertent  
upside-down connection to the PC-DIO-24. Recommended manufacturer part numbers for this  
mating connector are as follows:  
PC-DIO-24 User Manual  
1-4  
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Chapter 1  
Introduction  
•
•
Electronic Products Division/3M (part number 3425-7650)  
T&B/Ansley Corporation (part number 609-5041CE)  
The standard ribbon cable (50-conductor, 28 AWG, stranded) that can be used with these  
connectors is as follows:  
•
•
Electronic Products Division/3M (part number 3365/50)  
T&B/Ansley Corporation (part number 171-50)  
Recommended manufacturer part numbers for the 50-pin edge connector for connecting to a  
module rack with an edge connector are as follows:  
•
•
Electronic Products Division/3M (part number 3415-0001)  
T&B Ansley Corporation (part number 609-5015M)  
A polarizing key can be plugged into these edge connectors to prevent inadvertent upside-down  
connection to the I/O module rack. The location of this key varies from rack to rack. Consult  
the specification for the rack you intend to use for the location of any polarizing key. The  
recommended manufacturer part numbers for this polarizing key are as follows:  
•
•
Electronic Products Division/3M (part number 3439-2)  
T&B Ansley Corporation (part number 609-0005)  
If you plan to use the PC-DIO-24 for a communications application, you may need shielded  
cables to meet FCC requirements. The PC-DIO-24 I/O bracket has been designed so that the  
shield of the I/O cable can be grounded through the computer chassis when a mating connector  
such as the following is used:  
•
AMP Special Industries (part number 2-746483-2)  
Many varieties of shielded ribbon cable are available to work with the mating connector listed  
previously. One type of shielded cable encloses a standard ribbon cable with a shielded jacket.  
Recommended manufacturers and the appropriate part numbers for this type of cable are as  
follows:  
•
•
Belden Electronic Wire and Cable (part number 9L28350)  
T&B/Ansley Corporation (part number 187-50)  
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Introduction  
Chapter 1  
Unpacking  
Your PC-DIO-24 board is shipped in an antistatic package to prevent electrostatic damage to the  
board. Electrostatic discharge can damage several components on the board. To avoid such  
damage in handling the board, take the following precautions:  
•
•
Ground yourself via a grounding strap or by holding a grounded object.  
Touch the antistatic package to a metal part of your PC chassis before removing the board  
from the package.  
•
•
Remove the board from the package and inspect the board for loose components or any other  
sign of damage. Notify National Instruments if the board appears damaged in any way. Do  
not install a damaged board into your computer.  
Never touch the exposed pins of connectors.  
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Chapter 2  
Configuration and Installation  
This chapter describes how to configure and install the PC-DIO-24, including I/O connector  
signal descriptions, handshake timing diagrams, and cabling instructions.  
Board Configuration  
The PC-DIO-24 contains one DIP switch and two jumpers to configure the base I/O address and  
interrupts, respectively. The PC-DIO-24 also contains one fuse to protect the +5 V power  
output. Figure 2-1 shows the location of jumper sets W1 and W2, DIP switch U2, and the  
fuse F1.  
The PC-DIO-24 is configured at the factory to a base I/O address of hex 210, to use interrupt  
enable line PC4, and to use interrupt level 5. These settings (shown in Table 2-1) are suitable for  
most systems. However, if your system has other hardware at this base I/O address, interrupt  
enable line, or interrupt level, you need to change these settings on the PC-DIO-24 (as described  
in the following pages) or on the other hardware. Record your settings in the PC-DIO-24  
Hardware and Software Configuration Form in Appendix D, Customer Communication.  
Table 2-1. PC-DIO-24 Factory-Set Jumper and Switch Settings  
Base I/O Address  
Hex 210  
(factory setting)  
1 2 3 4 5 6 7 8  
U2  
(The black side indicates the side that  
is pushed down.)  
Interrupt Enable Line  
Interrupt Level  
PC4  
(factory setting)  
W1: Row PC4  
W2: IRQ5  
Interrupt level 5 selected  
(factory setting)  
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Configuration and Installation  
Chapter 2  
1
2
NATIONAL  
INS TRUMENT S  
4
3
1
2
3
4
U2  
W1  
F1  
W2  
Figure 2-1. PC-DIO-24 Parts Locator Diagram  
Base I/O Address Settings  
The base I/O address for the PC-DIO-24 is determined by the switches at position U2 (see  
Figure 2-1). The switches are set at the factory for the I/O address hex 210. With this default  
setting, the PC-DIO-24 uses the I/O address space hex 210 through 213.  
Note: Verify that this space is not already used by other equipment installed in your  
computer. If any equipment in your computer uses this I/O address space, you must  
change the base I/O address for the PC-DIO-24 or for the other device.  
Each switch in U2 corresponds to one of the address lines A9 through A2. Thus, the range for  
possible base I/O address settings is hex 000 through 3FC. Base I/O address values hex 000  
through 0FF are reserved for system use. Base I/O values hex 100 through 3FF are available on  
the I/O channel. A1 and A0 are used by the PC-DIO-24 to decode the onboard registers. On the  
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Chapter 2  
Configuration and Installation  
U2 DIP switches, press the side marked OFF to select a binary value of 1 for the corresponding  
address bit. Press the other side of the switch to select a binary value of 0 for the corresponding  
address bit. Figure 2-2 shows two possible switch settings. The black side indicates the side that  
is pushed down.  
1
2
3
4
5
6
7
8
O
N
O
F
F
U2  
A. Switches Set to Default Setting (Base I/OAddress Hex 210)  
1
2
3
4
5
6
7
8
O
N
O
F
F
U2  
B. Switches Set to Base I/OAddress Hex 278  
Figure 2-2. Example Base I/O Address Switch Settings  
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Configuration and Installation  
Chapter 2  
Interrupt Selection  
There are two sets of jumpers for interrupt selection on the PC-DIO-24 board. W1 is used for  
selecting the interrupt enable line. W2 is for selecting the interrupt level. The location of these  
jumpers is shown in Figure 2-1.  
Interrupt Enable Settings  
To enable interrupt requests from the PC-DIO-24, you must set jumper W1 to select PC2, PC4,  
or PC6 as the active low interrupt enable line. When the interrupt enable line is logic low,  
interrupts are enabled from the PC-DIO-24 board. Refer to Chapter 4, Register-Level  
Programming, for the suggested interrupt enable line setting for each digital I/O mode of  
operation. If W1 is set to N/C, all interrupt requests from the PC-DIO-24 are disabled.  
Figure 2-3 shows the possible jumper settings for W1. The board is shipped with this jumper set  
to PC4; therefore, interrupt requests from the board are enabled and controlled by PC4.  
W1  
W1  
W1  
W1  
PC6  
PC4  
PC2  
N/C  
PC6  
PC4  
PC2  
N/C  
PC6  
PC4  
PC2  
N/C  
PC6  
PC4  
PC2  
N/C  
INT  
INT  
INT  
INT  
(Default Factory Setting)  
Figure 2-3. Jumper Settings–PC6, PC4, PC2, and N/C  
Interrupt Level Settings  
The PC-DIO-24 board can connect to any one of the six interrupt lines of the PC I/O Channel:  
IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, or IRQ9. You select the interrupt line by setting a jumper on  
W2. To use the interrupt capability of the board, you must select an interrupt line and place the  
jumper in the appropriate position. The default interrupt line is IRQ5. To change to another line,  
remove the jumper from IRQ5 and place it on the pins for another request line. Figure 2-4 shows  
the default factory setting for IRQ5.  
IRQ  
W2  
3
4
5
6
7
9
Figure 2-4. Interrupt Jumper Setting for IRQ5 (Factory Setting)  
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Chapter 2  
Configuration and Installation  
The PC-DIO-24 can share interrupt lines with other devices by using a tristate driver to drive its  
selected interrupt lines.  
Installation  
The PC-DIO-24 can be installed in any unused 8-bit or 16-bit expansion slot in your computer.  
After you make any necessary changes and verify the switch and jumper settings, record the  
settings in the PC-DIO-24 Hardware and Software Configuration Form in Appendix D,  
Customer Communication. You are now ready to install the PC-DIO-24.  
The following are general installation instructions, but consult the user manual or technical  
reference manual of your personal computer for specific instructions and warnings.  
1. Turn off your computer.  
2. Remove the top cover or access port to the I/O channel.  
3. Remove the expansion slot cover on the back panel of the computer.  
4. Insert the PC-DIO-24 in an unused 8-bit or 16-bit slot. It may be a tight fit, but do not force  
the board into place.  
5. Screw the mounting bracket of the PC-DIO-24 to the back panel rail of the computer.  
6. Check the installation.  
7. Replace the cover to the computer.  
The PC-DIO-24 board is now installed and ready for operation.  
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Configuration and Installation  
Chapter 2  
Signal Connections  
I/O Connector Pin Description  
Figure 2-5 shows the pin assignments for the PC-DIO-24 digital I/O connector.  
Warning: Connections that exceed any of the maximum ratings of input or output signals on  
the PC-DIO-24 may result in damage to the PC-DIO-24 board and to the PC.  
Maximum ratings for each signal are given in this chapter under the discussion of  
that signal. National Instruments is not liable for any damages resulting from any  
such signal connections.  
PC7  
PC6  
PC5  
PC4  
PC3  
PC2  
PC1  
PC0  
PB7  
PB6  
PB5  
PB4  
PB3  
PB2  
PB1  
PB0  
PA 7  
PA 6  
PA 5  
PA 4  
PA 3  
PA 2  
PA 1  
PA 0  
+5V  
GND  
GND  
GND  
GND  
GND  
GND  
GND  
GND  
GND  
GND  
GND  
GND  
GND  
GND  
GND  
GND  
GND  
GND  
GND  
GND  
GND  
GND  
GND  
GND  
GND  
1
3
5
7
9
2
4
6
8
10  
11 12  
13 14  
15 16  
17 18  
19 20  
21 22  
23 24  
25 26  
27 28  
29 30  
31 32  
33 34  
35 36  
37 38  
39 40  
41 42  
43 44  
45 46  
47 48  
49 50  
Figure 2-5. Digital I/O Connector Pin Assignments  
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Chapter 2  
Configuration and Installation  
Signal Connection Descriptions  
Pin  
Signal Name  
Description  
1, 3, 5, 7, 9, 11, 13, PC<7..0>  
15  
Port C—Bidirectional data lines for port C. PC7 is the MSB,  
PC0 the LSB.  
17, 19, 21, 23, 25,  
27, 29, 31  
PB<7..0>  
Port B—Bidirectional data lines for port B. PB7 is the MSB,  
PB0 the LSB.  
33, 35, 37, 39, 41,  
43, 45, 47  
PA<7..0>  
Port A—Bidirectional data lines for port B. PA7 is the MSB,  
PA0 the LSB.  
49 (see note below) +5 V  
+5 Volts—This pin provides +5 VDC.  
All even-numbered GND  
pins  
Ground—These signals are connected to the PC ground signal.  
Note: Pin 49 is connected to the +5 V PC power supply via a 1 A fuse. A replacement fuse is available from  
Allied Electronics, part number 845-2007, or Littelfuse, part number 251001.  
The absolute maximum voltage input rating is -0.5 to +5.5 V with respect to GND.  
Port C Pin Assignments  
The signals assigned to port C depend on the mode in which the 82C55A is programmed. In  
mode 0, port C is considered two 4-bit I/O ports. In modes 1 and 2, port C is used for status and  
handshaking signals with two or three I/O bits mixed in. Table 2-2 summarizes the signal  
assignments of port C for each programmable mode. See Chapter 4, Register-Level  
Programming, for register-level programming information.  
Warning: During programming, note that each time a port is configured, output ports A  
and C are reset to 0, and output port B is undefined.  
Table 2-2. Port C Signal Assignments  
Programming Mode  
Group A  
PC5  
Group B  
PC1  
PC7  
I/O  
PC6  
I/O  
PC4  
PC3  
PC2  
PC0  
I/O  
I/O  
I/O  
I/O  
I/O  
I/O  
Mode 0  
Mode 1 Input  
Mode 1 Output  
Mode 2  
I/O  
I/O  
IBF  
STB * INTR  
STB *  
IBFB  
INTR  
A
A
A
A
A
B
B
B
B
OBF * ACK * I/O  
I/O  
INTR  
ACK * OBF * INTR  
A
A
B
B
OBF * ACK * IBF  
STB * INTR  
I/O  
I/O  
I/O  
A
A
A
A
* Indicates that the signal is active low.  
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Configuration and Installation  
Chapter 2  
Timing Specifications  
This section lists the timing specifications for handshaking with the PC-DIO-24. The  
handshaking lines STB* and IBF synchronize input transfers. The handshaking lines OBF* and  
ACK* synchronize output transfers.  
The following signals are used in the timing diagrams on the subsequent pages.  
Name  
STB*  
IBF  
Signal  
Direction  
Description  
Input  
Strobe Input—A low signal on this handshaking line loads data into the input  
latch.  
Output  
Input  
Input Buffer Full—A high signal on this handshaking line indicates that data  
has been loaded into the input latch. This is an input acknowledge signal.  
ACK*  
Acknowledge Input—A low signal on this handshaking line indicates that  
the data written from the selected port has been accepted. This signal is a  
response from the external device that it has received the data from the  
PC-DIO-24.  
OBF*  
INTR  
Output  
Output  
Output Buffer Full—A low signal on this handshaking line indicates that  
data has been written from the selected port.  
Interrupt Request—This signal becomes high when the 82C55A is  
requesting service during a data transfer. The appropriate interrupt enable  
bits must be set to generate this signal.  
RD*  
Internal  
Read Signal—This signal is the read signal generated from the control lines  
of the PC.  
WR*  
DATA  
Internal  
Write Signal—This signal is the write signal generated from the control lines  
of the PC.  
Bidirectional  
Data Lines at the Selected Port—This signal indicates when the data on the  
data lines at a selected port is or should be available.  
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Chapter 2  
Configuration and Installation  
Mode 1 Input Timing  
The following figure illustrates the timing specifications for an input transfer in mode 1.  
T1  
T2  
T4  
STB*  
IBF  
T7  
T6  
INTR  
RD*  
T5  
T3  
DATA  
Name Description  
Minimum  
Maximum  
T1  
T2  
T3  
T4  
T5  
T6  
T7  
STB* pulse width  
100  
–
20  
–
50  
–
–
–
150  
–
150  
–
200  
150  
STB* = 0 to IBF = 1  
Data before STB* = 1  
STB* = 1 to INTR = 1  
Data after STB* = 1  
RD* = 0 to INTR = 0  
RD* = 1 to IBF = 0  
All timing values are in nanoseconds.  
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Configuration and Installation  
Chapter 2  
Mode 1 Output Timing  
The following figure illustrates the timing specifications for an output transfer in mode 1.  
T3  
WR*  
T4  
OBF*  
T1  
T6  
INTR  
T5  
ACK*  
DATA  
T2  
Name Description  
Minimum  
Maximum  
T1  
T2  
T3  
T4  
T5  
T6  
WR* = 0 to INTR = 0  
WR* = 1 to output  
WR* = 1 to OBF* = 0  
ACK* = 0 to OBF* = 1  
ACK* pulse width  
–
–
–
250  
200  
150  
150  
–
–
100  
–
ACK* = 1 to INTR = 1  
150  
All timing values are in nanoseconds.  
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Chapter 2  
Configuration and Installation  
Mode 2 Bidirectional Timing  
The following figure illustrates the timing specifications for bidirectional transfers in mode 2.  
T1  
WR*  
T6  
OBF*  
INTR  
T7  
ACK*  
T3  
STB*  
T10  
T4  
IBF  
RD*  
T2  
T5  
T9  
T8  
DATA  
Name Description  
Minimum  
Maximum  
T1  
T2  
T3  
T4  
T5  
T6  
T7  
T8  
T9  
T10  
WR* = 1 to OBF* = 0  
Data before STB* = 1  
STB* pulse width  
STB* = 0 to IBF = 1  
Data after STB* = 1  
ACK* = 0 to OBF = 1  
ACK* pulse width  
ACK* = 0 to output  
ACK* = 1 to output float  
RD* = 1 to IBF = 0  
–
20  
100  
–
50  
–
100  
–
20  
–
150  
–
–
150  
–
150  
–
150  
250  
150  
All timing values are in nanoseconds.  
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Chapter 3  
Theory of Operation  
This chapter contains a functional overview of the PC-DIO-24 board and explains the operation  
of each functional unit making up the PC-DIO-24.  
The block diagram in Figure 3-1 illustrates the key functional components of the PC-DIO-24  
board.  
Address  
Decoder  
PA  
/
8
Bus  
Transceivers  
PB  
82C55A  
PPI  
/
8
PC  
/
8
PC I/O  
Channel  
Control  
Circuitry  
Interrupt  
Control  
Circuitry  
PC3  
PC0  
+5 V  
1 A Fuse  
Figure 3-1. PC-DIO-24 Block Diagram  
The PC I/O Channel consists of an address bus, a data bus, interrupt lines, and several control  
and support signals. Control and data transfers to the system microprocessor are asynchronous.  
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Theory of Operation  
Chapter 3  
Address Decoder  
The base address used by the board is determined by an onboard switch setting. The address on  
the PC I/O Channel bus is monitored by the address decoder. If the address on the bus matches  
the selected I/O base address of the board, the board is enabled and the corresponding register on  
the PC-DIO-24 is accessed.  
Bus Transceivers  
The bus transceivers control the sending and receiving of data lines to and from the PC I/O  
Channel.  
PC I/O Channel Control Circuitry  
This circuitry monitors and transmits the PC I/O Channel control and support signals. The  
control signals identify transfers as read or write, configuration or I/O, and 8-bit or 16-bit. The  
PC-DIO-24 only uses 8-bit transfers.  
82C55A Programmable Peripheral Interface  
The 82C55A PPI is the heart of the PC-DIO-24. This chip has 24 programmable I/O pins that  
represent three 8-bit ports—PA, PB, and PC. Each port can be programmed as an input or an  
output port. The 82C55A has three modes of operation—simple I/O (mode 0), strobed I/O  
(mode 1), and bidirectional I/O (mode 2). In modes 1 and 2, the three ports are divided into two  
groups—group A and group B. Each group has eight data bits and four control and status bits  
from port C (PC). Modes 1 and 2 use handshaking signals from port C to synchronize data  
transfers. Refer to Chapter 4, Register-Level Programming, or to Appendix C, OKI 82C55A  
Data Sheet, for more detailed information.  
Interrupt Control Circuitry  
The interrupt level used by the PC-DIO-24 is selected by the onboard jumper W2. Another  
onboard jumper, W1, is used to enable interrupts from the PC-DIO-24. The setting for W1  
selects PC2, PC4, or PC6 as the active low interrupt enable signal. Selecting N/C for W1  
disables interrupts from the PC-DIO-24. When the onboard jumpers are set to enable interrupts,  
the 82C55A can be programmed to generate an interrupt request by setting INTRA for group A  
or INTRB for group B. When interrupts are enabled for group A, an active high signal on the  
PC3 line generates an interrupt request. When interrupts are enabled for group B, an active high  
signal on the PC0 line generates an interrupt request.  
Digital I/O Connector  
All digital I/O is transmitted through a standard 50-pin male connector. The pin assignments for  
the I/O connector are compatible with standard 24-channel digital I/O applications. All even  
pins on this connector are attached to logic ground, and pin 49 is connected to +5 V through a  
protection fuse (F1), which is often required to operate I/O module mounting racks. See  
Chapter 2, Configuration and Installation, for additional information.  
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Chapter 4  
Register-Level Programming  
This chapter describes in detail the address and function of each of the PC-DIO-24 control and  
status registers. This chapter also includes important information related to register-level  
programming the PC-DIO-24.  
The PC-DIO-24 is a parallel, digital I/O board designed around the OKI 82C55A integrated  
circuit. The 82C55A is a general-purpose peripheral interface containing 24 programmable I/O  
pins. These pins represent the three 8-bit I/O ports (A, B, and C) of the 82C55A. These ports  
can be programmed as two groups of 12 signals or as three individual 8-bit ports. This chapter  
includes register-level programming information for the PC-DIO-24, along with program examples  
written in C.  
Note: If you plan to use a programming software package such as LabWindows/CVI or  
NI-DAQ with your PC-DIO-24 board, you need not read this chapter.  
Introduction  
The three 8-bit ports are divided into two groups—group A and group B (two groups of 12  
signals). One 8-bit configuration (or control) word determines the mode of operation for each  
group. The group A control bits configure port A<0..7> and the upper 4 bits (nibble) of  
port C<4..7>. The group B control bits configure port B<0..7> and the lower nibble of  
port C<0..3>. These configuration bits are defined later in this chapter.  
82C55A Modes of Operation  
The three basic modes of operation for the 82C55A are as follows:  
•
•
•
Mode 0 – Basic I/O  
Mode 1 – Strobed I/O  
Mode 2 – Bidirectional bus  
The 82C55A also has a single bit set/reset feature for port C. The 8-bit control word also  
programs this function. For additional information, refer to Appendix C, OKI 82C55A Data  
Sheet.  
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Register-Level Programming  
Chapter 4  
Mode 0  
This mode can be used for simple input and output operations for each of the ports. No  
handshaking is required; data is simply written to or read from a selected port.  
Mode 0 has the following features:  
•
•
•
Two 8-bit ports (A and B) and two 4-bit ports (upper and lower nibble of port C).  
Any port can be input or output.  
Outputs are latched, but inputs are not latched.  
Mode 1  
This mode transfers data that is synchronized by handshaking signals. ports A and B use the  
eight lines of port C to generate or receive the handshake signals. This mode divides the ports  
into two groups (group A and group B):  
•
Each group contains one 8-bit data port (port A or port B) and one 4-bit control/data port  
(upper or lower nibble of port C).  
•
•
•
The 8-bit data ports can be either input or output, both of which are latched.  
The 4-bit ports are used for control and status of the 8-bit data ports.  
Interrupt generation and enable and/or disable functions are available.  
Mode 2  
This mode can be used for communication over a bidirectional 8-bit bus. Handshaking signals  
are used in a manner similar to mode 1. Interrupt generation and enable and/or disable functions  
are also available. Other features of this mode include the following:  
•
•
•
Used in group A only (port A and upper nibble of port C).  
One 8-bit bidirectional port (port A) and a 5-bit control status port (port C).  
Latched inputs and outputs.  
Single Bit Set/Reset Feature  
Any of the eight bits of port C can be set or reset with one control word. This feature generates  
status and control for port A and port B when operating in mode 1 or mode 2.  
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Chapter 4  
Register-Level Programming  
Register Map  
The following table lists the address map for the PC-DIO-24. The registers PORTA, PORTB,  
PORTC, and CNFG are 8-bit registers in the 82C55A.  
Table 4-1. PC-DIO-24 Address Map  
Register  
PORTA  
PORTB  
PORTC  
CNFG  
Offset Address  
(Hex)  
Size  
Type  
0x00  
0x01  
0x02  
0x03  
8-bit  
Read-and-write  
Read-and-write  
Read-and-write  
Write-Only  
8-bit  
8-bit  
8-bit  
Note: A number preceded by 0x is a hexadecimal number.  
Register Descriptions  
Figure 4-1 shows the two control-word formats used to completely program the 82C55A. The  
Control Word Flag determines which control-word format is being programmed. When the  
Control Word Flag is 1, bits 0 through 6 determine the I/O characteristics of the 82C55A ports  
and the mode in which they are operating (that is, mode 0, mode 1, or mode 2). When the  
Control Word Flag is 0, bits 3 through 0 determine the bit set/reset format of port C.  
Warning: During programming, note that each time a port is configured, output ports A  
and C are reset to 0, and output port B is undefined.  
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Chapter 4  
Group A  
Group B  
D1  
D7  
D6  
D5  
D4  
D3  
D2  
D0  
Control Word  
Flag  
Port C  
(low nibble)  
1 = input  
0 = output  
1 = mode set  
Mode Selection  
00 = mode 0  
01 = mode 1  
1X = mode 2  
Port B  
1 = input  
0 = output  
Mode Selection  
0 = mode 0  
1 = mode 1  
Port A  
1 = input  
0 = output  
Port C  
(high nibble)  
1 = input  
0 = output  
a. Mode Set Word Format  
D7  
X
X
X
D3  
D2  
D1  
D0  
Control Word  
Flag  
Bit Set/Reset  
1 = set  
0 = bit set/reset  
0 = reset  
Bit Select  
(000)  
(001)  
(010)  
:
:
(111)  
b. Bit Set/Reset Word Format  
Figure 4-1. Control-Word Formats  
Single Bit Set/Reset Feature  
Table 4-2 shows the control words for setting or resetting each bit in port C. Notice that bit 7 of  
the control word is cleared when programming the set/reset option for the bits of port C.  
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Chapter 4  
Register-Level Programming  
Table 4-2. Port C Set/Reset Control Words  
Number  
Bit Set  
Control Word  
Bit Reset  
Control Word  
Bit Set or  
Reset in Port C  
0
1
2
3
4
5
6
7
0xxx0001  
0xxx0011  
0xxx0101  
0xxx0111  
0xxx1001  
0xxx1011  
0xxx1101  
0xxx1111  
0xxx0000  
0xxx0010  
0xxx0100  
0xxx0110  
0xxx1000  
0xxx1010  
0xxx1100  
0xxx1110  
xxxxxxxn  
xxxxxxnx  
xxxxxnxx  
xxxxnxxx  
xxxnxxxx  
xxnxxxxx  
xnxxxxxx  
nxxxxxxx  
Programming Considerations  
Mode 0–Basic I/O  
Mode 0 can be used for simple I/O functions for each of the three ports with no handshaking.  
Each port can be assigned as an input or an output port. The 16 possible I/O configurations are  
shown in Table 4-3. Notice that bit 7 of the control word is set when programming the mode of  
operation for each port.  
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Register-Level Programming  
Chapter 4  
Table 4-3. Mode 0 I/O Configurations  
Control Word  
Bit  
Group A  
Group B  
Number  
Port A  
Port C1  
Port B  
Port C2  
76543210  
0
1
2
3
4
5
6
7
8
10000000  
10000001  
10000010  
10000011  
10001000  
10001001  
10001010  
10001011  
10010000  
10010001  
10010010  
10010011  
10011000  
10011001  
10011010  
10011011  
Output  
Output  
Output  
Output  
Output  
Output  
Output  
Output  
Input  
Input  
Input  
Input  
Input  
Output  
Output  
Output  
Output  
Input  
Input  
Input  
Output  
Output  
Input  
Output  
Input  
Output  
Input  
Output  
Input  
Output  
Input  
Output  
Input  
Output  
Input  
Output  
Input  
Output  
Input  
Input  
Output  
Output  
Input  
Input  
Input  
Output  
Output  
Output  
Output  
Input  
Input  
Input  
Output  
Output  
Input  
9
10  
11  
12  
13  
14  
15  
Input  
Output  
Output  
Input  
Input  
Input  
Input  
Input  
Input  
1
Upper nibble of port C  
Lower nibble of port C  
2
Mode 0 Programming Example  
Main() {  
#define BASE_ADDRESS  
#define PORTAoffset  
#define PORTBoffset  
#define PORTCoffset  
#define CNFGoffset  
0x210  
/* Board located at address 210 */  
/* Offset for port A */  
/* Offset for port B */  
/* Offset for port C */  
/* Offset for CNFG */  
0x00  
0x01  
0x02  
0x03  
register unsigned int porta, portb, portc, cnfg;  
char valread;  
/* Variable to store data read from a  
port */  
/* Calculate register addresses. */  
porta = BASE_ADDRESS + PORTAoffset;  
portb = BASE_ADDRESS + PORTBoffset;  
portc = BASE_ADDRESS + PORTCoffset;  
cnfg = BASE_ADDRESS + CNFGoffset;  
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/* EXAMPLE 1*/  
outp(cnfg,0x80);  
outp(porta,0x12);  
outp(portb,0x34);  
outp(portc,0x56);  
/* Ports A, B, and C are outputs. */  
/* Write data to port A. */  
/* Write data to port B. */  
/* Write data to port C. */  
/* EXAMPLE 2*/  
outp(cnfg,0x90);  
/* Port A is input; ports B and C are  
outputs. */  
outp(portb,0x22);  
outp(portc,0x55);  
valread = inp(porta);  
/* Write data to port B. */  
/* Write data to port C. */  
/* Read data from port A. */  
/* EXAMPLE 3 */  
outp(cnfg,0x82);  
/* Ports A and C are outputs; port B  
is an input. */  
/* EXAMPLE 4 */  
outp(cnfg,0x89);  
/* Ports A and B are outputs; port C  
is an input. */  
}
Mode 1–Strobed Input  
In mode 1, the digital I/O bits are divided into two groups—group A and group B. Each of these  
groups contains one 8-bit port and one 4-bit control/data port. The 8-bit port can be either an  
input or an output, and the 4-bit port is used for control and status information for the 8-bit port.  
The transfer of data is synchronized by handshaking signals in the 4-bit port.  
The control word written to the CNFG Register to configure port A for input in mode 1 is shown  
as follows. Bits PC6 and PC7 of port C can be used as extra input or output lines.  
7
1
6
0
5
1
4
1
3
2
1
0
1/0  
X
X
X
Port C bits PC6 and PC7  
1 = input  
0 = output  
The control word written to the CNFG Register to configure port B for input in mode 1 is shown  
as follows. Notice that port B does not have extra input or output lines from port C.  
7
1
6
5
4
3
2
1
1
1
0
X
X
X
X
X
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Chapter 4  
During a mode 1 data read transfer, the status of the handshaking lines and interrupt signals can  
be obtained by reading port C. The port C status-word bit definitions for an input transfer are  
shown as follows.  
The following are the port C status-word bit definitions for input (port A and port B).  
7
I/O  
6
I/O  
5
IBFA  
4
3
2
1
IBFB  
0
INTEA  
INTRA  
INTEB  
INTRB  
Bit  
Name  
Description  
7–6  
I/O  
Input/Output—Extra I/O status lines when port A is in mode 1  
input.  
5
4
3
IBFA  
Input Buffer Full for Port A—High indicates that data has been  
loaded into the input latch for port A.  
INTEA  
INTRA  
Interrupt Enable Bit for Port A—Enables interrupts from the  
82C55A for port A. Controlled by bit set/reset of PC4.  
Interrupt Request Status for Port A—When INTEA is high and  
IBFA is high, this bit is high, indicating that an interrupt request is  
asserted.  
2
1
0
INTEB  
IBFB  
Interrupt Enable Bit for Port B—Enables interrupts from the  
82C55A for port B. Controlled by bit set/reset of PC2.  
Input Buffer Full for Port B—High indicates that data has been  
loaded into the input latch for port B.  
INTRB  
Interrupt Request Status for Port B—When INTEB is high and  
IBFB is high, this bit is high, indicating that an interrupt request is  
asserted.  
At the digital I/O connector, port C has the following pin assignments when in mode 1 input.  
Notice that the status of STBA* and STBB* are not included in the port C status word.  
PC7  
PC6  
PC5  
PC4  
PC3  
PC2  
PC1  
PC0  
I/O  
I/O  
IBFA  
Group A  
Group B  
STBA*  
INTRA  
STBB*  
IBFB  
INTRB  
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Mode 1 Input Programming Example  
Main() {  
#define BASE_ADDRESS  
#define PORTAoffset  
#define PORTBoffset  
#define PORTCoffset  
#define CNFGoffset  
0x210  
0x00  
0x01  
0x02  
0x03  
/* Board located at address 210. */  
/* Offset for port A */  
/* Offset for port B */  
/* Offset for port C */  
/* Offset for CNFG */  
register unsigned int porta, portb, portc, cnfg;  
char valread;  
/* Variable to store data read from a  
port */  
/* Calculate register addresses. */  
porta = BASE_ADDRESS + PORTAoffset;  
portb = BASE_ADDRESS + PORTBoffset;  
portc = BASE_ADDRESS + PORTCoffset;  
cnfg = BASE_ADDRESS + CNFGoffset;  
/* EXAMPLE 1–port A input */  
outp(cnfg,0xB0);  
while (!(inp(portc) & 0x20));  
/* Port A is an input in mode 1. */  
/* Wait until IBFA is set, indicating that  
data has been loaded in port A. */  
/* Read the data from port A. */  
valread = inp(porta);  
/* EXAMPLE 2–port B input */  
outp(cnfg,0x86);  
while (!(inp(portc) & 0x02));  
/* Port B is an input in mode 1. */  
/* Wait until IBFB is set, indicating that  
data has been loaded in port B. */  
valread = inp(portb);  
}
Mode 1–Strobed Output  
The control word written to the CNFG Register to configure port A for output in mode 1 is  
shown as follows. Bits PC4 and PC5 of port C can be used as extra input or output lines when  
port A uses mode 1 output.  
7
1
6
0
5
1
4
0
3
2
1
0
1/0  
X
X
X
Port C bits PC4 and PC5  
1 = input  
0 = output  
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Chapter 4  
The control word written to the CNFG Register to configure port B for output in mode 1 is  
shown as follows. Notice that port B does not have extra input or output lines from port C.  
7
1
6
5
4
3
2
1
1
0
0
X
X
X
X
X
During a mode 1 data write transfer, the status of the handshaking lines and interrupt signals can  
be obtained by reading port C. Notice that the bit definitions are different for a write and a read  
transfer.  
The following are the port C status-word bit definitions for output (port A and port B).  
7
6
5
I/O  
4
I/O  
3
2
1
0
OBFA*  
INTEA  
INTRA  
INTEB  
OBFB*  
INTRB  
Bit  
Name  
Description  
7
OBFA*  
Output Buffer Full for Port A—Low indicates that the CPU has  
written data to port A.  
6
INTEA  
Interrupt Enable Bit for Port A—If this bit is high, interrupts are  
enabled from the 82C55A for port A. Controlled by bit set/reset of  
PC6.  
5–4  
3
I/O  
Input/Output—Extra I/O status line when port A is in mode 1  
output.  
INTRA  
Interrupt Request Status for Port A—When INTEA is high and  
OBFA* is high, this bit is high, indicating that an interrupt request  
is asserted.  
2
INTEB  
Interrupt Enable Bit for Port B—If this bit is high, interrupts are  
enabled from the 82C55A for port B. Controlled by bit set/reset of  
PC2.  
1
0
OBFB*  
INTRB  
Output Buffer Full for Port B—Low indicates that the CPU has  
written data out to port B.  
Interrupt Request Status for Port B—When INTEB is high and  
OBFB* is high, this bit is high, indicating that an interrupt request  
is asserted.  
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At the digital I/O connector, port C has the following pin assignments when in mode 1 output.  
Notice that the status of ACKA* and ACKB* is not included when port C is read.  
PC7  
PC6  
PC5  
PC4  
PC3  
PC2  
PC1  
PC0  
OBFA*  
ACKA*  
I/O  
Group A  
Group B  
I/O  
INTRA  
ACKB*  
OBFB*  
INTRB  
Mode 1 Output Programming Example  
Main() {  
#define BASE_ADDRESS  
#define PORTAoffset  
#define PORTBoffset  
#define PORTCoffset  
#define CNFGoffset  
0x210  
0x00  
0x01  
0x02  
0x03  
/* Board located at address 210. */  
/* Offset for port A */  
/* Offset for port B */  
/* Offset for port C */  
/* Offset for CNFG */  
register unsigned int porta, portb, portc, cnfg;  
char valread;  
/* Variable to store data read from a  
port */  
/* Calculate register addresses. */  
porta = BASE_ADDRESS + PORTAoffset;  
portb = BASE_ADDRESS + PORTBoffset;  
portc = BASE_ADDRESS + PORTCoffset;  
cnfg = BASE_ADDRESS + CNFGoffset;  
/* EXAMPLE 1–port A output */  
outp(cnfg,0xA0);  
while (!(inp(portc) & 0x80));  
/* Port A is an output in mode 1.*/  
/* Wait until OBFA* is set, indicating  
that the data last written to port A  
has been read.*/  
outp(porta,0x12);  
/* Write data to port A. */  
/* EXAMPLE 2–port B output */  
outp(cnfg,0x84);  
while (!(inp(portc) & 0x02));  
/* Port B is an output in mode 1.*/  
/* Wait until OBFB* is set, indicating  
that the data last written to port B  
has been read.*/  
outp(portb,0x34);  
}
/* Write the data to port B. */  
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Chapter 4  
Mode 2–Bidirectional Bus  
Mode 2 has an 8-bit bus that can transfer both input and output without changing the  
configuration. The data transfers are synchronized with handshaking lines in port C. This mode  
uses only port A; however, port B can be used in either mode 0 or mode 1 while port A is  
configured for mode 2.  
The control word written to the CNFG Register to configure port A as a bidirectional data bus in  
mode 2 is shown as follows. If port B is configured for mode 0, then PC2, PC1, and PC0 of  
port C can be used as extra input or output lines.  
7
1
6
1
5
4
3
2
1
0
X
X
X
1/0  
1/0  
1/0  
Port C bits PC2,PC1,PC0  
1 = input  
0 = output  
Port B direction  
1 = input  
0 = output  
Group B Mode  
0 = mode 0  
1 = mode 1  
During a mode 2 data transfer, the status of the handshaking lines and interrupt signals can be  
obtained by reading port C. The port C status-word bit definitions for a mode 2 transfer are  
shown as follows.  
The following are the port C status-word bit definitions for bidirectional data path (port A only).  
7
6
5
IBFA  
4
3
2
I/O  
1
I/O  
0
I/O  
OBFA*  
INTE1  
INTE2  
INTRA  
Bit  
Name  
Description  
7
OBFA*  
Output Buffer Full—Low indicates that the CPU has written data  
to port A.  
6
5
INTE1  
Interrupt Enable Bit for Output—If this bit is set, interrupts are  
enabled from the 82C55A for OBFA*. Controlled by bit set/reset of  
PC6.  
IBFA  
Input Buffer Full—High indicates that data has been loaded into  
the input latch of port A.  
(continues)  
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Bit  
Name  
Description (continued)  
4
INTE2  
Interrupt Enable Bit for Input—If this bit is set, interrupts are  
enabled from the 82C55A for IBFA. Controlled by bit set/reset of  
PC4.  
3
INTRA  
Interrupt Request Status—If INTE1 is high and IBFA is high, this  
bit is high, indicating that an interrupt request is asserted for input  
transfers. If INTE2 is high and OBFA* is high, this bit is high,  
indicating that an interrupt request is asserted for output transfers.  
2–0  
I/O  
Input/Output—Extra I/O status lines available if port B is not  
configured for mode 1.  
At the digital I/O connector, port C has the following pin assignments when in mode 2.  
PC7  
PC6  
PC5  
PC4  
PC3  
PC2  
PC1  
PC0  
OBFA*  
ACKA*  
IBFA  
STBA*  
INTRA  
Group A  
Group B  
I/O  
or  
Hand-  
shaking  
Mode 2 Programming Example  
Main() {  
#define BASE_ADDRESS  
#define PORTAoffset  
#define PORTBoffset  
#define PORTCoffset  
#define CNFGoffset  
0x210  
0x00  
0x01  
0x02  
0x03  
/* Board located at address 210. */  
/* Offset for port A */  
/* Offset for port B */  
/* Offset for port C */  
/* Offset for CNFG */  
register unsigned int porta, portb, portc, cnfg;  
char valread;  
/* Variable to store data read from a  
port */  
/* Calculate register addresses. */  
porta = BASE_ADDRESS + PORTAoffset;  
portb = BASE_ADDRESS + PORTBoffset;  
portc = BASE_ADDRESS + PORTCoffset;  
cnfg = BASE_ADDRESS + CNFGoffset;  
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/* EXAMPLE 1*/  
outp(cnfg,0xC0);  
while (!(inp(portc) & 0x80));  
/* Port A is in mode 2. */  
/* Wait until OBFA* is set,  
indicating that the data last  
written to port A has been  
read.*/  
outp(porta,0x67);  
while (!(inp(portc) & 0x20));  
/* Write the data to port A. */  
/* Wait until IBFA is set, indicating  
that data is available in port A to  
be read. */  
valread = inp(porta);  
}
/* Read data from port A. */  
Interrupt Programming Examples  
The following examples show the process required to enable interrupts for several different  
operating modes. The interrupt handling routines and interrupt installation routines are not  
included. See the IBM Personal Computer AT Technical Reference manual for additional  
information.  
Main() {  
#define BASE_ADDRESS  
#define PORTAoffset  
#define PORTBoffset  
#define PORTCoffset  
#define CNFGoffset  
0x210  
0x00  
0x01  
0x02  
0x03  
/* Board located at address 210. */  
/* Offset for port A */  
/* Offset for port B */  
/* Offset for port C */  
/* Offset for CNFG */  
register unsigned int porta, portb, portc, cnfg;  
char valread;  
/* Variable to store data read from a  
port */  
/* Calculate register addresses. */  
porta = BASE_ADDRESS + PORTAoffset;  
portb = BASE_ADDRESS + PORTBoffset;  
portc = BASE_ADDRESS + PORTCoffset;  
cnfg = BASE_ADDRESS + CNFGoffset;  
/* EXAMPLE 1–Set up interrupts for mode 1 input for port A. Select PC6 as the  
interrupt enable bit. */  
outp(cnfg,0xB0);  
outp(cnfg,0x09);  
/* Port A is an input in mode 1. */  
/* Set PC4 to enable interrupts from  
82C55A. */  
outp(cnfg,0x0C);  
/* Clear PC6 to enable interrupts. */  
/* EXAMPLE 2–Set up interrupts for mode 1 input for port B. Select PC6 as the  
interrupt enable bit. */  
outp(cnfg,0x86);  
outp(cnfg,0x05);  
/* Port B is an input in mode 1. */  
/* Set PC2 to enable interrupts from  
82C55A. */  
outp(cnfg,0x0C);  
/* Clear PC6 to enable interrupts. */  
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/* EXAMPLE 3–Set up interrupts for mode 1 output for port A. Select PC4 as  
the interrupt enable bit. */  
outp(cnfg,0xA0);  
outp(cnfg,0x0D);  
/* Port A is an output in mode 1. */  
/* Set PC6 to enable interrupts from  
82C55A. */  
outp(cnfg,0x0C);  
/* Clear PC4 to enable interrupts. */  
/* EXAMPLE 4–Set up interrupts for mode 1 output for port B. Select PC4 as  
the interrupt enable bit. */  
outp(cnfg,0x84);  
outp(cnfg,0x05);  
/* Port B is an output in mode 1. */  
/* Set PC2 to enable interrupts from  
82C55A. */  
outp(cnfg,0x08);  
/* Clear PC4 to enable interrupts. */  
/* EXAMPLE 5–Set up interrupts for mode 2 output transfers. Select PC2 as the  
interrupt enable bit. */  
outp(cnfg,0xC0);  
outp(cnfg,0x0D);  
/* mode 2 output */  
/* Set PC6 to enable interrupts from  
82C55A. */  
outp(cnfg,0x04);  
/* Clear PC2 to enable interrupts. */  
/* EXAMPLE 6–Set up interrupts for mode 2 input transfers. Select PC2 as the  
interrupt enable bit. */  
outp(cnfg,0xD0);  
outp(cnfg,0x09);  
/* mode 2 input */  
/* Set PC4 to enable interrupts from  
82C55A. */  
outp(cnfg,0x04);  
}
/* Clear PC2 to enable interrupts. */  
Interrupt Handling  
A jumper setting on the PC-DIO-24 selects the signal that is used for the interrupt enable signal.  
If jumper W1 is set to N/C, interrupts are disabled. Jumper W1 can be used to select PC2, PC4,  
or PC6 as the active low interrupt enable signal. For example, if PC2 is selected, interrupts are  
enabled if PC2 is logic low. If PC2 is logic high, interrupts from the PC-DIO-24 are disabled.  
The following table summarizes which signal should be used as the interrupt enable for all mode  
combinations.  
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Register-Level Programming  
Chapter 4  
Table 4-4. Interrupt Enable Signals for All Mode Combinations  
Port A  
Mode 2  
Output  
Port A  
Mode 2  
Input  
Port B  
Mode 1  
Output  
Port B  
Mode 1  
Input  
Port A  
Mode 1  
Output  
Port A  
Mode 1  
Input  
Port B  
Mode 0  
Port A  
Mode 0  
Interrupt  
Enable  
Bit  
No  
No  
No  
No  
No  
No  
No  
No  
No  
No  
No  
No  
Yes  
Yes  
Yes  
No  
No  
No  
No  
No  
No  
No  
No  
No  
Yes  
Yes  
Yes  
No  
No  
No  
No  
No  
No  
No  
No  
No  
No  
No  
Yes  
Yes  
Yes  
No  
No  
No  
No  
Yes  
No  
No  
No  
Yes  
No  
No  
Yes  
No  
No  
Yes  
No  
No  
No  
No  
No  
No  
No  
Yes  
No  
No  
Yes  
No  
No  
Yes  
No  
No  
No  
No  
No  
No  
No  
Yes  
Yes  
Yes  
No  
No  
No  
No  
No  
No  
Yes  
No  
No  
Yes  
No  
No  
Yes  
No  
No  
Yes  
No  
No  
Yes  
No  
No  
No  
No  
No  
No  
No  
No  
N/C  
PC6, PC2  
PC4, PC2  
PC6, PC4  
PC6  
PC4  
PC6, PC4  
PC6  
No  
Yes  
Yes  
Yes  
No  
No  
Yes  
No  
PC4  
PC2  
N/C  
N/C  
PC2  
N/C  
N/C  
No  
Yes  
No  
No  
Yes  
The recommended jumper settings for W1 are as follows.  
•
•
•
PC6 — If port A is in mode 1 input.  
PC4 — If port A is in mode 1 output.  
PC2 — If port A is in mode 2 (port B is not in mode 1).  
To enable interrupts from the PC-DIO-24, select PC2, PC4, or PC6 as the active low interrupt  
enable signal. Initially, set the selected bit high to disable unwanted interrupts.  
Program the PC-DIO-24 for the I/O mode desired. To enable interrupts from the 82C55A, set  
either the INTEA or the INTEB bit to enable interrupts from port A or port B, respectively. In  
mode 2, set either INTE1 or INTE2 for interrupts on input or output transfers. After interrupts  
have been enabled from the 82C55A, clear the selected interrupt enable bit to enable interrupts  
from the PC-DIO-24.  
An external signal can be used to interrupt the PC-DIO-24 when port A or port B is in mode 0.  
Select PC2, PC4, or PC6 as the interrupt enable bit and clear the selected bit to enable interrupts.  
Connect the external signal that should trigger an interrupt to either PC3 or PC0. When the  
external signal becomes logic high, an interrupt request occurs. To disable the external signal  
interrupt, set the selected interrupt enable bit to logic high.  
PC-DIO-24 User Manual  
4-16  
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Appendix A  
Specifications  
This appendix lists the specifications for the PC-DIO-24 board. These specifications are typical at 25° C, unless  
otherwise stated. The operating temperature range is 0° to 70° C.  
Digital I/O  
Number of channels .................................................... 24 I/O  
Compatibility .............................................................. TTL  
Absolute max voltage input rating .............................. -0.5 to +5.5 V with respect to GND  
Handshaking................................................................ Requires 1 port  
Power-on state............................................................. Configured as inputs  
Data transfers .............................................................. Interrupts, programmed I/O  
Digital Logic Levels  
Input Signals  
Odd-numbered pins 1–47.........................................  
Level  
Min  
2.2 V  
Max  
5.3 V  
0.8 V  
1.0 µA  
Input logic high voltage  
Input logic low voltage  
Input current  
-0.3 V  
-1.0 µA  
(0 < V < 5 V)  
in  
Output Signals  
Pin 49 (at +5 V)........................................................... 0.25 A max  
Odd-numbered pins 1–47.........................................  
Level  
Output high voltage  
(I = -2.5 mA)  
Min  
Max  
5.0 V  
0.4 V  
—
3.7 V  
0.0 V  
4 mA  
4 mA  
out  
Output low voltage  
(I = 2.5 mA)  
out  
Output current  
(V = 0.5 V)  
OL  
Output current  
(V = 2.7 V)  
—
OH  
Environment  
Operating Temperature ............................................... 0° to 70° C  
Storage Temperature ................................................... -55° to 150° C  
Relative humidity ........................................................ 5% to 90% noncondensing  
© National Instruments Corporation  
A-1  
PC-DIO-24 User Manual  
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Specifications  
Appendix A  
Physical  
Dimensions.................................................................. 17.5 by 9.9 cm (6.9 in. by 3.9 in.)  
I/O connector............................................................... 50-pin male ribbon-cable connector  
Power Requirement (from PC I/O Channel)  
Typ power ................................................................... 0.10 A at 5 VDC (±10%)  
Max power .................................................................. 0.16 A at 5 VDC (±10%)  
Transfer Rates  
The maximum average transfer rates for the PC-DIO-24 are shown as follows. The code used to make the  
measurements follows the table. The assembly language code was assembled as inline assembly C code using  
version 8.00 of the Microsoft Optimizing C Compiler. The C code was compiled using version 8.00 of the  
Microsoft Optimizing C Compiler.  
Table A-1. Maximum Average Transfer Rates for the PC-DIO-24  
Bus  
CPU  
CPU Speed  
Assembly  
C
AT (ISA16)  
486DX4  
100 MHz  
410 kbytes/s  
330 kbytes/s  
Assembly language code:  
mov  
cx, 64  
dx, 0180h  
; Count out 64 transfers  
; The port to access  
mov  
loop:  
lodsb  
out  
add  
in  
; Assume ds:si points to buffer of data  
; Send the data  
; Add offset to base address for Ireg1  
; Dummy read from Ireg1  
dx, al  
dx, 0014h  
al, dx  
sub  
dx, 0014h  
; Restore base address  
; The previous four lines are not  
; necessary for measuring transfer rates  
; Decrement the loop counter  
; See if we need to loop  
dec  
jnz  
cx  
short loop  
C code:  
address = 0x0180;  
/* The port address */  
ireg1address = address + 0x0014;  
for (i = 0; i < 64; i++) {  
outp(address, *data++);  
inp(ireg1address);  
}
/* Loop 64 times */  
/* Send data */  
PC-DIO-24 User Manual  
A-2  
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Appendix B  
I/O Connector  
This appendix describes the pinout and signal names for the I/O connector on the PC-DIO-24.  
Figure B-1 shows the PC-DIO-24 digital I/O connector.  
PC7  
PC6  
PC5  
PC4  
PC3  
PC2  
PC1  
PC0  
PB7  
PB6  
PB5  
PB4  
PB3  
PB2  
PB1  
PB0  
PA 7  
PA 6  
PA 5  
PA 4  
PA 3  
PA 2  
PA 1  
PA 0  
+5V  
GND  
GND  
GND  
GND  
GND  
GND  
GND  
GND  
GND  
GND  
GND  
GND  
GND  
GND  
GND  
GND  
GND  
GND  
GND  
GND  
GND  
GND  
GND  
GND  
GND  
1
3
5
7
9
2
4
6
8
10  
11 12  
13 14  
15 16  
17 18  
19 20  
21 22  
23 24  
25 26  
27 28  
29 30  
31 32  
33 34  
35 36  
37 38  
39 40  
41 42  
43 44  
45 46  
47 48  
49 50  
Figure B-1. PC-DIO-24 I/O Connector  
Detailed signal specifications are included in Chapter 2, Configuration and Installation.  
© National Instruments Corporation  
B-1  
PC-DIO-24 User Manual  
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Appendix  
*
C
OKI 82C55A Data Sheet  
This appendix contains the manufacturer data sheet for the OKI  
Semiconductor 82C55A CMOS programmable peripheral  
interface (PPI). This interface is used on the DAQCard-DIO-24.  
*
Copyright © OKI Semiconductor. 1993. Reprinted with permission of copyright owner.  
All rights reserved.  
OKI Semiconductor Data Book Microprocessor, Seventh Edition, March 1993.  
© National Instruments Corporation  
C-1  
PC-DIO-24 User Manual  
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Appendix C  
OKI 82C55A Data Sheet  
PC-DIO-24 User Manual  
C-2  
© National Instruments Corporation  
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Appendix C  
OKI 82C55A Data Sheet  
© National Instruments Corporation  
C-3  
PC-DIO-24 User Manual  
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Appendix C  
OKI 82C55A Data Sheet  
PC-DIO-24 User Manual  
C-4  
© National Instruments Corporation  
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Appendix C  
OKI 82C55A Data Sheet  
© National Instruments Corporation  
C-5  
PC-DIO-24 User Manual  
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Appendix C  
OKI 82C55A Data Sheet  
PC-DIO-24 User Manual  
C-6  
© National Instruments Corporation  
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Appendix C  
OKI 82C55A Data Sheet  
© National Instruments Corporation  
C-7  
PC-DIO-24 User Manual  
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Appendix C  
OKI 82C55A Data Sheet  
PC-DIO-24 User Manual  
C-8  
© National Instruments Corporation  
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Appendix C  
OKI 82C55A Data Sheet  
© National Instruments Corporation  
C-9  
PC-DIO-24 User Manual  
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Appendix C  
OKI 82C55A Data Sheet  
PC-DIO-24 User Manual  
C-10  
© National Instruments Corporation  
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Appendix C  
OKI 82C55A Data Sheet  
© National Instruments Corporation  
C-11  
PC-DIO-24 User Manual  
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Appendix C  
OKI 82C55A Data Sheet  
PC-DIO-24 User Manual  
C-12  
© National Instruments Corporation  
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Appendix C  
OKI 82C55A Data Sheet  
© National Instruments Corporation  
C-13  
PC-DIO-24 User Manual  
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Appendix C  
OKI 82C55A Data Sheet  
PC-DIO-24 User Manual  
C-14  
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Appendix C  
OKI 82C55A Data Sheet  
© National Instruments Corporation  
C-15  
PC-DIO-24 User Manual  
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Appendix C  
OKI 82C55A Data Sheet  
PC-DIO-24 User Manual  
C-16  
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Appendix C  
OKI 82C55A Data Sheet  
© National Instruments Corporation  
C-17  
PC-DIO-24 User Manual  
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Appendix D  
Customer Communication  
___________________________________________________  
For your convenience, this appendix contains forms to help you gather the information necessary  
to help us solve technical problems you might have as well as a form you can use to comment on  
the product documentation. Filling out a copy of the Technical Support Form before contacting  
National Instruments helps us help you better and faster.  
National Instruments provides comprehensive technical assistance around the world. In the U.S.  
and Canada, applications engineers are available Monday through Friday from 8:00 a.m. to  
6:00 p.m. (central time). In other countries, contact the nearest branch office. You may fax  
questions to us at any time.  
Corporate Headquarters  
(512) 795-8248  
Technical support fax: (800) 328-2203  
(512) 794-5678  
Branch Offices  
Australia  
Austria  
Belgium  
Canada Ontario)  
Canada (Quebec)  
Denmark  
Finland  
Phone Number  
03 9 879 9422  
0662 45 79 90 0  
02 757 00 20  
519 622 9310  
514 694 8521  
45 76 26 00  
90 527 2321  
1 48 14 24 24  
089 741 31 30  
2645 3186  
02 48301892  
03 5472 2970  
02 596 7456  
95 800 010 0793  
03480 33466  
32 84 84 00  
Fax Number  
03 9 879 9179  
0662 45 79 90 19  
02 757 03 11  
519 622 9311  
514 694 4399  
45 76 71 11  
90 502 2930  
1 48 14 24 14  
089 714 60 35  
2686 8505  
02 48301915  
03 5472 2977  
02 596 7455  
05 404 0890  
03480 30673  
32 84 86 00  
2265887  
France  
Germany  
Hong Kong  
Italy  
Japan  
Korea  
Mexico  
Netherlands  
Norway  
Singapore  
Spain  
Sweden  
2265886  
91 640 0085  
08 730 49 70  
056 20 51 51  
02 377 1200  
01635 523545  
91 640 0533  
08 730 43 70  
056 20 51 55  
02 737 4644  
01635 523154  
Switzerland  
Taiwan  
U.K.  
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Technical Support Form  
___________________________________________________  
Photocopy this form and update it each time you make changes to your software or hardware, and use the completed  
copy of this form as a reference for your current configuration. Completing this form accurately before contacting  
National Instruments for technical support helps our applications engineers answer your questions more efficiently.  
If you are using any National Instruments hardware or software products related to this problem, include the  
configuration forms from their user manuals. Include additional pages if necessary.  
Name  
Company  
Address  
Fax (  
Computer brand  
Operating system  
)
Phone (  
Model  
)
Processor  
Speed  
MHz  
RAM  
no  
MB  
Display adapter  
Mouse  
yes  
Other adapters installed  
Brand  
Hard disk capacity  
Instruments used  
MB  
National Instruments hardware product model  
Configuration  
Revision  
National Instruments software product  
Configuration  
Version  
The problem is  
List any error messages  
The following steps will reproduce the problem  
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PC-DIO-24 Hardware and Software  
Configuration Form  
___________________________________________________  
Record the settings and revisions of your hardware and software on the line to the right of each item. Complete a  
new copy of this form each time you revise your software or hardware configuration, and use this form as a  
reference for your current configuration. Completing this form accurately before contacting National Instruments  
for technical support helps our applications engineers answer your questions more efficiently.  
National Instruments Products  
•
•
PC-DIO-24 Revision  
_________________________________________________  
_________________________________________________  
_________________________________________________  
_________________________________________________  
Base I/O Address of PC-DIO-24  
(Factory Setting–hex 210)  
•
•
•
•
Interrupt Enable Line of PC-DIO-24  
(Factory Setting–PC4)  
Interrupt Level of PC-DIO-24  
(Factory Setting–5)  
Handshaking Mode  
(mode 0, mode 1, mode 2)  
_________________________________________________  
_________________________________________________  
NI-DAQ or LabWindows/CVI Version  
Other Products  
•
•
•
•
•
•
•
•
•
•
Computer Make and Model  
_________________________________________________  
_________________________________________________  
_________________________________________________  
_________________________________________________  
_________________________________________________  
_________________________________________________  
_________________________________________________  
_________________________________________________  
_________________________________________________  
Microprocessor  
Clock Frequency  
Type of Video Board Installed  
DOS Version  
Programming Language  
Programming Language Version  
Other Boards in System  
Base I/O Address of Other Boards  
Interrupt Enable Line  
of Other Boards  
_________________________________________________  
_________________________________________________  
•
Interrupt Level of Other Boards  
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Documentation Comment Form  
___________________________________________________  
National Instruments encourages you to comment on the documentation supplied with our products. This  
information helps us provide quality products to meet your needs.  
Title: PC-DIO-24 User Manual  
Edition Date:  
Part Number:  
September 1995  
320288B-01  
Please comment on the completeness, clarity, and organization of the manual.  
If you find errors in the manual, please record the page numbers and describe the errors.  
Thank you for your help.  
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Title  
Company  
Address  
Phone  
(
)
Mail to:  
Technical Publications  
Fax to:  
Technical Publications  
National Instruments Corporation  
MS 53-02  
National Instruments Corporation  
6504 Bridge Point Parkway, MS 53-02  
Austin, TX 78730-5039  
(512) 794-5678  
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Glossary  
___________________________________________________  
Prefix  
Meaning  
Value  
-6  
-3  
µ-  
m-  
k-  
micro-  
milli-  
kilo-  
10  
10  
3
10  
6
M-  
mega-  
10  
°
degrees  
ohms  
percent  
Ω
%
A
amperes  
AWG  
BCD  
C
American Wire Gauge  
binary-coded decimal  
Celsius  
DMA  
hex  
Hz  
direct memory access  
hexadecimal  
hertz  
in.  
inches  
Iin  
input current  
output current  
1,024 bytes  
least significant bit  
megabytes of memory  
meters  
Iout  
kbytes  
LSB  
MB  
m
MSB  
PPI  
REXT  
s
SSR  
V
most significant bit  
programmable peripheral interface  
external resistance  
seconds  
solid-state relay  
volts  
VEXT  
external volt  
VDC  
volts direct current  
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PC-DIO-24 User Manual  
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Index  
Special Characters  
+5 V signal (table), 2-7  
82C55A Programmable Peripheral Interface.  
See OKI 82C55A Programmable  
Peripheral Interface.  
(table), 4-5  
custom cables, 1-4 to 1-5  
customer communication, xiii, D-1  
D
A
DATA signal  
description (table), 2-8  
ACK* signal  
mode 1 input timing, 2-9  
mode 1 output timing, 2-10  
mode 2 bidirectional timing, 2-11  
digital I/O connector, 3-2  
digital I/O specifications, A-1  
digital logic level specifications  
input signals (table), A-1  
output signals (table), A-1  
documentation  
description (table), 2-8  
mode 1 output timing, 2-10  
mode 2 bidirectional timing, 2-11  
address, setting. See base I/O address.  
address decoder, 3-2  
B
conventions used in manual, xii  
National Instruments  
documentation, xii-xiii  
organization of manual, xi-xii  
related documentation, xiii  
base I/O address  
example switch settings (table), 2-3  
factory settings (table), 2-1  
setting, 2-2 to 2-3  
block diagram of PC-DIO-24, 3-1  
board configuration. See configuration.  
bus transceivers, 3-2  
E
environment specifications, A-1  
equipment, optional, 1-4 to 1-5  
C
cables, custom, 1-4 to 1-5  
F
configuration, 2-1 to 2-5. See also  
installation; signal connections.  
jumper and switch settings, 2-1 to 2-5  
base I/O address settings, 2-1 to 2-3  
factory settings, (table), 2-1  
fax technical support, D-1  
fuse, replacement, 2-7  
interrupt enable settings, 2-4  
interrupt level settings, 2-4 to 2-5  
parts locator diagram, 2-2  
G
control words  
getting started with PC-DIO-24, 1-2  
GND signal (table), 2-7  
control-word formats (figure), 4-4  
mode 1 strobed input (figure), 4-7  
mode 1 strobed output (figure), 4-9  
mode 2 bidirectional bus (figure), 4-12  
Port C set/reset control words  
© National Instruments Corporation  
Index-1  
PC-DIO-24 User Manual  
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Index  
interrupt enable settings, 2-4  
interrupt handling, 4-15 to 4-16  
recommended jumper settings for  
W1, 4-16  
I
IBF signal  
description (table), 2-8  
interrupt level settings, 2-4 to 2-5  
mode 1 input timing, 2-9  
mode 2 bidirectional timing, 2-11  
IBFA bit, Port C, 4-8, 4-12  
IBFB bit, Port C, 4-8  
installation. See also configuration.  
procedure for, 2-5  
unpacking the PC-DIO-24, 1-6  
INTE1 bit, Port C, 4-12  
INTE2 bit, Port C, 4-13  
INTEA bit, Port C, 4-8, 4-10  
INTEB bit, Port C, 4-8, 4-10  
interrupt control circuitry, 3-2  
interrupt enable  
L
LabVIEW and LabWindows/CVI  
application software, 1-2  
M
manual. See documentation.  
mode 0 basic I/O, 4-5 to 4-7  
configurations (table), 4-6  
factory settings (table), 2-1  
jumper settings (figure), 2-4  
setting, 2-4  
overview, 4-5  
programming example, 4-6 to 4-7  
purpose and use, 4-2  
interrupt handling, 4-15 to 4-16  
interrupt enable signals for all mode  
combinations (table), 4-16  
recommended jumper settings for  
W1, 4-16  
mode 1 input timing, 2-9  
mode 1 output timing, 2-10  
mode 1 strobed input, 4-7 to 4-9  
control words written to CNFG register  
(figures), 4-7  
interrupt level  
factory settings (table), 2-1  
jumper setting (figure), 2-4  
settings, 2-4 to 2-5  
Port C pin assignments (figure), 4-8  
Port C status-word bit definitions, 4-8  
programming example, 4-9  
purpose and use, 4-2  
interrupt programming examples, 4-14  
to 4-15  
INTR signal  
mode 1 strobed output, 4-9 to 4-11  
control words written to CNFG register  
(figure), 4-9 to 4-10  
description (table), 2-8  
mode 1 input timing, 2-9  
mode 1 output timing, 2-10  
mode 2 bidirectional timing, 2-11  
INTRA bit, Port C, 4-8, 4-10, 4-13  
INTRB bit, Port C, 4-8, 4-10  
I/O bit, Port C, 4-8, 4-10, 4-13  
I/O connectors  
Port C pin assignments (figure), 4-11  
Port C status-word bit definitions, 4-10  
programming example, 4-11  
purpose and use, 4-2  
mode 2 bidirectional bus, 4-12 to 4-14  
control word written to CNFG Register  
(figure), 4-12  
digital I/O connector, 3-2  
pin description (figure), 2-6, B-1  
Port C pin assignments (figure), 4-13  
Port C status-word bit definitions, 4-12  
to 4-13  
programming example, 4-13 to 4-14  
purpose and use, 4-2  
mode 2 bidirectional timing, 2-11  
J
jumper and switch settings, 2-1 to 2-5  
base I/O address settings, 2-1 to 2-3  
factory settings, (table), 2-1  
PC-DIO-24 User Manual  
Index-2  
© National Instruments Corporation  
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Index  
register-level programming, 1-4  
theory of operation, 3-1 to 3-2  
unpacking, 1-6  
N
NI-DAQ driver software, 1-3  
physical specifications, A-2  
Port C  
pin assignments  
O
description, 2-7  
mode 1 input (figure), 4-8  
mode 1 output (figure), 4-11  
mode 2 bidirectional bus  
(figure), 4-13  
OBF* signal  
description (table), 2-8  
mode 1 output timing, 2-10  
mode 2 bidirectional timing, 2-11  
OBFA* bit, Port C, 4-10  
OBFB* bit, Port C, 4-10, 4-12  
OKI 82C55A Programmable Peripheral  
Interface  
signal assignments (table), 2-7  
set/reset control words (table), 4-5  
status-word bit definitions  
mode 1 strobed input, 4-8  
mode 1 strobed output, 4-10  
capabilities, 1-1  
mode 2 bidirectional bus (figure),  
4-12 to 4-13  
power requirements (from PC I/O  
channel), A-2  
programming. See register-level  
programming.  
data sheet, C-1 to C-17  
modes of operation, 4-1 to 4-2  
mode 0, 4-2  
mode 1, 4-2  
mode 2, 4-2  
single bit set/reset feature, 4-2  
overview, 3-2  
optional equipment for PC-DIO-24, 1-4  
to 1-5  
R
RD* signal  
description (table), 2-8  
P
mode 1 input timing, 2-9  
mode 2 bidirectional timing, 2-11  
register-level programming, 4-1 to 4-16  
82C55A modes of operation, 4-1 to 4-2  
compared with other software  
options, 1-4  
PA<7..0> signal (table), 2-7  
parts locator diagram, 2-2  
PB<7..0> signal (table), 2-7  
PC I/O channel control circuitry, 3-2  
PC<7..0> signal (table), 2-7  
PC-DIO-24  
interrupt handling, 4-15 to 4-16  
interrupt enable signals for all mode  
combinations (table), 4-16  
interrupt programming examples, 4-14  
to 4-15  
mode 0 basic I/O, 4-5 to 4-7  
configurations (table), 4-6  
overview, 4-5  
programming example, 4-6 to 4-7  
mode 1 strobed input, 4-7 to 4-9  
control words (figures), 4-7  
Port C pin assignments (figure), 4-8  
Port C status-word bit  
block diagram, 3-1  
custom cables, 1-4 to 1-5  
driving SSR-OAC-5 or SSR-OAC-5A  
(note), 1-1  
getting started, 1-2  
interfacing with other devices, 1-1  
optional equipment, 1-4 to 1-5  
overview, 1-1 to 1-2  
parts locator diagram, 2-2  
software programming choices, 1-2.  
to 1-4  
LabVIEW and LabWindows/CVI  
application software, 1-2  
NI-DAQ driver software, 1-3  
definitions, 4-8  
programming example, 4-9  
© National Instruments Corporation  
Index-3  
PC-DIO-24 User Manual  
Download from Www.Somanuals.com. All Manuals Search And Download.  
Index  
mode 1 strobed output, 4-9 to 4-11  
environment, A-1  
physical, A-2  
power requirements (from PC I/O  
channel), A-2  
control words written to CNFG  
register (figure), 4-9 to 4-10  
Port C pin assignments (figure), 4-11  
Port C status-word bit  
transfer rates, A-2  
definitions, 4-10  
SSR-OAC-5 and SSR-OAC-5A output  
modules, driving with PC-DIO-24  
(note), 1-1  
programming example, 4-11  
mode 2 bidirectional bus, 4-12 to 4-14  
control word written to CNFG  
Register (figure), 4-12  
STB* signal  
description (table), 2-8  
mode 1 input timing, 2-9  
mode 2 bidirectional timing, 2-11  
switch settings. See jumper and  
switch settings.  
Port C pin assignments (figure), 4-13  
Port C status-word bit definitions,  
4-12 to 4-13  
programming example, 4-13 to 4-14  
register descriptions, 4-3 to 4-5  
control word formats (figure), 4-4  
Port C set/reset control words  
(table), 4-5  
T
single-bit set/reset feature, 4-4 to 4-5  
register map, 4-3  
technical support, D-1  
theory of operation, 3-1 to 3-2  
82C55A Programmable Peripheral  
Interface, 3-2  
S
address decoder, 3-2  
block diagram, 3-1  
signal connections  
bus transceivers, 3-2  
descriptions (table), 2-7  
I/O connector pin description  
(figure), 2-6  
Port C pin assignments  
description, 2-7  
signal assignments (table), 2-7  
timing specifications, 2-8 to 2-11  
mode 1 input timing, 2-9  
mode 1 output timing, 2-10  
mode 2 bidirectional timing, 2-11  
signals (table), 2-8  
digital I/O connector, 3-2  
interrupt control circuitry, 3-2  
PC I/O channel control circuitry, 3-2  
timing specifications, 2-8 to 2-11  
mode 1 input timing, 2-9  
mode 1 output timing, 2-10  
mode 2 bidirectional timing, 2-11  
signals (table), 2-8  
transfer rate specifications, A-2  
single bit set/reset feature  
OKI 82C55A Programmable Peripheral  
Interface, 4-2  
U
unpacking the PC-DIO-24, 1-6  
Port C set/reset control words  
(table), 4-5  
software programming choices, 1-2 to 1-4.  
See also register-level programming.  
LabVIEW and LabWindows/CVI  
application software, 1-2  
NI-DAQ driver software, 1-3  
specifications  
W
WR* signal  
description (table), 2-8  
mode 1 output timing, 2-10  
mode 2 bidirectional timing, 2-11  
digital I/O, A-1  
digital logic levels, A-1  
PC-DIO-24 User Manual  
Index-4  
© National Instruments Corporation  
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