HD74LV2GT04A
Triple Inverters / CMOS Logic Level Shifter
REJ03D0139–0200Z
(Previous ADE-205-664A (Z))
Rev.2.00
Oct.14.2003
Description
The HD74LV2GT04A has triple inverters in an 8 pin package. The input protection circuitry on this device
allows over voltage tolerance on the input, allowing the device to be used as a logic–level translator from
3.0 V CMOS Logic to 5.0 V CMOS Logic or from 1.8 V CMOS logic to 3.0 V CMOS Logic while
operating at the high-voltage power supply. Low voltage and high-speed operation is suitable for the
battery powered products (e.g., notebook computers), and the low power consumption extends the battery
life.
Features
•
•
•
The basic gate function is lined up as Renesas uni logic series.
Supplied on emboss taping for high-speed automatic mounting.
TTL compatible input level.
Supply voltage range : 3.0 to 5.5 V
Operating temperature range : –40 to +85°C
•
Logic-level translate function
3.0 V CMOS logic → 5.0 V CMOS logic (@VCC = 5.0 V)
1.8 V or 2.5 V CMOS logic → 3.3 V CMOS logic (@VCC = 3.3 V)
•
All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V)
All outputs VO (Max.) = 5.5 V (@VCC = 0 V)
•
•
•
Output current ±6 mA (@VCC = 3.0 V to 3.6 V), ±12 mA (@VCC = 4.5 V to 5.5 V)
All the logical input has hysteresis voltage for the slow transition.
Ordering Information
Part Name
Package Type
Package Code
Package
Abbreviation
Taping Abbreviation
(Quantity)
HD74LV2GT04AUSE SSOP-8 pin
TTP-8DBV
US
E (3,000 pcs/reel)
Rev.2.00, Oct.14.2003, page 1 of 7
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HD74LV2GT04A
Pin Arrangement
1
2
3
4
1A
3Y
8
7
6
5
VCC
1Y
2A
3A
2Y
GND
(Top view)
Absolute Maximum Ratings
Item
Symbol
VCC
Ratings
–0.5 to 7.0
–0.5 to 7.0
–0.5 to VCC + 0.5
–0.5 to 7.0
–20
Unit Test Conditions
Supply voltage range
Input voltage range *1
Output voltage range *1, 2
V
V
VI
VO
V
Output : H or L
VCC : OFF
Input clamp current
IIK
IOK
IO
mA
mA
mA
mA
VI < 0
Output clamp current
Continuous output current
±50
VO < 0 or VO > VCC
VO = 0 to VCC
±25
Continuous current through
VCC or GND
I
CC or IGND
±50
Maximum power dissipation
at Ta = 25°C (in still air) *3
PT
200
mW
°C
Storage temperature
Tstg
–65 to 150
Notes:
The absolute maximum ratings are values, which must not individually be exceeded, and
furthermore no two of which may be realized at the same time.
1. The input and output voltage ratings may be exceeded if the input and output clamp-current
ratings are observed.
2. This value is limited to 5.5 V maximum.
3. The maximum package power dissipation was calculated using a junction temperature of 150°C.
Rev.2.00, Oct.14.2003, page 3 of 7
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HD74LV2GT04A
Recommended Operating Conditions
Item
Symbol
VCC
VI
Min
3.0
0
Max
5.5
5.5
VCC
6
Unit
V
Conditions
Supply voltage range
Input voltage range
Output voltage range
Output current
V
VO
0
V
IOL
—
—
—
—
0
mA
VCC = 3.0 to 3.6 V
VCC = 4.5 to 5.5 V
VCC = 3.0 to 3.6 V
VCC = 4.5 to 5.5 V
12
IOH
–6
–12
100
20
Input transition rise or fall rate ∆t / ∆v
ns / V VCC = 3.0 to 3.6 V
CC = 4.5 to 5.5 V
0
V
Operating free-air temperature Ta
–40
85
°C
Note: Unused or floating inputs must be held high or low.
Electrical Characteristic
•
Ta = –40 to 85°C
Item
Symbol VCC (V) *
Min
1.5
2.0
—
Typ
—
Max
—
Unit Test condition
Input voltage
VIH
VIL
VH
3.0 to 3.6
4.5 to 5.5
3.0 to 3.6
4.5 to 5.5
3.3
V
—
—
—
0.6
0.8
—
—
—
–
Hysteresis voltage
Output voltage
—
0.10
0.15
—
V
V
VT+ – VT
5.0
—
—
VOH
Min to Max VCC–0.1
—
IOH = –50 µA
IOH = –6 mA
IOH = –12 mA
IOL = 50 µA
IOL = 6 mA
3.0
2.48
3.8
—
—
—
4.5
—
—
VOL
Min to Max
3.0
—
0.1
0.44
0.55
±1
—
—
4.5
—
—
IOL = 12 mA
Input current
IIN
0 to 5.5
5.5
—
—
µA VIN = 5.5 V or GND
Quiescent
supply current
ICC
—
—
10
µA VIN = VCC or GND,
IO = 0
∆ICC
5.5
—
—
1.5
mA One input VIN = 3.4 V,
other input VCC or GND
Output leakage current IOFF
Input capacitance CIN
0
—
—
—
5
µA VI or VO = 0 to 5.5 V
5.0
3.0
—
pF VIN = VCC or GND
Note: For conditions shown as Min or Max, use the appropriate values under recommended operating
conditions.
Rev.2.00, Oct.14.2003, page 4 of 7
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HD74LV2GT04A
Switching Characteristics
•
VCC = 3.3 ± 0.3 V
Ta = 25°C
Ta = –40 to 85°C
Test
FROM
TO
Item
Symbol
Unit Conditions (Input) (Output)
Min
—
Typ Max Min Max
Propagation tPLH
delay time tPHL
6.5
12.0 1.0
14.0
17.0
ns
CL = 15 pF
CL = 50 pF
A
Y
—
11.0 15.0 1.0
•
VCC = 5.0 ±0.5 V
Ta = 25°C
Min
Ta = –40 to 85°C
Test
FROM
TO
Item
Symbol
Unit Conditions (Input) (Output)
Typ Max Min
Max
8.0
Propagation tPLH
delay time tPHL
—
—
5.0
8.0
7.0
1.0
ns
CL = 15 pF
CL = 50 pF
A
Y
10.5 1.0
12.0
Operating Characteristics
•
CL = 50 pF
Ta = 25°C
Item
Symbol
VCC (V)
Unit
Test Conditions
Min
Typ
10.0
Max
Power dissipation
capacitance
CPD
5.0
—
—
pF
f = 10 MHz
Test Circuit
VCC
Output
Input
Pulse
generator
CL
50Ω
Note: CL includes probe and jig capacitance.
Rev.2.00, Oct.14.2003, page 5 of 7
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HD74LV2GT04A
• Waveforms
tr
tf
VI
90%
Vref
10%
90%
Vref
10%
Input
GND
VOH
50%
50%
tPLH
Output
VOL
tPHL
INPUTS
tr / tf
VCC (V)
Vref
50%
VI
3.3±0.3 2.5 V
5.0±0.5 3 V
≤
≤
3.0 ns
3.0 ns 1.5 V
Notes: 1. Input waveform : PRR ≤ 1 MHz, Zo = 50 Ω.
2. The output are measured one at a time with one transition per measurement.
Rev.2.00, Oct.14.2003, page 6 of 7
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HD74LV2GT04A
Package Dimensions
2.0 ± 0.2
1.5 ± 0.2
Unit: mm
(0.5) (0.5) (0.5)
+ 0.1
− 0.05
8 − 0.2
Package Code
JEDEC
JEITA
TTP–8DBV
0.010 g
Mass (reference value)
Rev.2.00, Oct.14.2003, page 7 of 7
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